1 /* $NetBSD: arm32_machdep.c,v 1.44 2004/03/24 15:34:47 atatat Exp $ */ 2 3 /*- 4 * SPDX-License-Identifier: BSD-4-Clause 5 * 6 * Copyright (c) 2004 Olivier Houchard 7 * Copyright (c) 1994-1998 Mark Brinicombe. 8 * Copyright (c) 1994 Brini. 9 * All rights reserved. 10 * 11 * This code is derived from software written for Brini by Mark Brinicombe 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 3. All advertising materials mentioning features or use of this software 22 * must display the following acknowledgement: 23 * This product includes software developed by Mark Brinicombe 24 * for the NetBSD Project. 25 * 4. The name of the company nor the name of the author may be used to 26 * endorse or promote products derived from this software without specific 27 * prior written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 30 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 31 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 32 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 33 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 34 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 35 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 37 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 38 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 39 * SUCH DAMAGE. 40 * 41 * Machine dependent functions for kernel setup 42 * 43 * Created : 17/09/94 44 * Updated : 18/04/01 updated for new wscons 45 */ 46 47 #include "opt_ddb.h" 48 #include "opt_kstack_pages.h" 49 #include "opt_platform.h" 50 #include "opt_sched.h" 51 #include "opt_timer.h" 52 53 #include <sys/cdefs.h> 54 __FBSDID("$FreeBSD$"); 55 56 #include <sys/param.h> 57 #include <sys/buf.h> 58 #include <sys/bus.h> 59 #include <sys/cons.h> 60 #include <sys/cpu.h> 61 #include <sys/devmap.h> 62 #include <sys/efi.h> 63 #include <sys/imgact.h> 64 #include <sys/kdb.h> 65 #include <sys/kernel.h> 66 #include <sys/ktr.h> 67 #include <sys/linker.h> 68 #include <sys/msgbuf.h> 69 #include <sys/physmem.h> 70 #include <sys/reboot.h> 71 #include <sys/rwlock.h> 72 #include <sys/sched.h> 73 #include <sys/syscallsubr.h> 74 #include <sys/sysent.h> 75 #include <sys/sysproto.h> 76 #include <sys/vmmeter.h> 77 78 #include <vm/vm_object.h> 79 #include <vm/vm_page.h> 80 #include <vm/vm_pager.h> 81 82 #include <machine/asm.h> 83 #include <machine/debug_monitor.h> 84 #include <machine/machdep.h> 85 #include <machine/metadata.h> 86 #include <machine/pcb.h> 87 #include <machine/platform.h> 88 #include <machine/sysarch.h> 89 #include <machine/undefined.h> 90 #include <machine/vfp.h> 91 #include <machine/vmparam.h> 92 93 #ifdef FDT 94 #include <dev/fdt/fdt_common.h> 95 #include <machine/ofw_machdep.h> 96 #endif 97 98 #ifdef DEBUG 99 #define debugf(fmt, args...) printf(fmt, ##args) 100 #else 101 #define debugf(fmt, args...) 102 #endif 103 104 #if defined(COMPAT_FREEBSD4) || defined(COMPAT_FREEBSD5) || \ 105 defined(COMPAT_FREEBSD6) || defined(COMPAT_FREEBSD7) || \ 106 defined(COMPAT_FREEBSD9) 107 #error FreeBSD/arm doesn't provide compatibility with releases prior to 10 108 #endif 109 110 #if __ARM_ARCH >= 6 && !defined(INTRNG) 111 #error armv6 requires INTRNG 112 #endif 113 114 #ifndef _ARM_ARCH_5E 115 #error FreeBSD requires ARMv5 or later 116 #endif 117 118 struct pcpu __pcpu[MAXCPU]; 119 struct pcpu *pcpup = &__pcpu[0]; 120 121 static struct trapframe proc0_tf; 122 uint32_t cpu_reset_address = 0; 123 int cold = 1; 124 vm_offset_t vector_page; 125 126 /* The address at which the kernel was loaded. Set early in initarm(). */ 127 vm_paddr_t arm_physmem_kernaddr; 128 129 int (*_arm_memcpy)(void *, void *, int, int) = NULL; 130 int (*_arm_bzero)(void *, int, int) = NULL; 131 int _min_memcpy_size = 0; 132 int _min_bzero_size = 0; 133 134 extern int *end; 135 136 #ifdef FDT 137 vm_paddr_t pmap_pa; 138 #if __ARM_ARCH >= 6 139 vm_offset_t systempage; 140 vm_offset_t irqstack; 141 vm_offset_t undstack; 142 vm_offset_t abtstack; 143 #else 144 /* 145 * This is the number of L2 page tables required for covering max 146 * (hypothetical) memsize of 4GB and all kernel mappings (vectors, msgbuf, 147 * stacks etc.), uprounded to be divisible by 4. 148 */ 149 #define KERNEL_PT_MAX 78 150 static struct pv_addr kernel_pt_table[KERNEL_PT_MAX]; 151 struct pv_addr systempage; 152 static struct pv_addr msgbufpv; 153 struct pv_addr irqstack; 154 struct pv_addr undstack; 155 struct pv_addr abtstack; 156 static struct pv_addr kernelstack; 157 #endif /* __ARM_ARCH >= 6 */ 158 #endif /* FDT */ 159 160 #ifdef PLATFORM 161 static delay_func *delay_impl; 162 static void *delay_arg; 163 #endif 164 165 struct kva_md_info kmi; 166 /* 167 * arm32_vector_init: 168 * 169 * Initialize the vector page, and select whether or not to 170 * relocate the vectors. 171 * 172 * NOTE: We expect the vector page to be mapped at its expected 173 * destination. 174 */ 175 176 extern unsigned int page0[], page0_data[]; 177 void 178 arm_vector_init(vm_offset_t va, int which) 179 { 180 unsigned int *vectors = (int *) va; 181 unsigned int *vectors_data = vectors + (page0_data - page0); 182 int vec; 183 184 /* 185 * Loop through the vectors we're taking over, and copy the 186 * vector's insn and data word. 187 */ 188 for (vec = 0; vec < ARM_NVEC; vec++) { 189 if ((which & (1 << vec)) == 0) { 190 /* Don't want to take over this vector. */ 191 continue; 192 } 193 vectors[vec] = page0[vec]; 194 vectors_data[vec] = page0_data[vec]; 195 } 196 197 /* Now sync the vectors. */ 198 icache_sync(va, (ARM_NVEC * 2) * sizeof(u_int)); 199 200 vector_page = va; 201 #if __ARM_ARCH < 6 202 if (va == ARM_VECTORS_HIGH) { 203 /* 204 * Enable high vectors in the system control reg (SCTLR). 205 * 206 * Assume the MD caller knows what it's doing here, and really 207 * does want the vector page relocated. 208 * 209 * Note: This has to be done here (and not just in 210 * cpu_setup()) because the vector page needs to be 211 * accessible *before* cpu_startup() is called. 212 * Think ddb(9) ... 213 */ 214 cpu_control(CPU_CONTROL_VECRELOC, CPU_CONTROL_VECRELOC); 215 } 216 #endif 217 } 218 219 static void 220 cpu_startup(void *dummy) 221 { 222 struct pcb *pcb = thread0.td_pcb; 223 const unsigned int mbyte = 1024 * 1024; 224 #if __ARM_ARCH < 6 && !defined(ARM_CACHE_LOCK_ENABLE) 225 vm_page_t m; 226 #endif 227 228 identify_arm_cpu(); 229 230 vm_ksubmap_init(&kmi); 231 232 /* 233 * Display the RAM layout. 234 */ 235 printf("real memory = %ju (%ju MB)\n", 236 (uintmax_t)arm32_ptob(realmem), 237 (uintmax_t)arm32_ptob(realmem) / mbyte); 238 printf("avail memory = %ju (%ju MB)\n", 239 (uintmax_t)arm32_ptob(vm_free_count()), 240 (uintmax_t)arm32_ptob(vm_free_count()) / mbyte); 241 if (bootverbose) { 242 physmem_print_tables(); 243 devmap_print_table(); 244 } 245 246 bufinit(); 247 vm_pager_bufferinit(); 248 pcb->pcb_regs.sf_sp = (u_int)thread0.td_kstack + 249 USPACE_SVC_STACK_TOP; 250 pmap_set_pcb_pagedir(kernel_pmap, pcb); 251 #if __ARM_ARCH < 6 252 vector_page_setprot(VM_PROT_READ); 253 pmap_postinit(); 254 #ifdef ARM_CACHE_LOCK_ENABLE 255 pmap_kenter_user(ARM_TP_ADDRESS, ARM_TP_ADDRESS); 256 arm_lock_cache_line(ARM_TP_ADDRESS); 257 #else 258 m = vm_page_alloc(NULL, 0, VM_ALLOC_NOOBJ | VM_ALLOC_ZERO); 259 pmap_kenter_user(ARM_TP_ADDRESS, VM_PAGE_TO_PHYS(m)); 260 #endif 261 *(uint32_t *)ARM_RAS_START = 0; 262 *(uint32_t *)ARM_RAS_END = 0xffffffff; 263 #endif 264 } 265 266 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL); 267 268 /* 269 * Flush the D-cache for non-DMA I/O so that the I-cache can 270 * be made coherent later. 271 */ 272 void 273 cpu_flush_dcache(void *ptr, size_t len) 274 { 275 276 dcache_wb_poc((vm_offset_t)ptr, (vm_paddr_t)vtophys(ptr), len); 277 } 278 279 /* Get current clock frequency for the given cpu id. */ 280 int 281 cpu_est_clockrate(int cpu_id, uint64_t *rate) 282 { 283 #if __ARM_ARCH >= 6 284 struct pcpu *pc; 285 286 pc = pcpu_find(cpu_id); 287 if (pc == NULL || rate == NULL) 288 return (EINVAL); 289 290 if (pc->pc_clock == 0) 291 return (EOPNOTSUPP); 292 293 *rate = pc->pc_clock; 294 295 return (0); 296 #else 297 return (ENXIO); 298 #endif 299 } 300 301 void 302 cpu_idle(int busy) 303 { 304 305 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d", busy, curcpu); 306 spinlock_enter(); 307 #ifndef NO_EVENTTIMERS 308 if (!busy) 309 cpu_idleclock(); 310 #endif 311 if (!sched_runnable()) 312 cpu_sleep(0); 313 #ifndef NO_EVENTTIMERS 314 if (!busy) 315 cpu_activeclock(); 316 #endif 317 spinlock_exit(); 318 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done", busy, curcpu); 319 } 320 321 int 322 cpu_idle_wakeup(int cpu) 323 { 324 325 return (0); 326 } 327 328 #ifdef NO_EVENTTIMERS 329 /* 330 * Most ARM platforms don't need to do anything special to init their clocks 331 * (they get intialized during normal device attachment), and by not defining a 332 * cpu_initclocks() function they get this generic one. Any platform that needs 333 * to do something special can just provide their own implementation, which will 334 * override this one due to the weak linkage. 335 */ 336 void 337 arm_generic_initclocks(void) 338 { 339 } 340 __weak_reference(arm_generic_initclocks, cpu_initclocks); 341 342 #else 343 void 344 cpu_initclocks(void) 345 { 346 347 #ifdef SMP 348 if (PCPU_GET(cpuid) == 0) 349 cpu_initclocks_bsp(); 350 else 351 cpu_initclocks_ap(); 352 #else 353 cpu_initclocks_bsp(); 354 #endif 355 } 356 #endif 357 358 #ifdef PLATFORM 359 void 360 arm_set_delay(delay_func *impl, void *arg) 361 { 362 363 KASSERT(impl != NULL, ("No DELAY implementation")); 364 delay_impl = impl; 365 delay_arg = arg; 366 } 367 368 void 369 DELAY(int usec) 370 { 371 372 TSENTER(); 373 delay_impl(usec, delay_arg); 374 TSEXIT(); 375 } 376 #endif 377 378 void 379 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 380 { 381 } 382 383 void 384 spinlock_enter(void) 385 { 386 struct thread *td; 387 register_t cspr; 388 389 td = curthread; 390 if (td->td_md.md_spinlock_count == 0) { 391 cspr = disable_interrupts(PSR_I | PSR_F); 392 td->td_md.md_spinlock_count = 1; 393 td->td_md.md_saved_cspr = cspr; 394 critical_enter(); 395 } else 396 td->td_md.md_spinlock_count++; 397 } 398 399 void 400 spinlock_exit(void) 401 { 402 struct thread *td; 403 register_t cspr; 404 405 td = curthread; 406 cspr = td->td_md.md_saved_cspr; 407 td->td_md.md_spinlock_count--; 408 if (td->td_md.md_spinlock_count == 0) { 409 critical_exit(); 410 restore_interrupts(cspr); 411 } 412 } 413 414 /* 415 * Clear registers on exec 416 */ 417 void 418 exec_setregs(struct thread *td, struct image_params *imgp, uintptr_t stack) 419 { 420 struct trapframe *tf = td->td_frame; 421 422 memset(tf, 0, sizeof(*tf)); 423 tf->tf_usr_sp = stack; 424 tf->tf_usr_lr = imgp->entry_addr; 425 tf->tf_svc_lr = 0x77777777; 426 tf->tf_pc = imgp->entry_addr; 427 tf->tf_spsr = PSR_USR32_MODE; 428 } 429 430 #ifdef VFP 431 /* 432 * Get machine VFP context. 433 */ 434 void 435 get_vfpcontext(struct thread *td, mcontext_vfp_t *vfp) 436 { 437 struct pcb *pcb; 438 439 pcb = td->td_pcb; 440 if (td == curthread) { 441 critical_enter(); 442 vfp_store(&pcb->pcb_vfpstate, false); 443 critical_exit(); 444 } else 445 MPASS(TD_IS_SUSPENDED(td)); 446 memcpy(vfp->mcv_reg, pcb->pcb_vfpstate.reg, 447 sizeof(vfp->mcv_reg)); 448 vfp->mcv_fpscr = pcb->pcb_vfpstate.fpscr; 449 } 450 451 /* 452 * Set machine VFP context. 453 */ 454 void 455 set_vfpcontext(struct thread *td, mcontext_vfp_t *vfp) 456 { 457 struct pcb *pcb; 458 459 pcb = td->td_pcb; 460 if (td == curthread) { 461 critical_enter(); 462 vfp_discard(td); 463 critical_exit(); 464 } else 465 MPASS(TD_IS_SUSPENDED(td)); 466 memcpy(pcb->pcb_vfpstate.reg, vfp->mcv_reg, 467 sizeof(pcb->pcb_vfpstate.reg)); 468 pcb->pcb_vfpstate.fpscr = vfp->mcv_fpscr; 469 } 470 #endif 471 472 int 473 arm_get_vfpstate(struct thread *td, void *args) 474 { 475 int rv; 476 struct arm_get_vfpstate_args ua; 477 mcontext_vfp_t mcontext_vfp; 478 479 rv = copyin(args, &ua, sizeof(ua)); 480 if (rv != 0) 481 return (rv); 482 if (ua.mc_vfp_size != sizeof(mcontext_vfp_t)) 483 return (EINVAL); 484 #ifdef VFP 485 get_vfpcontext(td, &mcontext_vfp); 486 #else 487 bzero(&mcontext_vfp, sizeof(mcontext_vfp)); 488 #endif 489 490 rv = copyout(&mcontext_vfp, ua.mc_vfp, sizeof(mcontext_vfp)); 491 if (rv != 0) 492 return (rv); 493 return (0); 494 } 495 496 /* 497 * Get machine context. 498 */ 499 int 500 get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret) 501 { 502 struct trapframe *tf = td->td_frame; 503 __greg_t *gr = mcp->__gregs; 504 505 if (clear_ret & GET_MC_CLEAR_RET) { 506 gr[_REG_R0] = 0; 507 gr[_REG_CPSR] = tf->tf_spsr & ~PSR_C; 508 } else { 509 gr[_REG_R0] = tf->tf_r0; 510 gr[_REG_CPSR] = tf->tf_spsr; 511 } 512 gr[_REG_R1] = tf->tf_r1; 513 gr[_REG_R2] = tf->tf_r2; 514 gr[_REG_R3] = tf->tf_r3; 515 gr[_REG_R4] = tf->tf_r4; 516 gr[_REG_R5] = tf->tf_r5; 517 gr[_REG_R6] = tf->tf_r6; 518 gr[_REG_R7] = tf->tf_r7; 519 gr[_REG_R8] = tf->tf_r8; 520 gr[_REG_R9] = tf->tf_r9; 521 gr[_REG_R10] = tf->tf_r10; 522 gr[_REG_R11] = tf->tf_r11; 523 gr[_REG_R12] = tf->tf_r12; 524 gr[_REG_SP] = tf->tf_usr_sp; 525 gr[_REG_LR] = tf->tf_usr_lr; 526 gr[_REG_PC] = tf->tf_pc; 527 528 mcp->mc_vfp_size = 0; 529 mcp->mc_vfp_ptr = NULL; 530 memset(&mcp->mc_spare, 0, sizeof(mcp->mc_spare)); 531 532 return (0); 533 } 534 535 /* 536 * Set machine context. 537 * 538 * However, we don't set any but the user modifiable flags, and we won't 539 * touch the cs selector. 540 */ 541 int 542 set_mcontext(struct thread *td, mcontext_t *mcp) 543 { 544 mcontext_vfp_t mc_vfp, *vfp; 545 struct trapframe *tf = td->td_frame; 546 const __greg_t *gr = mcp->__gregs; 547 int spsr; 548 549 /* 550 * Make sure the processor mode has not been tampered with and 551 * interrupts have not been disabled. 552 */ 553 spsr = gr[_REG_CPSR]; 554 if ((spsr & PSR_MODE) != PSR_USR32_MODE || 555 (spsr & (PSR_I | PSR_F)) != 0) 556 return (EINVAL); 557 558 #ifdef WITNESS 559 if (mcp->mc_vfp_size != 0 && mcp->mc_vfp_size != sizeof(mc_vfp)) { 560 printf("%s: %s: Malformed mc_vfp_size: %d (0x%08X)\n", 561 td->td_proc->p_comm, __func__, 562 mcp->mc_vfp_size, mcp->mc_vfp_size); 563 } else if (mcp->mc_vfp_size != 0 && mcp->mc_vfp_ptr == NULL) { 564 printf("%s: %s: c_vfp_size != 0 but mc_vfp_ptr == NULL\n", 565 td->td_proc->p_comm, __func__); 566 } 567 #endif 568 569 if (mcp->mc_vfp_size == sizeof(mc_vfp) && mcp->mc_vfp_ptr != NULL) { 570 if (copyin(mcp->mc_vfp_ptr, &mc_vfp, sizeof(mc_vfp)) != 0) 571 return (EFAULT); 572 vfp = &mc_vfp; 573 } else { 574 vfp = NULL; 575 } 576 577 tf->tf_r0 = gr[_REG_R0]; 578 tf->tf_r1 = gr[_REG_R1]; 579 tf->tf_r2 = gr[_REG_R2]; 580 tf->tf_r3 = gr[_REG_R3]; 581 tf->tf_r4 = gr[_REG_R4]; 582 tf->tf_r5 = gr[_REG_R5]; 583 tf->tf_r6 = gr[_REG_R6]; 584 tf->tf_r7 = gr[_REG_R7]; 585 tf->tf_r8 = gr[_REG_R8]; 586 tf->tf_r9 = gr[_REG_R9]; 587 tf->tf_r10 = gr[_REG_R10]; 588 tf->tf_r11 = gr[_REG_R11]; 589 tf->tf_r12 = gr[_REG_R12]; 590 tf->tf_usr_sp = gr[_REG_SP]; 591 tf->tf_usr_lr = gr[_REG_LR]; 592 tf->tf_pc = gr[_REG_PC]; 593 tf->tf_spsr = gr[_REG_CPSR]; 594 #ifdef VFP 595 if (vfp != NULL) 596 set_vfpcontext(td, vfp); 597 #endif 598 return (0); 599 } 600 601 void 602 sendsig(catcher, ksi, mask) 603 sig_t catcher; 604 ksiginfo_t *ksi; 605 sigset_t *mask; 606 { 607 struct thread *td; 608 struct proc *p; 609 struct trapframe *tf; 610 struct sigframe *fp, frame; 611 struct sigacts *psp; 612 struct sysentvec *sysent; 613 int onstack; 614 int sig; 615 int code; 616 617 td = curthread; 618 p = td->td_proc; 619 PROC_LOCK_ASSERT(p, MA_OWNED); 620 sig = ksi->ksi_signo; 621 code = ksi->ksi_code; 622 psp = p->p_sigacts; 623 mtx_assert(&psp->ps_mtx, MA_OWNED); 624 tf = td->td_frame; 625 onstack = sigonstack(tf->tf_usr_sp); 626 627 CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm, 628 catcher, sig); 629 630 /* Allocate and validate space for the signal handler context. */ 631 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !(onstack) && 632 SIGISMEMBER(psp->ps_sigonstack, sig)) { 633 fp = (struct sigframe *)((uintptr_t)td->td_sigstk.ss_sp + 634 td->td_sigstk.ss_size); 635 #if defined(COMPAT_43) 636 td->td_sigstk.ss_flags |= SS_ONSTACK; 637 #endif 638 } else 639 fp = (struct sigframe *)td->td_frame->tf_usr_sp; 640 641 /* make room on the stack */ 642 fp--; 643 644 /* make the stack aligned */ 645 fp = (struct sigframe *)STACKALIGN(fp); 646 /* Populate the siginfo frame. */ 647 bzero(&frame, sizeof(frame)); 648 get_mcontext(td, &frame.sf_uc.uc_mcontext, 0); 649 #ifdef VFP 650 get_vfpcontext(td, &frame.sf_vfp); 651 frame.sf_uc.uc_mcontext.mc_vfp_size = sizeof(fp->sf_vfp); 652 frame.sf_uc.uc_mcontext.mc_vfp_ptr = &fp->sf_vfp; 653 #else 654 frame.sf_uc.uc_mcontext.mc_vfp_size = 0; 655 frame.sf_uc.uc_mcontext.mc_vfp_ptr = NULL; 656 #endif 657 frame.sf_si = ksi->ksi_info; 658 frame.sf_uc.uc_sigmask = *mask; 659 frame.sf_uc.uc_stack = td->td_sigstk; 660 frame.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) != 0 ? 661 (onstack ? SS_ONSTACK : 0) : SS_DISABLE; 662 mtx_unlock(&psp->ps_mtx); 663 PROC_UNLOCK(td->td_proc); 664 665 /* Copy the sigframe out to the user's stack. */ 666 if (copyout(&frame, fp, sizeof(*fp)) != 0) { 667 /* Process has trashed its stack. Kill it. */ 668 CTR2(KTR_SIG, "sendsig: sigexit td=%p fp=%p", td, fp); 669 PROC_LOCK(p); 670 sigexit(td, SIGILL); 671 } 672 673 /* 674 * Build context to run handler in. We invoke the handler 675 * directly, only returning via the trampoline. Note the 676 * trampoline version numbers are coordinated with machine- 677 * dependent code in libc. 678 */ 679 680 tf->tf_r0 = sig; 681 tf->tf_r1 = (register_t)&fp->sf_si; 682 tf->tf_r2 = (register_t)&fp->sf_uc; 683 684 /* the trampoline uses r5 as the uc address */ 685 tf->tf_r5 = (register_t)&fp->sf_uc; 686 tf->tf_pc = (register_t)catcher; 687 tf->tf_usr_sp = (register_t)fp; 688 sysent = p->p_sysent; 689 if (sysent->sv_sigcode_base != 0) 690 tf->tf_usr_lr = (register_t)sysent->sv_sigcode_base; 691 else 692 tf->tf_usr_lr = (register_t)(sysent->sv_psstrings - 693 *(sysent->sv_szsigcode)); 694 /* Set the mode to enter in the signal handler */ 695 #if __ARM_ARCH >= 7 696 if ((register_t)catcher & 1) 697 tf->tf_spsr |= PSR_T; 698 else 699 tf->tf_spsr &= ~PSR_T; 700 #endif 701 702 CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, tf->tf_usr_lr, 703 tf->tf_usr_sp); 704 705 PROC_LOCK(p); 706 mtx_lock(&psp->ps_mtx); 707 } 708 709 int 710 sys_sigreturn(td, uap) 711 struct thread *td; 712 struct sigreturn_args /* { 713 const struct __ucontext *sigcntxp; 714 } */ *uap; 715 { 716 ucontext_t uc; 717 int error; 718 719 if (uap == NULL) 720 return (EFAULT); 721 if (copyin(uap->sigcntxp, &uc, sizeof(uc))) 722 return (EFAULT); 723 /* Restore register context. */ 724 error = set_mcontext(td, &uc.uc_mcontext); 725 if (error != 0) 726 return (error); 727 728 /* Restore signal mask. */ 729 kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0); 730 731 return (EJUSTRETURN); 732 } 733 734 /* 735 * Construct a PCB from a trapframe. This is called from kdb_trap() where 736 * we want to start a backtrace from the function that caused us to enter 737 * the debugger. We have the context in the trapframe, but base the trace 738 * on the PCB. The PCB doesn't have to be perfect, as long as it contains 739 * enough for a backtrace. 740 */ 741 void 742 makectx(struct trapframe *tf, struct pcb *pcb) 743 { 744 pcb->pcb_regs.sf_r4 = tf->tf_r4; 745 pcb->pcb_regs.sf_r5 = tf->tf_r5; 746 pcb->pcb_regs.sf_r6 = tf->tf_r6; 747 pcb->pcb_regs.sf_r7 = tf->tf_r7; 748 pcb->pcb_regs.sf_r8 = tf->tf_r8; 749 pcb->pcb_regs.sf_r9 = tf->tf_r9; 750 pcb->pcb_regs.sf_r10 = tf->tf_r10; 751 pcb->pcb_regs.sf_r11 = tf->tf_r11; 752 pcb->pcb_regs.sf_r12 = tf->tf_r12; 753 pcb->pcb_regs.sf_pc = tf->tf_pc; 754 pcb->pcb_regs.sf_lr = tf->tf_usr_lr; 755 pcb->pcb_regs.sf_sp = tf->tf_usr_sp; 756 } 757 758 void 759 pcpu0_init(void) 760 { 761 #if __ARM_ARCH >= 6 762 set_curthread(&thread0); 763 #endif 764 pcpu_init(pcpup, 0, sizeof(struct pcpu)); 765 PCPU_SET(curthread, &thread0); 766 } 767 768 /* 769 * Initialize proc0 770 */ 771 void 772 init_proc0(vm_offset_t kstack) 773 { 774 proc_linkup0(&proc0, &thread0); 775 thread0.td_kstack = kstack; 776 thread0.td_kstack_pages = kstack_pages; 777 thread0.td_pcb = (struct pcb *)(thread0.td_kstack + 778 thread0.td_kstack_pages * PAGE_SIZE) - 1; 779 thread0.td_pcb->pcb_flags = 0; 780 thread0.td_pcb->pcb_vfpcpu = -1; 781 thread0.td_pcb->pcb_vfpstate.fpscr = VFPSCR_DN; 782 thread0.td_frame = &proc0_tf; 783 pcpup->pc_curpcb = thread0.td_pcb; 784 } 785 786 #if __ARM_ARCH >= 6 787 void 788 set_stackptrs(int cpu) 789 { 790 791 set_stackptr(PSR_IRQ32_MODE, 792 irqstack + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 793 set_stackptr(PSR_ABT32_MODE, 794 abtstack + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 795 set_stackptr(PSR_UND32_MODE, 796 undstack + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 797 } 798 #else 799 void 800 set_stackptrs(int cpu) 801 { 802 803 set_stackptr(PSR_IRQ32_MODE, 804 irqstack.pv_va + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 805 set_stackptr(PSR_ABT32_MODE, 806 abtstack.pv_va + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 807 set_stackptr(PSR_UND32_MODE, 808 undstack.pv_va + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 809 } 810 #endif 811 812 static void 813 arm_kdb_init(void) 814 { 815 816 kdb_init(); 817 #ifdef KDB 818 if (boothowto & RB_KDB) 819 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger"); 820 #endif 821 } 822 823 #ifdef FDT 824 #if __ARM_ARCH < 6 825 void * 826 initarm(struct arm_boot_params *abp) 827 { 828 struct mem_region mem_regions[FDT_MEM_REGIONS]; 829 struct pv_addr kernel_l1pt; 830 struct pv_addr dpcpu; 831 vm_offset_t dtbp, freemempos, l2_start, lastaddr; 832 uint64_t memsize; 833 uint32_t l2size; 834 char *env; 835 void *kmdp; 836 u_int l1pagetable; 837 int i, j, err_devmap, mem_regions_sz; 838 839 lastaddr = parse_boot_param(abp); 840 arm_physmem_kernaddr = abp->abp_physaddr; 841 842 memsize = 0; 843 844 cpuinfo_init(); 845 set_cpufuncs(); 846 847 /* 848 * Find the dtb passed in by the boot loader. 849 */ 850 kmdp = preload_search_by_type("elf kernel"); 851 if (kmdp != NULL) 852 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t); 853 else 854 dtbp = (vm_offset_t)NULL; 855 856 #if defined(FDT_DTB_STATIC) 857 /* 858 * In case the device tree blob was not retrieved (from metadata) try 859 * to use the statically embedded one. 860 */ 861 if (dtbp == (vm_offset_t)NULL) 862 dtbp = (vm_offset_t)&fdt_static_dtb; 863 #endif 864 865 if (OF_install(OFW_FDT, 0) == FALSE) 866 panic("Cannot install FDT"); 867 868 if (OF_init((void *)dtbp) != 0) 869 panic("OF_init failed with the found device tree"); 870 871 /* Grab physical memory regions information from device tree. */ 872 if (fdt_get_mem_regions(mem_regions, &mem_regions_sz, &memsize) != 0) 873 panic("Cannot get physical memory regions"); 874 physmem_hardware_regions(mem_regions, mem_regions_sz); 875 876 /* Grab reserved memory regions information from device tree. */ 877 if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0) 878 physmem_exclude_regions(mem_regions, mem_regions_sz, 879 EXFLAG_NODUMP | EXFLAG_NOALLOC); 880 881 /* Platform-specific initialisation */ 882 platform_probe_and_attach(); 883 884 pcpu0_init(); 885 886 /* Do basic tuning, hz etc */ 887 init_param1(); 888 889 /* Calculate number of L2 tables needed for mapping vm_page_array */ 890 l2size = (memsize / PAGE_SIZE) * sizeof(struct vm_page); 891 l2size = (l2size >> L1_S_SHIFT) + 1; 892 893 /* 894 * Add one table for end of kernel map, one for stacks, msgbuf and 895 * L1 and L2 tables map, one for vectors map and two for 896 * l2 structures from pmap_bootstrap. 897 */ 898 l2size += 5; 899 900 /* Make it divisible by 4 */ 901 l2size = (l2size + 3) & ~3; 902 903 freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK; 904 905 /* Define a macro to simplify memory allocation */ 906 #define valloc_pages(var, np) \ 907 alloc_pages((var).pv_va, (np)); \ 908 (var).pv_pa = (var).pv_va + (abp->abp_physaddr - KERNVIRTADDR); 909 910 #define alloc_pages(var, np) \ 911 (var) = freemempos; \ 912 freemempos += (np * PAGE_SIZE); \ 913 memset((char *)(var), 0, ((np) * PAGE_SIZE)); 914 915 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0) 916 freemempos += PAGE_SIZE; 917 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 918 919 for (i = 0, j = 0; i < l2size; ++i) { 920 if (!(i % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) { 921 valloc_pages(kernel_pt_table[i], 922 L2_TABLE_SIZE / PAGE_SIZE); 923 j = i; 924 } else { 925 kernel_pt_table[i].pv_va = kernel_pt_table[j].pv_va + 926 L2_TABLE_SIZE_REAL * (i - j); 927 kernel_pt_table[i].pv_pa = 928 kernel_pt_table[i].pv_va - KERNVIRTADDR + 929 abp->abp_physaddr; 930 } 931 } 932 /* 933 * Allocate a page for the system page mapped to 0x00000000 934 * or 0xffff0000. This page will just contain the system vectors 935 * and can be shared by all processes. 936 */ 937 valloc_pages(systempage, 1); 938 939 /* Allocate dynamic per-cpu area. */ 940 valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE); 941 dpcpu_init((void *)dpcpu.pv_va, 0); 942 943 /* Allocate stacks for all modes */ 944 valloc_pages(irqstack, IRQ_STACK_SIZE * MAXCPU); 945 valloc_pages(abtstack, ABT_STACK_SIZE * MAXCPU); 946 valloc_pages(undstack, UND_STACK_SIZE * MAXCPU); 947 valloc_pages(kernelstack, kstack_pages); 948 valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE); 949 950 /* 951 * Now we start construction of the L1 page table 952 * We start by mapping the L2 page tables into the L1. 953 * This means that we can replace L1 mappings later on if necessary 954 */ 955 l1pagetable = kernel_l1pt.pv_va; 956 957 /* 958 * Try to map as much as possible of kernel text and data using 959 * 1MB section mapping and for the rest of initial kernel address 960 * space use L2 coarse tables. 961 * 962 * Link L2 tables for mapping remainder of kernel (modulo 1MB) 963 * and kernel structures 964 */ 965 l2_start = lastaddr & ~(L1_S_OFFSET); 966 for (i = 0 ; i < l2size - 1; i++) 967 pmap_link_l2pt(l1pagetable, l2_start + i * L1_S_SIZE, 968 &kernel_pt_table[i]); 969 970 pmap_curmaxkvaddr = l2_start + (l2size - 1) * L1_S_SIZE; 971 972 /* Map kernel code and data */ 973 pmap_map_chunk(l1pagetable, KERNVIRTADDR, abp->abp_physaddr, 974 (((uint32_t)(lastaddr) - KERNVIRTADDR) + PAGE_MASK) & ~PAGE_MASK, 975 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 976 977 /* Map L1 directory and allocated L2 page tables */ 978 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 979 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 980 981 pmap_map_chunk(l1pagetable, kernel_pt_table[0].pv_va, 982 kernel_pt_table[0].pv_pa, 983 L2_TABLE_SIZE_REAL * l2size, 984 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 985 986 /* Map allocated DPCPU, stacks and msgbuf */ 987 pmap_map_chunk(l1pagetable, dpcpu.pv_va, dpcpu.pv_pa, 988 freemempos - dpcpu.pv_va, 989 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 990 991 /* Link and map the vector page */ 992 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH, 993 &kernel_pt_table[l2size - 1]); 994 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa, 995 VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE, PTE_CACHE); 996 997 /* Establish static device mappings. */ 998 err_devmap = platform_devmap_init(); 999 devmap_bootstrap(l1pagetable, NULL); 1000 vm_max_kernel_address = platform_lastaddr(); 1001 1002 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) | DOMAIN_CLIENT); 1003 pmap_pa = kernel_l1pt.pv_pa; 1004 cpu_setttb(kernel_l1pt.pv_pa); 1005 cpu_tlb_flushID(); 1006 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)); 1007 1008 /* 1009 * Now that proper page tables are installed, call cpu_setup() to enable 1010 * instruction and data caches and other chip-specific features. 1011 */ 1012 cpu_setup(); 1013 1014 /* 1015 * Only after the SOC registers block is mapped we can perform device 1016 * tree fixups, as they may attempt to read parameters from hardware. 1017 */ 1018 OF_interpret("perform-fixup", 0); 1019 1020 platform_gpio_init(); 1021 1022 cninit(); 1023 1024 debugf("initarm: console initialized\n"); 1025 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp); 1026 debugf(" boothowto = 0x%08x\n", boothowto); 1027 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp); 1028 arm_print_kenv(); 1029 1030 /* 1031 * Dump the boot metadata. We have to wait for cninit() since console 1032 * output is required. If it's grossly incorrect the kernel will never 1033 * make it this far. 1034 */ 1035 if (getenv_is_true("debug.dump_modinfo_at_boot")) 1036 preload_dump(); 1037 1038 env = kern_getenv("kernelname"); 1039 if (env != NULL) { 1040 strlcpy(kernelname, env, sizeof(kernelname)); 1041 freeenv(env); 1042 } 1043 1044 if (err_devmap != 0) 1045 printf("WARNING: could not fully configure devmap, error=%d\n", 1046 err_devmap); 1047 1048 platform_late_init(); 1049 1050 /* 1051 * Pages were allocated during the secondary bootstrap for the 1052 * stacks for different CPU modes. 1053 * We must now set the r13 registers in the different CPU modes to 1054 * point to these stacks. 1055 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 1056 * of the stack memory. 1057 */ 1058 cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE); 1059 1060 set_stackptrs(0); 1061 1062 /* 1063 * We must now clean the cache again.... 1064 * Cleaning may be done by reading new data to displace any 1065 * dirty data in the cache. This will have happened in cpu_setttb() 1066 * but since we are boot strapping the addresses used for the read 1067 * may have just been remapped and thus the cache could be out 1068 * of sync. A re-clean after the switch will cure this. 1069 * After booting there are no gross relocations of the kernel thus 1070 * this problem will not occur after initarm(). 1071 */ 1072 cpu_idcache_wbinv_all(); 1073 1074 undefined_init(); 1075 1076 init_proc0(kernelstack.pv_va); 1077 1078 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL); 1079 pmap_bootstrap(freemempos, &kernel_l1pt); 1080 msgbufp = (void *)msgbufpv.pv_va; 1081 msgbufinit(msgbufp, msgbufsize); 1082 mutex_init(); 1083 1084 /* 1085 * Exclude the kernel (and all the things we allocated which immediately 1086 * follow the kernel) from the VM allocation pool but not from crash 1087 * dumps. virtual_avail is a global variable which tracks the kva we've 1088 * "allocated" while setting up pmaps. 1089 * 1090 * Prepare the list of physical memory available to the vm subsystem. 1091 */ 1092 physmem_exclude_region(abp->abp_physaddr, 1093 (virtual_avail - KERNVIRTADDR), EXFLAG_NOALLOC); 1094 physmem_init_kernel_globals(); 1095 1096 init_param2(physmem); 1097 dbg_monitor_init(); 1098 arm_kdb_init(); 1099 1100 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP - 1101 sizeof(struct pcb))); 1102 } 1103 #else /* __ARM_ARCH < 6 */ 1104 void * 1105 initarm(struct arm_boot_params *abp) 1106 { 1107 struct mem_region mem_regions[FDT_MEM_REGIONS]; 1108 vm_paddr_t lastaddr; 1109 vm_offset_t dtbp, kernelstack, dpcpu; 1110 char *env; 1111 void *kmdp; 1112 int err_devmap, mem_regions_sz; 1113 phandle_t root; 1114 char dts_version[255]; 1115 #ifdef EFI 1116 struct efi_map_header *efihdr; 1117 #endif 1118 1119 /* get last allocated physical address */ 1120 arm_physmem_kernaddr = abp->abp_physaddr; 1121 lastaddr = parse_boot_param(abp) - KERNVIRTADDR + arm_physmem_kernaddr; 1122 1123 set_cpufuncs(); 1124 cpuinfo_init(); 1125 1126 /* 1127 * Find the dtb passed in by the boot loader. 1128 */ 1129 kmdp = preload_search_by_type("elf kernel"); 1130 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t); 1131 #if defined(FDT_DTB_STATIC) 1132 /* 1133 * In case the device tree blob was not retrieved (from metadata) try 1134 * to use the statically embedded one. 1135 */ 1136 if (dtbp == (vm_offset_t)NULL) 1137 dtbp = (vm_offset_t)&fdt_static_dtb; 1138 #endif 1139 1140 if (OF_install(OFW_FDT, 0) == FALSE) 1141 panic("Cannot install FDT"); 1142 1143 if (OF_init((void *)dtbp) != 0) 1144 panic("OF_init failed with the found device tree"); 1145 1146 #if defined(LINUX_BOOT_ABI) 1147 arm_parse_fdt_bootargs(); 1148 #endif 1149 1150 #ifdef EFI 1151 efihdr = (struct efi_map_header *)preload_search_info(kmdp, 1152 MODINFO_METADATA | MODINFOMD_EFI_MAP); 1153 if (efihdr != NULL) { 1154 arm_add_efi_map_entries(efihdr, mem_regions, &mem_regions_sz); 1155 } else 1156 #endif 1157 { 1158 /* Grab physical memory regions information from device tree. */ 1159 if (fdt_get_mem_regions(mem_regions, &mem_regions_sz,NULL) != 0) 1160 panic("Cannot get physical memory regions"); 1161 } 1162 physmem_hardware_regions(mem_regions, mem_regions_sz); 1163 1164 /* Grab reserved memory regions information from device tree. */ 1165 if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0) 1166 physmem_exclude_regions(mem_regions, mem_regions_sz, 1167 EXFLAG_NODUMP | EXFLAG_NOALLOC); 1168 1169 /* 1170 * Set TEX remapping registers. 1171 * Setup kernel page tables and switch to kernel L1 page table. 1172 */ 1173 pmap_set_tex(); 1174 pmap_bootstrap_prepare(lastaddr); 1175 1176 /* 1177 * If EARLY_PRINTF support is enabled, we need to re-establish the 1178 * mapping after pmap_bootstrap_prepare() switches to new page tables. 1179 * Note that we can only do the remapping if the VA is outside the 1180 * kernel, now that we have real virtual (not VA=PA) mappings in effect. 1181 * Early printf does not work between the time pmap_set_tex() does 1182 * cp15_prrr_set() and this code remaps the VA. 1183 */ 1184 #if defined(EARLY_PRINTF) && defined(SOCDEV_PA) && defined(SOCDEV_VA) && SOCDEV_VA < KERNBASE 1185 pmap_preboot_map_attr(SOCDEV_PA, SOCDEV_VA, 1024 * 1024, 1186 VM_PROT_READ | VM_PROT_WRITE, VM_MEMATTR_DEVICE); 1187 #endif 1188 1189 /* 1190 * Now that proper page tables are installed, call cpu_setup() to enable 1191 * instruction and data caches and other chip-specific features. 1192 */ 1193 cpu_setup(); 1194 1195 /* Platform-specific initialisation */ 1196 platform_probe_and_attach(); 1197 pcpu0_init(); 1198 1199 /* Do basic tuning, hz etc */ 1200 init_param1(); 1201 1202 /* 1203 * Allocate a page for the system page mapped to 0xffff0000 1204 * This page will just contain the system vectors and can be 1205 * shared by all processes. 1206 */ 1207 systempage = pmap_preboot_get_pages(1); 1208 1209 /* Map the vector page. */ 1210 pmap_preboot_map_pages(systempage, ARM_VECTORS_HIGH, 1); 1211 if (virtual_end >= ARM_VECTORS_HIGH) 1212 virtual_end = ARM_VECTORS_HIGH - 1; 1213 1214 /* Allocate dynamic per-cpu area. */ 1215 dpcpu = pmap_preboot_get_vpages(DPCPU_SIZE / PAGE_SIZE); 1216 dpcpu_init((void *)dpcpu, 0); 1217 1218 /* Allocate stacks for all modes */ 1219 irqstack = pmap_preboot_get_vpages(IRQ_STACK_SIZE * MAXCPU); 1220 abtstack = pmap_preboot_get_vpages(ABT_STACK_SIZE * MAXCPU); 1221 undstack = pmap_preboot_get_vpages(UND_STACK_SIZE * MAXCPU ); 1222 kernelstack = pmap_preboot_get_vpages(kstack_pages); 1223 1224 /* Allocate message buffer. */ 1225 msgbufp = (void *)pmap_preboot_get_vpages( 1226 round_page(msgbufsize) / PAGE_SIZE); 1227 1228 /* 1229 * Pages were allocated during the secondary bootstrap for the 1230 * stacks for different CPU modes. 1231 * We must now set the r13 registers in the different CPU modes to 1232 * point to these stacks. 1233 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 1234 * of the stack memory. 1235 */ 1236 set_stackptrs(0); 1237 mutex_init(); 1238 1239 /* Establish static device mappings. */ 1240 err_devmap = platform_devmap_init(); 1241 devmap_bootstrap(0, NULL); 1242 vm_max_kernel_address = platform_lastaddr(); 1243 1244 /* 1245 * Only after the SOC registers block is mapped we can perform device 1246 * tree fixups, as they may attempt to read parameters from hardware. 1247 */ 1248 OF_interpret("perform-fixup", 0); 1249 platform_gpio_init(); 1250 cninit(); 1251 1252 /* 1253 * If we made a mapping for EARLY_PRINTF after pmap_bootstrap_prepare(), 1254 * undo it now that the normal console printf works. 1255 */ 1256 #if defined(EARLY_PRINTF) && defined(SOCDEV_PA) && defined(SOCDEV_VA) && SOCDEV_VA < KERNBASE 1257 pmap_kremove(SOCDEV_VA); 1258 #endif 1259 1260 debugf("initarm: console initialized\n"); 1261 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp); 1262 debugf(" boothowto = 0x%08x\n", boothowto); 1263 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp); 1264 debugf(" lastaddr1: 0x%08x\n", lastaddr); 1265 arm_print_kenv(); 1266 1267 env = kern_getenv("kernelname"); 1268 if (env != NULL) 1269 strlcpy(kernelname, env, sizeof(kernelname)); 1270 1271 if (err_devmap != 0) 1272 printf("WARNING: could not fully configure devmap, error=%d\n", 1273 err_devmap); 1274 1275 platform_late_init(); 1276 1277 root = OF_finddevice("/"); 1278 if (OF_getprop(root, "freebsd,dts-version", dts_version, sizeof(dts_version)) > 0) { 1279 if (strcmp(LINUX_DTS_VERSION, dts_version) != 0) 1280 printf("WARNING: DTB version is %s while kernel expects %s, " 1281 "please update the DTB in the ESP\n", 1282 dts_version, 1283 LINUX_DTS_VERSION); 1284 } else { 1285 printf("WARNING: Cannot find freebsd,dts-version property, " 1286 "cannot check DTB compliance\n"); 1287 } 1288 1289 /* 1290 * We must now clean the cache again.... 1291 * Cleaning may be done by reading new data to displace any 1292 * dirty data in the cache. This will have happened in cpu_setttb() 1293 * but since we are boot strapping the addresses used for the read 1294 * may have just been remapped and thus the cache could be out 1295 * of sync. A re-clean after the switch will cure this. 1296 * After booting there are no gross relocations of the kernel thus 1297 * this problem will not occur after initarm(). 1298 */ 1299 /* Set stack for exception handlers */ 1300 undefined_init(); 1301 init_proc0(kernelstack); 1302 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL); 1303 enable_interrupts(PSR_A); 1304 pmap_bootstrap(0); 1305 1306 /* Exclude the kernel (and all the things we allocated which immediately 1307 * follow the kernel) from the VM allocation pool but not from crash 1308 * dumps. virtual_avail is a global variable which tracks the kva we've 1309 * "allocated" while setting up pmaps. 1310 * 1311 * Prepare the list of physical memory available to the vm subsystem. 1312 */ 1313 physmem_exclude_region(abp->abp_physaddr, 1314 pmap_preboot_get_pages(0) - abp->abp_physaddr, EXFLAG_NOALLOC); 1315 physmem_init_kernel_globals(); 1316 1317 init_param2(physmem); 1318 /* Init message buffer. */ 1319 msgbufinit(msgbufp, msgbufsize); 1320 dbg_monitor_init(); 1321 arm_kdb_init(); 1322 /* Apply possible BP hardening. */ 1323 cpuinfo_init_bp_hardening(); 1324 return ((void *)STACKALIGN(thread0.td_pcb)); 1325 1326 } 1327 1328 #endif /* __ARM_ARCH < 6 */ 1329 #endif /* FDT */ 1330