1 /*- 2 * Copyright (c) 2013 Ian Lepore <ian@freebsd.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include "opt_platform.h" 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/bus.h> 35 #include <sys/reboot.h> 36 #include <sys/devmap.h> 37 38 #include <vm/vm.h> 39 40 #include <machine/bus.h> 41 #include <machine/intr.h> 42 #include <machine/machdep.h> 43 #include <machine/platformvar.h> 44 45 #include <arm/arm/mpcore_timervar.h> 46 #include <arm/freescale/imx/imx6_anatopreg.h> 47 #include <arm/freescale/imx/imx6_anatopvar.h> 48 #include <arm/freescale/imx/imx_machdep.h> 49 50 #include <dev/fdt/fdt_common.h> 51 #include <dev/ofw/openfirm.h> 52 53 #include "platform_if.h" 54 55 static uint32_t gpio1_node; 56 57 static platform_attach_t imx6_attach; 58 static platform_devmap_init_t imx6_devmap_init; 59 static platform_late_init_t imx6_late_init; 60 static platform_cpu_reset_t imx6_cpu_reset; 61 62 #ifndef INTRNG 63 /* 64 * Work around the linux workaround for imx6 erratum 006687, in which some 65 * ethernet interrupts don't go to the GPC and thus won't wake the system from 66 * Wait mode. We don't use Wait mode (which halts the GIC, leaving only GPC 67 * interrupts able to wake the system), so we don't experience the bug at all. 68 * The linux workaround is to reconfigure GPIO1_6 as the ENET interrupt by 69 * writing magic values to an undocumented IOMUX register, then letting the gpio 70 * interrupt driver notify the ethernet driver. We'll be able to do all that 71 * (even though we don't need to) once the INTRNG project is committed and the 72 * imx_gpio driver becomes an interrupt driver. Until then, this crazy little 73 * workaround watches for requests to map an interrupt 6 with the interrupt 74 * controller node referring to gpio1, and it substitutes the proper ffec 75 * interrupt number. 76 */ 77 static int 78 imx6_decode_fdt(uint32_t iparent, uint32_t *intr, int *interrupt, 79 int *trig, int *pol) 80 { 81 82 if (fdt32_to_cpu(intr[0]) == 6 && 83 OF_node_from_xref(iparent) == gpio1_node) { 84 *interrupt = 150; 85 *trig = INTR_TRIGGER_CONFORM; 86 *pol = INTR_POLARITY_CONFORM; 87 return (0); 88 } 89 return (gic_decode_fdt(iparent, intr, interrupt, trig, pol)); 90 } 91 92 fdt_pic_decode_t fdt_pic_table[] = { 93 &imx6_decode_fdt, 94 NULL 95 }; 96 #endif 97 98 /* 99 * Fix FDT data related to interrupts. 100 * 101 * Driven by the needs of linux and its drivers (as always), the published FDT 102 * data for imx6 now sets the interrupt parent for most devices to the GPC 103 * interrupt controller, which is for use when the chip is in deep-sleep mode. 104 * We don't support deep sleep or have a GPC-PIC driver; we need all interrupts 105 * to be handled by the GIC. 106 * 107 * Luckily, the change to the FDT data was to assign the GPC as the interrupt 108 * parent for the soc node and letting that get inherited by all other devices 109 * (except a few that directly name GIC as their interrupt parent). So we can 110 * set the world right by just changing the interrupt-parent property of the soc 111 * node to refer to GIC instead of GPC. This will get us by until we write our 112 * own GPC driver (or until linux changes its mind and the FDT data again). 113 * 114 * We validate that we have data that looks like we expect before changing it: 115 * - SOC node exists and has GPC as its interrupt parent. 116 * - GPC node exists and has GIC as its interrupt parent. 117 * - GIC node exists and is its own interrupt parent. 118 * 119 * This applies to all models of imx6. Luckily all of them have the devices 120 * involved at the same addresses on the same buses, so we don't need any 121 * per-soc logic. We handle this at platform attach time rather than via the 122 * fdt_fixup_table, because the latter requires matching on the FDT "model" 123 * property, and this applies to all boards including those not yet invented. 124 */ 125 static void 126 fix_fdt_interrupt_data(void) 127 { 128 phandle_t gicipar, gicnode, gicxref; 129 phandle_t gpcipar, gpcnode, gpcxref; 130 phandle_t socipar, socnode; 131 int result; 132 133 socnode = OF_finddevice("/soc"); 134 if (socnode == -1) 135 return; 136 result = OF_getencprop(socnode, "interrupt-parent", &socipar, 137 sizeof(socipar)); 138 if (result <= 0) 139 return; 140 141 gicnode = OF_finddevice("/soc/interrupt-controller@00a01000"); 142 if (gicnode == -1) 143 return; 144 result = OF_getencprop(gicnode, "interrupt-parent", &gicipar, 145 sizeof(gicipar)); 146 if (result <= 0) 147 return; 148 gicxref = OF_xref_from_node(gicnode); 149 150 gpcnode = OF_finddevice("/soc/aips-bus@02000000/gpc@020dc000"); 151 if (gpcnode == -1) 152 return; 153 result = OF_getencprop(gpcnode, "interrupt-parent", &gpcipar, 154 sizeof(gpcipar)); 155 if (result <= 0) 156 return; 157 gpcxref = OF_xref_from_node(gpcnode); 158 159 if (socipar != gpcxref || gpcipar != gicxref || gicipar != gicxref) 160 return; 161 162 gicxref = cpu_to_fdt32(gicxref); 163 OF_setprop(socnode, "interrupt-parent", &gicxref, sizeof(gicxref)); 164 } 165 166 static int 167 imx6_attach(platform_t plat) 168 { 169 170 /* Fix soc interrupt-parent property. */ 171 fix_fdt_interrupt_data(); 172 173 /* Inform the MPCore timer driver that its clock is variable. */ 174 arm_tmr_change_frequency(ARM_TMR_FREQUENCY_VARIES); 175 176 return (0); 177 } 178 179 static void 180 imx6_late_init(platform_t plat) 181 { 182 const uint32_t IMX6_WDOG_SR_PHYS = 0x020bc004; 183 184 imx_wdog_init_last_reset(IMX6_WDOG_SR_PHYS); 185 186 /* Cache the gpio1 node handle for imx6_decode_fdt() workaround code. */ 187 gpio1_node = OF_node_from_xref( 188 OF_finddevice("/soc/aips-bus@02000000/gpio@0209c000")); 189 } 190 191 /* 192 * Set up static device mappings. 193 * 194 * This attempts to cover the most-used devices with 1MB section mappings, which 195 * is good for performance (uses fewer TLB entries for device access). 196 * 197 * ARMMP covers the interrupt controller, MPCore timers, global timer, and the 198 * L2 cache controller. Most of the 1MB range is unused reserved space. 199 * 200 * AIPS1/AIPS2 cover most of the on-chip devices such as uart, spi, i2c, etc. 201 * 202 * Notably not mapped right now are HDMI, GPU, and other devices below ARMMP in 203 * the memory map. When we get support for graphics it might make sense to 204 * static map some of that area. Be careful with other things in that area such 205 * as OCRAM that probably shouldn't be mapped as VM_MEMATTR_DEVICE memory. 206 */ 207 static int 208 imx6_devmap_init(platform_t plat) 209 { 210 const uint32_t IMX6_ARMMP_PHYS = 0x00a00000; 211 const uint32_t IMX6_ARMMP_SIZE = 0x00100000; 212 const uint32_t IMX6_AIPS1_PHYS = 0x02000000; 213 const uint32_t IMX6_AIPS1_SIZE = 0x00100000; 214 const uint32_t IMX6_AIPS2_PHYS = 0x02100000; 215 const uint32_t IMX6_AIPS2_SIZE = 0x00100000; 216 217 devmap_add_entry(IMX6_ARMMP_PHYS, IMX6_ARMMP_SIZE); 218 devmap_add_entry(IMX6_AIPS1_PHYS, IMX6_AIPS1_SIZE); 219 devmap_add_entry(IMX6_AIPS2_PHYS, IMX6_AIPS2_SIZE); 220 221 return (0); 222 } 223 224 static void 225 imx6_cpu_reset(platform_t plat) 226 { 227 const uint32_t IMX6_WDOG_CR_PHYS = 0x020bc000; 228 229 imx_wdog_cpu_reset(IMX6_WDOG_CR_PHYS); 230 } 231 232 /* 233 * Determine what flavor of imx6 we're running on. 234 * 235 * This code is based on the way u-boot does it. Information found on the web 236 * indicates that Freescale themselves were the original source of this logic, 237 * including the strange check for number of CPUs in the SCU configuration 238 * register, which is apparently needed on some revisions of the SOLO. 239 * 240 * According to the documentation, there is such a thing as an i.MX6 Dual 241 * (non-lite flavor). However, Freescale doesn't seem to have assigned it a 242 * number or provided any logic to handle it in their detection code. 243 * 244 * Note that the ANALOG_DIGPROG and SCU configuration registers are not 245 * documented in the chip reference manual. (SCU configuration is mentioned, 246 * but not mapped out in detail.) I think the bottom two bits of the scu config 247 * register may be ncpu-1. 248 * 249 * This hasn't been tested yet on a dual[-lite]. 250 * 251 * On a solo: 252 * digprog = 0x00610001 253 * hwsoc = 0x00000062 254 * scu config = 0x00000500 255 * On a quad: 256 * digprog = 0x00630002 257 * hwsoc = 0x00000063 258 * scu config = 0x00005503 259 */ 260 u_int 261 imx_soc_type(void) 262 { 263 uint32_t digprog, hwsoc; 264 uint32_t *pcr; 265 static u_int soctype; 266 const vm_offset_t SCU_CONFIG_PHYSADDR = 0x00a00004; 267 #define HWSOC_MX6SL 0x60 268 #define HWSOC_MX6DL 0x61 269 #define HWSOC_MX6SOLO 0x62 270 #define HWSOC_MX6Q 0x63 271 272 if (soctype != 0) 273 return (soctype); 274 275 digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG_SL); 276 hwsoc = (digprog >> IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT) & 277 IMX6_ANALOG_DIGPROG_SOCTYPE_MASK; 278 279 if (hwsoc != HWSOC_MX6SL) { 280 digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG); 281 hwsoc = (digprog & IMX6_ANALOG_DIGPROG_SOCTYPE_MASK) >> 282 IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT; 283 /*printf("digprog = 0x%08x\n", digprog);*/ 284 if (hwsoc == HWSOC_MX6DL) { 285 pcr = devmap_ptov(SCU_CONFIG_PHYSADDR, 4); 286 if (pcr != NULL) { 287 /*printf("scu config = 0x%08x\n", *pcr);*/ 288 if ((*pcr & 0x03) == 0) { 289 hwsoc = HWSOC_MX6SOLO; 290 } 291 } 292 } 293 } 294 /* printf("hwsoc 0x%08x\n", hwsoc); */ 295 296 switch (hwsoc) { 297 case HWSOC_MX6SL: 298 soctype = IMXSOC_6SL; 299 break; 300 case HWSOC_MX6SOLO: 301 soctype = IMXSOC_6S; 302 break; 303 case HWSOC_MX6DL: 304 soctype = IMXSOC_6DL; 305 break; 306 case HWSOC_MX6Q : 307 soctype = IMXSOC_6Q; 308 break; 309 default: 310 printf("imx_soc_type: Don't understand hwsoc 0x%02x, " 311 "digprog 0x%08x; assuming IMXSOC_6Q\n", hwsoc, digprog); 312 soctype = IMXSOC_6Q; 313 break; 314 } 315 316 return (soctype); 317 } 318 319 /* 320 * Early putc routine for EARLY_PRINTF support. To use, add to kernel config: 321 * option SOCDEV_PA=0x02000000 322 * option SOCDEV_VA=0x02000000 323 * option EARLY_PRINTF 324 * Resist the temptation to change the #if 0 to #ifdef EARLY_PRINTF here. It 325 * makes sense now, but if multiple SOCs do that it will make early_putc another 326 * duplicate symbol to be eliminated on the path to a generic kernel. 327 */ 328 #if 0 329 static void 330 imx6_early_putc(int c) 331 { 332 volatile uint32_t * UART_STAT_REG = (uint32_t *)0x02020098; 333 volatile uint32_t * UART_TX_REG = (uint32_t *)0x02020040; 334 const uint32_t UART_TXRDY = (1 << 3); 335 336 while ((*UART_STAT_REG & UART_TXRDY) == 0) 337 continue; 338 *UART_TX_REG = c; 339 } 340 early_putc_t *early_putc = imx6_early_putc; 341 #endif 342 343 static platform_method_t imx6_methods[] = { 344 PLATFORMMETHOD(platform_attach, imx6_attach), 345 PLATFORMMETHOD(platform_devmap_init, imx6_devmap_init), 346 PLATFORMMETHOD(platform_late_init, imx6_late_init), 347 PLATFORMMETHOD(platform_cpu_reset, imx6_cpu_reset), 348 349 PLATFORMMETHOD_END, 350 }; 351 352 FDT_PLATFORM_DEF2(imx6, imx6s, "i.MX6 Solo", 0, "fsl,imx6s", 0); 353 FDT_PLATFORM_DEF2(imx6, imx6d, "i.MX6 Dual", 0, "fsl,imx6dl", 0); 354 FDT_PLATFORM_DEF2(imx6, imx6q, "i.MX6 Quad", 0, "fsl,imx6q", 0); 355