1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2012, 2013 The FreeBSD Foundation 5 * All rights reserved. 6 * 7 * This software was developed by Oleksandr Rybalko under sponsorship 8 * from the FreeBSD Foundation. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __FBSDID("$FreeBSD$"); 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/kernel.h> 38 #include <sys/module.h> 39 #include <sys/time.h> 40 #include <sys/bus.h> 41 #include <sys/resource.h> 42 #include <sys/rman.h> 43 #include <sys/watchdog.h> 44 45 #include <machine/bus.h> 46 #include <machine/intr.h> 47 48 #include <dev/ofw/openfirm.h> 49 #include <dev/ofw/ofw_bus.h> 50 #include <dev/ofw/ofw_bus_subr.h> 51 52 #include <arm/freescale/imx/imx_machdep.h> 53 #include <arm/freescale/imx/imx_wdogreg.h> 54 55 struct imx_wdog_softc { 56 struct mtx sc_mtx; 57 device_t sc_dev; 58 struct resource *sc_res[2]; 59 void *sc_ih; 60 uint32_t sc_timeout; 61 bool sc_pde_enabled; 62 }; 63 64 static struct resource_spec imx_wdog_spec[] = { 65 { SYS_RES_MEMORY, 0, RF_ACTIVE }, 66 { SYS_RES_IRQ, 0, RF_ACTIVE }, 67 RESOURCE_SPEC_END 68 }; 69 70 #define MEMRES 0 71 #define IRQRES 1 72 73 static struct ofw_compat_data compat_data[] = { 74 {"fsl,imx6sx-wdt", 1}, 75 {"fsl,imx6sl-wdt", 1}, 76 {"fsl,imx6q-wdt", 1}, 77 {"fsl,imx53-wdt", 1}, 78 {"fsl,imx51-wdt", 1}, 79 {"fsl,imx50-wdt", 1}, 80 {"fsl,imx35-wdt", 1}, 81 {"fsl,imx27-wdt", 1}, 82 {"fsl,imx25-wdt", 1}, 83 {"fsl,imx21-wdt", 1}, 84 {NULL, 0} 85 }; 86 87 static inline uint16_t 88 RD2(struct imx_wdog_softc *sc, bus_size_t offs) 89 { 90 91 return (bus_read_2(sc->sc_res[MEMRES], offs)); 92 } 93 94 static inline void 95 WR2(struct imx_wdog_softc *sc, bus_size_t offs, uint16_t val) 96 { 97 98 bus_write_2(sc->sc_res[MEMRES], offs, val); 99 } 100 101 static void 102 imx_watchdog(void *arg, u_int cmd, int *error) 103 { 104 struct imx_wdog_softc *sc; 105 uint16_t reg; 106 u_int timeout; 107 108 sc = arg; 109 mtx_lock(&sc->sc_mtx); 110 if (cmd == 0) { 111 if (bootverbose) 112 device_printf(sc->sc_dev, "Can not be disabled.\n"); 113 *error = EOPNOTSUPP; 114 } else { 115 timeout = (u_int)((1ULL << (cmd & WD_INTERVAL)) / 1000000000U); 116 if (timeout > 1 && timeout < 128) { 117 if (timeout != sc->sc_timeout) { 118 sc->sc_timeout = timeout; 119 reg = RD2(sc, WDOG_CR_REG); 120 reg &= ~WDOG_CR_WT_MASK; 121 reg |= (timeout << (WDOG_CR_WT_SHIFT + 1)) & 122 WDOG_CR_WT_MASK; 123 WR2(sc, WDOG_CR_REG, reg | WDOG_CR_WDE); 124 } 125 /* Refresh counter */ 126 WR2(sc, WDOG_SR_REG, WDOG_SR_STEP1); 127 WR2(sc, WDOG_SR_REG, WDOG_SR_STEP2); 128 /* Watchdog active, can disable rom-boot watchdog. */ 129 if (sc->sc_pde_enabled) { 130 sc->sc_pde_enabled = false; 131 reg = RD2(sc, WDOG_MCR_REG); 132 WR2(sc, WDOG_MCR_REG, reg & ~WDOG_MCR_PDE); 133 } 134 *error = 0; 135 } 136 } 137 mtx_unlock(&sc->sc_mtx); 138 } 139 140 static int 141 imx_wdog_intr(void *arg) 142 { 143 struct imx_wdog_softc *sc = arg; 144 145 /* 146 * When configured for external reset, the actual reset is supposed to 147 * happen when some external device responds to the assertion of the 148 * WDOG_B signal by asserting the POR signal to the chip. This 149 * interrupt handler is a backstop mechanism; it is set up to fire 150 * simultaneously with WDOG_B, and if the external reset happens we'll 151 * never actually make it to here. If we do make it here, just trigger 152 * a software reset. That code will see that external reset is 153 * configured, and it will wait for 1 second for it to take effect, then 154 * it will do a software reset as a fallback. 155 */ 156 imx_wdog_cpu_reset(BUS_SPACE_PHYSADDR(sc->sc_res[MEMRES], WDOG_CR_REG)); 157 158 return (FILTER_HANDLED); /* unreached */ 159 } 160 161 static int 162 imx_wdog_probe(device_t dev) 163 { 164 165 if (!ofw_bus_status_okay(dev)) 166 return (ENXIO); 167 168 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) 169 return (ENXIO); 170 171 device_set_desc(dev, "Freescale i.MX Watchdog"); 172 return (0); 173 } 174 175 static int 176 imx_wdog_attach(device_t dev) 177 { 178 struct imx_wdog_softc *sc; 179 180 sc = device_get_softc(dev); 181 sc->sc_dev = dev; 182 183 if (bus_alloc_resources(dev, imx_wdog_spec, sc->sc_res)) { 184 device_printf(dev, "could not allocate resources\n"); 185 return (ENXIO); 186 } 187 188 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), "imx_wdt", MTX_DEF); 189 190 /* 191 * If we're configured to assert an external reset signal, set up the 192 * hardware to do so, and install an interrupt handler whose only 193 * purpose is to backstop the external reset. Don't worry if the 194 * interrupt setup fails, since it's only a backstop measure. 195 */ 196 if (ofw_bus_has_prop(sc->sc_dev, "fsl,ext-reset-output")) { 197 WR2(sc, WDOG_CR_REG, WDOG_CR_WDT | RD2(sc, WDOG_CR_REG)); 198 bus_setup_intr(sc->sc_dev, sc->sc_res[IRQRES], 199 INTR_TYPE_MISC | INTR_MPSAFE, imx_wdog_intr, NULL, sc, 200 &sc->sc_ih); 201 WR2(sc, WDOG_ICR_REG, WDOG_ICR_WIE); /* Enable, count is 0. */ 202 } 203 204 /* 205 * Note whether the rom-boot so-called "power-down" watchdog is active, 206 * so we can disable it when the regular watchdog is first enabled. 207 */ 208 if (RD2(sc, WDOG_MCR_REG) & WDOG_MCR_PDE) 209 sc->sc_pde_enabled = true; 210 211 EVENTHANDLER_REGISTER(watchdog_list, imx_watchdog, sc, 0); 212 return (0); 213 } 214 215 static device_method_t imx_wdog_methods[] = { 216 DEVMETHOD(device_probe, imx_wdog_probe), 217 DEVMETHOD(device_attach, imx_wdog_attach), 218 DEVMETHOD_END 219 }; 220 221 static driver_t imx_wdog_driver = { 222 "imx_wdog", 223 imx_wdog_methods, 224 sizeof(struct imx_wdog_softc), 225 }; 226 227 static devclass_t imx_wdog_devclass; 228 229 DRIVER_MODULE(imx_wdog, simplebus, imx_wdog_driver, imx_wdog_devclass, 0, 0); 230