159c993d1SWarner Losh /*-
251369649SPedro F. Giffuni * SPDX-License-Identifier: BSD-3-Clause
351369649SPedro F. Giffuni *
459c993d1SWarner Losh * Copyright (C) 2008-2011 MARVELL INTERNATIONAL LTD.
559c993d1SWarner Losh * All rights reserved.
659c993d1SWarner Losh *
759c993d1SWarner Losh * Developed by Semihalf.
859c993d1SWarner Losh *
959c993d1SWarner Losh * Redistribution and use in source and binary forms, with or without
1059c993d1SWarner Losh * modification, are permitted provided that the following conditions
1159c993d1SWarner Losh * are met:
1259c993d1SWarner Losh * 1. Redistributions of source code must retain the above copyright
1359c993d1SWarner Losh * notice, this list of conditions and the following disclaimer.
1459c993d1SWarner Losh * 2. Redistributions in binary form must reproduce the above copyright
1559c993d1SWarner Losh * notice, this list of conditions and the following disclaimer in the
1659c993d1SWarner Losh * documentation and/or other materials provided with the distribution.
1759c993d1SWarner Losh * 3. Neither the name of MARVELL nor the names of contributors
1859c993d1SWarner Losh * may be used to endorse or promote products derived from this software
1959c993d1SWarner Losh * without specific prior written permission.
2059c993d1SWarner Losh *
2159c993d1SWarner Losh * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
2259c993d1SWarner Losh * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
2359c993d1SWarner Losh * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
2459c993d1SWarner Losh * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
2559c993d1SWarner Losh * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
2659c993d1SWarner Losh * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
2759c993d1SWarner Losh * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
2859c993d1SWarner Losh * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
2959c993d1SWarner Losh * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
3059c993d1SWarner Losh * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
3159c993d1SWarner Losh * SUCH DAMAGE.
3259c993d1SWarner Losh */
3359c993d1SWarner Losh
3459c993d1SWarner Losh #include <sys/param.h>
3559c993d1SWarner Losh #include <sys/systm.h>
3659c993d1SWarner Losh #include <sys/bus.h>
3759c993d1SWarner Losh #include <sys/kernel.h>
3859c993d1SWarner Losh #include <sys/malloc.h>
3959c993d1SWarner Losh #include <sys/kdb.h>
4059c993d1SWarner Losh #include <sys/reboot.h>
4159c993d1SWarner Losh
4259c993d1SWarner Losh #include <dev/fdt/fdt_common.h>
4359c993d1SWarner Losh #include <dev/ofw/openfirm.h>
4487acb7f8SAndrew Turner #include <dev/ofw/ofw_bus_subr.h>
4559c993d1SWarner Losh
4659c993d1SWarner Losh #include <machine/bus.h>
4759c993d1SWarner Losh #include <machine/fdt.h>
4859c993d1SWarner Losh #include <machine/vmparam.h>
4981c8a263SZbigniew Bodek #include <machine/intr.h>
5059c993d1SWarner Losh
5159c993d1SWarner Losh #include <arm/mv/mvreg.h>
5259c993d1SWarner Losh #include <arm/mv/mvvar.h>
5359c993d1SWarner Losh #include <arm/mv/mvwin.h>
5459c993d1SWarner Losh
5559c993d1SWarner Losh MALLOC_DEFINE(M_IDMA, "idma", "idma dma test memory");
5659c993d1SWarner Losh
5759c993d1SWarner Losh #define IDMA_DEBUG
5859c993d1SWarner Losh #undef IDMA_DEBUG
5959c993d1SWarner Losh
6059c993d1SWarner Losh #define MAX_CPU_WIN 5
6159c993d1SWarner Losh
6259c993d1SWarner Losh #ifdef DEBUG
6359c993d1SWarner Losh #define debugf(fmt, args...) do { printf("%s(): ", __func__); \
6459c993d1SWarner Losh printf(fmt,##args); } while (0)
6559c993d1SWarner Losh #else
6659c993d1SWarner Losh #define debugf(fmt, args...)
6759c993d1SWarner Losh #endif
6859c993d1SWarner Losh
6959c993d1SWarner Losh #ifdef DEBUG
7059c993d1SWarner Losh #define MV_DUMP_WIN 1
7159c993d1SWarner Losh #else
7259c993d1SWarner Losh #define MV_DUMP_WIN 0
7359c993d1SWarner Losh #endif
7459c993d1SWarner Losh
75c7dbc00cSMarcin Wojtas struct soc_node_spec;
76c7dbc00cSMarcin Wojtas
77091cd2f1SMarcin Wojtas static enum soc_family soc_family;
78091cd2f1SMarcin Wojtas
79091cd2f1SMarcin Wojtas static int mv_win_cesa_attr_armv5(int eng_sel);
80091cd2f1SMarcin Wojtas static int mv_win_cesa_attr_armada38x(int eng_sel);
81091cd2f1SMarcin Wojtas static int mv_win_cesa_attr_armadaxp(int eng_sel);
82091cd2f1SMarcin Wojtas
83091cd2f1SMarcin Wojtas uint32_t read_cpu_ctrl_armv5(uint32_t reg);
84091cd2f1SMarcin Wojtas uint32_t read_cpu_ctrl_armv7(uint32_t reg);
85091cd2f1SMarcin Wojtas
86091cd2f1SMarcin Wojtas void write_cpu_ctrl_armv5(uint32_t reg, uint32_t val);
87091cd2f1SMarcin Wojtas void write_cpu_ctrl_armv7(uint32_t reg, uint32_t val);
88091cd2f1SMarcin Wojtas
8959c993d1SWarner Losh static int win_eth_can_remap(int i);
9059c993d1SWarner Losh
91fcb93d74SWojciech Macek static int decode_win_cesa_valid(void);
9259c993d1SWarner Losh static int decode_win_usb_valid(void);
9334a3d2c6SWojciech Macek static int decode_win_usb3_valid(void);
9459c993d1SWarner Losh static int decode_win_eth_valid(void);
9559c993d1SWarner Losh static int decode_win_pcie_valid(void);
9659c993d1SWarner Losh static int decode_win_sata_valid(void);
9798a2d78dSLuiz Otavio O Souza static int decode_win_sdhci_valid(void);
9859c993d1SWarner Losh
9959c993d1SWarner Losh static int decode_win_idma_valid(void);
10059c993d1SWarner Losh static int decode_win_xor_valid(void);
10159c993d1SWarner Losh
10259c993d1SWarner Losh static void decode_win_cpu_setup(void);
10359c993d1SWarner Losh static int decode_win_sdram_fixup(void);
104fcb93d74SWojciech Macek static void decode_win_cesa_setup(u_long);
105e9e2a7c1SMarcin Wojtas static void decode_win_a38x_cesa_setup(u_long);
10659c993d1SWarner Losh static void decode_win_usb_setup(u_long);
10734a3d2c6SWojciech Macek static void decode_win_usb3_setup(u_long);
10859c993d1SWarner Losh static void decode_win_eth_setup(u_long);
109a8d7fc4aSZbigniew Bodek static void decode_win_neta_setup(u_long);
11059c993d1SWarner Losh static void decode_win_sata_setup(u_long);
111ccd5b1b0SWojciech Macek static void decode_win_ahci_setup(u_long);
11298a2d78dSLuiz Otavio O Souza static void decode_win_sdhci_setup(u_long);
11359c993d1SWarner Losh
11459c993d1SWarner Losh static void decode_win_idma_setup(u_long);
11559c993d1SWarner Losh static void decode_win_xor_setup(u_long);
11659c993d1SWarner Losh
117fcb93d74SWojciech Macek static void decode_win_cesa_dump(u_long);
118e9e2a7c1SMarcin Wojtas static void decode_win_a38x_cesa_dump(u_long);
11959c993d1SWarner Losh static void decode_win_usb_dump(u_long);
12034a3d2c6SWojciech Macek static void decode_win_usb3_dump(u_long);
12159c993d1SWarner Losh static void decode_win_eth_dump(u_long base);
122a8d7fc4aSZbigniew Bodek static void decode_win_neta_dump(u_long base);
12359c993d1SWarner Losh static void decode_win_idma_dump(u_long base);
12459c993d1SWarner Losh static void decode_win_xor_dump(u_long base);
125518a87d7SWojciech Macek static void decode_win_ahci_dump(u_long base);
12698a2d78dSLuiz Otavio O Souza static void decode_win_sdhci_dump(u_long);
1275d83a7b6SZbigniew Bodek static void decode_win_pcie_dump(u_long);
12859c993d1SWarner Losh
129091cd2f1SMarcin Wojtas static uint32_t win_cpu_cr_read(int);
130091cd2f1SMarcin Wojtas static uint32_t win_cpu_armv5_cr_read(int);
131091cd2f1SMarcin Wojtas static uint32_t win_cpu_armv7_cr_read(int);
132091cd2f1SMarcin Wojtas static uint32_t win_cpu_br_read(int);
133091cd2f1SMarcin Wojtas static uint32_t win_cpu_armv5_br_read(int);
134091cd2f1SMarcin Wojtas static uint32_t win_cpu_armv7_br_read(int);
135091cd2f1SMarcin Wojtas static uint32_t win_cpu_remap_l_read(int);
136091cd2f1SMarcin Wojtas static uint32_t win_cpu_armv5_remap_l_read(int);
137091cd2f1SMarcin Wojtas static uint32_t win_cpu_armv7_remap_l_read(int);
138091cd2f1SMarcin Wojtas static uint32_t win_cpu_remap_h_read(int);
139091cd2f1SMarcin Wojtas static uint32_t win_cpu_armv5_remap_h_read(int);
140091cd2f1SMarcin Wojtas static uint32_t win_cpu_armv7_remap_h_read(int);
141091cd2f1SMarcin Wojtas
142091cd2f1SMarcin Wojtas static void win_cpu_cr_write(int, uint32_t);
143091cd2f1SMarcin Wojtas static void win_cpu_armv5_cr_write(int, uint32_t);
144091cd2f1SMarcin Wojtas static void win_cpu_armv7_cr_write(int, uint32_t);
145091cd2f1SMarcin Wojtas static void win_cpu_br_write(int, uint32_t);
146091cd2f1SMarcin Wojtas static void win_cpu_armv5_br_write(int, uint32_t);
147091cd2f1SMarcin Wojtas static void win_cpu_armv7_br_write(int, uint32_t);
148091cd2f1SMarcin Wojtas static void win_cpu_remap_l_write(int, uint32_t);
149091cd2f1SMarcin Wojtas static void win_cpu_armv5_remap_l_write(int, uint32_t);
150091cd2f1SMarcin Wojtas static void win_cpu_armv7_remap_l_write(int, uint32_t);
151091cd2f1SMarcin Wojtas static void win_cpu_remap_h_write(int, uint32_t);
152091cd2f1SMarcin Wojtas static void win_cpu_armv5_remap_h_write(int, uint32_t);
153091cd2f1SMarcin Wojtas static void win_cpu_armv7_remap_h_write(int, uint32_t);
154091cd2f1SMarcin Wojtas
155091cd2f1SMarcin Wojtas static uint32_t ddr_br_read(int);
156091cd2f1SMarcin Wojtas static uint32_t ddr_sz_read(int);
157091cd2f1SMarcin Wojtas static uint32_t ddr_armv5_br_read(int);
158091cd2f1SMarcin Wojtas static uint32_t ddr_armv5_sz_read(int);
159091cd2f1SMarcin Wojtas static uint32_t ddr_armv7_br_read(int);
160091cd2f1SMarcin Wojtas static uint32_t ddr_armv7_sz_read(int);
161091cd2f1SMarcin Wojtas static void ddr_br_write(int, uint32_t);
162091cd2f1SMarcin Wojtas static void ddr_sz_write(int, uint32_t);
163091cd2f1SMarcin Wojtas static void ddr_armv5_br_write(int, uint32_t);
164091cd2f1SMarcin Wojtas static void ddr_armv5_sz_write(int, uint32_t);
165091cd2f1SMarcin Wojtas static void ddr_armv7_br_write(int, uint32_t);
166091cd2f1SMarcin Wojtas static void ddr_armv7_sz_write(int, uint32_t);
167091cd2f1SMarcin Wojtas
16859c993d1SWarner Losh static int fdt_get_ranges(const char *, void *, int, int *, int *);
16981c8a263SZbigniew Bodek int gic_decode_fdt(phandle_t iparent, pcell_t *intr, int *interrupt,
17081c8a263SZbigniew Bodek int *trig, int *pol);
17159c993d1SWarner Losh
17259c993d1SWarner Losh static int win_cpu_from_dt(void);
17359c993d1SWarner Losh static int fdt_win_setup(void);
17459c993d1SWarner Losh
17513d464bfSMarcin Wojtas static int fdt_win_process_child(phandle_t, struct soc_node_spec *, const char*);
176c7dbc00cSMarcin Wojtas
17730b5fb13SMarcin Wojtas static void soc_identify(uint32_t, uint32_t);
17830b5fb13SMarcin Wojtas
17959c993d1SWarner Losh static uint32_t dev_mask = 0;
18059c993d1SWarner Losh static int cpu_wins_no = 0;
18159c993d1SWarner Losh static int eth_port = 0;
18259c993d1SWarner Losh static int usb_port = 0;
1833361fdc4SZbigniew Bodek static boolean_t platform_io_coherent = false;
18459c993d1SWarner Losh
18559c993d1SWarner Losh static struct decode_win cpu_win_tbl[MAX_CPU_WIN];
18659c993d1SWarner Losh
18759c993d1SWarner Losh const struct decode_win *cpu_wins = cpu_win_tbl;
18859c993d1SWarner Losh
18959c993d1SWarner Losh typedef void (*decode_win_setup_t)(u_long);
19059c993d1SWarner Losh typedef void (*dump_win_t)(u_long);
191afcad11eSMarcin Wojtas typedef int (*valid_t)(void);
19259c993d1SWarner Losh
1930c79c0b1SZbigniew Bodek /*
1940c79c0b1SZbigniew Bodek * The power status of device feature is only supported on
1950c79c0b1SZbigniew Bodek * Kirkwood and Discovery SoCs.
1960c79c0b1SZbigniew Bodek */
1970c79c0b1SZbigniew Bodek #if defined(SOC_MV_KIRKWOOD) || defined(SOC_MV_DISCOVERY)
1980c79c0b1SZbigniew Bodek #define SOC_MV_POWER_STAT_SUPPORTED 1
1990c79c0b1SZbigniew Bodek #else
2000c79c0b1SZbigniew Bodek #define SOC_MV_POWER_STAT_SUPPORTED 0
2010c79c0b1SZbigniew Bodek #endif
2020c79c0b1SZbigniew Bodek
20359c993d1SWarner Losh struct soc_node_spec {
20459c993d1SWarner Losh const char *compat;
20559c993d1SWarner Losh decode_win_setup_t decode_handler;
20659c993d1SWarner Losh dump_win_t dump_handler;
207afcad11eSMarcin Wojtas valid_t valid_handler;
20859c993d1SWarner Losh };
20959c993d1SWarner Losh
21059c993d1SWarner Losh static struct soc_node_spec soc_nodes[] = {
211afcad11eSMarcin Wojtas { "mrvl,ge", &decode_win_eth_setup, &decode_win_eth_dump, &decode_win_eth_valid},
212afcad11eSMarcin Wojtas { "marvell,armada-370-neta", &decode_win_neta_setup,
213afcad11eSMarcin Wojtas &decode_win_neta_dump, NULL },
214afcad11eSMarcin Wojtas { "mrvl,usb-ehci", &decode_win_usb_setup, &decode_win_usb_dump, &decode_win_usb_valid},
215afcad11eSMarcin Wojtas { "marvell,orion-ehci", &decode_win_usb_setup, &decode_win_usb_dump, &decode_win_usb_valid },
216afcad11eSMarcin Wojtas { "marvell,armada-380-xhci", &decode_win_usb3_setup,
217afcad11eSMarcin Wojtas &decode_win_usb3_dump, &decode_win_usb3_valid },
218afcad11eSMarcin Wojtas { "marvell,armada-380-ahci", &decode_win_ahci_setup,
219afcad11eSMarcin Wojtas &decode_win_ahci_dump, NULL },
220afcad11eSMarcin Wojtas { "marvell,armada-380-sdhci", &decode_win_sdhci_setup,
221afcad11eSMarcin Wojtas &decode_win_sdhci_dump, &decode_win_sdhci_valid},
222afcad11eSMarcin Wojtas { "mrvl,sata", &decode_win_sata_setup, NULL, &decode_win_sata_valid},
223afcad11eSMarcin Wojtas { "mrvl,xor", &decode_win_xor_setup, &decode_win_xor_dump, &decode_win_xor_valid},
224afcad11eSMarcin Wojtas { "mrvl,idma", &decode_win_idma_setup, &decode_win_idma_dump, &decode_win_idma_valid},
225afcad11eSMarcin Wojtas { "mrvl,cesa", &decode_win_cesa_setup, &decode_win_cesa_dump, &decode_win_cesa_valid},
226afcad11eSMarcin Wojtas { "mrvl,pcie", &decode_win_pcie_setup, &decode_win_pcie_dump, &decode_win_pcie_valid},
227e9e2a7c1SMarcin Wojtas { "marvell,armada-38x-crypto", &decode_win_a38x_cesa_setup,
228e9e2a7c1SMarcin Wojtas &decode_win_a38x_cesa_dump, &decode_win_cesa_valid},
229afcad11eSMarcin Wojtas { NULL, NULL, NULL, NULL },
23059c993d1SWarner Losh };
23159c993d1SWarner Losh
232c7dbc00cSMarcin Wojtas #define SOC_NODE_PCIE_ENTRY_IDX 11
233c7dbc00cSMarcin Wojtas
234091cd2f1SMarcin Wojtas typedef uint32_t(*read_cpu_ctrl_t)(uint32_t);
235091cd2f1SMarcin Wojtas typedef void(*write_cpu_ctrl_t)(uint32_t, uint32_t);
236091cd2f1SMarcin Wojtas typedef uint32_t (*win_read_t)(int);
237091cd2f1SMarcin Wojtas typedef void (*win_write_t)(int, uint32_t);
238091cd2f1SMarcin Wojtas typedef int (*win_cesa_attr_t)(int);
239526de79bSMarcin Wojtas typedef uint32_t (*get_t)(void);
240091cd2f1SMarcin Wojtas
241091cd2f1SMarcin Wojtas struct decode_win_spec {
242091cd2f1SMarcin Wojtas read_cpu_ctrl_t read_cpu_ctrl;
243091cd2f1SMarcin Wojtas write_cpu_ctrl_t write_cpu_ctrl;
244091cd2f1SMarcin Wojtas win_read_t cr_read;
245091cd2f1SMarcin Wojtas win_read_t br_read;
246091cd2f1SMarcin Wojtas win_read_t remap_l_read;
247091cd2f1SMarcin Wojtas win_read_t remap_h_read;
248091cd2f1SMarcin Wojtas win_write_t cr_write;
249091cd2f1SMarcin Wojtas win_write_t br_write;
250091cd2f1SMarcin Wojtas win_write_t remap_l_write;
251091cd2f1SMarcin Wojtas win_write_t remap_h_write;
252091cd2f1SMarcin Wojtas uint32_t mv_win_cpu_max;
253091cd2f1SMarcin Wojtas win_cesa_attr_t win_cesa_attr;
254091cd2f1SMarcin Wojtas int win_cesa_target;
255091cd2f1SMarcin Wojtas win_read_t ddr_br_read;
256091cd2f1SMarcin Wojtas win_read_t ddr_sz_read;
257091cd2f1SMarcin Wojtas win_write_t ddr_br_write;
258091cd2f1SMarcin Wojtas win_write_t ddr_sz_write;
259526de79bSMarcin Wojtas get_t get_tclk;
260526de79bSMarcin Wojtas get_t get_cpu_freq;
261091cd2f1SMarcin Wojtas };
262091cd2f1SMarcin Wojtas
263091cd2f1SMarcin Wojtas struct decode_win_spec *soc_decode_win_spec;
264091cd2f1SMarcin Wojtas
265091cd2f1SMarcin Wojtas static struct decode_win_spec decode_win_specs[] =
266091cd2f1SMarcin Wojtas {
267091cd2f1SMarcin Wojtas {
268091cd2f1SMarcin Wojtas &read_cpu_ctrl_armv7,
269091cd2f1SMarcin Wojtas &write_cpu_ctrl_armv7,
270091cd2f1SMarcin Wojtas &win_cpu_armv7_cr_read,
271091cd2f1SMarcin Wojtas &win_cpu_armv7_br_read,
272091cd2f1SMarcin Wojtas &win_cpu_armv7_remap_l_read,
273091cd2f1SMarcin Wojtas &win_cpu_armv7_remap_h_read,
274091cd2f1SMarcin Wojtas &win_cpu_armv7_cr_write,
275091cd2f1SMarcin Wojtas &win_cpu_armv7_br_write,
276091cd2f1SMarcin Wojtas &win_cpu_armv7_remap_l_write,
277091cd2f1SMarcin Wojtas &win_cpu_armv7_remap_h_write,
278091cd2f1SMarcin Wojtas MV_WIN_CPU_MAX_ARMV7,
279091cd2f1SMarcin Wojtas &mv_win_cesa_attr_armada38x,
280091cd2f1SMarcin Wojtas MV_WIN_CESA_TARGET_ARMADA38X,
281091cd2f1SMarcin Wojtas &ddr_armv7_br_read,
282091cd2f1SMarcin Wojtas &ddr_armv7_sz_read,
283091cd2f1SMarcin Wojtas &ddr_armv7_br_write,
284091cd2f1SMarcin Wojtas &ddr_armv7_sz_write,
285526de79bSMarcin Wojtas &get_tclk_armada38x,
286526de79bSMarcin Wojtas &get_cpu_freq_armada38x,
287091cd2f1SMarcin Wojtas },
288091cd2f1SMarcin Wojtas {
289091cd2f1SMarcin Wojtas &read_cpu_ctrl_armv7,
290091cd2f1SMarcin Wojtas &write_cpu_ctrl_armv7,
291091cd2f1SMarcin Wojtas &win_cpu_armv7_cr_read,
292091cd2f1SMarcin Wojtas &win_cpu_armv7_br_read,
293091cd2f1SMarcin Wojtas &win_cpu_armv7_remap_l_read,
294091cd2f1SMarcin Wojtas &win_cpu_armv7_remap_h_read,
295091cd2f1SMarcin Wojtas &win_cpu_armv7_cr_write,
296091cd2f1SMarcin Wojtas &win_cpu_armv7_br_write,
297091cd2f1SMarcin Wojtas &win_cpu_armv7_remap_l_write,
298091cd2f1SMarcin Wojtas &win_cpu_armv7_remap_h_write,
299091cd2f1SMarcin Wojtas MV_WIN_CPU_MAX_ARMV7,
300091cd2f1SMarcin Wojtas &mv_win_cesa_attr_armadaxp,
301091cd2f1SMarcin Wojtas MV_WIN_CESA_TARGET_ARMADAXP,
302091cd2f1SMarcin Wojtas &ddr_armv7_br_read,
303091cd2f1SMarcin Wojtas &ddr_armv7_sz_read,
304091cd2f1SMarcin Wojtas &ddr_armv7_br_write,
305091cd2f1SMarcin Wojtas &ddr_armv7_sz_write,
306526de79bSMarcin Wojtas &get_tclk_armadaxp,
307526de79bSMarcin Wojtas &get_cpu_freq_armadaxp,
308091cd2f1SMarcin Wojtas },
309091cd2f1SMarcin Wojtas {
310091cd2f1SMarcin Wojtas &read_cpu_ctrl_armv5,
311091cd2f1SMarcin Wojtas &write_cpu_ctrl_armv5,
312091cd2f1SMarcin Wojtas &win_cpu_armv5_cr_read,
313091cd2f1SMarcin Wojtas &win_cpu_armv5_br_read,
314091cd2f1SMarcin Wojtas &win_cpu_armv5_remap_l_read,
315091cd2f1SMarcin Wojtas &win_cpu_armv5_remap_h_read,
316091cd2f1SMarcin Wojtas &win_cpu_armv5_cr_write,
317091cd2f1SMarcin Wojtas &win_cpu_armv5_br_write,
318091cd2f1SMarcin Wojtas &win_cpu_armv5_remap_l_write,
319091cd2f1SMarcin Wojtas &win_cpu_armv5_remap_h_write,
320091cd2f1SMarcin Wojtas MV_WIN_CPU_MAX,
321091cd2f1SMarcin Wojtas &mv_win_cesa_attr_armv5,
322091cd2f1SMarcin Wojtas MV_WIN_CESA_TARGET,
323091cd2f1SMarcin Wojtas &ddr_armv5_br_read,
324091cd2f1SMarcin Wojtas &ddr_armv5_sz_read,
325091cd2f1SMarcin Wojtas &ddr_armv5_br_write,
326091cd2f1SMarcin Wojtas &ddr_armv5_sz_write,
327526de79bSMarcin Wojtas NULL,
328526de79bSMarcin Wojtas NULL,
329091cd2f1SMarcin Wojtas },
330091cd2f1SMarcin Wojtas };
331091cd2f1SMarcin Wojtas
332d177f4b8SAndrew Turner struct fdt_pm_mask_entry {
333d177f4b8SAndrew Turner char *compat;
334d177f4b8SAndrew Turner uint32_t mask;
335d177f4b8SAndrew Turner };
336d177f4b8SAndrew Turner
337d177f4b8SAndrew Turner static struct fdt_pm_mask_entry fdt_pm_mask_table[] = {
33859c993d1SWarner Losh { "mrvl,ge", CPU_PM_CTRL_GE(0) },
33959c993d1SWarner Losh { "mrvl,ge", CPU_PM_CTRL_GE(1) },
34059c993d1SWarner Losh { "mrvl,usb-ehci", CPU_PM_CTRL_USB(0) },
34159c993d1SWarner Losh { "mrvl,usb-ehci", CPU_PM_CTRL_USB(1) },
34259c993d1SWarner Losh { "mrvl,usb-ehci", CPU_PM_CTRL_USB(2) },
34359c993d1SWarner Losh { "mrvl,xor", CPU_PM_CTRL_XOR },
34459c993d1SWarner Losh { "mrvl,sata", CPU_PM_CTRL_SATA },
34559c993d1SWarner Losh { NULL, 0 }
34659c993d1SWarner Losh };
34759c993d1SWarner Losh
34859c993d1SWarner Losh static __inline int
pm_is_disabled(uint32_t mask)34959c993d1SWarner Losh pm_is_disabled(uint32_t mask)
35059c993d1SWarner Losh {
3510c79c0b1SZbigniew Bodek #if SOC_MV_POWER_STAT_SUPPORTED
35259c993d1SWarner Losh return (soc_power_ctrl_get(mask) == mask ? 0 : 1);
3530c79c0b1SZbigniew Bodek #else
3540c79c0b1SZbigniew Bodek return (0);
35559c993d1SWarner Losh #endif
35659c993d1SWarner Losh }
35759c993d1SWarner Losh
35859c993d1SWarner Losh /*
35959c993d1SWarner Losh * Disable device using power management register.
36059c993d1SWarner Losh * 1 - Device Power On
36159c993d1SWarner Losh * 0 - Device Power Off
36259c993d1SWarner Losh * Mask can be set in loader.
36359c993d1SWarner Losh * EXAMPLE:
36459c993d1SWarner Losh * loader> set hw.pm-disable-mask=0x2
36559c993d1SWarner Losh *
36659c993d1SWarner Losh * Common mask:
36759c993d1SWarner Losh * |-------------------------------|
36859c993d1SWarner Losh * | Device | Kirkwood | Discovery |
36959c993d1SWarner Losh * |-------------------------------|
37059c993d1SWarner Losh * | USB0 | 0x00008 | 0x020000 |
37159c993d1SWarner Losh * |-------------------------------|
37259c993d1SWarner Losh * | USB1 | - | 0x040000 |
37359c993d1SWarner Losh * |-------------------------------|
37459c993d1SWarner Losh * | USB2 | - | 0x080000 |
37559c993d1SWarner Losh * |-------------------------------|
37659c993d1SWarner Losh * | GE0 | 0x00001 | 0x000002 |
37759c993d1SWarner Losh * |-------------------------------|
37859c993d1SWarner Losh * | GE1 | - | 0x000004 |
37959c993d1SWarner Losh * |-------------------------------|
38059c993d1SWarner Losh * | IDMA | - | 0x100000 |
38159c993d1SWarner Losh * |-------------------------------|
38259c993d1SWarner Losh * | XOR | 0x10000 | 0x200000 |
38359c993d1SWarner Losh * |-------------------------------|
38459c993d1SWarner Losh * | CESA | 0x20000 | 0x400000 |
38559c993d1SWarner Losh * |-------------------------------|
38659c993d1SWarner Losh * | SATA | 0x04000 | 0x004000 |
38759c993d1SWarner Losh * --------------------------------|
38859c993d1SWarner Losh * This feature can be used only on Kirkwood and Discovery
38959c993d1SWarner Losh * machines.
39059c993d1SWarner Losh */
391091cd2f1SMarcin Wojtas
mv_win_cesa_attr_armv5(int eng_sel)392091cd2f1SMarcin Wojtas static int mv_win_cesa_attr_armv5(int eng_sel)
393091cd2f1SMarcin Wojtas {
394091cd2f1SMarcin Wojtas
395091cd2f1SMarcin Wojtas return MV_WIN_CESA_ATTR(eng_sel);
396091cd2f1SMarcin Wojtas }
397091cd2f1SMarcin Wojtas
mv_win_cesa_attr_armada38x(int eng_sel)398091cd2f1SMarcin Wojtas static int mv_win_cesa_attr_armada38x(int eng_sel)
399091cd2f1SMarcin Wojtas {
400091cd2f1SMarcin Wojtas
401091cd2f1SMarcin Wojtas return MV_WIN_CESA_ATTR_ARMADA38X(eng_sel);
402091cd2f1SMarcin Wojtas }
403091cd2f1SMarcin Wojtas
mv_win_cesa_attr_armadaxp(int eng_sel)404091cd2f1SMarcin Wojtas static int mv_win_cesa_attr_armadaxp(int eng_sel)
405091cd2f1SMarcin Wojtas {
406091cd2f1SMarcin Wojtas
407091cd2f1SMarcin Wojtas return MV_WIN_CESA_ATTR_ARMADAXP(eng_sel);
408091cd2f1SMarcin Wojtas }
409091cd2f1SMarcin Wojtas
410091cd2f1SMarcin Wojtas enum soc_family
mv_check_soc_family(void)411402dbdd9SDimitry Andric mv_check_soc_family(void)
412091cd2f1SMarcin Wojtas {
413091cd2f1SMarcin Wojtas uint32_t dev, rev;
414091cd2f1SMarcin Wojtas
415091cd2f1SMarcin Wojtas soc_id(&dev, &rev);
416091cd2f1SMarcin Wojtas switch (dev) {
417091cd2f1SMarcin Wojtas case MV_DEV_MV78230:
418091cd2f1SMarcin Wojtas case MV_DEV_MV78260:
419091cd2f1SMarcin Wojtas case MV_DEV_MV78460:
420091cd2f1SMarcin Wojtas soc_decode_win_spec = &decode_win_specs[MV_SOC_ARMADA_XP];
421091cd2f1SMarcin Wojtas soc_family = MV_SOC_ARMADA_XP;
42230b5fb13SMarcin Wojtas break;
423091cd2f1SMarcin Wojtas case MV_DEV_88F6828:
424091cd2f1SMarcin Wojtas case MV_DEV_88F6820:
425091cd2f1SMarcin Wojtas case MV_DEV_88F6810:
426091cd2f1SMarcin Wojtas soc_decode_win_spec = &decode_win_specs[MV_SOC_ARMADA_38X];
427091cd2f1SMarcin Wojtas soc_family = MV_SOC_ARMADA_38X;
42830b5fb13SMarcin Wojtas break;
429091cd2f1SMarcin Wojtas case MV_DEV_88F5181:
430091cd2f1SMarcin Wojtas case MV_DEV_88F5182:
431091cd2f1SMarcin Wojtas case MV_DEV_88F5281:
432091cd2f1SMarcin Wojtas case MV_DEV_88F6281:
433091cd2f1SMarcin Wojtas case MV_DEV_88RC8180:
434091cd2f1SMarcin Wojtas case MV_DEV_88RC9480:
435091cd2f1SMarcin Wojtas case MV_DEV_88RC9580:
436091cd2f1SMarcin Wojtas case MV_DEV_88F6781:
437091cd2f1SMarcin Wojtas case MV_DEV_88F6282:
438091cd2f1SMarcin Wojtas case MV_DEV_MV78100_Z0:
439091cd2f1SMarcin Wojtas case MV_DEV_MV78100:
440091cd2f1SMarcin Wojtas case MV_DEV_MV78160:
441091cd2f1SMarcin Wojtas soc_decode_win_spec = &decode_win_specs[MV_SOC_ARMV5];
442091cd2f1SMarcin Wojtas soc_family = MV_SOC_ARMV5;
44330b5fb13SMarcin Wojtas break;
444091cd2f1SMarcin Wojtas default:
445091cd2f1SMarcin Wojtas soc_family = MV_SOC_UNSUPPORTED;
446091cd2f1SMarcin Wojtas return (MV_SOC_UNSUPPORTED);
447091cd2f1SMarcin Wojtas }
44830b5fb13SMarcin Wojtas
44930b5fb13SMarcin Wojtas soc_identify(dev, rev);
45030b5fb13SMarcin Wojtas
45130b5fb13SMarcin Wojtas return (soc_family);
452091cd2f1SMarcin Wojtas }
453091cd2f1SMarcin Wojtas
45459c993d1SWarner Losh static __inline void
pm_disable_device(int mask)45559c993d1SWarner Losh pm_disable_device(int mask)
45659c993d1SWarner Losh {
45759c993d1SWarner Losh #ifdef DIAGNOSTIC
45859c993d1SWarner Losh uint32_t reg;
45959c993d1SWarner Losh
46059c993d1SWarner Losh reg = soc_power_ctrl_get(CPU_PM_CTRL_ALL);
46159c993d1SWarner Losh printf("Power Management Register: 0%x\n", reg);
46259c993d1SWarner Losh
46359c993d1SWarner Losh reg &= ~mask;
46459c993d1SWarner Losh soc_power_ctrl_set(reg);
46559c993d1SWarner Losh printf("Device %x is disabled\n", mask);
46659c993d1SWarner Losh
46759c993d1SWarner Losh reg = soc_power_ctrl_get(CPU_PM_CTRL_ALL);
46859c993d1SWarner Losh printf("Power Management Register: 0%x\n", reg);
46959c993d1SWarner Losh #endif
47059c993d1SWarner Losh }
47159c993d1SWarner Losh
47259c993d1SWarner Losh int
mv_fdt_is_type(phandle_t node,const char * typestr)473626a1983SAndrew Turner mv_fdt_is_type(phandle_t node, const char *typestr)
474626a1983SAndrew Turner {
475626a1983SAndrew Turner #define FDT_TYPE_LEN 64
476626a1983SAndrew Turner char type[FDT_TYPE_LEN];
477626a1983SAndrew Turner
478626a1983SAndrew Turner if (OF_getproplen(node, "device_type") <= 0)
479626a1983SAndrew Turner return (0);
480626a1983SAndrew Turner
481626a1983SAndrew Turner if (OF_getprop(node, "device_type", type, FDT_TYPE_LEN) < 0)
482626a1983SAndrew Turner return (0);
483626a1983SAndrew Turner
484626a1983SAndrew Turner if (strncasecmp(type, typestr, FDT_TYPE_LEN) == 0)
485626a1983SAndrew Turner /* This fits. */
486626a1983SAndrew Turner return (1);
487626a1983SAndrew Turner
488626a1983SAndrew Turner return (0);
489626a1983SAndrew Turner #undef FDT_TYPE_LEN
490626a1983SAndrew Turner }
491626a1983SAndrew Turner
492626a1983SAndrew Turner int
mv_fdt_pm(phandle_t node)4939e4fa9ebSAndrew Turner mv_fdt_pm(phandle_t node)
49459c993d1SWarner Losh {
49559c993d1SWarner Losh uint32_t cpu_pm_ctrl;
49659c993d1SWarner Losh int i, ena, compat;
49759c993d1SWarner Losh
49859c993d1SWarner Losh ena = 1;
49959c993d1SWarner Losh cpu_pm_ctrl = read_cpu_ctrl(CPU_PM_CTRL);
50059c993d1SWarner Losh for (i = 0; fdt_pm_mask_table[i].compat != NULL; i++) {
50159c993d1SWarner Losh if (dev_mask & (1 << i))
50259c993d1SWarner Losh continue;
50359c993d1SWarner Losh
50487acb7f8SAndrew Turner compat = ofw_bus_node_is_compatible(node,
50587acb7f8SAndrew Turner fdt_pm_mask_table[i].compat);
50659c993d1SWarner Losh #if defined(SOC_MV_KIRKWOOD)
50759c993d1SWarner Losh if (compat && (cpu_pm_ctrl & fdt_pm_mask_table[i].mask)) {
50859c993d1SWarner Losh dev_mask |= (1 << i);
50959c993d1SWarner Losh ena = 0;
51059c993d1SWarner Losh break;
51159c993d1SWarner Losh } else if (compat) {
51259c993d1SWarner Losh dev_mask |= (1 << i);
51359c993d1SWarner Losh break;
51459c993d1SWarner Losh }
51559c993d1SWarner Losh #else
51659c993d1SWarner Losh if (compat && (~cpu_pm_ctrl & fdt_pm_mask_table[i].mask)) {
51759c993d1SWarner Losh dev_mask |= (1 << i);
51859c993d1SWarner Losh ena = 0;
51959c993d1SWarner Losh break;
52059c993d1SWarner Losh } else if (compat) {
52159c993d1SWarner Losh dev_mask |= (1 << i);
52259c993d1SWarner Losh break;
52359c993d1SWarner Losh }
52459c993d1SWarner Losh #endif
52559c993d1SWarner Losh }
52659c993d1SWarner Losh
52759c993d1SWarner Losh return (ena);
52859c993d1SWarner Losh }
52959c993d1SWarner Losh
53059c993d1SWarner Losh uint32_t
read_cpu_ctrl(uint32_t reg)53159c993d1SWarner Losh read_cpu_ctrl(uint32_t reg)
53259c993d1SWarner Losh {
53359c993d1SWarner Losh
534091cd2f1SMarcin Wojtas if (soc_decode_win_spec->read_cpu_ctrl != NULL)
535091cd2f1SMarcin Wojtas return (soc_decode_win_spec->read_cpu_ctrl(reg));
536091cd2f1SMarcin Wojtas return (-1);
537091cd2f1SMarcin Wojtas }
538091cd2f1SMarcin Wojtas
539091cd2f1SMarcin Wojtas uint32_t
read_cpu_ctrl_armv5(uint32_t reg)540091cd2f1SMarcin Wojtas read_cpu_ctrl_armv5(uint32_t reg)
541091cd2f1SMarcin Wojtas {
542091cd2f1SMarcin Wojtas
54359c993d1SWarner Losh return (bus_space_read_4(fdtbus_bs_tag, MV_CPU_CONTROL_BASE, reg));
54459c993d1SWarner Losh }
54559c993d1SWarner Losh
546091cd2f1SMarcin Wojtas uint32_t
read_cpu_ctrl_armv7(uint32_t reg)547091cd2f1SMarcin Wojtas read_cpu_ctrl_armv7(uint32_t reg)
548091cd2f1SMarcin Wojtas {
549091cd2f1SMarcin Wojtas
550091cd2f1SMarcin Wojtas return (bus_space_read_4(fdtbus_bs_tag, MV_CPU_CONTROL_BASE_ARMV7, reg));
551091cd2f1SMarcin Wojtas }
552091cd2f1SMarcin Wojtas
55359c993d1SWarner Losh void
write_cpu_ctrl(uint32_t reg,uint32_t val)55459c993d1SWarner Losh write_cpu_ctrl(uint32_t reg, uint32_t val)
55559c993d1SWarner Losh {
55659c993d1SWarner Losh
557091cd2f1SMarcin Wojtas if (soc_decode_win_spec->write_cpu_ctrl != NULL)
558091cd2f1SMarcin Wojtas soc_decode_win_spec->write_cpu_ctrl(reg, val);
559091cd2f1SMarcin Wojtas }
560091cd2f1SMarcin Wojtas
561091cd2f1SMarcin Wojtas void
write_cpu_ctrl_armv5(uint32_t reg,uint32_t val)562091cd2f1SMarcin Wojtas write_cpu_ctrl_armv5(uint32_t reg, uint32_t val)
563091cd2f1SMarcin Wojtas {
564091cd2f1SMarcin Wojtas
56559c993d1SWarner Losh bus_space_write_4(fdtbus_bs_tag, MV_CPU_CONTROL_BASE, reg, val);
56659c993d1SWarner Losh }
56759c993d1SWarner Losh
568091cd2f1SMarcin Wojtas void
write_cpu_ctrl_armv7(uint32_t reg,uint32_t val)569091cd2f1SMarcin Wojtas write_cpu_ctrl_armv7(uint32_t reg, uint32_t val)
570091cd2f1SMarcin Wojtas {
571091cd2f1SMarcin Wojtas
572091cd2f1SMarcin Wojtas bus_space_write_4(fdtbus_bs_tag, MV_CPU_CONTROL_BASE_ARMV7, reg, val);
573091cd2f1SMarcin Wojtas }
574091cd2f1SMarcin Wojtas
57559c993d1SWarner Losh uint32_t
read_cpu_mp_clocks(uint32_t reg)57659c993d1SWarner Losh read_cpu_mp_clocks(uint32_t reg)
57759c993d1SWarner Losh {
57859c993d1SWarner Losh
57959c993d1SWarner Losh return (bus_space_read_4(fdtbus_bs_tag, MV_MP_CLOCKS_BASE, reg));
58059c993d1SWarner Losh }
58159c993d1SWarner Losh
58259c993d1SWarner Losh void
write_cpu_mp_clocks(uint32_t reg,uint32_t val)58359c993d1SWarner Losh write_cpu_mp_clocks(uint32_t reg, uint32_t val)
58459c993d1SWarner Losh {
58559c993d1SWarner Losh
58659c993d1SWarner Losh bus_space_write_4(fdtbus_bs_tag, MV_MP_CLOCKS_BASE, reg, val);
58759c993d1SWarner Losh }
58859c993d1SWarner Losh
58959c993d1SWarner Losh uint32_t
read_cpu_misc(uint32_t reg)59059c993d1SWarner Losh read_cpu_misc(uint32_t reg)
59159c993d1SWarner Losh {
59259c993d1SWarner Losh
59359c993d1SWarner Losh return (bus_space_read_4(fdtbus_bs_tag, MV_MISC_BASE, reg));
59459c993d1SWarner Losh }
59559c993d1SWarner Losh
59659c993d1SWarner Losh void
write_cpu_misc(uint32_t reg,uint32_t val)59759c993d1SWarner Losh write_cpu_misc(uint32_t reg, uint32_t val)
59859c993d1SWarner Losh {
59959c993d1SWarner Losh
60059c993d1SWarner Losh bus_space_write_4(fdtbus_bs_tag, MV_MISC_BASE, reg, val);
60159c993d1SWarner Losh }
60259c993d1SWarner Losh
60359c993d1SWarner Losh uint32_t
cpu_extra_feat(void)60459c993d1SWarner Losh cpu_extra_feat(void)
60559c993d1SWarner Losh {
60659c993d1SWarner Losh uint32_t dev, rev;
60759c993d1SWarner Losh uint32_t ef = 0;
60859c993d1SWarner Losh
60959c993d1SWarner Losh soc_id(&dev, &rev);
61059c993d1SWarner Losh
61159c993d1SWarner Losh switch (dev) {
61259c993d1SWarner Losh case MV_DEV_88F6281:
61359c993d1SWarner Losh case MV_DEV_88F6282:
61459c993d1SWarner Losh case MV_DEV_88RC8180:
61559c993d1SWarner Losh case MV_DEV_MV78100_Z0:
61659c993d1SWarner Losh case MV_DEV_MV78100:
61759c993d1SWarner Losh __asm __volatile("mrc p15, 1, %0, c15, c1, 0" : "=r" (ef));
61859c993d1SWarner Losh break;
61959c993d1SWarner Losh case MV_DEV_88F5182:
62059c993d1SWarner Losh case MV_DEV_88F5281:
62159c993d1SWarner Losh __asm __volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (ef));
62259c993d1SWarner Losh break;
62359c993d1SWarner Losh default:
62459c993d1SWarner Losh if (bootverbose)
62559c993d1SWarner Losh printf("This ARM Core does not support any extra features\n");
62659c993d1SWarner Losh }
62759c993d1SWarner Losh
62859c993d1SWarner Losh return (ef);
62959c993d1SWarner Losh }
63059c993d1SWarner Losh
63159c993d1SWarner Losh /*
63259c993d1SWarner Losh * Get the power status of device. This feature is only supported on
63359c993d1SWarner Losh * Kirkwood and Discovery SoCs.
63459c993d1SWarner Losh */
63559c993d1SWarner Losh uint32_t
soc_power_ctrl_get(uint32_t mask)63659c993d1SWarner Losh soc_power_ctrl_get(uint32_t mask)
63759c993d1SWarner Losh {
63859c993d1SWarner Losh
6390c79c0b1SZbigniew Bodek #if SOC_MV_POWER_STAT_SUPPORTED
64059c993d1SWarner Losh if (mask != CPU_PM_CTRL_NONE)
64159c993d1SWarner Losh mask &= read_cpu_ctrl(CPU_PM_CTRL);
64259c993d1SWarner Losh
64359c993d1SWarner Losh return (mask);
64459c993d1SWarner Losh #else
64559c993d1SWarner Losh return (mask);
64659c993d1SWarner Losh #endif
64759c993d1SWarner Losh }
64859c993d1SWarner Losh
64959c993d1SWarner Losh /*
65059c993d1SWarner Losh * Set the power status of device. This feature is only supported on
65159c993d1SWarner Losh * Kirkwood and Discovery SoCs.
65259c993d1SWarner Losh */
65359c993d1SWarner Losh void
soc_power_ctrl_set(uint32_t mask)65459c993d1SWarner Losh soc_power_ctrl_set(uint32_t mask)
65559c993d1SWarner Losh {
65659c993d1SWarner Losh
6571eff4c0cSAndrew Turner #if !defined(SOC_MV_ORION)
65859c993d1SWarner Losh if (mask != CPU_PM_CTRL_NONE)
65959c993d1SWarner Losh write_cpu_ctrl(CPU_PM_CTRL, mask);
66059c993d1SWarner Losh #endif
66159c993d1SWarner Losh }
66259c993d1SWarner Losh
66359c993d1SWarner Losh void
soc_id(uint32_t * dev,uint32_t * rev)66459c993d1SWarner Losh soc_id(uint32_t *dev, uint32_t *rev)
66559c993d1SWarner Losh {
666091cd2f1SMarcin Wojtas uint64_t mv_pcie_base = MV_PCIE_BASE;
667091cd2f1SMarcin Wojtas phandle_t node;
66859c993d1SWarner Losh
66959c993d1SWarner Losh /*
67059c993d1SWarner Losh * Notice: system identifiers are available in the registers range of
67159c993d1SWarner Losh * PCIE controller, so using this function is only allowed (and
67259c993d1SWarner Losh * possible) after the internal registers range has been mapped in via
67330b72b68SRuslan Bukin * devmap_bootstrap().
67459c993d1SWarner Losh */
675091cd2f1SMarcin Wojtas *dev = 0;
676091cd2f1SMarcin Wojtas *rev = 0;
677091cd2f1SMarcin Wojtas if ((node = OF_finddevice("/")) == -1)
678091cd2f1SMarcin Wojtas return;
679091cd2f1SMarcin Wojtas if (ofw_bus_node_is_compatible(node, "marvell,armada380"))
680091cd2f1SMarcin Wojtas mv_pcie_base = MV_PCIE_BASE_ARMADA38X;
681091cd2f1SMarcin Wojtas
682091cd2f1SMarcin Wojtas *dev = bus_space_read_4(fdtbus_bs_tag, mv_pcie_base, 0) >> 16;
683091cd2f1SMarcin Wojtas *rev = bus_space_read_4(fdtbus_bs_tag, mv_pcie_base, 8) & 0xff;
68459c993d1SWarner Losh }
68559c993d1SWarner Losh
68659c993d1SWarner Losh static void
soc_identify(uint32_t d,uint32_t r)68730b5fb13SMarcin Wojtas soc_identify(uint32_t d, uint32_t r)
68859c993d1SWarner Losh {
68930b5fb13SMarcin Wojtas uint32_t size, mode, freq;
69059c993d1SWarner Losh const char *dev;
69159c993d1SWarner Losh const char *rev;
69259c993d1SWarner Losh
69359c993d1SWarner Losh printf("SOC: ");
69459c993d1SWarner Losh if (bootverbose)
69559c993d1SWarner Losh printf("(0x%4x:0x%02x) ", d, r);
69659c993d1SWarner Losh
69759c993d1SWarner Losh rev = "";
69859c993d1SWarner Losh switch (d) {
69959c993d1SWarner Losh case MV_DEV_88F5181:
70059c993d1SWarner Losh dev = "Marvell 88F5181";
70159c993d1SWarner Losh if (r == 3)
70259c993d1SWarner Losh rev = "B1";
70359c993d1SWarner Losh break;
70459c993d1SWarner Losh case MV_DEV_88F5182:
70559c993d1SWarner Losh dev = "Marvell 88F5182";
70659c993d1SWarner Losh if (r == 2)
70759c993d1SWarner Losh rev = "A2";
70859c993d1SWarner Losh break;
70959c993d1SWarner Losh case MV_DEV_88F5281:
71059c993d1SWarner Losh dev = "Marvell 88F5281";
71159c993d1SWarner Losh if (r == 4)
71259c993d1SWarner Losh rev = "D0";
71359c993d1SWarner Losh else if (r == 5)
71459c993d1SWarner Losh rev = "D1";
71559c993d1SWarner Losh else if (r == 6)
71659c993d1SWarner Losh rev = "D2";
71759c993d1SWarner Losh break;
71859c993d1SWarner Losh case MV_DEV_88F6281:
71959c993d1SWarner Losh dev = "Marvell 88F6281";
72059c993d1SWarner Losh if (r == 0)
72159c993d1SWarner Losh rev = "Z0";
72259c993d1SWarner Losh else if (r == 2)
72359c993d1SWarner Losh rev = "A0";
72459c993d1SWarner Losh else if (r == 3)
72559c993d1SWarner Losh rev = "A1";
72659c993d1SWarner Losh break;
72759c993d1SWarner Losh case MV_DEV_88RC8180:
72859c993d1SWarner Losh dev = "Marvell 88RC8180";
72959c993d1SWarner Losh break;
73059c993d1SWarner Losh case MV_DEV_88RC9480:
73159c993d1SWarner Losh dev = "Marvell 88RC9480";
73259c993d1SWarner Losh break;
73359c993d1SWarner Losh case MV_DEV_88RC9580:
73459c993d1SWarner Losh dev = "Marvell 88RC9580";
73559c993d1SWarner Losh break;
73659c993d1SWarner Losh case MV_DEV_88F6781:
73759c993d1SWarner Losh dev = "Marvell 88F6781";
73859c993d1SWarner Losh if (r == 2)
73959c993d1SWarner Losh rev = "Y0";
74059c993d1SWarner Losh break;
74159c993d1SWarner Losh case MV_DEV_88F6282:
74259c993d1SWarner Losh dev = "Marvell 88F6282";
74359c993d1SWarner Losh if (r == 0)
74459c993d1SWarner Losh rev = "A0";
74559c993d1SWarner Losh else if (r == 1)
74659c993d1SWarner Losh rev = "A1";
74759c993d1SWarner Losh break;
748f8742b0dSZbigniew Bodek case MV_DEV_88F6828:
749f8742b0dSZbigniew Bodek dev = "Marvell 88F6828";
750f8742b0dSZbigniew Bodek break;
751f8742b0dSZbigniew Bodek case MV_DEV_88F6820:
752f8742b0dSZbigniew Bodek dev = "Marvell 88F6820";
753f8742b0dSZbigniew Bodek break;
754f8742b0dSZbigniew Bodek case MV_DEV_88F6810:
755f8742b0dSZbigniew Bodek dev = "Marvell 88F6810";
756f8742b0dSZbigniew Bodek break;
75759c993d1SWarner Losh case MV_DEV_MV78100_Z0:
75859c993d1SWarner Losh dev = "Marvell MV78100 Z0";
75959c993d1SWarner Losh break;
76059c993d1SWarner Losh case MV_DEV_MV78100:
76159c993d1SWarner Losh dev = "Marvell MV78100";
76259c993d1SWarner Losh break;
76359c993d1SWarner Losh case MV_DEV_MV78160:
76459c993d1SWarner Losh dev = "Marvell MV78160";
76559c993d1SWarner Losh break;
76659c993d1SWarner Losh case MV_DEV_MV78260:
76759c993d1SWarner Losh dev = "Marvell MV78260";
76859c993d1SWarner Losh break;
76959c993d1SWarner Losh case MV_DEV_MV78460:
77059c993d1SWarner Losh dev = "Marvell MV78460";
77159c993d1SWarner Losh break;
77259c993d1SWarner Losh default:
77359c993d1SWarner Losh dev = "UNKNOWN";
77459c993d1SWarner Losh break;
77559c993d1SWarner Losh }
77659c993d1SWarner Losh
77759c993d1SWarner Losh printf("%s", dev);
77859c993d1SWarner Losh if (*rev != '\0')
77959c993d1SWarner Losh printf(" rev %s", rev);
78011a6a330SZbigniew Bodek printf(", TClock %dMHz", get_tclk() / 1000 / 1000);
78111a6a330SZbigniew Bodek freq = get_cpu_freq();
78211a6a330SZbigniew Bodek if (freq != 0)
78311a6a330SZbigniew Bodek printf(", Frequency %dMHz", freq / 1000 / 1000);
78411a6a330SZbigniew Bodek printf("\n");
78559c993d1SWarner Losh
78659c993d1SWarner Losh mode = read_cpu_ctrl(CPU_CONFIG);
78759c993d1SWarner Losh printf(" Instruction cache prefetch %s, data cache prefetch %s\n",
78859c993d1SWarner Losh (mode & CPU_CONFIG_IC_PREF) ? "enabled" : "disabled",
78959c993d1SWarner Losh (mode & CPU_CONFIG_DC_PREF) ? "enabled" : "disabled");
79059c993d1SWarner Losh
79159c993d1SWarner Losh switch (d) {
79259c993d1SWarner Losh case MV_DEV_88F6281:
79359c993d1SWarner Losh case MV_DEV_88F6282:
79459c993d1SWarner Losh mode = read_cpu_ctrl(CPU_L2_CONFIG) & CPU_L2_CONFIG_MODE;
79559c993d1SWarner Losh printf(" 256KB 4-way set-associative %s unified L2 cache\n",
79659c993d1SWarner Losh mode ? "write-through" : "write-back");
79759c993d1SWarner Losh break;
79859c993d1SWarner Losh case MV_DEV_MV78100:
79959c993d1SWarner Losh mode = read_cpu_ctrl(CPU_CONTROL);
80059c993d1SWarner Losh size = mode & CPU_CONTROL_L2_SIZE;
80159c993d1SWarner Losh mode = mode & CPU_CONTROL_L2_MODE;
80259c993d1SWarner Losh printf(" %s set-associative %s unified L2 cache\n",
80359c993d1SWarner Losh size ? "256KB 4-way" : "512KB 8-way",
80459c993d1SWarner Losh mode ? "write-through" : "write-back");
80559c993d1SWarner Losh break;
80659c993d1SWarner Losh default:
80759c993d1SWarner Losh break;
80859c993d1SWarner Losh }
80959c993d1SWarner Losh }
81059c993d1SWarner Losh
81159c993d1SWarner Losh #ifdef KDB
81259c993d1SWarner Losh static void
mv_enter_debugger(void * dummy)81359c993d1SWarner Losh mv_enter_debugger(void *dummy)
81459c993d1SWarner Losh {
81559c993d1SWarner Losh
81659c993d1SWarner Losh if (boothowto & RB_KDB)
81759c993d1SWarner Losh kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
81859c993d1SWarner Losh }
81959c993d1SWarner Losh SYSINIT(mv_enter_debugger, SI_SUB_CPU, SI_ORDER_ANY, mv_enter_debugger, NULL);
82059c993d1SWarner Losh #endif
82159c993d1SWarner Losh
82259c993d1SWarner Losh int
soc_decode_win(void)82359c993d1SWarner Losh soc_decode_win(void)
82459c993d1SWarner Losh {
82559c993d1SWarner Losh uint32_t dev, rev;
82659c993d1SWarner Losh int mask, err;
82759c993d1SWarner Losh
82859c993d1SWarner Losh mask = 0;
82959c993d1SWarner Losh TUNABLE_INT_FETCH("hw.pm-disable-mask", &mask);
83059c993d1SWarner Losh
83159c993d1SWarner Losh if (mask != 0)
83259c993d1SWarner Losh pm_disable_device(mask);
83359c993d1SWarner Losh
83459c993d1SWarner Losh /* Retrieve data about physical addresses from device tree. */
83559c993d1SWarner Losh if ((err = win_cpu_from_dt()) != 0)
83659c993d1SWarner Losh return (err);
83759c993d1SWarner Losh
83859c993d1SWarner Losh /* Retrieve our ID: some windows facilities vary between SoC models */
83959c993d1SWarner Losh soc_id(&dev, &rev);
84059c993d1SWarner Losh
841091cd2f1SMarcin Wojtas if (soc_family == MV_SOC_ARMADA_XP)
84259c993d1SWarner Losh if ((err = decode_win_sdram_fixup()) != 0)
84359c993d1SWarner Losh return(err);
84459c993d1SWarner Losh
84559c993d1SWarner Losh decode_win_cpu_setup();
84659c993d1SWarner Losh if (MV_DUMP_WIN)
84759c993d1SWarner Losh soc_dump_decode_win();
84859c993d1SWarner Losh
84959c993d1SWarner Losh eth_port = 0;
85059c993d1SWarner Losh usb_port = 0;
85159c993d1SWarner Losh if ((err = fdt_win_setup()) != 0)
85259c993d1SWarner Losh return (err);
85359c993d1SWarner Losh
85459c993d1SWarner Losh return (0);
85559c993d1SWarner Losh }
85659c993d1SWarner Losh
85759c993d1SWarner Losh /**************************************************************************
85859c993d1SWarner Losh * Decode windows registers accessors
85959c993d1SWarner Losh **************************************************************************/
WIN_REG_IDX_RD(win_cpu_armv5,cr,MV_WIN_CPU_CTRL_ARMV5,MV_MBUS_BRIDGE_BASE)860091cd2f1SMarcin Wojtas WIN_REG_IDX_RD(win_cpu_armv5, cr, MV_WIN_CPU_CTRL_ARMV5, MV_MBUS_BRIDGE_BASE)
861091cd2f1SMarcin Wojtas WIN_REG_IDX_RD(win_cpu_armv5, br, MV_WIN_CPU_BASE_ARMV5, MV_MBUS_BRIDGE_BASE)
862091cd2f1SMarcin Wojtas WIN_REG_IDX_RD(win_cpu_armv5, remap_l, MV_WIN_CPU_REMAP_LO_ARMV5, MV_MBUS_BRIDGE_BASE)
863091cd2f1SMarcin Wojtas WIN_REG_IDX_RD(win_cpu_armv5, remap_h, MV_WIN_CPU_REMAP_HI_ARMV5, MV_MBUS_BRIDGE_BASE)
864091cd2f1SMarcin Wojtas WIN_REG_IDX_WR(win_cpu_armv5, cr, MV_WIN_CPU_CTRL_ARMV5, MV_MBUS_BRIDGE_BASE)
865091cd2f1SMarcin Wojtas WIN_REG_IDX_WR(win_cpu_armv5, br, MV_WIN_CPU_BASE_ARMV5, MV_MBUS_BRIDGE_BASE)
866091cd2f1SMarcin Wojtas WIN_REG_IDX_WR(win_cpu_armv5, remap_l, MV_WIN_CPU_REMAP_LO_ARMV5, MV_MBUS_BRIDGE_BASE)
867091cd2f1SMarcin Wojtas WIN_REG_IDX_WR(win_cpu_armv5, remap_h, MV_WIN_CPU_REMAP_HI_ARMV5, MV_MBUS_BRIDGE_BASE)
868091cd2f1SMarcin Wojtas
869091cd2f1SMarcin Wojtas WIN_REG_IDX_RD(win_cpu_armv7, cr, MV_WIN_CPU_CTRL_ARMV7, MV_MBUS_BRIDGE_BASE)
870091cd2f1SMarcin Wojtas WIN_REG_IDX_RD(win_cpu_armv7, br, MV_WIN_CPU_BASE_ARMV7, MV_MBUS_BRIDGE_BASE)
871091cd2f1SMarcin Wojtas WIN_REG_IDX_RD(win_cpu_armv7, remap_l, MV_WIN_CPU_REMAP_LO_ARMV7, MV_MBUS_BRIDGE_BASE)
872091cd2f1SMarcin Wojtas WIN_REG_IDX_RD(win_cpu_armv7, remap_h, MV_WIN_CPU_REMAP_HI_ARMV7, MV_MBUS_BRIDGE_BASE)
873091cd2f1SMarcin Wojtas WIN_REG_IDX_WR(win_cpu_armv7, cr, MV_WIN_CPU_CTRL_ARMV7, MV_MBUS_BRIDGE_BASE)
874091cd2f1SMarcin Wojtas WIN_REG_IDX_WR(win_cpu_armv7, br, MV_WIN_CPU_BASE_ARMV7, MV_MBUS_BRIDGE_BASE)
875091cd2f1SMarcin Wojtas WIN_REG_IDX_WR(win_cpu_armv7, remap_l, MV_WIN_CPU_REMAP_LO_ARMV7, MV_MBUS_BRIDGE_BASE)
876091cd2f1SMarcin Wojtas WIN_REG_IDX_WR(win_cpu_armv7, remap_h, MV_WIN_CPU_REMAP_HI_ARMV7, MV_MBUS_BRIDGE_BASE)
877091cd2f1SMarcin Wojtas
878091cd2f1SMarcin Wojtas static uint32_t
879091cd2f1SMarcin Wojtas win_cpu_cr_read(int i)
880091cd2f1SMarcin Wojtas {
881091cd2f1SMarcin Wojtas
882091cd2f1SMarcin Wojtas if (soc_decode_win_spec->cr_read != NULL)
883091cd2f1SMarcin Wojtas return (soc_decode_win_spec->cr_read(i));
884091cd2f1SMarcin Wojtas return (-1);
885091cd2f1SMarcin Wojtas }
886091cd2f1SMarcin Wojtas
887091cd2f1SMarcin Wojtas static uint32_t
win_cpu_br_read(int i)888091cd2f1SMarcin Wojtas win_cpu_br_read(int i)
889091cd2f1SMarcin Wojtas {
890091cd2f1SMarcin Wojtas
891091cd2f1SMarcin Wojtas if (soc_decode_win_spec->br_read != NULL)
892091cd2f1SMarcin Wojtas return (soc_decode_win_spec->br_read(i));
893091cd2f1SMarcin Wojtas return (-1);
894091cd2f1SMarcin Wojtas }
895091cd2f1SMarcin Wojtas
896091cd2f1SMarcin Wojtas static uint32_t
win_cpu_remap_l_read(int i)897091cd2f1SMarcin Wojtas win_cpu_remap_l_read(int i)
898091cd2f1SMarcin Wojtas {
899091cd2f1SMarcin Wojtas
900091cd2f1SMarcin Wojtas if (soc_decode_win_spec->remap_l_read != NULL)
901091cd2f1SMarcin Wojtas return (soc_decode_win_spec->remap_l_read(i));
902091cd2f1SMarcin Wojtas return (-1);
903091cd2f1SMarcin Wojtas }
904091cd2f1SMarcin Wojtas
905091cd2f1SMarcin Wojtas static uint32_t
win_cpu_remap_h_read(int i)906091cd2f1SMarcin Wojtas win_cpu_remap_h_read(int i)
907091cd2f1SMarcin Wojtas {
908091cd2f1SMarcin Wojtas
909091cd2f1SMarcin Wojtas if (soc_decode_win_spec->remap_h_read != NULL)
910091cd2f1SMarcin Wojtas return soc_decode_win_spec->remap_h_read(i);
911091cd2f1SMarcin Wojtas return (-1);
912091cd2f1SMarcin Wojtas }
913091cd2f1SMarcin Wojtas
914091cd2f1SMarcin Wojtas static void
win_cpu_cr_write(int i,uint32_t val)915091cd2f1SMarcin Wojtas win_cpu_cr_write(int i, uint32_t val)
916091cd2f1SMarcin Wojtas {
917091cd2f1SMarcin Wojtas
918091cd2f1SMarcin Wojtas if (soc_decode_win_spec->cr_write != NULL)
919091cd2f1SMarcin Wojtas soc_decode_win_spec->cr_write(i, val);
920091cd2f1SMarcin Wojtas }
921091cd2f1SMarcin Wojtas
922091cd2f1SMarcin Wojtas static void
win_cpu_br_write(int i,uint32_t val)923091cd2f1SMarcin Wojtas win_cpu_br_write(int i, uint32_t val)
924091cd2f1SMarcin Wojtas {
925091cd2f1SMarcin Wojtas
926091cd2f1SMarcin Wojtas if (soc_decode_win_spec->br_write != NULL)
927091cd2f1SMarcin Wojtas soc_decode_win_spec->br_write(i, val);
928091cd2f1SMarcin Wojtas }
929091cd2f1SMarcin Wojtas
930091cd2f1SMarcin Wojtas static void
win_cpu_remap_l_write(int i,uint32_t val)931091cd2f1SMarcin Wojtas win_cpu_remap_l_write(int i, uint32_t val)
932091cd2f1SMarcin Wojtas {
933091cd2f1SMarcin Wojtas
934091cd2f1SMarcin Wojtas if (soc_decode_win_spec->remap_l_write != NULL)
935091cd2f1SMarcin Wojtas soc_decode_win_spec->remap_l_write(i, val);
936091cd2f1SMarcin Wojtas }
937091cd2f1SMarcin Wojtas
938091cd2f1SMarcin Wojtas static void
win_cpu_remap_h_write(int i,uint32_t val)939091cd2f1SMarcin Wojtas win_cpu_remap_h_write(int i, uint32_t val)
940091cd2f1SMarcin Wojtas {
941091cd2f1SMarcin Wojtas
942091cd2f1SMarcin Wojtas if (soc_decode_win_spec->remap_h_write != NULL)
943091cd2f1SMarcin Wojtas soc_decode_win_spec->remap_h_write(i, val);
944091cd2f1SMarcin Wojtas }
94559c993d1SWarner Losh
946fcb93d74SWojciech Macek WIN_REG_BASE_IDX_RD(win_cesa, cr, MV_WIN_CESA_CTRL)
947fcb93d74SWojciech Macek WIN_REG_BASE_IDX_RD(win_cesa, br, MV_WIN_CESA_BASE)
948fcb93d74SWojciech Macek WIN_REG_BASE_IDX_WR(win_cesa, cr, MV_WIN_CESA_CTRL)
949fcb93d74SWojciech Macek WIN_REG_BASE_IDX_WR(win_cesa, br, MV_WIN_CESA_BASE)
950fcb93d74SWojciech Macek
95159c993d1SWarner Losh WIN_REG_BASE_IDX_RD(win_usb, cr, MV_WIN_USB_CTRL)
95259c993d1SWarner Losh WIN_REG_BASE_IDX_RD(win_usb, br, MV_WIN_USB_BASE)
95359c993d1SWarner Losh WIN_REG_BASE_IDX_WR(win_usb, cr, MV_WIN_USB_CTRL)
95459c993d1SWarner Losh WIN_REG_BASE_IDX_WR(win_usb, br, MV_WIN_USB_BASE)
95559c993d1SWarner Losh
95634a3d2c6SWojciech Macek WIN_REG_BASE_IDX_RD(win_usb3, cr, MV_WIN_USB3_CTRL)
95734a3d2c6SWojciech Macek WIN_REG_BASE_IDX_RD(win_usb3, br, MV_WIN_USB3_BASE)
95834a3d2c6SWojciech Macek WIN_REG_BASE_IDX_WR(win_usb3, cr, MV_WIN_USB3_CTRL)
95934a3d2c6SWojciech Macek WIN_REG_BASE_IDX_WR(win_usb3, br, MV_WIN_USB3_BASE)
96034a3d2c6SWojciech Macek
96159c993d1SWarner Losh WIN_REG_BASE_IDX_RD(win_eth, br, MV_WIN_ETH_BASE)
96259c993d1SWarner Losh WIN_REG_BASE_IDX_RD(win_eth, sz, MV_WIN_ETH_SIZE)
96359c993d1SWarner Losh WIN_REG_BASE_IDX_RD(win_eth, har, MV_WIN_ETH_REMAP)
96459c993d1SWarner Losh WIN_REG_BASE_IDX_WR(win_eth, br, MV_WIN_ETH_BASE)
96559c993d1SWarner Losh WIN_REG_BASE_IDX_WR(win_eth, sz, MV_WIN_ETH_SIZE)
96659c993d1SWarner Losh WIN_REG_BASE_IDX_WR(win_eth, har, MV_WIN_ETH_REMAP)
96759c993d1SWarner Losh
96859c993d1SWarner Losh WIN_REG_BASE_RD(win_eth, bare, 0x290)
96959c993d1SWarner Losh WIN_REG_BASE_RD(win_eth, epap, 0x294)
97059c993d1SWarner Losh WIN_REG_BASE_WR(win_eth, bare, 0x290)
97159c993d1SWarner Losh WIN_REG_BASE_WR(win_eth, epap, 0x294)
97259c993d1SWarner Losh
97359c993d1SWarner Losh WIN_REG_BASE_IDX_RD(win_pcie, cr, MV_WIN_PCIE_CTRL);
97459c993d1SWarner Losh WIN_REG_BASE_IDX_RD(win_pcie, br, MV_WIN_PCIE_BASE);
97559c993d1SWarner Losh WIN_REG_BASE_IDX_RD(win_pcie, remap, MV_WIN_PCIE_REMAP);
97659c993d1SWarner Losh WIN_REG_BASE_IDX_WR(win_pcie, cr, MV_WIN_PCIE_CTRL);
97759c993d1SWarner Losh WIN_REG_BASE_IDX_WR(win_pcie, br, MV_WIN_PCIE_BASE);
97859c993d1SWarner Losh WIN_REG_BASE_IDX_WR(win_pcie, remap, MV_WIN_PCIE_REMAP);
97959c993d1SWarner Losh WIN_REG_BASE_IDX_RD(pcie_bar, br, MV_PCIE_BAR_BASE);
9805d83a7b6SZbigniew Bodek WIN_REG_BASE_IDX_RD(pcie_bar, brh, MV_PCIE_BAR_BASE_H);
9815d83a7b6SZbigniew Bodek WIN_REG_BASE_IDX_RD(pcie_bar, cr, MV_PCIE_BAR_CTRL);
98259c993d1SWarner Losh WIN_REG_BASE_IDX_WR(pcie_bar, br, MV_PCIE_BAR_BASE);
98359c993d1SWarner Losh WIN_REG_BASE_IDX_WR(pcie_bar, brh, MV_PCIE_BAR_BASE_H);
98459c993d1SWarner Losh WIN_REG_BASE_IDX_WR(pcie_bar, cr, MV_PCIE_BAR_CTRL);
98559c993d1SWarner Losh
98659c993d1SWarner Losh WIN_REG_BASE_IDX_RD(win_sata, cr, MV_WIN_SATA_CTRL);
98759c993d1SWarner Losh WIN_REG_BASE_IDX_RD(win_sata, br, MV_WIN_SATA_BASE);
98859c993d1SWarner Losh WIN_REG_BASE_IDX_WR(win_sata, cr, MV_WIN_SATA_CTRL);
98959c993d1SWarner Losh WIN_REG_BASE_IDX_WR(win_sata, br, MV_WIN_SATA_BASE);
990091cd2f1SMarcin Wojtas
991091cd2f1SMarcin Wojtas WIN_REG_BASE_IDX_RD(win_sata_armada38x, sz, MV_WIN_SATA_SIZE_ARMADA38X);
992091cd2f1SMarcin Wojtas WIN_REG_BASE_IDX_WR(win_sata_armada38x, sz, MV_WIN_SATA_SIZE_ARMADA38X);
993091cd2f1SMarcin Wojtas WIN_REG_BASE_IDX_RD(win_sata_armada38x, cr, MV_WIN_SATA_CTRL_ARMADA38X);
994091cd2f1SMarcin Wojtas WIN_REG_BASE_IDX_WR(win_sata_armada38x, cr, MV_WIN_SATA_CTRL_ARMADA38X);
995091cd2f1SMarcin Wojtas WIN_REG_BASE_IDX_WR(win_sata_armada38x, br, MV_WIN_SATA_BASE_ARMADA38X);
996ccd5b1b0SWojciech Macek
99798a2d78dSLuiz Otavio O Souza WIN_REG_BASE_IDX_RD(win_sdhci, cr, MV_WIN_SDHCI_CTRL);
99898a2d78dSLuiz Otavio O Souza WIN_REG_BASE_IDX_RD(win_sdhci, br, MV_WIN_SDHCI_BASE);
99998a2d78dSLuiz Otavio O Souza WIN_REG_BASE_IDX_WR(win_sdhci, cr, MV_WIN_SDHCI_CTRL);
100098a2d78dSLuiz Otavio O Souza WIN_REG_BASE_IDX_WR(win_sdhci, br, MV_WIN_SDHCI_BASE);
100198a2d78dSLuiz Otavio O Souza
100259c993d1SWarner Losh #ifndef SOC_MV_DOVE
WIN_REG_IDX_RD(ddr_armv5,br,MV_WIN_DDR_BASE,MV_DDR_CADR_BASE)1003091cd2f1SMarcin Wojtas WIN_REG_IDX_RD(ddr_armv5, br, MV_WIN_DDR_BASE, MV_DDR_CADR_BASE)
1004091cd2f1SMarcin Wojtas WIN_REG_IDX_RD(ddr_armv5, sz, MV_WIN_DDR_SIZE, MV_DDR_CADR_BASE)
1005091cd2f1SMarcin Wojtas WIN_REG_IDX_WR(ddr_armv5, br, MV_WIN_DDR_BASE, MV_DDR_CADR_BASE)
1006091cd2f1SMarcin Wojtas WIN_REG_IDX_WR(ddr_armv5, sz, MV_WIN_DDR_SIZE, MV_DDR_CADR_BASE)
1007091cd2f1SMarcin Wojtas
1008091cd2f1SMarcin Wojtas WIN_REG_IDX_RD(ddr_armv7, br, MV_WIN_DDR_BASE, MV_DDR_CADR_BASE_ARMV7)
1009091cd2f1SMarcin Wojtas WIN_REG_IDX_RD(ddr_armv7, sz, MV_WIN_DDR_SIZE, MV_DDR_CADR_BASE_ARMV7)
1010091cd2f1SMarcin Wojtas WIN_REG_IDX_WR(ddr_armv7, br, MV_WIN_DDR_BASE, MV_DDR_CADR_BASE_ARMV7)
1011091cd2f1SMarcin Wojtas WIN_REG_IDX_WR(ddr_armv7, sz, MV_WIN_DDR_SIZE, MV_DDR_CADR_BASE_ARMV7)
1012091cd2f1SMarcin Wojtas
1013091cd2f1SMarcin Wojtas static inline uint32_t
1014091cd2f1SMarcin Wojtas ddr_br_read(int i)
1015091cd2f1SMarcin Wojtas {
1016091cd2f1SMarcin Wojtas
1017091cd2f1SMarcin Wojtas if (soc_decode_win_spec->ddr_br_read != NULL)
1018091cd2f1SMarcin Wojtas return (soc_decode_win_spec->ddr_br_read(i));
1019091cd2f1SMarcin Wojtas return (-1);
1020091cd2f1SMarcin Wojtas }
1021091cd2f1SMarcin Wojtas
1022091cd2f1SMarcin Wojtas static inline uint32_t
ddr_sz_read(int i)1023091cd2f1SMarcin Wojtas ddr_sz_read(int i)
1024091cd2f1SMarcin Wojtas {
1025091cd2f1SMarcin Wojtas
1026091cd2f1SMarcin Wojtas if (soc_decode_win_spec->ddr_sz_read != NULL)
1027091cd2f1SMarcin Wojtas return (soc_decode_win_spec->ddr_sz_read(i));
1028091cd2f1SMarcin Wojtas return (-1);
1029091cd2f1SMarcin Wojtas }
1030091cd2f1SMarcin Wojtas
1031091cd2f1SMarcin Wojtas static inline void
ddr_br_write(int i,uint32_t val)1032091cd2f1SMarcin Wojtas ddr_br_write(int i, uint32_t val)
1033091cd2f1SMarcin Wojtas {
1034091cd2f1SMarcin Wojtas
1035091cd2f1SMarcin Wojtas if (soc_decode_win_spec->ddr_br_write != NULL)
1036091cd2f1SMarcin Wojtas soc_decode_win_spec->ddr_br_write(i, val);
1037091cd2f1SMarcin Wojtas }
1038091cd2f1SMarcin Wojtas
1039091cd2f1SMarcin Wojtas static inline void
ddr_sz_write(int i,uint32_t val)1040091cd2f1SMarcin Wojtas ddr_sz_write(int i, uint32_t val)
1041091cd2f1SMarcin Wojtas {
1042091cd2f1SMarcin Wojtas
1043091cd2f1SMarcin Wojtas if (soc_decode_win_spec->ddr_sz_write != NULL)
1044091cd2f1SMarcin Wojtas soc_decode_win_spec->ddr_sz_write(i, val);
1045091cd2f1SMarcin Wojtas }
104659c993d1SWarner Losh #else
104759c993d1SWarner Losh /*
104859c993d1SWarner Losh * On 88F6781 (Dove) SoC DDR Controller is accessed through
104959c993d1SWarner Losh * single MBUS <-> AXI bridge. In this case we provide emulated
105059c993d1SWarner Losh * ddr_br_read() and ddr_sz_read() functions to keep compatibility
105159c993d1SWarner Losh * with common decoding windows setup code.
105259c993d1SWarner Losh */
105359c993d1SWarner Losh
ddr_br_read(int i)105459c993d1SWarner Losh static inline uint32_t ddr_br_read(int i)
105559c993d1SWarner Losh {
105659c993d1SWarner Losh uint32_t mmap;
105759c993d1SWarner Losh
105859c993d1SWarner Losh /* Read Memory Address Map Register for CS i */
105959c993d1SWarner Losh mmap = bus_space_read_4(fdtbus_bs_tag, MV_DDR_CADR_BASE + (i * 0x10), 0);
106059c993d1SWarner Losh
106159c993d1SWarner Losh /* Return CS i base address */
106259c993d1SWarner Losh return (mmap & 0xFF000000);
106359c993d1SWarner Losh }
106459c993d1SWarner Losh
ddr_sz_read(int i)106559c993d1SWarner Losh static inline uint32_t ddr_sz_read(int i)
106659c993d1SWarner Losh {
106759c993d1SWarner Losh uint32_t mmap, size;
106859c993d1SWarner Losh
106959c993d1SWarner Losh /* Read Memory Address Map Register for CS i */
107059c993d1SWarner Losh mmap = bus_space_read_4(fdtbus_bs_tag, MV_DDR_CADR_BASE + (i * 0x10), 0);
107159c993d1SWarner Losh
107259c993d1SWarner Losh /* Extract size of CS space in 64kB units */
107359c993d1SWarner Losh size = (1 << ((mmap >> 16) & 0x0F));
107459c993d1SWarner Losh
107559c993d1SWarner Losh /* Return CS size and enable/disable status */
107659c993d1SWarner Losh return (((size - 1) << 16) | (mmap & 0x01));
107759c993d1SWarner Losh }
107859c993d1SWarner Losh #endif
107959c993d1SWarner Losh
108059c993d1SWarner Losh /**************************************************************************
108159c993d1SWarner Losh * Decode windows helper routines
108259c993d1SWarner Losh **************************************************************************/
108359c993d1SWarner Losh void
soc_dump_decode_win(void)108459c993d1SWarner Losh soc_dump_decode_win(void)
108559c993d1SWarner Losh {
108659c993d1SWarner Losh int i;
108759c993d1SWarner Losh
1088091cd2f1SMarcin Wojtas for (i = 0; i < soc_decode_win_spec->mv_win_cpu_max; i++) {
108959c993d1SWarner Losh printf("CPU window#%d: c 0x%08x, b 0x%08x", i,
109059c993d1SWarner Losh win_cpu_cr_read(i),
109159c993d1SWarner Losh win_cpu_br_read(i));
109259c993d1SWarner Losh
109359c993d1SWarner Losh if (win_cpu_can_remap(i))
109459c993d1SWarner Losh printf(", rl 0x%08x, rh 0x%08x",
109559c993d1SWarner Losh win_cpu_remap_l_read(i),
109659c993d1SWarner Losh win_cpu_remap_h_read(i));
109759c993d1SWarner Losh
109859c993d1SWarner Losh printf("\n");
109959c993d1SWarner Losh }
110059c993d1SWarner Losh printf("Internal regs base: 0x%08x\n",
110159c993d1SWarner Losh bus_space_read_4(fdtbus_bs_tag, MV_INTREGS_BASE, 0));
110259c993d1SWarner Losh
110359c993d1SWarner Losh for (i = 0; i < MV_WIN_DDR_MAX; i++)
110459c993d1SWarner Losh printf("DDR CS#%d: b 0x%08x, s 0x%08x\n", i,
110559c993d1SWarner Losh ddr_br_read(i), ddr_sz_read(i));
110659c993d1SWarner Losh }
110759c993d1SWarner Losh
110859c993d1SWarner Losh /**************************************************************************
110959c993d1SWarner Losh * CPU windows routines
111059c993d1SWarner Losh **************************************************************************/
111159c993d1SWarner Losh int
win_cpu_can_remap(int i)111259c993d1SWarner Losh win_cpu_can_remap(int i)
111359c993d1SWarner Losh {
111459c993d1SWarner Losh uint32_t dev, rev;
111559c993d1SWarner Losh
111659c993d1SWarner Losh soc_id(&dev, &rev);
111759c993d1SWarner Losh
111859c993d1SWarner Losh /* Depending on the SoC certain windows have remap capability */
111959c993d1SWarner Losh if ((dev == MV_DEV_88F5182 && i < 2) ||
112059c993d1SWarner Losh (dev == MV_DEV_88F5281 && i < 4) ||
112159c993d1SWarner Losh (dev == MV_DEV_88F6281 && i < 4) ||
112259c993d1SWarner Losh (dev == MV_DEV_88F6282 && i < 4) ||
1123515af5ceSZbigniew Bodek (dev == MV_DEV_88F6828 && i < 20) ||
1124515af5ceSZbigniew Bodek (dev == MV_DEV_88F6820 && i < 20) ||
1125515af5ceSZbigniew Bodek (dev == MV_DEV_88F6810 && i < 20) ||
112659c993d1SWarner Losh (dev == MV_DEV_88RC8180 && i < 2) ||
112759c993d1SWarner Losh (dev == MV_DEV_88F6781 && i < 4) ||
112859c993d1SWarner Losh (dev == MV_DEV_MV78100_Z0 && i < 8) ||
112959c993d1SWarner Losh ((dev & MV_DEV_FAMILY_MASK) == MV_DEV_DISCOVERY && i < 8))
113059c993d1SWarner Losh return (1);
113159c993d1SWarner Losh
113259c993d1SWarner Losh return (0);
113359c993d1SWarner Losh }
113459c993d1SWarner Losh
113559c993d1SWarner Losh /* XXX This should check for overlapping remap fields too.. */
113659c993d1SWarner Losh int
decode_win_overlap(int win,int win_no,const struct decode_win * wintab)113759c993d1SWarner Losh decode_win_overlap(int win, int win_no, const struct decode_win *wintab)
113859c993d1SWarner Losh {
113959c993d1SWarner Losh const struct decode_win *tab;
114059c993d1SWarner Losh int i;
114159c993d1SWarner Losh
114259c993d1SWarner Losh tab = wintab;
114359c993d1SWarner Losh
114459c993d1SWarner Losh for (i = 0; i < win_no; i++, tab++) {
114559c993d1SWarner Losh if (i == win)
114659c993d1SWarner Losh /* Skip self */
114759c993d1SWarner Losh continue;
114859c993d1SWarner Losh
114959c993d1SWarner Losh if ((tab->base + tab->size - 1) < (wintab + win)->base)
115059c993d1SWarner Losh continue;
115159c993d1SWarner Losh
115259c993d1SWarner Losh else if (((wintab + win)->base + (wintab + win)->size - 1) <
115359c993d1SWarner Losh tab->base)
115459c993d1SWarner Losh continue;
115559c993d1SWarner Losh else
115659c993d1SWarner Losh return (i);
115759c993d1SWarner Losh }
115859c993d1SWarner Losh
115959c993d1SWarner Losh return (-1);
116059c993d1SWarner Losh }
116159c993d1SWarner Losh
116259c993d1SWarner Losh int
decode_win_cpu_set(int target,int attr,vm_paddr_t base,uint32_t size,vm_paddr_t remap)116359c993d1SWarner Losh decode_win_cpu_set(int target, int attr, vm_paddr_t base, uint32_t size,
116459c993d1SWarner Losh vm_paddr_t remap)
116559c993d1SWarner Losh {
116659c993d1SWarner Losh uint32_t br, cr;
116759c993d1SWarner Losh int win, i;
116859c993d1SWarner Losh
116959c993d1SWarner Losh if (remap == ~0) {
1170091cd2f1SMarcin Wojtas win = soc_decode_win_spec->mv_win_cpu_max - 1;
117159c993d1SWarner Losh i = -1;
117259c993d1SWarner Losh } else {
117359c993d1SWarner Losh win = 0;
117459c993d1SWarner Losh i = 1;
117559c993d1SWarner Losh }
117659c993d1SWarner Losh
1177091cd2f1SMarcin Wojtas while ((win >= 0) && (win < soc_decode_win_spec->mv_win_cpu_max)) {
117859c993d1SWarner Losh cr = win_cpu_cr_read(win);
117959c993d1SWarner Losh if ((cr & MV_WIN_CPU_ENABLE_BIT) == 0)
118059c993d1SWarner Losh break;
118159c993d1SWarner Losh if ((cr & ((0xff << MV_WIN_CPU_ATTR_SHIFT) |
118259c993d1SWarner Losh (0x1f << MV_WIN_CPU_TARGET_SHIFT))) ==
118359c993d1SWarner Losh ((attr << MV_WIN_CPU_ATTR_SHIFT) |
118459c993d1SWarner Losh (target << MV_WIN_CPU_TARGET_SHIFT)))
118559c993d1SWarner Losh break;
118659c993d1SWarner Losh win += i;
118759c993d1SWarner Losh }
1188091cd2f1SMarcin Wojtas if ((win < 0) || (win >= soc_decode_win_spec->mv_win_cpu_max) ||
118959c993d1SWarner Losh ((remap != ~0) && (win_cpu_can_remap(win) == 0)))
119059c993d1SWarner Losh return (-1);
119159c993d1SWarner Losh
119259c993d1SWarner Losh br = base & 0xffff0000;
119359c993d1SWarner Losh win_cpu_br_write(win, br);
119459c993d1SWarner Losh
119559c993d1SWarner Losh if (win_cpu_can_remap(win)) {
119659c993d1SWarner Losh if (remap != ~0) {
119759c993d1SWarner Losh win_cpu_remap_l_write(win, remap & 0xffff0000);
119859c993d1SWarner Losh win_cpu_remap_h_write(win, 0);
119959c993d1SWarner Losh } else {
120059c993d1SWarner Losh /*
120159c993d1SWarner Losh * Remap function is not used for a given window
120259c993d1SWarner Losh * (capable of remapping) - set remap field with the
120359c993d1SWarner Losh * same value as base.
120459c993d1SWarner Losh */
120559c993d1SWarner Losh win_cpu_remap_l_write(win, base & 0xffff0000);
120659c993d1SWarner Losh win_cpu_remap_h_write(win, 0);
120759c993d1SWarner Losh }
120859c993d1SWarner Losh }
120959c993d1SWarner Losh
121059c993d1SWarner Losh cr = ((size - 1) & 0xffff0000) | (attr << MV_WIN_CPU_ATTR_SHIFT) |
121159c993d1SWarner Losh (target << MV_WIN_CPU_TARGET_SHIFT) | MV_WIN_CPU_ENABLE_BIT;
121259c993d1SWarner Losh win_cpu_cr_write(win, cr);
121359c993d1SWarner Losh
121459c993d1SWarner Losh return (0);
121559c993d1SWarner Losh }
121659c993d1SWarner Losh
121759c993d1SWarner Losh static void
decode_win_cpu_setup(void)121859c993d1SWarner Losh decode_win_cpu_setup(void)
121959c993d1SWarner Losh {
122059c993d1SWarner Losh int i;
122159c993d1SWarner Losh
122259c993d1SWarner Losh /* Disable all CPU windows */
1223091cd2f1SMarcin Wojtas for (i = 0; i < soc_decode_win_spec->mv_win_cpu_max; i++) {
122459c993d1SWarner Losh win_cpu_cr_write(i, 0);
122559c993d1SWarner Losh win_cpu_br_write(i, 0);
122659c993d1SWarner Losh if (win_cpu_can_remap(i)) {
122759c993d1SWarner Losh win_cpu_remap_l_write(i, 0);
122859c993d1SWarner Losh win_cpu_remap_h_write(i, 0);
122959c993d1SWarner Losh }
123059c993d1SWarner Losh }
123159c993d1SWarner Losh
123259c993d1SWarner Losh for (i = 0; i < cpu_wins_no; i++)
123359c993d1SWarner Losh if (cpu_wins[i].target > 0)
123459c993d1SWarner Losh decode_win_cpu_set(cpu_wins[i].target,
123559c993d1SWarner Losh cpu_wins[i].attr, cpu_wins[i].base,
123659c993d1SWarner Losh cpu_wins[i].size, cpu_wins[i].remap);
123759c993d1SWarner Losh
123859c993d1SWarner Losh }
123959c993d1SWarner Losh
124059c993d1SWarner Losh static int
decode_win_sdram_fixup(void)124159c993d1SWarner Losh decode_win_sdram_fixup(void)
124259c993d1SWarner Losh {
124359c993d1SWarner Losh struct mem_region mr[FDT_MEM_REGIONS];
124459c993d1SWarner Losh uint8_t window_valid[MV_WIN_DDR_MAX];
1245e571e15cSWojciech Macek int mr_cnt, err, i, j;
124659c993d1SWarner Losh uint32_t valid_win_num = 0;
124759c993d1SWarner Losh
124859c993d1SWarner Losh /* Grab physical memory regions information from device tree. */
1249a4376069SAndrew Turner err = fdt_get_mem_regions(mr, &mr_cnt, NULL);
125059c993d1SWarner Losh if (err != 0)
125159c993d1SWarner Losh return (err);
125259c993d1SWarner Losh
125359c993d1SWarner Losh for (i = 0; i < MV_WIN_DDR_MAX; i++)
125459c993d1SWarner Losh window_valid[i] = 0;
125559c993d1SWarner Losh
125659c993d1SWarner Losh /* Try to match entries from device tree with settings from u-boot */
125759c993d1SWarner Losh for (i = 0; i < mr_cnt; i++) {
125859c993d1SWarner Losh for (j = 0; j < MV_WIN_DDR_MAX; j++) {
125959c993d1SWarner Losh if (ddr_is_active(j) &&
126059c993d1SWarner Losh (ddr_base(j) == mr[i].mr_start) &&
126159c993d1SWarner Losh (ddr_size(j) == mr[i].mr_size)) {
126259c993d1SWarner Losh window_valid[j] = 1;
126359c993d1SWarner Losh valid_win_num++;
126459c993d1SWarner Losh }
126559c993d1SWarner Losh }
126659c993d1SWarner Losh }
126759c993d1SWarner Losh
126859c993d1SWarner Losh if (mr_cnt != valid_win_num)
126959c993d1SWarner Losh return (EINVAL);
127059c993d1SWarner Losh
127159c993d1SWarner Losh /* Destroy windows without corresponding device tree entry */
127259c993d1SWarner Losh for (j = 0; j < MV_WIN_DDR_MAX; j++) {
127359c993d1SWarner Losh if (ddr_is_active(j) && (window_valid[j] != 1)) {
127459c993d1SWarner Losh printf("Disabling SDRAM decoding window: %d\n", j);
127559c993d1SWarner Losh ddr_disable(j);
127659c993d1SWarner Losh }
127759c993d1SWarner Losh }
127859c993d1SWarner Losh
127959c993d1SWarner Losh return (0);
128059c993d1SWarner Losh }
128159c993d1SWarner Losh /*
128259c993d1SWarner Losh * Check if we're able to cover all active DDR banks.
128359c993d1SWarner Losh */
128459c993d1SWarner Losh static int
decode_win_can_cover_ddr(int max)128559c993d1SWarner Losh decode_win_can_cover_ddr(int max)
128659c993d1SWarner Losh {
128759c993d1SWarner Losh int i, c;
128859c993d1SWarner Losh
128959c993d1SWarner Losh c = 0;
129059c993d1SWarner Losh for (i = 0; i < MV_WIN_DDR_MAX; i++)
129159c993d1SWarner Losh if (ddr_is_active(i))
129259c993d1SWarner Losh c++;
129359c993d1SWarner Losh
129459c993d1SWarner Losh if (c > max) {
129559c993d1SWarner Losh printf("Unable to cover all active DDR banks: "
129659c993d1SWarner Losh "%d, available windows: %d\n", c, max);
129759c993d1SWarner Losh return (0);
129859c993d1SWarner Losh }
129959c993d1SWarner Losh
130059c993d1SWarner Losh return (1);
130159c993d1SWarner Losh }
130259c993d1SWarner Losh
130359c993d1SWarner Losh /**************************************************************************
130459c993d1SWarner Losh * DDR windows routines
130559c993d1SWarner Losh **************************************************************************/
130659c993d1SWarner Losh int
ddr_is_active(int i)130759c993d1SWarner Losh ddr_is_active(int i)
130859c993d1SWarner Losh {
130959c993d1SWarner Losh
131059c993d1SWarner Losh if (ddr_sz_read(i) & 0x1)
131159c993d1SWarner Losh return (1);
131259c993d1SWarner Losh
131359c993d1SWarner Losh return (0);
131459c993d1SWarner Losh }
131559c993d1SWarner Losh
131659c993d1SWarner Losh void
ddr_disable(int i)131759c993d1SWarner Losh ddr_disable(int i)
131859c993d1SWarner Losh {
131959c993d1SWarner Losh
132059c993d1SWarner Losh ddr_sz_write(i, 0);
132159c993d1SWarner Losh ddr_br_write(i, 0);
132259c993d1SWarner Losh }
132359c993d1SWarner Losh
132459c993d1SWarner Losh uint32_t
ddr_base(int i)132559c993d1SWarner Losh ddr_base(int i)
132659c993d1SWarner Losh {
132759c993d1SWarner Losh
132859c993d1SWarner Losh return (ddr_br_read(i) & 0xff000000);
132959c993d1SWarner Losh }
133059c993d1SWarner Losh
133159c993d1SWarner Losh uint32_t
ddr_size(int i)133259c993d1SWarner Losh ddr_size(int i)
133359c993d1SWarner Losh {
133459c993d1SWarner Losh
133559c993d1SWarner Losh return ((ddr_sz_read(i) | 0x00ffffff) + 1);
133659c993d1SWarner Losh }
133759c993d1SWarner Losh
133859c993d1SWarner Losh uint32_t
ddr_attr(int i)133959c993d1SWarner Losh ddr_attr(int i)
134059c993d1SWarner Losh {
13413361fdc4SZbigniew Bodek uint32_t dev, rev, attr;
134259c993d1SWarner Losh
134359c993d1SWarner Losh soc_id(&dev, &rev);
134459c993d1SWarner Losh if (dev == MV_DEV_88RC8180)
134559c993d1SWarner Losh return ((ddr_sz_read(i) & 0xf0) >> 4);
134659c993d1SWarner Losh if (dev == MV_DEV_88F6781)
134759c993d1SWarner Losh return (0);
134859c993d1SWarner Losh
13493361fdc4SZbigniew Bodek attr = (i == 0 ? 0xe :
135059c993d1SWarner Losh (i == 1 ? 0xd :
135159c993d1SWarner Losh (i == 2 ? 0xb :
135259c993d1SWarner Losh (i == 3 ? 0x7 : 0xff))));
13533361fdc4SZbigniew Bodek if (platform_io_coherent)
13543361fdc4SZbigniew Bodek attr |= 0x10;
13553361fdc4SZbigniew Bodek
13563361fdc4SZbigniew Bodek return (attr);
135759c993d1SWarner Losh }
135859c993d1SWarner Losh
135959c993d1SWarner Losh uint32_t
ddr_target(int i)136059c993d1SWarner Losh ddr_target(int i)
136159c993d1SWarner Losh {
136259c993d1SWarner Losh uint32_t dev, rev;
136359c993d1SWarner Losh
136459c993d1SWarner Losh soc_id(&dev, &rev);
136559c993d1SWarner Losh if (dev == MV_DEV_88RC8180) {
136659c993d1SWarner Losh i = (ddr_sz_read(i) & 0xf0) >> 4;
136759c993d1SWarner Losh return (i == 0xe ? 0xc :
136859c993d1SWarner Losh (i == 0xd ? 0xd :
136959c993d1SWarner Losh (i == 0xb ? 0xe :
137059c993d1SWarner Losh (i == 0x7 ? 0xf : 0xc))));
137159c993d1SWarner Losh }
137259c993d1SWarner Losh
137359c993d1SWarner Losh /*
137459c993d1SWarner Losh * On SOCs other than 88RC8180 Mbus unit ID for
137559c993d1SWarner Losh * DDR SDRAM controller is always 0x0.
137659c993d1SWarner Losh */
137759c993d1SWarner Losh return (0);
137859c993d1SWarner Losh }
137959c993d1SWarner Losh
138059c993d1SWarner Losh /**************************************************************************
1381fcb93d74SWojciech Macek * CESA windows routines
1382fcb93d74SWojciech Macek **************************************************************************/
1383fcb93d74SWojciech Macek static int
decode_win_cesa_valid(void)1384fcb93d74SWojciech Macek decode_win_cesa_valid(void)
1385fcb93d74SWojciech Macek {
1386fcb93d74SWojciech Macek
1387fcb93d74SWojciech Macek return (decode_win_can_cover_ddr(MV_WIN_CESA_MAX));
1388fcb93d74SWojciech Macek }
1389fcb93d74SWojciech Macek
1390fcb93d74SWojciech Macek static void
decode_win_cesa_dump(u_long base)1391fcb93d74SWojciech Macek decode_win_cesa_dump(u_long base)
1392fcb93d74SWojciech Macek {
1393fcb93d74SWojciech Macek int i;
1394fcb93d74SWojciech Macek
1395fcb93d74SWojciech Macek for (i = 0; i < MV_WIN_CESA_MAX; i++)
1396fcb93d74SWojciech Macek printf("CESA window#%d: c 0x%08x, b 0x%08x\n", i,
1397fcb93d74SWojciech Macek win_cesa_cr_read(base, i), win_cesa_br_read(base, i));
1398fcb93d74SWojciech Macek }
1399fcb93d74SWojciech Macek
1400fcb93d74SWojciech Macek /*
1401fcb93d74SWojciech Macek * Set CESA decode windows.
1402fcb93d74SWojciech Macek */
1403fcb93d74SWojciech Macek static void
decode_win_cesa_setup(u_long base)1404fcb93d74SWojciech Macek decode_win_cesa_setup(u_long base)
1405fcb93d74SWojciech Macek {
1406fcb93d74SWojciech Macek uint32_t br, cr;
1407fa5f501dSZbigniew Bodek uint64_t size;
1408fcb93d74SWojciech Macek int i, j;
1409fcb93d74SWojciech Macek
1410fcb93d74SWojciech Macek for (i = 0; i < MV_WIN_CESA_MAX; i++) {
1411fcb93d74SWojciech Macek win_cesa_cr_write(base, i, 0);
1412fcb93d74SWojciech Macek win_cesa_br_write(base, i, 0);
1413fcb93d74SWojciech Macek }
1414fcb93d74SWojciech Macek
1415fcb93d74SWojciech Macek /* Only access to active DRAM banks is required */
1416fcb93d74SWojciech Macek for (i = 0; i < MV_WIN_DDR_MAX; i++) {
1417fcb93d74SWojciech Macek if (ddr_is_active(i)) {
1418fcb93d74SWojciech Macek br = ddr_base(i);
1419fcb93d74SWojciech Macek
1420fa5f501dSZbigniew Bodek size = ddr_size(i);
1421fa5f501dSZbigniew Bodek /*
1422fa5f501dSZbigniew Bodek * Armada 38x SoC's equipped with 4GB DRAM
1423fa5f501dSZbigniew Bodek * suffer freeze during CESA operation, if
1424fa5f501dSZbigniew Bodek * MBUS window opened at given DRAM CS reaches
1425fa5f501dSZbigniew Bodek * end of the address space. Apply a workaround
1426fa5f501dSZbigniew Bodek * by setting the window size to the closest possible
1427fa5f501dSZbigniew Bodek * value, i.e. divide it by 2.
1428fa5f501dSZbigniew Bodek */
1429091cd2f1SMarcin Wojtas if ((soc_family == MV_SOC_ARMADA_38X) &&
1430091cd2f1SMarcin Wojtas (size + ddr_base(i) == 0x100000000ULL))
1431fa5f501dSZbigniew Bodek size /= 2;
1432fa5f501dSZbigniew Bodek
1433fa5f501dSZbigniew Bodek cr = (((size - 1) & 0xffff0000) |
1434fcb93d74SWojciech Macek (ddr_attr(i) << IO_WIN_ATTR_SHIFT) |
1435fcb93d74SWojciech Macek (ddr_target(i) << IO_WIN_TGT_SHIFT) |
1436fcb93d74SWojciech Macek IO_WIN_ENA_MASK);
1437fcb93d74SWojciech Macek
1438fcb93d74SWojciech Macek /* Set the first free CESA window */
1439fcb93d74SWojciech Macek for (j = 0; j < MV_WIN_CESA_MAX; j++) {
1440fcb93d74SWojciech Macek if (win_cesa_cr_read(base, j) & 0x1)
1441fcb93d74SWojciech Macek continue;
1442fcb93d74SWojciech Macek
1443fcb93d74SWojciech Macek win_cesa_br_write(base, j, br);
1444fcb93d74SWojciech Macek win_cesa_cr_write(base, j, cr);
1445fcb93d74SWojciech Macek break;
1446fcb93d74SWojciech Macek }
1447fcb93d74SWojciech Macek }
1448fcb93d74SWojciech Macek }
1449fcb93d74SWojciech Macek }
1450fcb93d74SWojciech Macek
1451e9e2a7c1SMarcin Wojtas static void
decode_win_a38x_cesa_setup(u_long base)1452e9e2a7c1SMarcin Wojtas decode_win_a38x_cesa_setup(u_long base)
1453e9e2a7c1SMarcin Wojtas {
1454e9e2a7c1SMarcin Wojtas decode_win_cesa_setup(base);
1455e9e2a7c1SMarcin Wojtas decode_win_cesa_setup(base + MV_WIN_CESA_OFFSET);
1456e9e2a7c1SMarcin Wojtas }
1457e9e2a7c1SMarcin Wojtas
1458e9e2a7c1SMarcin Wojtas static void
decode_win_a38x_cesa_dump(u_long base)1459e9e2a7c1SMarcin Wojtas decode_win_a38x_cesa_dump(u_long base)
1460e9e2a7c1SMarcin Wojtas {
1461e9e2a7c1SMarcin Wojtas decode_win_cesa_dump(base);
1462e9e2a7c1SMarcin Wojtas decode_win_cesa_dump(base + MV_WIN_CESA_OFFSET);
1463e9e2a7c1SMarcin Wojtas }
1464e9e2a7c1SMarcin Wojtas
1465fcb93d74SWojciech Macek /**************************************************************************
146659c993d1SWarner Losh * USB windows routines
146759c993d1SWarner Losh **************************************************************************/
146859c993d1SWarner Losh static int
decode_win_usb_valid(void)146959c993d1SWarner Losh decode_win_usb_valid(void)
147059c993d1SWarner Losh {
147159c993d1SWarner Losh
147259c993d1SWarner Losh return (decode_win_can_cover_ddr(MV_WIN_USB_MAX));
147359c993d1SWarner Losh }
147459c993d1SWarner Losh
147559c993d1SWarner Losh static void
decode_win_usb_dump(u_long base)147659c993d1SWarner Losh decode_win_usb_dump(u_long base)
147759c993d1SWarner Losh {
147859c993d1SWarner Losh int i;
147959c993d1SWarner Losh
148059c993d1SWarner Losh if (pm_is_disabled(CPU_PM_CTRL_USB(usb_port - 1)))
148159c993d1SWarner Losh return;
148259c993d1SWarner Losh
148359c993d1SWarner Losh for (i = 0; i < MV_WIN_USB_MAX; i++)
148459c993d1SWarner Losh printf("USB window#%d: c 0x%08x, b 0x%08x\n", i,
148559c993d1SWarner Losh win_usb_cr_read(base, i), win_usb_br_read(base, i));
148659c993d1SWarner Losh }
148759c993d1SWarner Losh
148859c993d1SWarner Losh /*
148959c993d1SWarner Losh * Set USB decode windows.
149059c993d1SWarner Losh */
149159c993d1SWarner Losh static void
decode_win_usb_setup(u_long base)149259c993d1SWarner Losh decode_win_usb_setup(u_long base)
149359c993d1SWarner Losh {
149459c993d1SWarner Losh uint32_t br, cr;
149559c993d1SWarner Losh int i, j;
149659c993d1SWarner Losh
149759c993d1SWarner Losh if (pm_is_disabled(CPU_PM_CTRL_USB(usb_port)))
149859c993d1SWarner Losh return;
149959c993d1SWarner Losh
150059c993d1SWarner Losh usb_port++;
150159c993d1SWarner Losh
150259c993d1SWarner Losh for (i = 0; i < MV_WIN_USB_MAX; i++) {
150359c993d1SWarner Losh win_usb_cr_write(base, i, 0);
150459c993d1SWarner Losh win_usb_br_write(base, i, 0);
150559c993d1SWarner Losh }
150659c993d1SWarner Losh
150759c993d1SWarner Losh /* Only access to active DRAM banks is required */
150859c993d1SWarner Losh for (i = 0; i < MV_WIN_DDR_MAX; i++) {
150959c993d1SWarner Losh if (ddr_is_active(i)) {
151059c993d1SWarner Losh br = ddr_base(i);
151159c993d1SWarner Losh /*
151259c993d1SWarner Losh * XXX for 6281 we should handle Mbus write
151359c993d1SWarner Losh * burst limit field in the ctrl reg
151459c993d1SWarner Losh */
151559c993d1SWarner Losh cr = (((ddr_size(i) - 1) & 0xffff0000) |
151659c993d1SWarner Losh (ddr_attr(i) << 8) |
151759c993d1SWarner Losh (ddr_target(i) << 4) | 1);
151859c993d1SWarner Losh
151959c993d1SWarner Losh /* Set the first free USB window */
152059c993d1SWarner Losh for (j = 0; j < MV_WIN_USB_MAX; j++) {
152159c993d1SWarner Losh if (win_usb_cr_read(base, j) & 0x1)
152259c993d1SWarner Losh continue;
152359c993d1SWarner Losh
152459c993d1SWarner Losh win_usb_br_write(base, j, br);
152559c993d1SWarner Losh win_usb_cr_write(base, j, cr);
152659c993d1SWarner Losh break;
152759c993d1SWarner Losh }
152859c993d1SWarner Losh }
152959c993d1SWarner Losh }
153059c993d1SWarner Losh }
153159c993d1SWarner Losh
153259c993d1SWarner Losh /**************************************************************************
153334a3d2c6SWojciech Macek * USB3 windows routines
153434a3d2c6SWojciech Macek **************************************************************************/
153534a3d2c6SWojciech Macek static int
decode_win_usb3_valid(void)153634a3d2c6SWojciech Macek decode_win_usb3_valid(void)
153734a3d2c6SWojciech Macek {
153834a3d2c6SWojciech Macek
153934a3d2c6SWojciech Macek return (decode_win_can_cover_ddr(MV_WIN_USB3_MAX));
154034a3d2c6SWojciech Macek }
154134a3d2c6SWojciech Macek
154234a3d2c6SWojciech Macek static void
decode_win_usb3_dump(u_long base)154334a3d2c6SWojciech Macek decode_win_usb3_dump(u_long base)
154434a3d2c6SWojciech Macek {
154534a3d2c6SWojciech Macek int i;
154634a3d2c6SWojciech Macek
154734a3d2c6SWojciech Macek for (i = 0; i < MV_WIN_USB3_MAX; i++)
154834a3d2c6SWojciech Macek printf("USB3.0 window#%d: c 0x%08x, b 0x%08x\n", i,
154934a3d2c6SWojciech Macek win_usb3_cr_read(base, i), win_usb3_br_read(base, i));
155034a3d2c6SWojciech Macek }
155134a3d2c6SWojciech Macek
155234a3d2c6SWojciech Macek /*
155334a3d2c6SWojciech Macek * Set USB3 decode windows
155434a3d2c6SWojciech Macek */
155534a3d2c6SWojciech Macek static void
decode_win_usb3_setup(u_long base)155634a3d2c6SWojciech Macek decode_win_usb3_setup(u_long base)
155734a3d2c6SWojciech Macek {
155834a3d2c6SWojciech Macek uint32_t br, cr;
155934a3d2c6SWojciech Macek int i, j;
156034a3d2c6SWojciech Macek
156134a3d2c6SWojciech Macek for (i = 0; i < MV_WIN_USB3_MAX; i++) {
156234a3d2c6SWojciech Macek win_usb3_cr_write(base, i, 0);
156334a3d2c6SWojciech Macek win_usb3_br_write(base, i, 0);
156434a3d2c6SWojciech Macek }
156534a3d2c6SWojciech Macek
156634a3d2c6SWojciech Macek /* Only access to active DRAM banks is required */
156734a3d2c6SWojciech Macek for (i = 0; i < MV_WIN_DDR_MAX; i++) {
156834a3d2c6SWojciech Macek if (ddr_is_active(i)) {
156934a3d2c6SWojciech Macek br = ddr_base(i);
157034a3d2c6SWojciech Macek cr = (((ddr_size(i) - 1) &
157134a3d2c6SWojciech Macek (IO_WIN_SIZE_MASK << IO_WIN_SIZE_SHIFT)) |
157234a3d2c6SWojciech Macek (ddr_attr(i) << IO_WIN_ATTR_SHIFT) |
157334a3d2c6SWojciech Macek (ddr_target(i) << IO_WIN_TGT_SHIFT) |
157434a3d2c6SWojciech Macek IO_WIN_ENA_MASK);
157534a3d2c6SWojciech Macek
157634a3d2c6SWojciech Macek /* Set the first free USB3.0 window */
157734a3d2c6SWojciech Macek for (j = 0; j < MV_WIN_USB3_MAX; j++) {
157834a3d2c6SWojciech Macek if (win_usb3_cr_read(base, j) & IO_WIN_ENA_MASK)
157934a3d2c6SWojciech Macek continue;
158034a3d2c6SWojciech Macek
158134a3d2c6SWojciech Macek win_usb3_br_write(base, j, br);
158234a3d2c6SWojciech Macek win_usb3_cr_write(base, j, cr);
158334a3d2c6SWojciech Macek break;
158434a3d2c6SWojciech Macek }
158534a3d2c6SWojciech Macek }
158634a3d2c6SWojciech Macek }
158734a3d2c6SWojciech Macek }
158834a3d2c6SWojciech Macek
158934a3d2c6SWojciech Macek /**************************************************************************
159059c993d1SWarner Losh * ETH windows routines
159159c993d1SWarner Losh **************************************************************************/
159259c993d1SWarner Losh
159359c993d1SWarner Losh static int
win_eth_can_remap(int i)159459c993d1SWarner Losh win_eth_can_remap(int i)
159559c993d1SWarner Losh {
159659c993d1SWarner Losh
159759c993d1SWarner Losh /* ETH encode windows 0-3 have remap capability */
159859c993d1SWarner Losh if (i < 4)
159959c993d1SWarner Losh return (1);
160059c993d1SWarner Losh
160159c993d1SWarner Losh return (0);
160259c993d1SWarner Losh }
160359c993d1SWarner Losh
160459c993d1SWarner Losh static int
eth_bare_read(uint32_t base,int i)160559c993d1SWarner Losh eth_bare_read(uint32_t base, int i)
160659c993d1SWarner Losh {
160759c993d1SWarner Losh uint32_t v;
160859c993d1SWarner Losh
160959c993d1SWarner Losh v = win_eth_bare_read(base);
161059c993d1SWarner Losh v &= (1 << i);
161159c993d1SWarner Losh
161259c993d1SWarner Losh return (v >> i);
161359c993d1SWarner Losh }
161459c993d1SWarner Losh
161559c993d1SWarner Losh static void
eth_bare_write(uint32_t base,int i,int val)161659c993d1SWarner Losh eth_bare_write(uint32_t base, int i, int val)
161759c993d1SWarner Losh {
161859c993d1SWarner Losh uint32_t v;
161959c993d1SWarner Losh
162059c993d1SWarner Losh v = win_eth_bare_read(base);
162159c993d1SWarner Losh v &= ~(1 << i);
162259c993d1SWarner Losh v |= (val << i);
162359c993d1SWarner Losh win_eth_bare_write(base, v);
162459c993d1SWarner Losh }
162559c993d1SWarner Losh
162659c993d1SWarner Losh static void
eth_epap_write(uint32_t base,int i,int val)162759c993d1SWarner Losh eth_epap_write(uint32_t base, int i, int val)
162859c993d1SWarner Losh {
162959c993d1SWarner Losh uint32_t v;
163059c993d1SWarner Losh
163159c993d1SWarner Losh v = win_eth_epap_read(base);
163259c993d1SWarner Losh v &= ~(0x3 << (i * 2));
163359c993d1SWarner Losh v |= (val << (i * 2));
163459c993d1SWarner Losh win_eth_epap_write(base, v);
163559c993d1SWarner Losh }
163659c993d1SWarner Losh
163759c993d1SWarner Losh static void
decode_win_eth_dump(u_long base)163859c993d1SWarner Losh decode_win_eth_dump(u_long base)
163959c993d1SWarner Losh {
164059c993d1SWarner Losh int i;
164159c993d1SWarner Losh
164259c993d1SWarner Losh if (pm_is_disabled(CPU_PM_CTRL_GE(eth_port - 1)))
164359c993d1SWarner Losh return;
164459c993d1SWarner Losh
164559c993d1SWarner Losh for (i = 0; i < MV_WIN_ETH_MAX; i++) {
164659c993d1SWarner Losh printf("ETH window#%d: b 0x%08x, s 0x%08x", i,
164759c993d1SWarner Losh win_eth_br_read(base, i),
164859c993d1SWarner Losh win_eth_sz_read(base, i));
164959c993d1SWarner Losh
165059c993d1SWarner Losh if (win_eth_can_remap(i))
165159c993d1SWarner Losh printf(", ha 0x%08x",
165259c993d1SWarner Losh win_eth_har_read(base, i));
165359c993d1SWarner Losh
165459c993d1SWarner Losh printf("\n");
165559c993d1SWarner Losh }
165659c993d1SWarner Losh printf("ETH windows: bare 0x%08x, epap 0x%08x\n",
165759c993d1SWarner Losh win_eth_bare_read(base),
165859c993d1SWarner Losh win_eth_epap_read(base));
165959c993d1SWarner Losh }
166059c993d1SWarner Losh
166159c993d1SWarner Losh #define MV_WIN_ETH_DDR_TRGT(n) ddr_target(n)
166259c993d1SWarner Losh
166359c993d1SWarner Losh static void
decode_win_eth_setup(u_long base)166459c993d1SWarner Losh decode_win_eth_setup(u_long base)
166559c993d1SWarner Losh {
166659c993d1SWarner Losh uint32_t br, sz;
166759c993d1SWarner Losh int i, j;
166859c993d1SWarner Losh
166959c993d1SWarner Losh if (pm_is_disabled(CPU_PM_CTRL_GE(eth_port)))
167059c993d1SWarner Losh return;
167159c993d1SWarner Losh
167259c993d1SWarner Losh eth_port++;
167359c993d1SWarner Losh
167459c993d1SWarner Losh /* Disable, clear and revoke protection for all ETH windows */
167559c993d1SWarner Losh for (i = 0; i < MV_WIN_ETH_MAX; i++) {
167659c993d1SWarner Losh eth_bare_write(base, i, 1);
167759c993d1SWarner Losh eth_epap_write(base, i, 0);
167859c993d1SWarner Losh win_eth_br_write(base, i, 0);
167959c993d1SWarner Losh win_eth_sz_write(base, i, 0);
168059c993d1SWarner Losh if (win_eth_can_remap(i))
168159c993d1SWarner Losh win_eth_har_write(base, i, 0);
168259c993d1SWarner Losh }
168359c993d1SWarner Losh
168459c993d1SWarner Losh /* Only access to active DRAM banks is required */
168559c993d1SWarner Losh for (i = 0; i < MV_WIN_DDR_MAX; i++)
168659c993d1SWarner Losh if (ddr_is_active(i)) {
168759c993d1SWarner Losh br = ddr_base(i) | (ddr_attr(i) << 8) | MV_WIN_ETH_DDR_TRGT(i);
168859c993d1SWarner Losh sz = ((ddr_size(i) - 1) & 0xffff0000);
168959c993d1SWarner Losh
169059c993d1SWarner Losh /* Set the first free ETH window */
169159c993d1SWarner Losh for (j = 0; j < MV_WIN_ETH_MAX; j++) {
169259c993d1SWarner Losh if (eth_bare_read(base, j) == 0)
169359c993d1SWarner Losh continue;
169459c993d1SWarner Losh
169559c993d1SWarner Losh win_eth_br_write(base, j, br);
169659c993d1SWarner Losh win_eth_sz_write(base, j, sz);
169759c993d1SWarner Losh
169859c993d1SWarner Losh /* XXX remapping ETH windows not supported */
169959c993d1SWarner Losh
170059c993d1SWarner Losh /* Set protection RW */
170159c993d1SWarner Losh eth_epap_write(base, j, 0x3);
170259c993d1SWarner Losh
170359c993d1SWarner Losh /* Enable window */
170459c993d1SWarner Losh eth_bare_write(base, j, 0);
170559c993d1SWarner Losh break;
170659c993d1SWarner Losh }
170759c993d1SWarner Losh }
170859c993d1SWarner Losh }
170959c993d1SWarner Losh
1710a8d7fc4aSZbigniew Bodek static void
decode_win_neta_dump(u_long base)1711a8d7fc4aSZbigniew Bodek decode_win_neta_dump(u_long base)
1712a8d7fc4aSZbigniew Bodek {
1713a8d7fc4aSZbigniew Bodek
1714a8d7fc4aSZbigniew Bodek decode_win_eth_dump(base + MV_WIN_NETA_OFFSET);
1715a8d7fc4aSZbigniew Bodek }
1716a8d7fc4aSZbigniew Bodek
1717a8d7fc4aSZbigniew Bodek static void
decode_win_neta_setup(u_long base)1718a8d7fc4aSZbigniew Bodek decode_win_neta_setup(u_long base)
1719a8d7fc4aSZbigniew Bodek {
1720a8d7fc4aSZbigniew Bodek
1721a8d7fc4aSZbigniew Bodek decode_win_eth_setup(base + MV_WIN_NETA_OFFSET);
1722a8d7fc4aSZbigniew Bodek }
1723a8d7fc4aSZbigniew Bodek
172459c993d1SWarner Losh static int
decode_win_eth_valid(void)172559c993d1SWarner Losh decode_win_eth_valid(void)
172659c993d1SWarner Losh {
172759c993d1SWarner Losh
172859c993d1SWarner Losh return (decode_win_can_cover_ddr(MV_WIN_ETH_MAX));
172959c993d1SWarner Losh }
173059c993d1SWarner Losh
173159c993d1SWarner Losh /**************************************************************************
173259c993d1SWarner Losh * PCIE windows routines
173359c993d1SWarner Losh **************************************************************************/
17345d83a7b6SZbigniew Bodek static void
decode_win_pcie_dump(u_long base)17355d83a7b6SZbigniew Bodek decode_win_pcie_dump(u_long base)
17365d83a7b6SZbigniew Bodek {
17375d83a7b6SZbigniew Bodek int i;
17385d83a7b6SZbigniew Bodek
17395d83a7b6SZbigniew Bodek printf("PCIE windows base 0x%08lx\n", base);
17405d83a7b6SZbigniew Bodek for (i = 0; i < MV_WIN_PCIE_MAX; i++)
17415d83a7b6SZbigniew Bodek printf("PCIE window#%d: cr 0x%08x br 0x%08x remap 0x%08x\n",
17425d83a7b6SZbigniew Bodek i, win_pcie_cr_read(base, i),
17435d83a7b6SZbigniew Bodek win_pcie_br_read(base, i), win_pcie_remap_read(base, i));
17445d83a7b6SZbigniew Bodek
17455d83a7b6SZbigniew Bodek for (i = 0; i < MV_PCIE_BAR_MAX; i++)
17465d83a7b6SZbigniew Bodek printf("PCIE bar#%d: cr 0x%08x br 0x%08x brh 0x%08x\n",
17475d83a7b6SZbigniew Bodek i, pcie_bar_cr_read(base, i),
17485d83a7b6SZbigniew Bodek pcie_bar_br_read(base, i), pcie_bar_brh_read(base, i));
17495d83a7b6SZbigniew Bodek }
175059c993d1SWarner Losh
175159c993d1SWarner Losh void
decode_win_pcie_setup(u_long base)175259c993d1SWarner Losh decode_win_pcie_setup(u_long base)
175359c993d1SWarner Losh {
175459c993d1SWarner Losh uint32_t size = 0, ddrbase = ~0;
175559c993d1SWarner Losh uint32_t cr, br;
175659c993d1SWarner Losh int i, j;
175759c993d1SWarner Losh
175859c993d1SWarner Losh for (i = 0; i < MV_PCIE_BAR_MAX; i++) {
175959c993d1SWarner Losh pcie_bar_br_write(base, i,
176059c993d1SWarner Losh MV_PCIE_BAR_64BIT | MV_PCIE_BAR_PREFETCH_EN);
176159c993d1SWarner Losh if (i < 3)
176259c993d1SWarner Losh pcie_bar_brh_write(base, i, 0);
176359c993d1SWarner Losh if (i > 0)
176459c993d1SWarner Losh pcie_bar_cr_write(base, i, 0);
176559c993d1SWarner Losh }
176659c993d1SWarner Losh
176759c993d1SWarner Losh for (i = 0; i < MV_WIN_PCIE_MAX; i++) {
176859c993d1SWarner Losh win_pcie_cr_write(base, i, 0);
176959c993d1SWarner Losh win_pcie_br_write(base, i, 0);
177059c993d1SWarner Losh win_pcie_remap_write(base, i, 0);
177159c993d1SWarner Losh }
177259c993d1SWarner Losh
177359c993d1SWarner Losh /* On End-Point only set BAR size to 1MB regardless of DDR size */
177459c993d1SWarner Losh if ((bus_space_read_4(fdtbus_bs_tag, base, MV_PCIE_CONTROL)
177559c993d1SWarner Losh & MV_PCIE_ROOT_CMPLX) == 0) {
177659c993d1SWarner Losh pcie_bar_cr_write(base, 1, 0xf0000 | 1);
177759c993d1SWarner Losh return;
177859c993d1SWarner Losh }
177959c993d1SWarner Losh
178059c993d1SWarner Losh for (i = 0; i < MV_WIN_DDR_MAX; i++) {
178159c993d1SWarner Losh if (ddr_is_active(i)) {
178259c993d1SWarner Losh /* Map DDR to BAR 1 */
178359c993d1SWarner Losh cr = (ddr_size(i) - 1) & 0xffff0000;
178459c993d1SWarner Losh size += ddr_size(i) & 0xffff0000;
178559c993d1SWarner Losh cr |= (ddr_attr(i) << 8) | (ddr_target(i) << 4) | 1;
178659c993d1SWarner Losh br = ddr_base(i);
178759c993d1SWarner Losh if (br < ddrbase)
178859c993d1SWarner Losh ddrbase = br;
178959c993d1SWarner Losh
179059c993d1SWarner Losh /* Use the first available PCIE window */
179159c993d1SWarner Losh for (j = 0; j < MV_WIN_PCIE_MAX; j++) {
179259c993d1SWarner Losh if (win_pcie_cr_read(base, j) != 0)
179359c993d1SWarner Losh continue;
179459c993d1SWarner Losh
179559c993d1SWarner Losh win_pcie_br_write(base, j, br);
179659c993d1SWarner Losh win_pcie_cr_write(base, j, cr);
179759c993d1SWarner Losh break;
179859c993d1SWarner Losh }
179959c993d1SWarner Losh }
180059c993d1SWarner Losh }
180159c993d1SWarner Losh
180259c993d1SWarner Losh /*
180359c993d1SWarner Losh * Upper 16 bits in BAR register is interpreted as BAR size
1804255eff3bSPedro F. Giffuni * (in 64 kB units) plus 64kB, so subtract 0x10000
180559c993d1SWarner Losh * form value passed to register to get correct value.
180659c993d1SWarner Losh */
180759c993d1SWarner Losh size -= 0x10000;
180859c993d1SWarner Losh pcie_bar_cr_write(base, 1, size | 1);
180959c993d1SWarner Losh pcie_bar_br_write(base, 1, ddrbase |
181059c993d1SWarner Losh MV_PCIE_BAR_64BIT | MV_PCIE_BAR_PREFETCH_EN);
181159c993d1SWarner Losh pcie_bar_br_write(base, 0, fdt_immr_pa |
181259c993d1SWarner Losh MV_PCIE_BAR_64BIT | MV_PCIE_BAR_PREFETCH_EN);
181359c993d1SWarner Losh }
181459c993d1SWarner Losh
181559c993d1SWarner Losh static int
decode_win_pcie_valid(void)181659c993d1SWarner Losh decode_win_pcie_valid(void)
181759c993d1SWarner Losh {
181859c993d1SWarner Losh
181959c993d1SWarner Losh return (decode_win_can_cover_ddr(MV_WIN_PCIE_MAX));
182059c993d1SWarner Losh }
182159c993d1SWarner Losh
182259c993d1SWarner Losh /**************************************************************************
182359c993d1SWarner Losh * IDMA windows routines
182459c993d1SWarner Losh **************************************************************************/
182559c993d1SWarner Losh #if defined(SOC_MV_ORION) || defined(SOC_MV_DISCOVERY)
182659c993d1SWarner Losh static int
idma_bare_read(u_long base,int i)182759c993d1SWarner Losh idma_bare_read(u_long base, int i)
182859c993d1SWarner Losh {
182959c993d1SWarner Losh uint32_t v;
183059c993d1SWarner Losh
183159c993d1SWarner Losh v = win_idma_bare_read(base);
183259c993d1SWarner Losh v &= (1 << i);
183359c993d1SWarner Losh
183459c993d1SWarner Losh return (v >> i);
183559c993d1SWarner Losh }
183659c993d1SWarner Losh
183759c993d1SWarner Losh static void
idma_bare_write(u_long base,int i,int val)183859c993d1SWarner Losh idma_bare_write(u_long base, int i, int val)
183959c993d1SWarner Losh {
184059c993d1SWarner Losh uint32_t v;
184159c993d1SWarner Losh
184259c993d1SWarner Losh v = win_idma_bare_read(base);
184359c993d1SWarner Losh v &= ~(1 << i);
184459c993d1SWarner Losh v |= (val << i);
184559c993d1SWarner Losh win_idma_bare_write(base, v);
184659c993d1SWarner Losh }
184759c993d1SWarner Losh
184859c993d1SWarner Losh /*
184959c993d1SWarner Losh * Sets channel protection 'val' for window 'w' on channel 'c'
185059c993d1SWarner Losh */
185159c993d1SWarner Losh static void
idma_cap_write(u_long base,int c,int w,int val)185259c993d1SWarner Losh idma_cap_write(u_long base, int c, int w, int val)
185359c993d1SWarner Losh {
185459c993d1SWarner Losh uint32_t v;
185559c993d1SWarner Losh
185659c993d1SWarner Losh v = win_idma_cap_read(base, c);
185759c993d1SWarner Losh v &= ~(0x3 << (w * 2));
185859c993d1SWarner Losh v |= (val << (w * 2));
185959c993d1SWarner Losh win_idma_cap_write(base, c, v);
186059c993d1SWarner Losh }
186159c993d1SWarner Losh
186259c993d1SWarner Losh /*
186359c993d1SWarner Losh * Set protection 'val' on all channels for window 'w'
186459c993d1SWarner Losh */
186559c993d1SWarner Losh static void
idma_set_prot(u_long base,int w,int val)186659c993d1SWarner Losh idma_set_prot(u_long base, int w, int val)
186759c993d1SWarner Losh {
186859c993d1SWarner Losh int c;
186959c993d1SWarner Losh
187059c993d1SWarner Losh for (c = 0; c < MV_IDMA_CHAN_MAX; c++)
187159c993d1SWarner Losh idma_cap_write(base, c, w, val);
187259c993d1SWarner Losh }
187359c993d1SWarner Losh
187459c993d1SWarner Losh static int
win_idma_can_remap(int i)187559c993d1SWarner Losh win_idma_can_remap(int i)
187659c993d1SWarner Losh {
187759c993d1SWarner Losh
187859c993d1SWarner Losh /* IDMA decode windows 0-3 have remap capability */
187959c993d1SWarner Losh if (i < 4)
188059c993d1SWarner Losh return (1);
188159c993d1SWarner Losh
188259c993d1SWarner Losh return (0);
188359c993d1SWarner Losh }
188459c993d1SWarner Losh
188559c993d1SWarner Losh void
decode_win_idma_setup(u_long base)188659c993d1SWarner Losh decode_win_idma_setup(u_long base)
188759c993d1SWarner Losh {
188859c993d1SWarner Losh uint32_t br, sz;
188959c993d1SWarner Losh int i, j;
189059c993d1SWarner Losh
189159c993d1SWarner Losh if (pm_is_disabled(CPU_PM_CTRL_IDMA))
189259c993d1SWarner Losh return;
189359c993d1SWarner Losh /*
189459c993d1SWarner Losh * Disable and clear all IDMA windows, revoke protection for all channels
189559c993d1SWarner Losh */
189659c993d1SWarner Losh for (i = 0; i < MV_WIN_IDMA_MAX; i++) {
189759c993d1SWarner Losh idma_bare_write(base, i, 1);
189859c993d1SWarner Losh win_idma_br_write(base, i, 0);
189959c993d1SWarner Losh win_idma_sz_write(base, i, 0);
190059c993d1SWarner Losh if (win_idma_can_remap(i) == 1)
190159c993d1SWarner Losh win_idma_har_write(base, i, 0);
190259c993d1SWarner Losh }
190359c993d1SWarner Losh for (i = 0; i < MV_IDMA_CHAN_MAX; i++)
190459c993d1SWarner Losh win_idma_cap_write(base, i, 0);
190559c993d1SWarner Losh
190659c993d1SWarner Losh /*
190759c993d1SWarner Losh * Set up access to all active DRAM banks
190859c993d1SWarner Losh */
190959c993d1SWarner Losh for (i = 0; i < MV_WIN_DDR_MAX; i++)
191059c993d1SWarner Losh if (ddr_is_active(i)) {
191159c993d1SWarner Losh br = ddr_base(i) | (ddr_attr(i) << 8) | ddr_target(i);
191259c993d1SWarner Losh sz = ((ddr_size(i) - 1) & 0xffff0000);
191359c993d1SWarner Losh
191459c993d1SWarner Losh /* Place DDR entries in non-remapped windows */
191559c993d1SWarner Losh for (j = 0; j < MV_WIN_IDMA_MAX; j++)
191659c993d1SWarner Losh if (win_idma_can_remap(j) != 1 &&
191759c993d1SWarner Losh idma_bare_read(base, j) == 1) {
191859c993d1SWarner Losh /* Configure window */
191959c993d1SWarner Losh win_idma_br_write(base, j, br);
192059c993d1SWarner Losh win_idma_sz_write(base, j, sz);
192159c993d1SWarner Losh
192259c993d1SWarner Losh /* Set protection RW on all channels */
192359c993d1SWarner Losh idma_set_prot(base, j, 0x3);
192459c993d1SWarner Losh
192559c993d1SWarner Losh /* Enable window */
192659c993d1SWarner Losh idma_bare_write(base, j, 0);
192759c993d1SWarner Losh break;
192859c993d1SWarner Losh }
192959c993d1SWarner Losh }
193059c993d1SWarner Losh
193159c993d1SWarner Losh /*
193259c993d1SWarner Losh * Remaining targets -- from statically defined table
193359c993d1SWarner Losh */
193459c993d1SWarner Losh for (i = 0; i < idma_wins_no; i++)
193559c993d1SWarner Losh if (idma_wins[i].target > 0) {
193659c993d1SWarner Losh br = (idma_wins[i].base & 0xffff0000) |
193759c993d1SWarner Losh (idma_wins[i].attr << 8) | idma_wins[i].target;
193859c993d1SWarner Losh sz = ((idma_wins[i].size - 1) & 0xffff0000);
193959c993d1SWarner Losh
194059c993d1SWarner Losh /* Set the first free IDMA window */
194159c993d1SWarner Losh for (j = 0; j < MV_WIN_IDMA_MAX; j++) {
194259c993d1SWarner Losh if (idma_bare_read(base, j) == 0)
194359c993d1SWarner Losh continue;
194459c993d1SWarner Losh
194559c993d1SWarner Losh /* Configure window */
194659c993d1SWarner Losh win_idma_br_write(base, j, br);
194759c993d1SWarner Losh win_idma_sz_write(base, j, sz);
194859c993d1SWarner Losh if (win_idma_can_remap(j) &&
194959c993d1SWarner Losh idma_wins[j].remap >= 0)
195059c993d1SWarner Losh win_idma_har_write(base, j,
195159c993d1SWarner Losh idma_wins[j].remap);
195259c993d1SWarner Losh
195359c993d1SWarner Losh /* Set protection RW on all channels */
195459c993d1SWarner Losh idma_set_prot(base, j, 0x3);
195559c993d1SWarner Losh
195659c993d1SWarner Losh /* Enable window */
195759c993d1SWarner Losh idma_bare_write(base, j, 0);
195859c993d1SWarner Losh break;
195959c993d1SWarner Losh }
196059c993d1SWarner Losh }
196159c993d1SWarner Losh }
196259c993d1SWarner Losh
196359c993d1SWarner Losh int
decode_win_idma_valid(void)196459c993d1SWarner Losh decode_win_idma_valid(void)
196559c993d1SWarner Losh {
196659c993d1SWarner Losh const struct decode_win *wintab;
196759c993d1SWarner Losh int c, i, j, rv;
196859c993d1SWarner Losh uint32_t b, e, s;
196959c993d1SWarner Losh
197059c993d1SWarner Losh if (idma_wins_no > MV_WIN_IDMA_MAX) {
197159c993d1SWarner Losh printf("IDMA windows: too many entries: %d\n", idma_wins_no);
197259c993d1SWarner Losh return (0);
197359c993d1SWarner Losh }
197459c993d1SWarner Losh for (i = 0, c = 0; i < MV_WIN_DDR_MAX; i++)
197559c993d1SWarner Losh if (ddr_is_active(i))
197659c993d1SWarner Losh c++;
197759c993d1SWarner Losh
197859c993d1SWarner Losh if (idma_wins_no > (MV_WIN_IDMA_MAX - c)) {
197959c993d1SWarner Losh printf("IDMA windows: too many entries: %d, available: %d\n",
198059c993d1SWarner Losh idma_wins_no, MV_WIN_IDMA_MAX - c);
198159c993d1SWarner Losh return (0);
198259c993d1SWarner Losh }
198359c993d1SWarner Losh
198459c993d1SWarner Losh wintab = idma_wins;
198559c993d1SWarner Losh rv = 1;
198659c993d1SWarner Losh for (i = 0; i < idma_wins_no; i++, wintab++) {
198759c993d1SWarner Losh if (wintab->target == 0) {
198859c993d1SWarner Losh printf("IDMA window#%d: DDR target window is not "
198959c993d1SWarner Losh "supposed to be reprogrammed!\n", i);
199059c993d1SWarner Losh rv = 0;
199159c993d1SWarner Losh }
199259c993d1SWarner Losh
199359c993d1SWarner Losh if (wintab->remap >= 0 && win_cpu_can_remap(i) != 1) {
199459c993d1SWarner Losh printf("IDMA window#%d: not capable of remapping, but "
199559c993d1SWarner Losh "val 0x%08x defined\n", i, wintab->remap);
199659c993d1SWarner Losh rv = 0;
199759c993d1SWarner Losh }
199859c993d1SWarner Losh
199959c993d1SWarner Losh s = wintab->size;
200059c993d1SWarner Losh b = wintab->base;
200159c993d1SWarner Losh e = b + s - 1;
200259c993d1SWarner Losh if (s > (0xFFFFFFFF - b + 1)) {
200359c993d1SWarner Losh /* XXX this boundary check should account for 64bit and
200459c993d1SWarner Losh * remapping.. */
200559c993d1SWarner Losh printf("IDMA window#%d: no space for size 0x%08x at "
200659c993d1SWarner Losh "0x%08x\n", i, s, b);
200759c993d1SWarner Losh rv = 0;
200859c993d1SWarner Losh continue;
200959c993d1SWarner Losh }
201059c993d1SWarner Losh
201159c993d1SWarner Losh j = decode_win_overlap(i, idma_wins_no, &idma_wins[0]);
201259c993d1SWarner Losh if (j >= 0) {
201359c993d1SWarner Losh printf("IDMA window#%d: (0x%08x - 0x%08x) overlaps "
201459c993d1SWarner Losh "with #%d (0x%08x - 0x%08x)\n", i, b, e, j,
201559c993d1SWarner Losh idma_wins[j].base,
201659c993d1SWarner Losh idma_wins[j].base + idma_wins[j].size - 1);
201759c993d1SWarner Losh rv = 0;
201859c993d1SWarner Losh }
201959c993d1SWarner Losh }
202059c993d1SWarner Losh
202159c993d1SWarner Losh return (rv);
202259c993d1SWarner Losh }
202359c993d1SWarner Losh
202459c993d1SWarner Losh void
decode_win_idma_dump(u_long base)202559c993d1SWarner Losh decode_win_idma_dump(u_long base)
202659c993d1SWarner Losh {
202759c993d1SWarner Losh int i;
202859c993d1SWarner Losh
202959c993d1SWarner Losh if (pm_is_disabled(CPU_PM_CTRL_IDMA))
203059c993d1SWarner Losh return;
203159c993d1SWarner Losh
203259c993d1SWarner Losh for (i = 0; i < MV_WIN_IDMA_MAX; i++) {
203359c993d1SWarner Losh printf("IDMA window#%d: b 0x%08x, s 0x%08x", i,
203459c993d1SWarner Losh win_idma_br_read(base, i), win_idma_sz_read(base, i));
203559c993d1SWarner Losh
203659c993d1SWarner Losh if (win_idma_can_remap(i))
203759c993d1SWarner Losh printf(", ha 0x%08x", win_idma_har_read(base, i));
203859c993d1SWarner Losh
203959c993d1SWarner Losh printf("\n");
204059c993d1SWarner Losh }
204159c993d1SWarner Losh for (i = 0; i < MV_IDMA_CHAN_MAX; i++)
204259c993d1SWarner Losh printf("IDMA channel#%d: ap 0x%08x\n", i,
204359c993d1SWarner Losh win_idma_cap_read(base, i));
204459c993d1SWarner Losh printf("IDMA windows: bare 0x%08x\n", win_idma_bare_read(base));
204559c993d1SWarner Losh }
204659c993d1SWarner Losh #else
204759c993d1SWarner Losh
204859c993d1SWarner Losh /* Provide dummy functions to satisfy the build for SoCs not equipped with IDMA */
204959c993d1SWarner Losh int
decode_win_idma_valid(void)205059c993d1SWarner Losh decode_win_idma_valid(void)
205159c993d1SWarner Losh {
205259c993d1SWarner Losh
205359c993d1SWarner Losh return (1);
205459c993d1SWarner Losh }
205559c993d1SWarner Losh
205659c993d1SWarner Losh void
decode_win_idma_setup(u_long base)205759c993d1SWarner Losh decode_win_idma_setup(u_long base)
205859c993d1SWarner Losh {
205959c993d1SWarner Losh }
206059c993d1SWarner Losh
206159c993d1SWarner Losh void
decode_win_idma_dump(u_long base)206259c993d1SWarner Losh decode_win_idma_dump(u_long base)
206359c993d1SWarner Losh {
206459c993d1SWarner Losh }
206559c993d1SWarner Losh #endif
206659c993d1SWarner Losh
206759c993d1SWarner Losh /**************************************************************************
206859c993d1SWarner Losh * XOR windows routines
206959c993d1SWarner Losh **************************************************************************/
207059c993d1SWarner Losh #if defined(SOC_MV_KIRKWOOD) || defined(SOC_MV_DISCOVERY)
207159c993d1SWarner Losh static int
xor_ctrl_read(u_long base,int i,int c,int e)207259c993d1SWarner Losh xor_ctrl_read(u_long base, int i, int c, int e)
207359c993d1SWarner Losh {
207459c993d1SWarner Losh uint32_t v;
207559c993d1SWarner Losh v = win_xor_ctrl_read(base, c, e);
207659c993d1SWarner Losh v &= (1 << i);
207759c993d1SWarner Losh
207859c993d1SWarner Losh return (v >> i);
207959c993d1SWarner Losh }
208059c993d1SWarner Losh
208159c993d1SWarner Losh static void
xor_ctrl_write(u_long base,int i,int c,int e,int val)208259c993d1SWarner Losh xor_ctrl_write(u_long base, int i, int c, int e, int val)
208359c993d1SWarner Losh {
208459c993d1SWarner Losh uint32_t v;
208559c993d1SWarner Losh
208659c993d1SWarner Losh v = win_xor_ctrl_read(base, c, e);
208759c993d1SWarner Losh v &= ~(1 << i);
208859c993d1SWarner Losh v |= (val << i);
208959c993d1SWarner Losh win_xor_ctrl_write(base, c, e, v);
209059c993d1SWarner Losh }
209159c993d1SWarner Losh
209259c993d1SWarner Losh /*
209359c993d1SWarner Losh * Set channel protection 'val' for window 'w' on channel 'c'
209459c993d1SWarner Losh */
209559c993d1SWarner Losh static void
xor_chan_write(u_long base,int c,int e,int w,int val)209659c993d1SWarner Losh xor_chan_write(u_long base, int c, int e, int w, int val)
209759c993d1SWarner Losh {
209859c993d1SWarner Losh uint32_t v;
209959c993d1SWarner Losh
210059c993d1SWarner Losh v = win_xor_ctrl_read(base, c, e);
210159c993d1SWarner Losh v &= ~(0x3 << (w * 2 + 16));
210259c993d1SWarner Losh v |= (val << (w * 2 + 16));
210359c993d1SWarner Losh win_xor_ctrl_write(base, c, e, v);
210459c993d1SWarner Losh }
210559c993d1SWarner Losh
210659c993d1SWarner Losh /*
210759c993d1SWarner Losh * Set protection 'val' on all channels for window 'w' on engine 'e'
210859c993d1SWarner Losh */
210959c993d1SWarner Losh static void
xor_set_prot(u_long base,int w,int e,int val)211059c993d1SWarner Losh xor_set_prot(u_long base, int w, int e, int val)
211159c993d1SWarner Losh {
211259c993d1SWarner Losh int c;
211359c993d1SWarner Losh
211459c993d1SWarner Losh for (c = 0; c < MV_XOR_CHAN_MAX; c++)
211559c993d1SWarner Losh xor_chan_write(base, c, e, w, val);
211659c993d1SWarner Losh }
211759c993d1SWarner Losh
211859c993d1SWarner Losh static int
win_xor_can_remap(int i)211959c993d1SWarner Losh win_xor_can_remap(int i)
212059c993d1SWarner Losh {
212159c993d1SWarner Losh
212259c993d1SWarner Losh /* XOR decode windows 0-3 have remap capability */
212359c993d1SWarner Losh if (i < 4)
212459c993d1SWarner Losh return (1);
212559c993d1SWarner Losh
212659c993d1SWarner Losh return (0);
212759c993d1SWarner Losh }
212859c993d1SWarner Losh
212959c993d1SWarner Losh static int
xor_max_eng(void)213059c993d1SWarner Losh xor_max_eng(void)
213159c993d1SWarner Losh {
213259c993d1SWarner Losh uint32_t dev, rev;
213359c993d1SWarner Losh
213459c993d1SWarner Losh soc_id(&dev, &rev);
213559c993d1SWarner Losh switch (dev) {
213659c993d1SWarner Losh case MV_DEV_88F6281:
213759c993d1SWarner Losh case MV_DEV_88F6282:
213859c993d1SWarner Losh case MV_DEV_MV78130:
213959c993d1SWarner Losh case MV_DEV_MV78160:
214059c993d1SWarner Losh case MV_DEV_MV78230:
214159c993d1SWarner Losh case MV_DEV_MV78260:
214259c993d1SWarner Losh case MV_DEV_MV78460:
214359c993d1SWarner Losh return (2);
214459c993d1SWarner Losh case MV_DEV_MV78100:
214559c993d1SWarner Losh case MV_DEV_MV78100_Z0:
214659c993d1SWarner Losh return (1);
214759c993d1SWarner Losh default:
214859c993d1SWarner Losh return (0);
214959c993d1SWarner Losh }
215059c993d1SWarner Losh }
215159c993d1SWarner Losh
215259c993d1SWarner Losh static void
xor_active_dram(u_long base,int c,int e,int * window)215359c993d1SWarner Losh xor_active_dram(u_long base, int c, int e, int *window)
215459c993d1SWarner Losh {
215559c993d1SWarner Losh uint32_t br, sz;
215659c993d1SWarner Losh int i, m, w;
215759c993d1SWarner Losh
215859c993d1SWarner Losh /*
215959c993d1SWarner Losh * Set up access to all active DRAM banks
216059c993d1SWarner Losh */
216159c993d1SWarner Losh m = xor_max_eng();
216259c993d1SWarner Losh for (i = 0; i < m; i++)
216359c993d1SWarner Losh if (ddr_is_active(i)) {
216459c993d1SWarner Losh br = ddr_base(i) | (ddr_attr(i) << 8) |
216559c993d1SWarner Losh ddr_target(i);
216659c993d1SWarner Losh sz = ((ddr_size(i) - 1) & 0xffff0000);
216759c993d1SWarner Losh
216859c993d1SWarner Losh /* Place DDR entries in non-remapped windows */
216959c993d1SWarner Losh for (w = 0; w < MV_WIN_XOR_MAX; w++)
217059c993d1SWarner Losh if (win_xor_can_remap(w) != 1 &&
217159c993d1SWarner Losh (xor_ctrl_read(base, w, c, e) == 0) &&
217259c993d1SWarner Losh w > *window) {
217359c993d1SWarner Losh /* Configure window */
217459c993d1SWarner Losh win_xor_br_write(base, w, e, br);
217559c993d1SWarner Losh win_xor_sz_write(base, w, e, sz);
217659c993d1SWarner Losh
217759c993d1SWarner Losh /* Set protection RW on all channels */
217859c993d1SWarner Losh xor_set_prot(base, w, e, 0x3);
217959c993d1SWarner Losh
218059c993d1SWarner Losh /* Enable window */
218159c993d1SWarner Losh xor_ctrl_write(base, w, c, e, 1);
218259c993d1SWarner Losh (*window)++;
218359c993d1SWarner Losh break;
218459c993d1SWarner Losh }
218559c993d1SWarner Losh }
218659c993d1SWarner Losh }
218759c993d1SWarner Losh
218859c993d1SWarner Losh void
decode_win_xor_setup(u_long base)218959c993d1SWarner Losh decode_win_xor_setup(u_long base)
219059c993d1SWarner Losh {
219159c993d1SWarner Losh uint32_t br, sz;
219259c993d1SWarner Losh int i, j, z, e = 1, m, window;
219359c993d1SWarner Losh
219459c993d1SWarner Losh if (pm_is_disabled(CPU_PM_CTRL_XOR))
219559c993d1SWarner Losh return;
219659c993d1SWarner Losh
219759c993d1SWarner Losh /*
219859c993d1SWarner Losh * Disable and clear all XOR windows, revoke protection for all
219959c993d1SWarner Losh * channels
220059c993d1SWarner Losh */
220159c993d1SWarner Losh m = xor_max_eng();
220259c993d1SWarner Losh for (j = 0; j < m; j++, e--) {
220359c993d1SWarner Losh /* Number of non-remaped windows */
220459c993d1SWarner Losh window = MV_XOR_NON_REMAP - 1;
220559c993d1SWarner Losh
220659c993d1SWarner Losh for (i = 0; i < MV_WIN_XOR_MAX; i++) {
220759c993d1SWarner Losh win_xor_br_write(base, i, e, 0);
220859c993d1SWarner Losh win_xor_sz_write(base, i, e, 0);
220959c993d1SWarner Losh }
221059c993d1SWarner Losh
221159c993d1SWarner Losh if (win_xor_can_remap(i) == 1)
221259c993d1SWarner Losh win_xor_har_write(base, i, e, 0);
221359c993d1SWarner Losh
221459c993d1SWarner Losh for (i = 0; i < MV_XOR_CHAN_MAX; i++) {
221559c993d1SWarner Losh win_xor_ctrl_write(base, i, e, 0);
221659c993d1SWarner Losh xor_active_dram(base, i, e, &window);
221759c993d1SWarner Losh }
221859c993d1SWarner Losh
221959c993d1SWarner Losh /*
222059c993d1SWarner Losh * Remaining targets -- from a statically defined table
222159c993d1SWarner Losh */
222259c993d1SWarner Losh for (i = 0; i < xor_wins_no; i++)
222359c993d1SWarner Losh if (xor_wins[i].target > 0) {
222459c993d1SWarner Losh br = (xor_wins[i].base & 0xffff0000) |
222559c993d1SWarner Losh (xor_wins[i].attr << 8) |
222659c993d1SWarner Losh xor_wins[i].target;
222759c993d1SWarner Losh sz = ((xor_wins[i].size - 1) & 0xffff0000);
222859c993d1SWarner Losh
222959c993d1SWarner Losh /* Set the first free XOR window */
223059c993d1SWarner Losh for (z = 0; z < MV_WIN_XOR_MAX; z++) {
223159c993d1SWarner Losh if (xor_ctrl_read(base, z, 0, e) &&
223259c993d1SWarner Losh xor_ctrl_read(base, z, 1, e))
223359c993d1SWarner Losh continue;
223459c993d1SWarner Losh
223559c993d1SWarner Losh /* Configure window */
223659c993d1SWarner Losh win_xor_br_write(base, z, e, br);
223759c993d1SWarner Losh win_xor_sz_write(base, z, e, sz);
223859c993d1SWarner Losh if (win_xor_can_remap(z) &&
223959c993d1SWarner Losh xor_wins[z].remap >= 0)
224059c993d1SWarner Losh win_xor_har_write(base, z, e,
224159c993d1SWarner Losh xor_wins[z].remap);
224259c993d1SWarner Losh
224359c993d1SWarner Losh /* Set protection RW on all channels */
224459c993d1SWarner Losh xor_set_prot(base, z, e, 0x3);
224559c993d1SWarner Losh
224659c993d1SWarner Losh /* Enable window */
224759c993d1SWarner Losh xor_ctrl_write(base, z, 0, e, 1);
224859c993d1SWarner Losh xor_ctrl_write(base, z, 1, e, 1);
224959c993d1SWarner Losh break;
225059c993d1SWarner Losh }
225159c993d1SWarner Losh }
225259c993d1SWarner Losh }
225359c993d1SWarner Losh }
225459c993d1SWarner Losh
225559c993d1SWarner Losh int
decode_win_xor_valid(void)225659c993d1SWarner Losh decode_win_xor_valid(void)
225759c993d1SWarner Losh {
225859c993d1SWarner Losh const struct decode_win *wintab;
225959c993d1SWarner Losh int c, i, j, rv;
226059c993d1SWarner Losh uint32_t b, e, s;
226159c993d1SWarner Losh
226259c993d1SWarner Losh if (xor_wins_no > MV_WIN_XOR_MAX) {
226359c993d1SWarner Losh printf("XOR windows: too many entries: %d\n", xor_wins_no);
226459c993d1SWarner Losh return (0);
226559c993d1SWarner Losh }
226659c993d1SWarner Losh for (i = 0, c = 0; i < MV_WIN_DDR_MAX; i++)
226759c993d1SWarner Losh if (ddr_is_active(i))
226859c993d1SWarner Losh c++;
226959c993d1SWarner Losh
227059c993d1SWarner Losh if (xor_wins_no > (MV_WIN_XOR_MAX - c)) {
227159c993d1SWarner Losh printf("XOR windows: too many entries: %d, available: %d\n",
227259c993d1SWarner Losh xor_wins_no, MV_WIN_IDMA_MAX - c);
227359c993d1SWarner Losh return (0);
227459c993d1SWarner Losh }
227559c993d1SWarner Losh
227659c993d1SWarner Losh wintab = xor_wins;
227759c993d1SWarner Losh rv = 1;
227859c993d1SWarner Losh for (i = 0; i < xor_wins_no; i++, wintab++) {
227959c993d1SWarner Losh if (wintab->target == 0) {
228059c993d1SWarner Losh printf("XOR window#%d: DDR target window is not "
228159c993d1SWarner Losh "supposed to be reprogrammed!\n", i);
228259c993d1SWarner Losh rv = 0;
228359c993d1SWarner Losh }
228459c993d1SWarner Losh
228559c993d1SWarner Losh if (wintab->remap >= 0 && win_cpu_can_remap(i) != 1) {
228659c993d1SWarner Losh printf("XOR window#%d: not capable of remapping, but "
228759c993d1SWarner Losh "val 0x%08x defined\n", i, wintab->remap);
228859c993d1SWarner Losh rv = 0;
228959c993d1SWarner Losh }
229059c993d1SWarner Losh
229159c993d1SWarner Losh s = wintab->size;
229259c993d1SWarner Losh b = wintab->base;
229359c993d1SWarner Losh e = b + s - 1;
229459c993d1SWarner Losh if (s > (0xFFFFFFFF - b + 1)) {
229559c993d1SWarner Losh /*
229659c993d1SWarner Losh * XXX this boundary check should account for 64bit
229759c993d1SWarner Losh * and remapping..
229859c993d1SWarner Losh */
229959c993d1SWarner Losh printf("XOR window#%d: no space for size 0x%08x at "
230059c993d1SWarner Losh "0x%08x\n", i, s, b);
230159c993d1SWarner Losh rv = 0;
230259c993d1SWarner Losh continue;
230359c993d1SWarner Losh }
230459c993d1SWarner Losh
230559c993d1SWarner Losh j = decode_win_overlap(i, xor_wins_no, &xor_wins[0]);
230659c993d1SWarner Losh if (j >= 0) {
230759c993d1SWarner Losh printf("XOR window#%d: (0x%08x - 0x%08x) overlaps "
230859c993d1SWarner Losh "with #%d (0x%08x - 0x%08x)\n", i, b, e, j,
230959c993d1SWarner Losh xor_wins[j].base,
231059c993d1SWarner Losh xor_wins[j].base + xor_wins[j].size - 1);
231159c993d1SWarner Losh rv = 0;
231259c993d1SWarner Losh }
231359c993d1SWarner Losh }
231459c993d1SWarner Losh
231559c993d1SWarner Losh return (rv);
231659c993d1SWarner Losh }
231759c993d1SWarner Losh
231859c993d1SWarner Losh void
decode_win_xor_dump(u_long base)231959c993d1SWarner Losh decode_win_xor_dump(u_long base)
232059c993d1SWarner Losh {
232159c993d1SWarner Losh int i, j;
232259c993d1SWarner Losh int e = 1;
232359c993d1SWarner Losh
232459c993d1SWarner Losh if (pm_is_disabled(CPU_PM_CTRL_XOR))
232559c993d1SWarner Losh return;
232659c993d1SWarner Losh
232759c993d1SWarner Losh for (j = 0; j < xor_max_eng(); j++, e--) {
232859c993d1SWarner Losh for (i = 0; i < MV_WIN_XOR_MAX; i++) {
232959c993d1SWarner Losh printf("XOR window#%d: b 0x%08x, s 0x%08x", i,
233059c993d1SWarner Losh win_xor_br_read(base, i, e), win_xor_sz_read(base, i, e));
233159c993d1SWarner Losh
233259c993d1SWarner Losh if (win_xor_can_remap(i))
233359c993d1SWarner Losh printf(", ha 0x%08x", win_xor_har_read(base, i, e));
233459c993d1SWarner Losh
233559c993d1SWarner Losh printf("\n");
233659c993d1SWarner Losh }
233759c993d1SWarner Losh for (i = 0; i < MV_XOR_CHAN_MAX; i++)
233859c993d1SWarner Losh printf("XOR control#%d: 0x%08x\n", i,
233959c993d1SWarner Losh win_xor_ctrl_read(base, i, e));
234059c993d1SWarner Losh }
234159c993d1SWarner Losh }
234259c993d1SWarner Losh
234359c993d1SWarner Losh #else
234459c993d1SWarner Losh /* Provide dummy functions to satisfy the build for SoCs not equipped with XOR */
234559c993d1SWarner Losh static int
decode_win_xor_valid(void)234659c993d1SWarner Losh decode_win_xor_valid(void)
234759c993d1SWarner Losh {
234859c993d1SWarner Losh
234959c993d1SWarner Losh return (1);
235059c993d1SWarner Losh }
235159c993d1SWarner Losh
235259c993d1SWarner Losh static void
decode_win_xor_setup(u_long base)235359c993d1SWarner Losh decode_win_xor_setup(u_long base)
235459c993d1SWarner Losh {
235559c993d1SWarner Losh }
235659c993d1SWarner Losh
235759c993d1SWarner Losh static void
decode_win_xor_dump(u_long base)235859c993d1SWarner Losh decode_win_xor_dump(u_long base)
235959c993d1SWarner Losh {
236059c993d1SWarner Losh }
236159c993d1SWarner Losh #endif
236259c993d1SWarner Losh
236359c993d1SWarner Losh /**************************************************************************
236459c993d1SWarner Losh * SATA windows routines
236559c993d1SWarner Losh **************************************************************************/
236659c993d1SWarner Losh static void
decode_win_sata_setup(u_long base)236759c993d1SWarner Losh decode_win_sata_setup(u_long base)
236859c993d1SWarner Losh {
236959c993d1SWarner Losh uint32_t cr, br;
237059c993d1SWarner Losh int i, j;
237159c993d1SWarner Losh
237259c993d1SWarner Losh if (pm_is_disabled(CPU_PM_CTRL_SATA))
237359c993d1SWarner Losh return;
237459c993d1SWarner Losh
237559c993d1SWarner Losh for (i = 0; i < MV_WIN_SATA_MAX; i++) {
237659c993d1SWarner Losh win_sata_cr_write(base, i, 0);
237759c993d1SWarner Losh win_sata_br_write(base, i, 0);
237859c993d1SWarner Losh }
237959c993d1SWarner Losh
238059c993d1SWarner Losh for (i = 0; i < MV_WIN_DDR_MAX; i++)
238159c993d1SWarner Losh if (ddr_is_active(i)) {
238259c993d1SWarner Losh cr = ((ddr_size(i) - 1) & 0xffff0000) |
238359c993d1SWarner Losh (ddr_attr(i) << 8) | (ddr_target(i) << 4) | 1;
238459c993d1SWarner Losh br = ddr_base(i);
238559c993d1SWarner Losh
238659c993d1SWarner Losh /* Use the first available SATA window */
238759c993d1SWarner Losh for (j = 0; j < MV_WIN_SATA_MAX; j++) {
238859c993d1SWarner Losh if ((win_sata_cr_read(base, j) & 1) != 0)
238959c993d1SWarner Losh continue;
239059c993d1SWarner Losh
239159c993d1SWarner Losh win_sata_br_write(base, j, br);
239259c993d1SWarner Losh win_sata_cr_write(base, j, cr);
239359c993d1SWarner Losh break;
239459c993d1SWarner Losh }
239559c993d1SWarner Losh }
239659c993d1SWarner Losh }
239759c993d1SWarner Losh
2398518a87d7SWojciech Macek /*
2399518a87d7SWojciech Macek * Configure AHCI decoding windows
2400518a87d7SWojciech Macek */
2401ccd5b1b0SWojciech Macek static void
decode_win_ahci_setup(u_long base)2402ccd5b1b0SWojciech Macek decode_win_ahci_setup(u_long base)
2403ccd5b1b0SWojciech Macek {
2404ccd5b1b0SWojciech Macek uint32_t br, cr, sz;
2405ccd5b1b0SWojciech Macek int i, j;
2406ccd5b1b0SWojciech Macek
2407091cd2f1SMarcin Wojtas for (i = 0; i < MV_WIN_SATA_MAX_ARMADA38X; i++) {
2408091cd2f1SMarcin Wojtas win_sata_armada38x_cr_write(base, i, 0);
2409091cd2f1SMarcin Wojtas win_sata_armada38x_br_write(base, i, 0);
2410091cd2f1SMarcin Wojtas win_sata_armada38x_sz_write(base, i, 0);
2411ccd5b1b0SWojciech Macek }
2412ccd5b1b0SWojciech Macek
2413ccd5b1b0SWojciech Macek for (i = 0; i < MV_WIN_DDR_MAX; i++) {
2414ccd5b1b0SWojciech Macek if (ddr_is_active(i)) {
2415ccd5b1b0SWojciech Macek cr = (ddr_attr(i) << IO_WIN_ATTR_SHIFT) |
2416ccd5b1b0SWojciech Macek (ddr_target(i) << IO_WIN_TGT_SHIFT) |
2417ccd5b1b0SWojciech Macek IO_WIN_ENA_MASK;
2418ccd5b1b0SWojciech Macek br = ddr_base(i);
2419ccd5b1b0SWojciech Macek sz = (ddr_size(i) - 1) &
2420ccd5b1b0SWojciech Macek (IO_WIN_SIZE_MASK << IO_WIN_SIZE_SHIFT);
2421ccd5b1b0SWojciech Macek
2422ccd5b1b0SWojciech Macek /* Use first available SATA window */
2423091cd2f1SMarcin Wojtas for (j = 0; j < MV_WIN_SATA_MAX_ARMADA38X; j++) {
2424091cd2f1SMarcin Wojtas if (win_sata_armada38x_cr_read(base, j) & IO_WIN_ENA_MASK)
2425ccd5b1b0SWojciech Macek continue;
2426ccd5b1b0SWojciech Macek
2427ccd5b1b0SWojciech Macek /* BASE is set to DRAM base (0x00000000) */
2428091cd2f1SMarcin Wojtas win_sata_armada38x_br_write(base, j, br);
2429ccd5b1b0SWojciech Macek /* CTRL targets DRAM ctrl with 0x0E or 0x0D */
2430091cd2f1SMarcin Wojtas win_sata_armada38x_cr_write(base, j, cr);
2431ccd5b1b0SWojciech Macek /* SIZE is set to 16MB - max value */
2432091cd2f1SMarcin Wojtas win_sata_armada38x_sz_write(base, j, sz);
2433ccd5b1b0SWojciech Macek break;
2434ccd5b1b0SWojciech Macek }
2435ccd5b1b0SWojciech Macek }
2436ccd5b1b0SWojciech Macek }
2437ccd5b1b0SWojciech Macek }
2438ccd5b1b0SWojciech Macek
2439ccd5b1b0SWojciech Macek static void
decode_win_ahci_dump(u_long base)2440518a87d7SWojciech Macek decode_win_ahci_dump(u_long base)
2441ccd5b1b0SWojciech Macek {
2442ccd5b1b0SWojciech Macek int i;
2443ccd5b1b0SWojciech Macek
2444091cd2f1SMarcin Wojtas for (i = 0; i < MV_WIN_SATA_MAX_ARMADA38X; i++)
2445ccd5b1b0SWojciech Macek printf("SATA window#%d: cr 0x%08x, br 0x%08x, sz 0x%08x\n", i,
2446091cd2f1SMarcin Wojtas win_sata_armada38x_cr_read(base, i), win_sata_br_read(base, i),
2447091cd2f1SMarcin Wojtas win_sata_armada38x_sz_read(base,i));
2448ccd5b1b0SWojciech Macek }
2449ccd5b1b0SWojciech Macek
245059c993d1SWarner Losh static int
decode_win_sata_valid(void)245159c993d1SWarner Losh decode_win_sata_valid(void)
245259c993d1SWarner Losh {
245359c993d1SWarner Losh uint32_t dev, rev;
245459c993d1SWarner Losh
245559c993d1SWarner Losh soc_id(&dev, &rev);
245659c993d1SWarner Losh if (dev == MV_DEV_88F5281)
245759c993d1SWarner Losh return (1);
245859c993d1SWarner Losh
245959c993d1SWarner Losh return (decode_win_can_cover_ddr(MV_WIN_SATA_MAX));
246059c993d1SWarner Losh }
246159c993d1SWarner Losh
246298a2d78dSLuiz Otavio O Souza static void
decode_win_sdhci_setup(u_long base)246398a2d78dSLuiz Otavio O Souza decode_win_sdhci_setup(u_long base)
246498a2d78dSLuiz Otavio O Souza {
246598a2d78dSLuiz Otavio O Souza uint32_t cr, br;
246698a2d78dSLuiz Otavio O Souza int i, j;
246798a2d78dSLuiz Otavio O Souza
246898a2d78dSLuiz Otavio O Souza for (i = 0; i < MV_WIN_SDHCI_MAX; i++) {
246998a2d78dSLuiz Otavio O Souza win_sdhci_cr_write(base, i, 0);
247098a2d78dSLuiz Otavio O Souza win_sdhci_br_write(base, i, 0);
247198a2d78dSLuiz Otavio O Souza }
247298a2d78dSLuiz Otavio O Souza
247398a2d78dSLuiz Otavio O Souza for (i = 0; i < MV_WIN_DDR_MAX; i++)
247498a2d78dSLuiz Otavio O Souza if (ddr_is_active(i)) {
247598a2d78dSLuiz Otavio O Souza br = ddr_base(i);
247698a2d78dSLuiz Otavio O Souza cr = (((ddr_size(i) - 1) &
247798a2d78dSLuiz Otavio O Souza (IO_WIN_SIZE_MASK << IO_WIN_SIZE_SHIFT)) |
247898a2d78dSLuiz Otavio O Souza (ddr_attr(i) << IO_WIN_ATTR_SHIFT) |
247998a2d78dSLuiz Otavio O Souza (ddr_target(i) << IO_WIN_TGT_SHIFT) |
248098a2d78dSLuiz Otavio O Souza IO_WIN_ENA_MASK);
248198a2d78dSLuiz Otavio O Souza
248298a2d78dSLuiz Otavio O Souza /* Use the first available SDHCI window */
248398a2d78dSLuiz Otavio O Souza for (j = 0; j < MV_WIN_SDHCI_MAX; j++) {
248498a2d78dSLuiz Otavio O Souza if (win_sdhci_cr_read(base, j) & IO_WIN_ENA_MASK)
248598a2d78dSLuiz Otavio O Souza continue;
248698a2d78dSLuiz Otavio O Souza
248798a2d78dSLuiz Otavio O Souza win_sdhci_cr_write(base, j, cr);
248898a2d78dSLuiz Otavio O Souza win_sdhci_br_write(base, j, br);
248998a2d78dSLuiz Otavio O Souza break;
249098a2d78dSLuiz Otavio O Souza }
249198a2d78dSLuiz Otavio O Souza }
249298a2d78dSLuiz Otavio O Souza }
249398a2d78dSLuiz Otavio O Souza
249498a2d78dSLuiz Otavio O Souza static void
decode_win_sdhci_dump(u_long base)249598a2d78dSLuiz Otavio O Souza decode_win_sdhci_dump(u_long base)
249698a2d78dSLuiz Otavio O Souza {
249798a2d78dSLuiz Otavio O Souza int i;
249898a2d78dSLuiz Otavio O Souza
249998a2d78dSLuiz Otavio O Souza for (i = 0; i < MV_WIN_SDHCI_MAX; i++)
250098a2d78dSLuiz Otavio O Souza printf("SDHCI window#%d: c 0x%08x, b 0x%08x\n", i,
250198a2d78dSLuiz Otavio O Souza win_sdhci_cr_read(base, i), win_sdhci_br_read(base, i));
250298a2d78dSLuiz Otavio O Souza }
250398a2d78dSLuiz Otavio O Souza
250498a2d78dSLuiz Otavio O Souza static int
decode_win_sdhci_valid(void)250598a2d78dSLuiz Otavio O Souza decode_win_sdhci_valid(void)
250698a2d78dSLuiz Otavio O Souza {
250798a2d78dSLuiz Otavio O Souza
250898a2d78dSLuiz Otavio O Souza return (decode_win_can_cover_ddr(MV_WIN_SDHCI_MAX));
250998a2d78dSLuiz Otavio O Souza }
251098a2d78dSLuiz Otavio O Souza
251159c993d1SWarner Losh /**************************************************************************
251259c993d1SWarner Losh * FDT parsing routines.
251359c993d1SWarner Losh **************************************************************************/
251459c993d1SWarner Losh
251559c993d1SWarner Losh static int
fdt_get_ranges(const char * nodename,void * buf,int size,int * tuples,int * tuplesize)251659c993d1SWarner Losh fdt_get_ranges(const char *nodename, void *buf, int size, int *tuples,
251759c993d1SWarner Losh int *tuplesize)
251859c993d1SWarner Losh {
251959c993d1SWarner Losh phandle_t node;
252059c993d1SWarner Losh pcell_t addr_cells, par_addr_cells, size_cells;
252159c993d1SWarner Losh int len, tuple_size, tuples_count;
252259c993d1SWarner Losh
252359c993d1SWarner Losh node = OF_finddevice(nodename);
252459c993d1SWarner Losh if (node == -1)
252559c993d1SWarner Losh return (EINVAL);
252659c993d1SWarner Losh
252759c993d1SWarner Losh if ((fdt_addrsize_cells(node, &addr_cells, &size_cells)) != 0)
252859c993d1SWarner Losh return (ENXIO);
252959c993d1SWarner Losh
253059c993d1SWarner Losh par_addr_cells = fdt_parent_addr_cells(node);
253159c993d1SWarner Losh if (par_addr_cells > 2)
253259c993d1SWarner Losh return (ERANGE);
253359c993d1SWarner Losh
253459c993d1SWarner Losh tuple_size = sizeof(pcell_t) * (addr_cells + par_addr_cells +
253559c993d1SWarner Losh size_cells);
253659c993d1SWarner Losh
253759c993d1SWarner Losh /* Note the OF_getprop_alloc() cannot be used at this early stage. */
253859c993d1SWarner Losh len = OF_getprop(node, "ranges", buf, size);
253959c993d1SWarner Losh
254059c993d1SWarner Losh /*
254159c993d1SWarner Losh * XXX this does not handle the empty 'ranges;' case, which is
254259c993d1SWarner Losh * legitimate and should be allowed.
254359c993d1SWarner Losh */
254459c993d1SWarner Losh tuples_count = len / tuple_size;
254559c993d1SWarner Losh if (tuples_count <= 0)
254659c993d1SWarner Losh return (ERANGE);
254759c993d1SWarner Losh
25481f7f3314SRuslan Bukin if (par_addr_cells > 2 || addr_cells > 2 || size_cells > 2)
254959c993d1SWarner Losh return (ERANGE);
255059c993d1SWarner Losh
255159c993d1SWarner Losh *tuples = tuples_count;
255259c993d1SWarner Losh *tuplesize = tuple_size;
255359c993d1SWarner Losh return (0);
255459c993d1SWarner Losh }
255559c993d1SWarner Losh
255659c993d1SWarner Losh static int
win_cpu_from_dt(void)255759c993d1SWarner Losh win_cpu_from_dt(void)
255859c993d1SWarner Losh {
255959c993d1SWarner Losh pcell_t ranges[48];
256059c993d1SWarner Losh phandle_t node;
256159c993d1SWarner Losh int i, entry_size, err, t, tuple_size, tuples;
256259c993d1SWarner Losh u_long sram_base, sram_size;
256359c993d1SWarner Losh
256459c993d1SWarner Losh t = 0;
256559c993d1SWarner Losh /* Retrieve 'ranges' property of '/localbus' node. */
256659c993d1SWarner Losh if ((err = fdt_get_ranges("/localbus", ranges, sizeof(ranges),
256759c993d1SWarner Losh &tuples, &tuple_size)) == 0) {
256859c993d1SWarner Losh /*
256959c993d1SWarner Losh * Fill CPU decode windows table.
257059c993d1SWarner Losh */
257159c993d1SWarner Losh bzero((void *)&cpu_win_tbl, sizeof(cpu_win_tbl));
257259c993d1SWarner Losh
257359c993d1SWarner Losh entry_size = tuple_size / sizeof(pcell_t);
257459c993d1SWarner Losh cpu_wins_no = tuples;
257559c993d1SWarner Losh
257670d16332SZbigniew Bodek /* Check range */
257770d16332SZbigniew Bodek if (tuples > nitems(cpu_win_tbl)) {
257870d16332SZbigniew Bodek debugf("too many tuples to fit into cpu_win_tbl\n");
257970d16332SZbigniew Bodek return (ENOMEM);
258070d16332SZbigniew Bodek }
258170d16332SZbigniew Bodek
258259c993d1SWarner Losh for (i = 0, t = 0; t < tuples; i += entry_size, t++) {
258359c993d1SWarner Losh cpu_win_tbl[t].target = 1;
258459c993d1SWarner Losh cpu_win_tbl[t].attr = fdt32_to_cpu(ranges[i + 1]);
258559c993d1SWarner Losh cpu_win_tbl[t].base = fdt32_to_cpu(ranges[i + 2]);
258659c993d1SWarner Losh cpu_win_tbl[t].size = fdt32_to_cpu(ranges[i + 3]);
258759c993d1SWarner Losh cpu_win_tbl[t].remap = ~0;
258859c993d1SWarner Losh debugf("target = 0x%0x attr = 0x%0x base = 0x%0x "
258959c993d1SWarner Losh "size = 0x%0x remap = 0x%0x\n",
259059c993d1SWarner Losh cpu_win_tbl[t].target,
259159c993d1SWarner Losh cpu_win_tbl[t].attr, cpu_win_tbl[t].base,
259259c993d1SWarner Losh cpu_win_tbl[t].size, cpu_win_tbl[t].remap);
259359c993d1SWarner Losh }
259459c993d1SWarner Losh }
259559c993d1SWarner Losh
259659c993d1SWarner Losh /*
259759c993d1SWarner Losh * Retrieve CESA SRAM data.
259859c993d1SWarner Losh */
259959c993d1SWarner Losh if ((node = OF_finddevice("sram")) != -1)
260087acb7f8SAndrew Turner if (ofw_bus_node_is_compatible(node, "mrvl,cesa-sram"))
260159c993d1SWarner Losh goto moveon;
260259c993d1SWarner Losh
2603108117ccSOleksandr Tymoshenko if ((node = OF_finddevice("/")) == -1)
260459c993d1SWarner Losh return (ENXIO);
260559c993d1SWarner Losh
260659c993d1SWarner Losh if ((node = fdt_find_compatible(node, "mrvl,cesa-sram", 0)) == 0)
260759c993d1SWarner Losh /* SRAM block is not always present. */
260859c993d1SWarner Losh return (0);
260959c993d1SWarner Losh moveon:
261059c993d1SWarner Losh sram_base = sram_size = 0;
261159c993d1SWarner Losh if (fdt_regsize(node, &sram_base, &sram_size) != 0)
261259c993d1SWarner Losh return (EINVAL);
261359c993d1SWarner Losh
261470d16332SZbigniew Bodek /* Check range */
261570d16332SZbigniew Bodek if (t >= nitems(cpu_win_tbl)) {
261670d16332SZbigniew Bodek debugf("cannot fit CESA tuple into cpu_win_tbl\n");
261770d16332SZbigniew Bodek return (ENOMEM);
261870d16332SZbigniew Bodek }
261970d16332SZbigniew Bodek
2620091cd2f1SMarcin Wojtas cpu_win_tbl[t].target = soc_decode_win_spec->win_cesa_target;
2621091cd2f1SMarcin Wojtas if (soc_family == MV_SOC_ARMADA_38X)
2622091cd2f1SMarcin Wojtas cpu_win_tbl[t].attr = soc_decode_win_spec->win_cesa_attr(0);
2623091cd2f1SMarcin Wojtas else
2624091cd2f1SMarcin Wojtas cpu_win_tbl[t].attr = soc_decode_win_spec->win_cesa_attr(1);
26255d7cb9a8SZbigniew Bodek cpu_win_tbl[t].base = sram_base;
26265d7cb9a8SZbigniew Bodek cpu_win_tbl[t].size = sram_size;
26275d7cb9a8SZbigniew Bodek cpu_win_tbl[t].remap = ~0;
26285d7cb9a8SZbigniew Bodek cpu_wins_no++;
26295d7cb9a8SZbigniew Bodek debugf("sram: base = 0x%0lx size = 0x%0lx\n", sram_base, sram_size);
26305d7cb9a8SZbigniew Bodek
26315d7cb9a8SZbigniew Bodek /* Check if there is a second CESA node */
26325d7cb9a8SZbigniew Bodek while ((node = OF_peer(node)) != 0) {
263387acb7f8SAndrew Turner if (ofw_bus_node_is_compatible(node, "mrvl,cesa-sram")) {
26345d7cb9a8SZbigniew Bodek if (fdt_regsize(node, &sram_base, &sram_size) != 0)
26355d7cb9a8SZbigniew Bodek return (EINVAL);
26365d7cb9a8SZbigniew Bodek break;
26375d7cb9a8SZbigniew Bodek }
26385d7cb9a8SZbigniew Bodek }
26395d7cb9a8SZbigniew Bodek
26405d7cb9a8SZbigniew Bodek if (node == 0)
26415d7cb9a8SZbigniew Bodek return (0);
26425d7cb9a8SZbigniew Bodek
26435d7cb9a8SZbigniew Bodek t++;
264485bf4227SZbigniew Bodek if (t >= nitems(cpu_win_tbl)) {
26455d7cb9a8SZbigniew Bodek debugf("cannot fit CESA tuple into cpu_win_tbl\n");
26465d7cb9a8SZbigniew Bodek return (ENOMEM);
26475d7cb9a8SZbigniew Bodek }
26485d7cb9a8SZbigniew Bodek
26495d7cb9a8SZbigniew Bodek /* Configure window for CESA1 */
2650091cd2f1SMarcin Wojtas cpu_win_tbl[t].target = soc_decode_win_spec->win_cesa_target;
2651091cd2f1SMarcin Wojtas cpu_win_tbl[t].attr = soc_decode_win_spec->win_cesa_attr(1);
265259c993d1SWarner Losh cpu_win_tbl[t].base = sram_base;
265359c993d1SWarner Losh cpu_win_tbl[t].size = sram_size;
265459c993d1SWarner Losh cpu_win_tbl[t].remap = ~0;
265559c993d1SWarner Losh cpu_wins_no++;
265659c993d1SWarner Losh debugf("sram: base = 0x%0lx size = 0x%0lx\n", sram_base, sram_size);
265759c993d1SWarner Losh
265859c993d1SWarner Losh return (0);
265959c993d1SWarner Losh }
266059c993d1SWarner Losh
266159c993d1SWarner Losh static int
fdt_win_process(phandle_t child)266273e48bc6SZbigniew Bodek fdt_win_process(phandle_t child)
266373e48bc6SZbigniew Bodek {
2664c7dbc00cSMarcin Wojtas int i, ret;
266573e48bc6SZbigniew Bodek
266673e48bc6SZbigniew Bodek for (i = 0; soc_nodes[i].compat != NULL; i++) {
266773e48bc6SZbigniew Bodek /* Setup only for enabled devices */
266873e48bc6SZbigniew Bodek if (ofw_bus_node_status_okay(child) == 0)
266973e48bc6SZbigniew Bodek continue;
267073e48bc6SZbigniew Bodek
2671c7dbc00cSMarcin Wojtas if (!ofw_bus_node_is_compatible(child, soc_nodes[i].compat))
267273e48bc6SZbigniew Bodek continue;
267373e48bc6SZbigniew Bodek
267413d464bfSMarcin Wojtas ret = fdt_win_process_child(child, &soc_nodes[i], "reg");
2675c7dbc00cSMarcin Wojtas if (ret != 0)
2676c7dbc00cSMarcin Wojtas return (ret);
2677c7dbc00cSMarcin Wojtas }
2678c7dbc00cSMarcin Wojtas
2679c7dbc00cSMarcin Wojtas return (0);
2680c7dbc00cSMarcin Wojtas }
2681c7dbc00cSMarcin Wojtas
2682c7dbc00cSMarcin Wojtas static int
fdt_win_process_child(phandle_t child,struct soc_node_spec * soc_node,const char * mimo_reg_source)268313d464bfSMarcin Wojtas fdt_win_process_child(phandle_t child, struct soc_node_spec *soc_node,
268413d464bfSMarcin Wojtas const char* mimo_reg_source)
2685c7dbc00cSMarcin Wojtas {
2686c7dbc00cSMarcin Wojtas int addr_cells, size_cells;
2687c7dbc00cSMarcin Wojtas pcell_t reg[8];
2688e10ac1edSWarner Losh u_long base;
2689c7dbc00cSMarcin Wojtas
269073e48bc6SZbigniew Bodek if (fdt_addrsize_cells(OF_parent(child), &addr_cells,
269173e48bc6SZbigniew Bodek &size_cells))
269273e48bc6SZbigniew Bodek return (ENXIO);
269373e48bc6SZbigniew Bodek
269473e48bc6SZbigniew Bodek if ((sizeof(pcell_t) * (addr_cells + size_cells)) > sizeof(reg))
269573e48bc6SZbigniew Bodek return (ENOMEM);
269613d464bfSMarcin Wojtas if (OF_getprop(child, mimo_reg_source, ®, sizeof(reg)) <= 0)
269773e48bc6SZbigniew Bodek return (EINVAL);
269873e48bc6SZbigniew Bodek
269973e48bc6SZbigniew Bodek if (addr_cells <= 2)
270073e48bc6SZbigniew Bodek base = fdt_data_get(®[0], addr_cells);
270173e48bc6SZbigniew Bodek else
270273e48bc6SZbigniew Bodek base = fdt_data_get(®[addr_cells - 2], 2);
2703e10ac1edSWarner Losh fdt_data_get(®[addr_cells], size_cells);
270473e48bc6SZbigniew Bodek
2705afcad11eSMarcin Wojtas if (soc_node->valid_handler != NULL)
2706afcad11eSMarcin Wojtas if (!soc_node->valid_handler())
2707afcad11eSMarcin Wojtas return (EINVAL);
2708afcad11eSMarcin Wojtas
270973e48bc6SZbigniew Bodek base = (base & 0x000fffff) | fdt_immr_va;
271073e48bc6SZbigniew Bodek if (soc_node->decode_handler != NULL)
271173e48bc6SZbigniew Bodek soc_node->decode_handler(base);
271273e48bc6SZbigniew Bodek else
271373e48bc6SZbigniew Bodek return (ENXIO);
271473e48bc6SZbigniew Bodek
271573e48bc6SZbigniew Bodek if (MV_DUMP_WIN && (soc_node->dump_handler != NULL))
271673e48bc6SZbigniew Bodek soc_node->dump_handler(base);
271773e48bc6SZbigniew Bodek
271873e48bc6SZbigniew Bodek return (0);
271973e48bc6SZbigniew Bodek }
2720c7dbc00cSMarcin Wojtas
272173e48bc6SZbigniew Bodek static int
fdt_win_setup(void)272259c993d1SWarner Losh fdt_win_setup(void)
272359c993d1SWarner Losh {
272449b5f559SZbigniew Bodek phandle_t node, child, sb;
272573e48bc6SZbigniew Bodek phandle_t child_pci;
272673e48bc6SZbigniew Bodek int err;
272759c993d1SWarner Losh
272849b5f559SZbigniew Bodek sb = 0;
272959c993d1SWarner Losh node = OF_finddevice("/");
273059c993d1SWarner Losh if (node == -1)
273159c993d1SWarner Losh panic("fdt_win_setup: no root node");
273259c993d1SWarner Losh
27333361fdc4SZbigniew Bodek /* Allow for coherent transactions on the A38x MBUS */
27343361fdc4SZbigniew Bodek if (ofw_bus_node_is_compatible(node, "marvell,armada380"))
27353361fdc4SZbigniew Bodek platform_io_coherent = true;
27363361fdc4SZbigniew Bodek
273759c993d1SWarner Losh /*
273859c993d1SWarner Losh * Traverse through all children of root and simple-bus nodes.
273959c993d1SWarner Losh * For each found device retrieve decode windows data (if applicable).
274059c993d1SWarner Losh */
274159c993d1SWarner Losh child = OF_child(node);
274259c993d1SWarner Losh while (child != 0) {
274373e48bc6SZbigniew Bodek /* Lookup for callback and run */
274473e48bc6SZbigniew Bodek err = fdt_win_process(child);
274559c993d1SWarner Losh if (err != 0)
274659c993d1SWarner Losh return (err);
274759c993d1SWarner Losh
274873e48bc6SZbigniew Bodek /* Process Marvell Armada-XP/38x PCIe controllers */
274973e48bc6SZbigniew Bodek if (ofw_bus_node_is_compatible(child, "marvell,armada-370-pcie")) {
275073e48bc6SZbigniew Bodek child_pci = OF_child(child);
275173e48bc6SZbigniew Bodek while (child_pci != 0) {
2752c7dbc00cSMarcin Wojtas err = fdt_win_process_child(child_pci,
275313d464bfSMarcin Wojtas &soc_nodes[SOC_NODE_PCIE_ENTRY_IDX],
275413d464bfSMarcin Wojtas "assigned-addresses");
275573e48bc6SZbigniew Bodek if (err != 0)
275673e48bc6SZbigniew Bodek return (err);
275759c993d1SWarner Losh
275873e48bc6SZbigniew Bodek child_pci = OF_peer(child_pci);
275973e48bc6SZbigniew Bodek }
276059c993d1SWarner Losh }
276159c993d1SWarner Losh
276259c993d1SWarner Losh /*
276359c993d1SWarner Losh * Once done with root-level children let's move down to
276459c993d1SWarner Losh * simple-bus and its children.
276559c993d1SWarner Losh */
276659c993d1SWarner Losh child = OF_peer(child);
276759c993d1SWarner Losh if ((child == 0) && (node == OF_finddevice("/"))) {
276849b5f559SZbigniew Bodek sb = node = fdt_find_compatible(node, "simple-bus", 0);
276959c993d1SWarner Losh if (node == 0)
277059c993d1SWarner Losh return (ENXIO);
277159c993d1SWarner Losh child = OF_child(node);
277259c993d1SWarner Losh }
277334a3d2c6SWojciech Macek /*
277434a3d2c6SWojciech Macek * Next, move one more level down to internal-regs node (if
277534a3d2c6SWojciech Macek * it is present) and its children. This node also have
277634a3d2c6SWojciech Macek * "simple-bus" compatible.
277734a3d2c6SWojciech Macek */
277849b5f559SZbigniew Bodek if ((child == 0) && (node == sb)) {
277934a3d2c6SWojciech Macek node = fdt_find_compatible(node, "simple-bus", 0);
278034a3d2c6SWojciech Macek if (node == 0)
278134a3d2c6SWojciech Macek return (0);
278234a3d2c6SWojciech Macek child = OF_child(node);
278334a3d2c6SWojciech Macek }
278459c993d1SWarner Losh }
278559c993d1SWarner Losh
278659c993d1SWarner Losh return (0);
278759c993d1SWarner Losh }
278859c993d1SWarner Losh
278959c993d1SWarner Losh static void
fdt_fixup_busfreq(phandle_t root)279059c993d1SWarner Losh fdt_fixup_busfreq(phandle_t root)
279159c993d1SWarner Losh {
279259c993d1SWarner Losh phandle_t sb;
279359c993d1SWarner Losh pcell_t freq;
279459c993d1SWarner Losh
279559c993d1SWarner Losh freq = cpu_to_fdt32(get_tclk());
279659c993d1SWarner Losh
279759c993d1SWarner Losh /*
279859c993d1SWarner Losh * Fix bus speed in cpu node
279959c993d1SWarner Losh */
2800108117ccSOleksandr Tymoshenko if ((sb = OF_finddevice("cpu")) != -1)
280159c993d1SWarner Losh if (fdt_is_compatible_strict(sb, "ARM,88VS584"))
280259c993d1SWarner Losh OF_setprop(sb, "bus-frequency", (void *)&freq,
280359c993d1SWarner Losh sizeof(freq));
280459c993d1SWarner Losh
280559c993d1SWarner Losh /*
280659c993d1SWarner Losh * This fixup sets the simple-bus bus-frequency property.
280759c993d1SWarner Losh */
280859c993d1SWarner Losh if ((sb = fdt_find_compatible(root, "simple-bus", 1)) != 0)
280959c993d1SWarner Losh OF_setprop(sb, "bus-frequency", (void *)&freq, sizeof(freq));
281059c993d1SWarner Losh }
281159c993d1SWarner Losh
281259c993d1SWarner Losh static void
fdt_fixup_ranges(phandle_t root)281359c993d1SWarner Losh fdt_fixup_ranges(phandle_t root)
281459c993d1SWarner Losh {
281559c993d1SWarner Losh phandle_t node;
281659c993d1SWarner Losh pcell_t par_addr_cells, addr_cells, size_cells;
281759c993d1SWarner Losh pcell_t ranges[3], reg[2], *rangesptr;
281859c993d1SWarner Losh int len, tuple_size, tuples_count;
281959c993d1SWarner Losh uint32_t base;
282059c993d1SWarner Losh
282159c993d1SWarner Losh /* Fix-up SoC ranges according to real fdt_immr_pa */
282259c993d1SWarner Losh if ((node = fdt_find_compatible(root, "simple-bus", 1)) != 0) {
282359c993d1SWarner Losh if (fdt_addrsize_cells(node, &addr_cells, &size_cells) == 0 &&
28243ea58997SOleksandr Tymoshenko ((par_addr_cells = fdt_parent_addr_cells(node)) <= 2)) {
282559c993d1SWarner Losh tuple_size = sizeof(pcell_t) * (par_addr_cells +
282659c993d1SWarner Losh addr_cells + size_cells);
282759c993d1SWarner Losh len = OF_getprop(node, "ranges", ranges,
282859c993d1SWarner Losh sizeof(ranges));
282959c993d1SWarner Losh tuples_count = len / tuple_size;
283059c993d1SWarner Losh /* Unexpected settings are not supported */
283159c993d1SWarner Losh if (tuples_count != 1)
283259c993d1SWarner Losh goto fixup_failed;
283359c993d1SWarner Losh
283459c993d1SWarner Losh rangesptr = &ranges[0];
283559c993d1SWarner Losh rangesptr += par_addr_cells;
283659c993d1SWarner Losh base = fdt_data_get((void *)rangesptr, addr_cells);
283759c993d1SWarner Losh *rangesptr = cpu_to_fdt32(fdt_immr_pa);
283859c993d1SWarner Losh if (OF_setprop(node, "ranges", (void *)&ranges[0],
283959c993d1SWarner Losh sizeof(ranges)) < 0)
284059c993d1SWarner Losh goto fixup_failed;
284159c993d1SWarner Losh }
284259c993d1SWarner Losh }
284359c993d1SWarner Losh
284459c993d1SWarner Losh /* Fix-up PCIe reg according to real PCIe registers' PA */
284559c993d1SWarner Losh if ((node = fdt_find_compatible(root, "mrvl,pcie", 1)) != 0) {
284659c993d1SWarner Losh if (fdt_addrsize_cells(OF_parent(node), &par_addr_cells,
284759c993d1SWarner Losh &size_cells) == 0) {
284859c993d1SWarner Losh tuple_size = sizeof(pcell_t) * (par_addr_cells +
284959c993d1SWarner Losh size_cells);
285059c993d1SWarner Losh len = OF_getprop(node, "reg", reg, sizeof(reg));
285159c993d1SWarner Losh tuples_count = len / tuple_size;
285259c993d1SWarner Losh /* Unexpected settings are not supported */
285359c993d1SWarner Losh if (tuples_count != 1)
285459c993d1SWarner Losh goto fixup_failed;
285559c993d1SWarner Losh
285659c993d1SWarner Losh base = fdt_data_get((void *)®[0], par_addr_cells);
285759c993d1SWarner Losh base &= ~0xFF000000;
285859c993d1SWarner Losh base |= fdt_immr_pa;
285959c993d1SWarner Losh reg[0] = cpu_to_fdt32(base);
286059c993d1SWarner Losh if (OF_setprop(node, "reg", (void *)®[0],
286159c993d1SWarner Losh sizeof(reg)) < 0)
286259c993d1SWarner Losh goto fixup_failed;
286359c993d1SWarner Losh }
286459c993d1SWarner Losh }
286559c993d1SWarner Losh /* Fix-up succeeded. May return and continue */
286659c993d1SWarner Losh return;
286759c993d1SWarner Losh
286859c993d1SWarner Losh fixup_failed:
286959c993d1SWarner Losh while (1) {
287059c993d1SWarner Losh /*
287159c993d1SWarner Losh * In case of any error while fixing ranges just hang.
287259c993d1SWarner Losh * 1. No message can be displayed yet since console
287359c993d1SWarner Losh * is not initialized.
287459c993d1SWarner Losh * 2. Going further will cause failure on bus_space_map()
287559c993d1SWarner Losh * relying on the wrong ranges or data abort when
287659c993d1SWarner Losh * accessing PCIe registers.
287759c993d1SWarner Losh */
287859c993d1SWarner Losh }
287959c993d1SWarner Losh }
288059c993d1SWarner Losh
288159c993d1SWarner Losh struct fdt_fixup_entry fdt_fixup_table[] = {
288259c993d1SWarner Losh { "mrvl,DB-88F6281", &fdt_fixup_busfreq },
288359c993d1SWarner Losh { "mrvl,DB-78460", &fdt_fixup_busfreq },
288459c993d1SWarner Losh { "mrvl,DB-78460", &fdt_fixup_ranges },
288559c993d1SWarner Losh { NULL, NULL }
288659c993d1SWarner Losh };
288759c993d1SWarner Losh
2888526de79bSMarcin Wojtas uint32_t
get_tclk(void)2889526de79bSMarcin Wojtas get_tclk(void)
2890526de79bSMarcin Wojtas {
2891526de79bSMarcin Wojtas
2892526de79bSMarcin Wojtas if (soc_decode_win_spec->get_tclk != NULL)
2893526de79bSMarcin Wojtas return soc_decode_win_spec->get_tclk();
2894526de79bSMarcin Wojtas else
2895526de79bSMarcin Wojtas return -1;
2896526de79bSMarcin Wojtas }
2897526de79bSMarcin Wojtas
2898526de79bSMarcin Wojtas uint32_t
get_cpu_freq(void)2899526de79bSMarcin Wojtas get_cpu_freq(void)
2900526de79bSMarcin Wojtas {
2901526de79bSMarcin Wojtas
2902526de79bSMarcin Wojtas if (soc_decode_win_spec->get_cpu_freq != NULL)
2903526de79bSMarcin Wojtas return soc_decode_win_spec->get_cpu_freq();
2904526de79bSMarcin Wojtas else
2905526de79bSMarcin Wojtas return -1;
2906526de79bSMarcin Wojtas }
2907