xref: /freebsd/sys/arm/ti/ti_cpuid.c (revision a0ee8cc6)
1 /*-
2  * Copyright (c) 2011
3  *	Ben Gray <ben.r.gray@gmail.com>.
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  */
27 
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
30 
31 #include <sys/param.h>
32 #include <sys/systm.h>
33 #include <sys/kernel.h>
34 #include <sys/module.h>
35 #include <sys/bus.h>
36 #include <sys/resource.h>
37 #include <sys/rman.h>
38 #include <sys/lock.h>
39 #include <sys/mutex.h>
40 
41 #include <machine/bus.h>
42 #include <machine/fdt.h>
43 #include <machine/cpu.h>
44 #include <machine/cpufunc.h>
45 #include <machine/resource.h>
46 #include <machine/intr.h>
47 
48 #include <arm/ti/tivar.h>
49 #include <arm/ti/ti_cpuid.h>
50 
51 #include <arm/ti/omap4/omap4_reg.h>
52 #include <arm/ti/am335x/am335x_reg.h>
53 
54 #define OMAP4_STD_FUSE_DIE_ID_0    0x2200
55 #define OMAP4_ID_CODE              0x2204
56 #define OMAP4_STD_FUSE_DIE_ID_1    0x2208
57 #define OMAP4_STD_FUSE_DIE_ID_2    0x220C
58 #define OMAP4_STD_FUSE_DIE_ID_3    0x2210
59 #define OMAP4_STD_FUSE_PROD_ID_0   0x2214
60 #define OMAP4_STD_FUSE_PROD_ID_1   0x2218
61 
62 #define OMAP3_ID_CODE              0xA204
63 
64 static uint32_t chip_revision = 0xffffffff;
65 
66 /**
67  *	ti_revision - Returns the revision number of the device
68  *
69  *	Simply returns an identifier for the revision of the chip we are running
70  *	on.
71  *
72  *	RETURNS
73  *	A 32-bit identifier for the current chip
74  */
75 uint32_t
76 ti_revision(void)
77 {
78 	return chip_revision;
79 }
80 
81 /**
82  *	omap4_get_revision - determines omap4 revision
83  *
84  *	Reads the registers to determine the revision of the chip we are currently
85  *	running on.  Stores the information in global variables.
86  *
87  *
88  */
89 static void
90 omap4_get_revision(void)
91 {
92 	uint32_t id_code;
93 	uint32_t revision;
94 	uint32_t hawkeye;
95 	bus_space_handle_t bsh;
96 
97 	/* The chip revsion is read from the device identification registers and
98 	 * the JTAG (?) tap registers, which are located in address 0x4A00_2200 to
99 	 * 0x4A00_2218.  This is part of the L4_CORE memory range and should have
100 	 * been mapped in by the machdep.c code.
101 	 *
102 	 *   STD_FUSE_DIE_ID_0    0x4A00 2200
103 	 *   ID_CODE              0x4A00 2204   (this is the only one we need)
104 	 *   STD_FUSE_DIE_ID_1    0x4A00 2208
105 	 *   STD_FUSE_DIE_ID_2    0x4A00 220C
106 	 *   STD_FUSE_DIE_ID_3    0x4A00 2210
107 	 *   STD_FUSE_PROD_ID_0   0x4A00 2214
108 	 *   STD_FUSE_PROD_ID_1   0x4A00 2218
109 	 */
110 	/* FIXME Should we map somewhere else? */
111 	bus_space_map(fdtbus_bs_tag,OMAP44XX_L4_CORE_HWBASE, 0x4000, 0, &bsh);
112 	id_code = bus_space_read_4(fdtbus_bs_tag, bsh, OMAP4_ID_CODE);
113 	bus_space_unmap(fdtbus_bs_tag, bsh, 0x4000);
114 
115 	hawkeye = ((id_code >> 12) & 0xffff);
116 	revision = ((id_code >> 28) & 0xf);
117 
118 	/* Apparently according to the linux code there were some ES2.0 samples that
119 	 * have the wrong id code and report themselves as ES1.0 silicon.  So used
120 	 * the ARM cpuid to get the correct revision.
121 	 */
122 	if (revision == 0) {
123 		id_code = cpufunc_id();
124 		revision = (id_code & 0xf) - 1;
125 	}
126 
127 	switch (hawkeye) {
128 	case 0xB852:
129 		switch (revision) {
130 		case 0:
131 			chip_revision = OMAP4430_REV_ES1_0;
132 			break;
133 		case 1:
134 			chip_revision = OMAP4430_REV_ES2_1;
135 			break;
136 		default:
137 			chip_revision = OMAP4430_REV_UNKNOWN;
138 			break;
139 		}
140 		break;
141 
142 	case 0xB95C:
143 		switch (revision) {
144 		case 3:
145 			chip_revision = OMAP4430_REV_ES2_1;
146 			break;
147 		case 4:
148 			chip_revision = OMAP4430_REV_ES2_2;
149 			break;
150 		case 6:
151 			chip_revision = OMAP4430_REV_ES2_3;
152 			break;
153 		default:
154 			chip_revision = OMAP4430_REV_UNKNOWN;
155 			break;
156 		}
157 		break;
158 
159 	case 0xB94E:
160 		switch (revision) {
161 		case 0:
162 			chip_revision = OMAP4460_REV_ES1_0;
163 			break;
164 		case 2:
165 			chip_revision = OMAP4460_REV_ES1_1;
166 			break;
167 		default:
168 			chip_revision = OMAP4460_REV_UNKNOWN;
169 			break;
170 		}
171 		break;
172 
173 	case 0xB975:
174 		switch (revision) {
175 		case 0:
176 			chip_revision = OMAP4470_REV_ES1_0;
177 			break;
178 		default:
179 			chip_revision = OMAP4470_REV_UNKNOWN;
180 			break;
181 		}
182 		break;
183 
184 	default:
185 		/* Default to the latest revision if we can't determine type */
186 		chip_revision = OMAP_UNKNOWN_DEV;
187 		break;
188 	}
189 	if (chip_revision != OMAP_UNKNOWN_DEV) {
190 		printf("Texas Instruments OMAP%04x Processor, Revision ES%u.%u\n",
191 		    OMAP_REV_DEVICE(chip_revision), OMAP_REV_MAJOR(chip_revision),
192 		    OMAP_REV_MINOR(chip_revision));
193 	}
194 	else {
195 		printf("Texas Instruments unknown OMAP chip: %04x, rev %d\n",
196 		    hawkeye, revision);
197 	}
198 }
199 
200 static void
201 am335x_get_revision(void)
202 {
203 	uint32_t dev_feature;
204 	uint8_t cpu_last_char;
205 	bus_space_handle_t bsh;
206 
207 	bus_space_map(fdtbus_bs_tag, AM335X_CONTROL_BASE, AM335X_CONTROL_SIZE, 0, &bsh);
208 	chip_revision = bus_space_read_4(fdtbus_bs_tag, bsh, AM335X_CONTROL_DEVICE_ID);
209 	dev_feature = bus_space_read_4(fdtbus_bs_tag, bsh, AM335X_CONTROL_DEV_FEATURE);
210 	bus_space_unmap(fdtbus_bs_tag, bsh, AM335X_CONTROL_SIZE);
211 
212 	switch (dev_feature) {
213 		case 0x00FF0382:
214 			cpu_last_char='2';
215 			break;
216 		case 0x20FF0382:
217 			cpu_last_char='4';
218 			break;
219 		case 0x00FF0383:
220 			cpu_last_char='6';
221 			break;
222 		case 0x00FE0383:
223 			cpu_last_char='7';
224 			break;
225 		case 0x20FF0383:
226 			cpu_last_char='8';
227 			break;
228 		case 0x20FE0383:
229 			cpu_last_char='9';
230 			break;
231 		default:
232 			cpu_last_char='x';
233 	}
234 
235 	printf("Texas Instruments AM335%c Processor, Revision ES1.%u\n",
236 		cpu_last_char, AM335X_DEVREV(chip_revision));
237 }
238 
239 /**
240  *	ti_cpu_ident - attempts to identify the chip we are running on
241  *	@dummy: ignored
242  *
243  *	This function is called before any of the driver are initialised, however
244  *	the basic virt to phys maps have been setup in machdep.c so we can still
245  *	access the required registers, we just have to use direct register reads
246  *	and writes rather than going through the bus stuff.
247  *
248  *
249  */
250 static void
251 ti_cpu_ident(void *dummy)
252 {
253 	switch(ti_chip()) {
254 	case CHIP_OMAP_4:
255 		omap4_get_revision();
256 		break;
257 	case CHIP_AM335X:
258 		am335x_get_revision();
259 		break;
260 	default:
261 		panic("Unknown chip type, fixme!\n");
262 	}
263 }
264 
265 SYSINIT(ti_cpu_ident, SI_SUB_CPU, SI_ORDER_SECOND, ti_cpu_ident, NULL);
266