xref: /freebsd/sys/arm64/arm64/gic_v3_fdt.c (revision 38a52bd3)
1 /*-
2  * Copyright (c) 2015 The FreeBSD Foundation
3  *
4  * This software was developed by Semihalf under
5  * the sponsorship of the FreeBSD Foundation.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
31 
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/bitstring.h>
35 #include <sys/bus.h>
36 #include <sys/kernel.h>
37 #include <sys/module.h>
38 #include <sys/rman.h>
39 
40 #include <machine/intr.h>
41 #include <machine/resource.h>
42 
43 #include <dev/ofw/openfirm.h>
44 #include <dev/ofw/ofw_bus.h>
45 #include <dev/ofw/ofw_bus_subr.h>
46 
47 #include <arm/arm/gic_common.h>
48 #include "gic_v3_reg.h"
49 #include "gic_v3_var.h"
50 
51 /*
52  * FDT glue.
53  */
54 static int gic_v3_fdt_probe(device_t);
55 static int gic_v3_fdt_attach(device_t);
56 
57 static const struct ofw_bus_devinfo *gic_v3_ofw_get_devinfo(device_t, device_t);
58 static bus_get_resource_list_t gic_v3_fdt_get_resource_list;
59 
60 static device_method_t gic_v3_fdt_methods[] = {
61 	/* Device interface */
62 	DEVMETHOD(device_probe,		gic_v3_fdt_probe),
63 	DEVMETHOD(device_attach,	gic_v3_fdt_attach),
64 
65 	/* Bus interface */
66 	DEVMETHOD(bus_get_resource_list,	gic_v3_fdt_get_resource_list),
67 	DEVMETHOD(bus_get_device_path,  ofw_bus_gen_get_device_path),
68 
69 	/* ofw_bus interface */
70 	DEVMETHOD(ofw_bus_get_devinfo,	gic_v3_ofw_get_devinfo),
71 	DEVMETHOD(ofw_bus_get_compat,	ofw_bus_gen_get_compat),
72 	DEVMETHOD(ofw_bus_get_model,	ofw_bus_gen_get_model),
73 	DEVMETHOD(ofw_bus_get_name,	ofw_bus_gen_get_name),
74 	DEVMETHOD(ofw_bus_get_node,	ofw_bus_gen_get_node),
75 	DEVMETHOD(ofw_bus_get_type,	ofw_bus_gen_get_type),
76 
77 	/* End */
78 	DEVMETHOD_END
79 };
80 
81 DEFINE_CLASS_1(gic, gic_v3_fdt_driver, gic_v3_fdt_methods,
82     sizeof(struct gic_v3_softc), gic_v3_driver);
83 
84 EARLY_DRIVER_MODULE(gic_v3, simplebus, gic_v3_fdt_driver, 0, 0,
85     BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
86 EARLY_DRIVER_MODULE(gic_v3, ofwbus, gic_v3_fdt_driver, 0, 0,
87     BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
88 
89 /*
90  * Helper functions declarations.
91  */
92 static int gic_v3_ofw_bus_attach(device_t);
93 
94 /*
95  * Device interface.
96  */
97 static int
98 gic_v3_fdt_probe(device_t dev)
99 {
100 
101 	if (!ofw_bus_status_okay(dev))
102 		return (ENXIO);
103 
104 	if (!ofw_bus_is_compatible(dev, "arm,gic-v3"))
105 		return (ENXIO);
106 
107 	device_set_desc(dev, GIC_V3_DEVSTR);
108 	return (BUS_PROBE_DEFAULT);
109 }
110 
111 static int
112 gic_v3_fdt_attach(device_t dev)
113 {
114 	struct gic_v3_softc *sc;
115 	pcell_t redist_regions;
116 	intptr_t xref;
117 	int err;
118 	uint32_t *mbi_ranges;
119 	ssize_t ret;
120 
121 	sc = device_get_softc(dev);
122 	sc->dev = dev;
123 	sc->gic_bus = GIC_BUS_FDT;
124 
125 	/*
126 	 * Recover number of the Re-Distributor regions.
127 	 */
128 	if (OF_getencprop(ofw_bus_get_node(dev), "#redistributor-regions",
129 	    &redist_regions, sizeof(redist_regions)) <= 0)
130 		sc->gic_redists.nregions = 1;
131 	else
132 		sc->gic_redists.nregions = redist_regions;
133 
134 	/* Add Message Based Interrupts using SPIs. */
135 	ret = OF_getencprop_alloc_multi(ofw_bus_get_node(dev), "mbi-ranges",
136 	    sizeof(*mbi_ranges), (void **)&mbi_ranges);
137 	if (ret > 0) {
138 		if (ret % 2 == 0) {
139 			/* Limit to a single range for now. */
140 			sc->gic_mbi_start = mbi_ranges[0];
141 			sc->gic_mbi_end = mbi_ranges[0] + mbi_ranges[1];
142 		} else {
143 			if (bootverbose)
144 				device_printf(dev, "Malformed mbi-ranges property\n");
145 		}
146 		free(mbi_ranges, M_OFWPROP);
147 	}
148 
149 	err = gic_v3_attach(dev);
150 	if (err != 0)
151 		goto error;
152 
153 	xref = OF_xref_from_node(ofw_bus_get_node(dev));
154 	sc->gic_pic = intr_pic_register(dev, xref);
155 	if (sc->gic_pic == NULL) {
156 		device_printf(dev, "could not register PIC\n");
157 		err = ENXIO;
158 		goto error;
159 	}
160 
161 	if (sc->gic_mbi_start > 0)
162 		intr_msi_register(dev, xref);
163 
164 	/* Register xref */
165 	OF_device_register_xref(xref, dev);
166 
167 	if (intr_pic_claim_root(dev, xref, arm_gic_v3_intr, sc,
168 	    GIC_LAST_SGI - GIC_FIRST_SGI + 1) != 0) {
169 		err = ENXIO;
170 		goto error;
171 	}
172 
173 	/*
174 	 * Try to register ITS to this GIC.
175 	 * GIC will act as a bus in that case.
176 	 * Failure here will not affect main GIC functionality.
177 	 */
178 	if (gic_v3_ofw_bus_attach(dev) != 0) {
179 		if (bootverbose) {
180 			device_printf(dev,
181 			    "Failed to attach ITS to this GIC\n");
182 		}
183 	}
184 
185 	if (device_get_children(dev, &sc->gic_children, &sc->gic_nchildren) != 0)
186 		sc->gic_nchildren = 0;
187 
188 	return (err);
189 
190 error:
191 	if (bootverbose) {
192 		device_printf(dev,
193 		    "Failed to attach. Error %d\n", err);
194 	}
195 	/* Failure so free resources */
196 	gic_v3_detach(dev);
197 
198 	return (err);
199 }
200 
201 /* OFW bus interface */
202 struct gic_v3_ofw_devinfo {
203 	struct gic_v3_devinfo	di_gic_dinfo;
204 	struct ofw_bus_devinfo	di_dinfo;
205 	struct resource_list	di_rl;
206 };
207 
208 static const struct ofw_bus_devinfo *
209 gic_v3_ofw_get_devinfo(device_t bus __unused, device_t child)
210 {
211 	struct gic_v3_ofw_devinfo *di;
212 
213 	di = device_get_ivars(child);
214 	if (di->di_gic_dinfo.is_vgic)
215 		return (NULL);
216 	return (&di->di_dinfo);
217 }
218 
219 /* Helper functions */
220 static int
221 gic_v3_ofw_fill_ranges(phandle_t parent, struct gic_v3_softc *sc,
222     pcell_t *addr_cellsp, pcell_t *size_cellsp)
223 {
224 	pcell_t addr_cells, host_cells, size_cells;
225 	cell_t *base_ranges;
226 	ssize_t nbase_ranges;
227 	int i, j, k;
228 
229 	host_cells = 1;
230 	OF_getencprop(OF_parent(parent), "#address-cells", &host_cells,
231 	    sizeof(host_cells));
232 	addr_cells = 2;
233 	OF_getencprop(parent, "#address-cells", &addr_cells,
234 	    sizeof(addr_cells));
235 	size_cells = 2;
236 	OF_getencprop(parent, "#size-cells", &size_cells,
237 	    sizeof(size_cells));
238 
239 	*addr_cellsp = addr_cells;
240 	*size_cellsp = size_cells;
241 
242 	nbase_ranges = OF_getproplen(parent, "ranges");
243 	if (nbase_ranges < 0)
244 		return (EINVAL);
245 
246 	sc->nranges = nbase_ranges / sizeof(cell_t) /
247 	    (addr_cells + host_cells + size_cells);
248 	if (sc->nranges == 0)
249 		return (0);
250 
251 	sc->ranges = malloc(sc->nranges * sizeof(sc->ranges[0]), M_GIC_V3,
252 	    M_WAITOK);
253 	base_ranges = malloc(nbase_ranges, M_DEVBUF, M_WAITOK);
254 	OF_getencprop(parent, "ranges", base_ranges, nbase_ranges);
255 
256 	for (i = 0, j = 0; i < sc->nranges; i++) {
257 		sc->ranges[i].bus = 0;
258 		for (k = 0; k < addr_cells; k++) {
259 			sc->ranges[i].bus <<= 32;
260 			sc->ranges[i].bus |= base_ranges[j++];
261 		}
262 		sc->ranges[i].host = 0;
263 		for (k = 0; k < host_cells; k++) {
264 			sc->ranges[i].host <<= 32;
265 			sc->ranges[i].host |= base_ranges[j++];
266 		}
267 		sc->ranges[i].size = 0;
268 		for (k = 0; k < size_cells; k++) {
269 			sc->ranges[i].size <<= 32;
270 			sc->ranges[i].size |= base_ranges[j++];
271 		}
272 	}
273 
274 	free(base_ranges, M_DEVBUF);
275 	return (0);
276 }
277 
278 /*
279  * Bus capability support for GICv3.
280  * Collects and configures device informations and finally
281  * adds ITS device as a child of GICv3 in Newbus hierarchy.
282  */
283 static int
284 gic_v3_ofw_bus_attach(device_t dev)
285 {
286 	struct gic_v3_ofw_devinfo *di;
287 	struct gic_v3_softc *sc;
288 	device_t child;
289 	phandle_t parent, node;
290 	pcell_t addr_cells, size_cells;
291 	int rv;
292 
293 	sc = device_get_softc(dev);
294 	parent = ofw_bus_get_node(dev);
295 	if (parent > 0) {
296 		rv = gic_v3_ofw_fill_ranges(parent, sc, &addr_cells,
297 		    &size_cells);
298 		if (rv != 0)
299 			return (rv);
300 
301 		/* Iterate through all GIC subordinates */
302 		for (node = OF_child(parent); node > 0; node = OF_peer(node)) {
303 			/*
304 			 * Ignore children that lack a compatible property.
305 			 * Some of them may be for configuration, for example
306 			 * ppi-partitions.
307 			 */
308 			if (!OF_hasprop(node, "compatible"))
309 				continue;
310 
311 			/* Allocate and populate devinfo. */
312 			di = malloc(sizeof(*di), M_GIC_V3, M_WAITOK | M_ZERO);
313 
314 			/* Read the numa node, or -1 if there is none */
315 			if (OF_getencprop(node, "numa-node-id",
316 			    &di->di_gic_dinfo.gic_domain,
317 			    sizeof(di->di_gic_dinfo.gic_domain)) <= 0) {
318 				di->di_gic_dinfo.gic_domain = -1;
319 			}
320 
321 			if (ofw_bus_gen_setup_devinfo(&di->di_dinfo, node)) {
322 				if (bootverbose) {
323 					device_printf(dev,
324 					    "Could not set up devinfo for ITS\n");
325 				}
326 				free(di, M_GIC_V3);
327 				continue;
328 			}
329 
330 			/* Initialize and populate resource list. */
331 			resource_list_init(&di->di_rl);
332 			ofw_bus_reg_to_rl(dev, node, addr_cells, size_cells,
333 			    &di->di_rl);
334 
335 			/* Should not have any interrupts, so don't add any */
336 
337 			/* Add newbus device for this FDT node */
338 			child = device_add_child(dev, NULL, -1);
339 			if (!child) {
340 				if (bootverbose) {
341 					device_printf(dev,
342 					    "Could not add child: %s\n",
343 					    di->di_dinfo.obd_name);
344 				}
345 				resource_list_free(&di->di_rl);
346 				ofw_bus_gen_destroy_devinfo(&di->di_dinfo);
347 				free(di, M_GIC_V3);
348 				continue;
349 			}
350 
351 			sc->gic_nchildren++;
352 			device_set_ivars(child, di);
353 		}
354 	}
355 
356 	/*
357 	 * If there is a vgic maintanance interrupt add a virtual gic
358 	 * child so we can use this in the vmm module for bhyve.
359 	 */
360 	if (OF_hasprop(parent, "interrupts")) {
361 		child = device_add_child(dev, "vgic", -1);
362 		if (child == NULL) {
363 			device_printf(dev, "Could not add vgic child\n");
364 		} else {
365 			di = malloc(sizeof(*di), M_GIC_V3, M_WAITOK | M_ZERO);
366 			resource_list_init(&di->di_rl);
367 			di->di_gic_dinfo.gic_domain = -1;
368 			di->di_gic_dinfo.is_vgic = 1;
369 			device_set_ivars(child, di);
370 			sc->gic_nchildren++;
371 		}
372 	}
373 
374 	return (bus_generic_attach(dev));
375 }
376 
377 static struct resource_list *
378 gic_v3_fdt_get_resource_list(device_t bus, device_t child)
379 {
380 	struct gic_v3_ofw_devinfo *di;
381 
382 	di = device_get_ivars(child);
383 	KASSERT(di != NULL, ("%s: No devinfo", __func__));
384 
385 	return (&di->di_rl);
386 }
387