17daf9652SSøren Schmidt /*-
290737b63SGanbold Tsagaankhuu * SPDX-License-Identifier: BSD-2-Clause
30d4a240bSGanbold Tsagaankhuu *
47daf9652SSøren Schmidt * Copyright (c) 2021, 2022 Soren Schmidt <sos@deepcore.dk>
57daf9652SSøren Schmidt *
67daf9652SSøren Schmidt * Redistribution and use in source and binary forms, with or without
77daf9652SSøren Schmidt * modification, are permitted provided that the following conditions
87daf9652SSøren Schmidt * are met:
97daf9652SSøren Schmidt * 1. Redistributions of source code must retain the above copyright
107daf9652SSøren Schmidt * notice, this list of conditions and the following disclaimer.
117daf9652SSøren Schmidt * 2. Redistributions in binary form must reproduce the above copyright
127daf9652SSøren Schmidt * notice, this list of conditions and the following disclaimer in the
137daf9652SSøren Schmidt * documentation and/or other materials provided with the distribution.
147daf9652SSøren Schmidt *
157daf9652SSøren Schmidt * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
167daf9652SSøren Schmidt * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
177daf9652SSøren Schmidt * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
187daf9652SSøren Schmidt * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
197daf9652SSøren Schmidt * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
207daf9652SSøren Schmidt * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
217daf9652SSøren Schmidt * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
227daf9652SSøren Schmidt * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
237daf9652SSøren Schmidt * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
247daf9652SSøren Schmidt * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
257daf9652SSøren Schmidt * SUCH DAMAGE.
267daf9652SSøren Schmidt *
277daf9652SSøren Schmidt */
287daf9652SSøren Schmidt
297daf9652SSøren Schmidt #include <sys/param.h>
307daf9652SSøren Schmidt #include <sys/bus.h>
317daf9652SSøren Schmidt #include <sys/kernel.h>
327daf9652SSøren Schmidt #include <sys/module.h>
337daf9652SSøren Schmidt #include <sys/mutex.h>
347daf9652SSøren Schmidt #include <sys/rman.h>
357daf9652SSøren Schmidt #include <machine/bus.h>
367daf9652SSøren Schmidt
377daf9652SSøren Schmidt #include <dev/ofw/openfirm.h>
387daf9652SSøren Schmidt #include <dev/ofw/ofw_bus.h>
397daf9652SSøren Schmidt #include <dev/ofw/ofw_bus_subr.h>
407daf9652SSøren Schmidt
417daf9652SSøren Schmidt #include <dev/fdt/simple_mfd.h>
427daf9652SSøren Schmidt
43be82b3a0SEmmanuel Vadot #include <dev/clk/clk.h>
441f469a9fSEmmanuel Vadot #include <dev/hwreset/hwreset.h>
45b2f0caf1SEmmanuel Vadot #include <dev/regulator/regulator.h>
4662e8ccc3SEmmanuel Vadot #include <dev/syscon/syscon.h>
47950a6087SEmmanuel Vadot #include <dev/phy/phy.h>
487daf9652SSøren Schmidt
497daf9652SSøren Schmidt #include <contrib/device-tree/include/dt-bindings/phy/phy.h>
507daf9652SSøren Schmidt
517daf9652SSøren Schmidt #include "syscon_if.h"
527daf9652SSøren Schmidt #include "phydev_if.h"
537daf9652SSøren Schmidt #include "phynode_if.h"
547daf9652SSøren Schmidt
557daf9652SSøren Schmidt #define GRF_PCIE30PHY_CON1 0x04
567daf9652SSøren Schmidt #define GRF_PCIE30PHY_CON4 0x10
57396b6914SGanbold Tsagaankhuu #define GRF_PCIE30PHY_CON5 0x14
587daf9652SSøren Schmidt #define GRF_PCIE30PHY_CON6 0x18
594720afafSGanbold Tsagaankhuu #define GRF_BIFURCATION_LANE_1 0
604720afafSGanbold Tsagaankhuu #define GRF_BIFURCATION_LANE_2 1
617daf9652SSøren Schmidt #define GRF_PCIE30PHY_WR_EN (0xf << 16)
627daf9652SSøren Schmidt #define GRF_PCIE30PHY_CON9 0x24
634720afafSGanbold Tsagaankhuu #define GRF_PCIE30PHY_DA_OCM_MASK (1 << (15 + 16))
644720afafSGanbold Tsagaankhuu #define GRF_PCIE30PHY_DA_OCM ((1 << 15) | GRF_PCIE30PHY_DA_OCM_MASK)
657daf9652SSøren Schmidt #define GRF_PCIE30PHY_STATUS0 0x80
667daf9652SSøren Schmidt #define SRAM_INIT_DONE (1 << 14)
677daf9652SSøren Schmidt
687daf9652SSøren Schmidt static struct ofw_compat_data compat_data[] = {
697daf9652SSøren Schmidt {"rockchip,rk3568-pcie3-phy", 1},
707daf9652SSøren Schmidt {NULL, 0}
717daf9652SSøren Schmidt };
727daf9652SSøren Schmidt
737daf9652SSøren Schmidt struct rk3568_pciephy_softc {
747daf9652SSøren Schmidt device_t dev;
757daf9652SSøren Schmidt phandle_t node;
767daf9652SSøren Schmidt struct resource *mem;
777daf9652SSøren Schmidt struct phynode *phynode;
787daf9652SSøren Schmidt struct syscon *phy_grf;
797daf9652SSøren Schmidt clk_t refclk_m;
807daf9652SSøren Schmidt clk_t refclk_n;
817daf9652SSøren Schmidt clk_t pclk;
827daf9652SSøren Schmidt hwreset_t phy_reset;
837daf9652SSøren Schmidt };
847daf9652SSøren Schmidt
857daf9652SSøren Schmidt
864720afafSGanbold Tsagaankhuu static void
rk3568_pciephy_bifurcate(device_t dev,int control,uint32_t lane)874720afafSGanbold Tsagaankhuu rk3568_pciephy_bifurcate(device_t dev, int control, uint32_t lane)
884720afafSGanbold Tsagaankhuu {
894720afafSGanbold Tsagaankhuu struct rk3568_pciephy_softc *sc = device_get_softc(dev);
904720afafSGanbold Tsagaankhuu
914720afafSGanbold Tsagaankhuu switch (lane) {
924720afafSGanbold Tsagaankhuu case 0:
934720afafSGanbold Tsagaankhuu SYSCON_WRITE_4(sc->phy_grf, control, GRF_PCIE30PHY_WR_EN);
944720afafSGanbold Tsagaankhuu return;
954720afafSGanbold Tsagaankhuu case 1:
964720afafSGanbold Tsagaankhuu SYSCON_WRITE_4(sc->phy_grf, control,
974720afafSGanbold Tsagaankhuu GRF_PCIE30PHY_WR_EN | GRF_BIFURCATION_LANE_1);
984720afafSGanbold Tsagaankhuu break;
994720afafSGanbold Tsagaankhuu case 2:
1004720afafSGanbold Tsagaankhuu SYSCON_WRITE_4(sc->phy_grf, control,
1014720afafSGanbold Tsagaankhuu GRF_PCIE30PHY_WR_EN | GRF_BIFURCATION_LANE_2);
1024720afafSGanbold Tsagaankhuu break;
1034720afafSGanbold Tsagaankhuu default:
1044720afafSGanbold Tsagaankhuu device_printf(dev, "Illegal lane %d\n", lane);
1054720afafSGanbold Tsagaankhuu return;
1064720afafSGanbold Tsagaankhuu }
1074720afafSGanbold Tsagaankhuu if (bootverbose)
1084720afafSGanbold Tsagaankhuu device_printf(dev, "lane %d @ pcie3x%d\n", lane,
1094720afafSGanbold Tsagaankhuu (control == GRF_PCIE30PHY_CON5) ? 1 : 2);
1104720afafSGanbold Tsagaankhuu }
1114720afafSGanbold Tsagaankhuu
1127daf9652SSøren Schmidt /* PHY class and methods */
1137daf9652SSøren Schmidt static int
rk3568_pciephy_enable(struct phynode * phynode,bool enable)1147daf9652SSøren Schmidt rk3568_pciephy_enable(struct phynode *phynode, bool enable)
1157daf9652SSøren Schmidt {
1167daf9652SSøren Schmidt device_t dev = phynode_get_device(phynode);
1177daf9652SSøren Schmidt struct rk3568_pciephy_softc *sc = device_get_softc(dev);
1187daf9652SSøren Schmidt int count;
1197daf9652SSøren Schmidt
1207daf9652SSøren Schmidt if (enable) {
1214720afafSGanbold Tsagaankhuu /* Pull PHY out of reset */
1227daf9652SSøren Schmidt hwreset_deassert(sc->phy_reset);
1237daf9652SSøren Schmidt
1247daf9652SSøren Schmidt /* Poll for SRAM loaded and ready */
1257daf9652SSøren Schmidt for (count = 100; count; count--) {
1267daf9652SSøren Schmidt if (SYSCON_READ_4(sc->phy_grf, GRF_PCIE30PHY_STATUS0) &
1277daf9652SSøren Schmidt SRAM_INIT_DONE)
1287daf9652SSøren Schmidt break;
1297daf9652SSøren Schmidt DELAY(10000);
1307daf9652SSøren Schmidt if (count == 0) {
1317daf9652SSøren Schmidt device_printf(dev, "SRAM init timeout!\n");
1327daf9652SSøren Schmidt return (ENXIO);
1337daf9652SSøren Schmidt }
1347daf9652SSøren Schmidt }
1357daf9652SSøren Schmidt }
1367daf9652SSøren Schmidt return (0);
1377daf9652SSøren Schmidt }
1387daf9652SSøren Schmidt
1397daf9652SSøren Schmidt static phynode_method_t rk3568_pciephy_phynode_methods[] = {
1407daf9652SSøren Schmidt PHYNODEMETHOD(phynode_enable, rk3568_pciephy_enable),
1417daf9652SSøren Schmidt
1427daf9652SSøren Schmidt PHYNODEMETHOD_END
1437daf9652SSøren Schmidt };
1447daf9652SSøren Schmidt DEFINE_CLASS_1(rk3568_pciephy_phynode, rk3568_pciephy_phynode_class,
1457daf9652SSøren Schmidt rk3568_pciephy_phynode_methods, 0, phynode_class);
1467daf9652SSøren Schmidt
1477daf9652SSøren Schmidt
1487daf9652SSøren Schmidt /* Device class and methods */
1497daf9652SSøren Schmidt static int
rk3568_pciephy_probe(device_t dev)1507daf9652SSøren Schmidt rk3568_pciephy_probe(device_t dev)
1517daf9652SSøren Schmidt {
1527daf9652SSøren Schmidt
1537daf9652SSøren Schmidt if (!ofw_bus_status_okay(dev))
1547daf9652SSøren Schmidt return (ENXIO);
1557daf9652SSøren Schmidt if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
1567daf9652SSøren Schmidt return (ENXIO);
1577daf9652SSøren Schmidt device_set_desc(dev, "RockChip PCIe PHY");
1587daf9652SSøren Schmidt return (BUS_PROBE_DEFAULT);
1597daf9652SSøren Schmidt }
1607daf9652SSøren Schmidt
1617daf9652SSøren Schmidt static int
rk3568_pciephy_attach(device_t dev)1627daf9652SSøren Schmidt rk3568_pciephy_attach(device_t dev)
1637daf9652SSøren Schmidt {
1647daf9652SSøren Schmidt struct rk3568_pciephy_softc *sc = device_get_softc(dev);
1657daf9652SSøren Schmidt struct phynode_init_def phy_init;
1667daf9652SSøren Schmidt struct phynode *phynode;
1674720afafSGanbold Tsagaankhuu uint32_t data_lanes[2] = { 0, 0 };
1687daf9652SSøren Schmidt int rid = 0;
1697daf9652SSøren Schmidt
1707daf9652SSøren Schmidt sc->dev = dev;
1717daf9652SSøren Schmidt sc->node = ofw_bus_get_node(dev);
1727daf9652SSøren Schmidt
1737daf9652SSøren Schmidt /* Get memory resource */
1747daf9652SSøren Schmidt if (!(sc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
1757daf9652SSøren Schmidt RF_ACTIVE))) {
1767daf9652SSøren Schmidt device_printf(dev, "Cannot allocate memory resources\n");
1777daf9652SSøren Schmidt return (ENXIO);
1787daf9652SSøren Schmidt }
1797daf9652SSøren Schmidt
1807daf9652SSøren Schmidt /* Get syncons handle */
1817daf9652SSøren Schmidt if (OF_hasprop(sc->node, "rockchip,phy-grf") &&
1827daf9652SSøren Schmidt syscon_get_by_ofw_property(dev, sc->node, "rockchip,phy-grf",
1837daf9652SSøren Schmidt &sc->phy_grf))
1847daf9652SSøren Schmidt return (ENXIO);
1857daf9652SSøren Schmidt
1867daf9652SSøren Schmidt /* Get & enable clocks */
1877daf9652SSøren Schmidt if (clk_get_by_ofw_name(dev, 0, "refclk_m", &sc->refclk_m)) {
1887daf9652SSøren Schmidt device_printf(dev, "getting refclk_m failed\n");
1897daf9652SSøren Schmidt return (ENXIO);
1907daf9652SSøren Schmidt }
1917daf9652SSøren Schmidt if (clk_enable(sc->refclk_m))
1927daf9652SSøren Schmidt device_printf(dev, "enable refclk_m failed\n");
1937daf9652SSøren Schmidt if (clk_get_by_ofw_name(dev, 0, "refclk_n", &sc->refclk_n)) {
1947daf9652SSøren Schmidt device_printf(dev, "getting refclk_n failed\n");
1957daf9652SSøren Schmidt return (ENXIO);
1967daf9652SSøren Schmidt }
1977daf9652SSøren Schmidt if (clk_enable(sc->refclk_n))
1987daf9652SSøren Schmidt device_printf(dev, "enable refclk_n failed\n");
1997daf9652SSøren Schmidt if (clk_get_by_ofw_name(dev, 0, "pclk", &sc->pclk)) {
2007daf9652SSøren Schmidt device_printf(dev, "getting pclk failed\n");
2017daf9652SSøren Schmidt return (ENXIO);
2027daf9652SSøren Schmidt }
2037daf9652SSøren Schmidt if (clk_enable(sc->pclk))
2047daf9652SSøren Schmidt device_printf(dev, "enable pclk failed\n");
2057daf9652SSøren Schmidt
2067daf9652SSøren Schmidt /* Get & assert reset */
2077daf9652SSøren Schmidt if (hwreset_get_by_ofw_idx(dev, sc->node, 0, &sc->phy_reset)) {
2087daf9652SSøren Schmidt device_printf(dev, "Cannot get reset\n");
20937d97b10SGanbold Tsagaankhuu } else
2107daf9652SSøren Schmidt hwreset_assert(sc->phy_reset);
2117daf9652SSøren Schmidt
2127daf9652SSøren Schmidt /* Set RC/EP mode not implemented yet (RC mode only) */
2137daf9652SSøren Schmidt
2144720afafSGanbold Tsagaankhuu /* Set bifurcation according to "data-lanes" entry */
2154720afafSGanbold Tsagaankhuu if (OF_hasprop(sc->node, "data-lanes")) {
2164720afafSGanbold Tsagaankhuu OF_getencprop(sc->node, "data-lanes", data_lanes,
2174720afafSGanbold Tsagaankhuu sizeof(data_lanes));
21837d97b10SGanbold Tsagaankhuu } else
2194720afafSGanbold Tsagaankhuu if (bootverbose)
2204720afafSGanbold Tsagaankhuu device_printf(dev, "lane 1 & 2 @pcie3x2\n");
2214720afafSGanbold Tsagaankhuu
2224720afafSGanbold Tsagaankhuu /* Deassert PCIe PMA output clamp mode */
2234720afafSGanbold Tsagaankhuu SYSCON_WRITE_4(sc->phy_grf, GRF_PCIE30PHY_CON9, GRF_PCIE30PHY_DA_OCM);
2244720afafSGanbold Tsagaankhuu
2254720afafSGanbold Tsagaankhuu /* Configure PHY HW accordingly */
2264720afafSGanbold Tsagaankhuu rk3568_pciephy_bifurcate(dev, GRF_PCIE30PHY_CON5, data_lanes[0]);
2274720afafSGanbold Tsagaankhuu rk3568_pciephy_bifurcate(dev, GRF_PCIE30PHY_CON6, data_lanes[1]);
2284720afafSGanbold Tsagaankhuu
2294720afafSGanbold Tsagaankhuu if (data_lanes[0] || data_lanes[1])
2304720afafSGanbold Tsagaankhuu SYSCON_WRITE_4(sc->phy_grf, GRF_PCIE30PHY_CON1,
2314720afafSGanbold Tsagaankhuu GRF_PCIE30PHY_DA_OCM);
2324720afafSGanbold Tsagaankhuu else
2334720afafSGanbold Tsagaankhuu SYSCON_WRITE_4(sc->phy_grf, GRF_PCIE30PHY_CON1,
2344720afafSGanbold Tsagaankhuu GRF_PCIE30PHY_DA_OCM_MASK);
2354720afafSGanbold Tsagaankhuu
2367daf9652SSøren Schmidt bzero(&phy_init, sizeof(phy_init));
2377daf9652SSøren Schmidt phy_init.id = PHY_NONE;
2387daf9652SSøren Schmidt phy_init.ofw_node = sc->node;
2397daf9652SSøren Schmidt if (!(phynode = phynode_create(dev, &rk3568_pciephy_phynode_class,
2407daf9652SSøren Schmidt &phy_init))) {
2417daf9652SSøren Schmidt device_printf(dev, "failed to create pciephy PHY\n");
2427daf9652SSøren Schmidt return (ENXIO);
2437daf9652SSøren Schmidt }
2447daf9652SSøren Schmidt if (!phynode_register(phynode)) {
2457daf9652SSøren Schmidt device_printf(dev, "failed to register pciephy PHY\n");
2467daf9652SSøren Schmidt return (ENXIO);
2477daf9652SSøren Schmidt }
2487daf9652SSøren Schmidt sc->phynode = phynode;
2497daf9652SSøren Schmidt
2507daf9652SSøren Schmidt return (0);
2517daf9652SSøren Schmidt }
2527daf9652SSøren Schmidt
2537daf9652SSøren Schmidt static device_method_t rk3568_pciephy_methods[] = {
2547daf9652SSøren Schmidt DEVMETHOD(device_probe, rk3568_pciephy_probe),
2557daf9652SSøren Schmidt DEVMETHOD(device_attach, rk3568_pciephy_attach),
2567daf9652SSøren Schmidt
2577daf9652SSøren Schmidt DEVMETHOD_END
2587daf9652SSøren Schmidt };
2597daf9652SSøren Schmidt
2607daf9652SSøren Schmidt DEFINE_CLASS_1(rk3568_pciephy, rk3568_pciephy_driver, rk3568_pciephy_methods,
2617daf9652SSøren Schmidt sizeof(struct simple_mfd_softc), simple_mfd_driver);
2627daf9652SSøren Schmidt EARLY_DRIVER_MODULE(rk3568_pciephy, simplebus, rk3568_pciephy_driver,
2637daf9652SSøren Schmidt 0, 0, BUS_PASS_RESOURCE + BUS_PASS_ORDER_LATE);
264