1 /****************************************************************************** 2 * 3 * Module Name: dmtbinfo2 - Table info for non-AML tables 4 * 5 *****************************************************************************/ 6 7 /****************************************************************************** 8 * 9 * 1. Copyright Notice 10 * 11 * Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp. 12 * All rights reserved. 13 * 14 * 2. License 15 * 16 * 2.1. This is your license from Intel Corp. under its intellectual property 17 * rights. You may have additional license terms from the party that provided 18 * you this software, covering your right to use that party's intellectual 19 * property rights. 20 * 21 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a 22 * copy of the source code appearing in this file ("Covered Code") an 23 * irrevocable, perpetual, worldwide license under Intel's copyrights in the 24 * base code distributed originally by Intel ("Original Intel Code") to copy, 25 * make derivatives, distribute, use and display any portion of the Covered 26 * Code in any form, with the right to sublicense such rights; and 27 * 28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 29 * license (with the right to sublicense), under only those claims of Intel 30 * patents that are infringed by the Original Intel Code, to make, use, sell, 31 * offer to sell, and import the Covered Code and derivative works thereof 32 * solely to the minimum extent necessary to exercise the above copyright 33 * license, and in no event shall the patent license extend to any additions 34 * to or modifications of the Original Intel Code. No other license or right 35 * is granted directly or by implication, estoppel or otherwise; 36 * 37 * The above copyright and patent license is granted only if the following 38 * conditions are met: 39 * 40 * 3. Conditions 41 * 42 * 3.1. Redistribution of Source with Rights to Further Distribute Source. 43 * Redistribution of source code of any substantial portion of the Covered 44 * Code or modification with rights to further distribute source must include 45 * the above Copyright Notice, the above License, this list of Conditions, 46 * and the following Disclaimer and Export Compliance provision. In addition, 47 * Licensee must cause all Covered Code to which Licensee contributes to 48 * contain a file documenting the changes Licensee made to create that Covered 49 * Code and the date of any change. Licensee must include in that file the 50 * documentation of any changes made by any predecessor Licensee. Licensee 51 * must include a prominent statement that the modification is derived, 52 * directly or indirectly, from Original Intel Code. 53 * 54 * 3.2. Redistribution of Source with no Rights to Further Distribute Source. 55 * Redistribution of source code of any substantial portion of the Covered 56 * Code or modification without rights to further distribute source must 57 * include the following Disclaimer and Export Compliance provision in the 58 * documentation and/or other materials provided with distribution. In 59 * addition, Licensee may not authorize further sublicense of source of any 60 * portion of the Covered Code, and must include terms to the effect that the 61 * license from Licensee to its licensee is limited to the intellectual 62 * property embodied in the software Licensee provides to its licensee, and 63 * not to intellectual property embodied in modifications its licensee may 64 * make. 65 * 66 * 3.3. Redistribution of Executable. Redistribution in executable form of any 67 * substantial portion of the Covered Code or modification must reproduce the 68 * above Copyright Notice, and the following Disclaimer and Export Compliance 69 * provision in the documentation and/or other materials provided with the 70 * distribution. 71 * 72 * 3.4. Intel retains all right, title, and interest in and to the Original 73 * Intel Code. 74 * 75 * 3.5. Neither the name Intel nor any other trademark owned or controlled by 76 * Intel shall be used in advertising or otherwise to promote the sale, use or 77 * other dealings in products derived from or relating to the Covered Code 78 * without prior written authorization from Intel. 79 * 80 * 4. Disclaimer and Export Compliance 81 * 82 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED 83 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE 84 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, 85 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY 86 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY 87 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A 88 * PARTICULAR PURPOSE. 89 * 90 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES 91 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR 92 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, 93 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY 94 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL 95 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS 96 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY 97 * LIMITED REMEDY. 98 * 99 * 4.3. Licensee shall not export, either directly or indirectly, any of this 100 * software or system incorporating such software without first obtaining any 101 * required license or other approval from the U. S. Department of Commerce or 102 * any other agency or department of the United States Government. In the 103 * event Licensee exports any such software from the United States or 104 * re-exports any such software from a foreign destination, Licensee shall 105 * ensure that the distribution and export/re-export of the software is in 106 * compliance with all laws, regulations, orders, or other restrictions of the 107 * U.S. Export Administration Regulations. Licensee agrees that neither it nor 108 * any of its subsidiaries will export/re-export any technical data, process, 109 * software, or service, directly or indirectly, to any country for which the 110 * United States government or any agency thereof requires an export license, 111 * other governmental approval, or letter of assurance, without first obtaining 112 * such license, approval or letter. 113 * 114 ***************************************************************************** 115 * 116 * Alternatively, you may choose to be licensed under the terms of the 117 * following license: 118 * 119 * Redistribution and use in source and binary forms, with or without 120 * modification, are permitted provided that the following conditions 121 * are met: 122 * 1. Redistributions of source code must retain the above copyright 123 * notice, this list of conditions, and the following disclaimer, 124 * without modification. 125 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 126 * substantially similar to the "NO WARRANTY" disclaimer below 127 * ("Disclaimer") and any redistribution must be conditioned upon 128 * including a substantially similar Disclaimer requirement for further 129 * binary redistribution. 130 * 3. Neither the names of the above-listed copyright holders nor the names 131 * of any contributors may be used to endorse or promote products derived 132 * from this software without specific prior written permission. 133 * 134 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 135 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 136 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 137 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 138 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 139 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 140 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 141 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 142 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 143 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 144 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 145 * 146 * Alternatively, you may choose to be licensed under the terms of the 147 * GNU General Public License ("GPL") version 2 as published by the Free 148 * Software Foundation. 149 * 150 *****************************************************************************/ 151 152 #include <contrib/dev/acpica/include/acpi.h> 153 #include <contrib/dev/acpica/include/accommon.h> 154 #include <contrib/dev/acpica/include/acdisasm.h> 155 #include <contrib/dev/acpica/include/actbinfo.h> 156 157 /* This module used for application-level code only */ 158 159 #define _COMPONENT ACPI_CA_DISASSEMBLER 160 ACPI_MODULE_NAME ("dmtbinfo2") 161 162 /* 163 * How to add a new table: 164 * 165 * - Add the C table definition to the actbl1.h or actbl2.h header. 166 * - Add ACPI_xxxx_OFFSET macro(s) for the table (and subtables) to list below. 167 * - Define the table in this file (for the disassembler). If any 168 * new data types are required (ACPI_DMT_*), see below. 169 * - Add an external declaration for the new table definition (AcpiDmTableInfo*) 170 * in acdisam.h 171 * - Add new table definition to the dispatch table in dmtable.c (AcpiDmTableData) 172 * If a simple table (with no subtables), no disassembly code is needed. 173 * Otherwise, create the AcpiDmDump* function for to disassemble the table 174 * and add it to the dmtbdump.c file. 175 * - Add an external declaration for the new AcpiDmDump* function in acdisasm.h 176 * - Add the new AcpiDmDump* function to the dispatch table in dmtable.c 177 * - Create a template for the new table 178 * - Add data table compiler support 179 * 180 * How to add a new data type (ACPI_DMT_*): 181 * 182 * - Add new type at the end of the ACPI_DMT list in acdisasm.h 183 * - Add length and implementation cases in dmtable.c (disassembler) 184 * - Add type and length cases in dtutils.c (DT compiler) 185 */ 186 187 /* 188 * Remaining tables are not consumed directly by the ACPICA subsystem 189 */ 190 191 /******************************************************************************* 192 * 193 * AGDI - Arm Generic Diagnostic Dump and Reset Device Interface 194 * 195 * Conforms to "ACPI for Arm Components 1.1, Platform Design Document" 196 * ARM DEN0093 v1.1 197 * 198 ******************************************************************************/ 199 200 ACPI_DMTABLE_INFO AcpiDmTableInfoAgdi[] = 201 { 202 {ACPI_DMT_UINT8, ACPI_AGDI_OFFSET (Flags), "Flags (decoded below)", 0}, 203 {ACPI_DMT_FLAG0, ACPI_AGDI_FLAG_OFFSET (Flags, 0), "Signalling mode", 0}, 204 {ACPI_DMT_UINT24, ACPI_AGDI_OFFSET (Reserved[0]), "Reserved", 0}, 205 {ACPI_DMT_UINT32, ACPI_AGDI_OFFSET (SdeiEvent), "SdeiEvent", 0}, 206 {ACPI_DMT_UINT32, ACPI_AGDI_OFFSET (Gsiv), "Gsiv", 0}, 207 ACPI_DMT_TERMINATOR 208 }; 209 210 211 /******************************************************************************* 212 * 213 * APMT - ARM Performance Monitoring Unit Table 214 * 215 * Conforms to: 216 * ARM Performance Monitoring Unit Architecture 1.0 Platform Design Document 217 * ARM DEN0117 v1.0 November 25, 2021 218 * 219 ******************************************************************************/ 220 221 ACPI_DMTABLE_INFO AcpiDmTableInfoApmtNode[] = 222 { 223 {ACPI_DMT_UINT16, ACPI_APMTN_OFFSET (Length), "Length of APMT Node", 0}, 224 {ACPI_DMT_UINT8, ACPI_APMTN_OFFSET (Flags), "Node Flags", 0}, 225 {ACPI_DMT_FLAG0, ACPI_APMTN_FLAG_OFFSET (Flags, 0), "Dual Page Extension", 0}, 226 {ACPI_DMT_FLAG1, ACPI_APMTN_FLAG_OFFSET (Flags, 0), "Processor Affinity Type", 0}, 227 {ACPI_DMT_FLAG2, ACPI_APMTN_FLAG_OFFSET (Flags, 0), "64-bit Atomic Support", 0}, 228 {ACPI_DMT_UINT8, ACPI_APMTN_OFFSET (Type), "Node Type", 0}, 229 {ACPI_DMT_UINT32, ACPI_APMTN_OFFSET (Id), "Unique Node Identifier", 0}, 230 {ACPI_DMT_UINT64, ACPI_APMTN_OFFSET (InstPrimary), "Primary Node Instance", 0}, 231 {ACPI_DMT_UINT32, ACPI_APMTN_OFFSET (InstSecondary), "Secondary Node Instance", 0}, 232 {ACPI_DMT_UINT64, ACPI_APMTN_OFFSET (BaseAddress0), "Page 0 Base Address", 0}, 233 {ACPI_DMT_UINT64, ACPI_APMTN_OFFSET (BaseAddress1), "Page 1 Base Address", 0}, 234 {ACPI_DMT_UINT32, ACPI_APMTN_OFFSET (OvflwIrq), "Overflow Interrupt ID", 0}, 235 {ACPI_DMT_UINT32, ACPI_APMTN_OFFSET (Reserved), "Reserved", 0}, 236 {ACPI_DMT_UINT32, ACPI_APMTN_OFFSET (OvflwIrqFlags), "Overflow Interrupt Flags", 0}, 237 {ACPI_DMT_FLAG0, ACPI_APMTN_FLAG_OFFSET (OvflwIrqFlags, 0), "Interrupt Mode", 0}, 238 {ACPI_DMT_FLAG1, ACPI_APMTN_FLAG_OFFSET (OvflwIrqFlags, 0), "Interrupt Type", 0}, 239 {ACPI_DMT_UINT32, ACPI_APMTN_OFFSET (ProcAffinity), "Processor Affinity", 0}, 240 {ACPI_DMT_UINT32, ACPI_APMTN_OFFSET (ImplId), "Implementation ID", 0}, 241 ACPI_DMT_TERMINATOR 242 }; 243 244 245 /******************************************************************************* 246 * 247 * IORT - IO Remapping Table 248 * 249 ******************************************************************************/ 250 251 ACPI_DMTABLE_INFO AcpiDmTableInfoIort[] = 252 { 253 {ACPI_DMT_UINT32, ACPI_IORT_OFFSET (NodeCount), "Node Count", 0}, 254 {ACPI_DMT_UINT32, ACPI_IORT_OFFSET (NodeOffset), "Node Offset", 0}, 255 {ACPI_DMT_UINT32, ACPI_IORT_OFFSET (Reserved), "Reserved", 0}, 256 ACPI_DMT_TERMINATOR 257 }; 258 259 /* Optional padding field */ 260 261 ACPI_DMTABLE_INFO AcpiDmTableInfoIortPad[] = 262 { 263 {ACPI_DMT_RAW_BUFFER, 0, "Optional Padding", DT_OPTIONAL}, 264 ACPI_DMT_TERMINATOR 265 }; 266 267 /* Common Subtable header (one per Subtable) */ 268 269 ACPI_DMTABLE_INFO AcpiDmTableInfoIortHdr[] = 270 { 271 {ACPI_DMT_UINT8, ACPI_IORTH_OFFSET (Type), "Type", 0}, 272 {ACPI_DMT_UINT16, ACPI_IORTH_OFFSET (Length), "Length", DT_LENGTH}, 273 {ACPI_DMT_UINT8, ACPI_IORTH_OFFSET (Revision), "Revision", 0}, 274 {ACPI_DMT_UINT32, ACPI_IORTH_OFFSET (Identifier), "Reserved", 0}, 275 {ACPI_DMT_UINT32, ACPI_IORTH_OFFSET (MappingCount), "Mapping Count", 0}, 276 {ACPI_DMT_UINT32, ACPI_IORTH_OFFSET (MappingOffset), "Mapping Offset", 0}, 277 ACPI_DMT_TERMINATOR 278 }; 279 280 /* Common Subtable header (one per Subtable)- Revision 3 */ 281 282 ACPI_DMTABLE_INFO AcpiDmTableInfoIortHdr3[] = 283 { 284 {ACPI_DMT_UINT8, ACPI_IORTH_OFFSET (Type), "Type", 0}, 285 {ACPI_DMT_UINT16, ACPI_IORTH_OFFSET (Length), "Length", DT_LENGTH}, 286 {ACPI_DMT_UINT8, ACPI_IORTH_OFFSET (Revision), "Revision", 0}, 287 {ACPI_DMT_UINT32, ACPI_IORTH_OFFSET (Identifier), "Identifier", 0}, 288 {ACPI_DMT_UINT32, ACPI_IORTH_OFFSET (MappingCount), "Mapping Count", 0}, 289 {ACPI_DMT_UINT32, ACPI_IORTH_OFFSET (MappingOffset), "Mapping Offset", 0}, 290 ACPI_DMT_TERMINATOR 291 }; 292 293 ACPI_DMTABLE_INFO AcpiDmTableInfoIortMap[] = 294 { 295 {ACPI_DMT_UINT32, ACPI_IORTM_OFFSET (InputBase), "Input base", DT_OPTIONAL}, 296 {ACPI_DMT_UINT32, ACPI_IORTM_OFFSET (IdCount), "ID Count", 0}, 297 {ACPI_DMT_UINT32, ACPI_IORTM_OFFSET (OutputBase), "Output Base", 0}, 298 {ACPI_DMT_UINT32, ACPI_IORTM_OFFSET (OutputReference), "Output Reference", 0}, 299 {ACPI_DMT_UINT32, ACPI_IORTM_OFFSET (Flags), "Flags (decoded below)", 0}, 300 {ACPI_DMT_FLAG0, ACPI_IORTM_FLAG_OFFSET (Flags, 0), "Single Mapping", 0}, 301 ACPI_DMT_TERMINATOR 302 }; 303 304 ACPI_DMTABLE_INFO AcpiDmTableInfoIortAcc[] = 305 { 306 {ACPI_DMT_UINT32, ACPI_IORTA_OFFSET (CacheCoherency), "Cache Coherency", 0}, 307 {ACPI_DMT_UINT8, ACPI_IORTA_OFFSET (Hints), "Hints (decoded below)", 0}, 308 {ACPI_DMT_FLAG0, ACPI_IORTA_FLAG_OFFSET (Hints, 0), "Transient", 0}, 309 {ACPI_DMT_FLAG1, ACPI_IORTA_FLAG_OFFSET (Hints, 0), "Write Allocate", 0}, 310 {ACPI_DMT_FLAG2, ACPI_IORTA_FLAG_OFFSET (Hints, 0), "Read Allocate", 0}, 311 {ACPI_DMT_FLAG3, ACPI_IORTA_FLAG_OFFSET (Hints, 0), "Override", 0}, 312 {ACPI_DMT_UINT16, ACPI_IORTA_OFFSET (Reserved), "Reserved", 0}, 313 {ACPI_DMT_UINT8, ACPI_IORTA_OFFSET (MemoryFlags), "Memory Flags (decoded below)", 0}, 314 {ACPI_DMT_FLAG0, ACPI_IORTA_FLAG_OFFSET (MemoryFlags, 0), "Coherency", 0}, 315 {ACPI_DMT_FLAG1, ACPI_IORTA_FLAG_OFFSET (MemoryFlags, 0), "Device Attribute", 0}, 316 ACPI_DMT_TERMINATOR 317 }; 318 319 /* IORT subtables */ 320 321 /* 0x00: ITS Group */ 322 323 ACPI_DMTABLE_INFO AcpiDmTableInfoIort0[] = 324 { 325 {ACPI_DMT_UINT32, ACPI_IORT0_OFFSET (ItsCount), "ItsCount", 0}, 326 ACPI_DMT_TERMINATOR 327 }; 328 329 ACPI_DMTABLE_INFO AcpiDmTableInfoIort0a[] = 330 { 331 {ACPI_DMT_UINT32, 0, "Identifiers", DT_OPTIONAL}, 332 ACPI_DMT_TERMINATOR 333 }; 334 335 /* 0x01: Named Component */ 336 337 ACPI_DMTABLE_INFO AcpiDmTableInfoIort1[] = 338 { 339 {ACPI_DMT_UINT32, ACPI_IORT1_OFFSET (NodeFlags), "Node Flags", 0}, 340 {ACPI_DMT_IORTMEM, ACPI_IORT1_OFFSET (MemoryProperties), "Memory Properties", 0}, 341 {ACPI_DMT_UINT8, ACPI_IORT1_OFFSET (MemoryAddressLimit), "Memory Size Limit", 0}, 342 {ACPI_DMT_STRING, ACPI_IORT1_OFFSET (DeviceName[0]), "Device Name", 0}, 343 ACPI_DMT_TERMINATOR 344 }; 345 346 ACPI_DMTABLE_INFO AcpiDmTableInfoIort1a[] = 347 { 348 {ACPI_DMT_RAW_BUFFER, 0, "Padding", DT_OPTIONAL}, 349 ACPI_DMT_TERMINATOR 350 }; 351 352 /* 0x02: PCI Root Complex */ 353 354 ACPI_DMTABLE_INFO AcpiDmTableInfoIort2[] = 355 { 356 {ACPI_DMT_IORTMEM, ACPI_IORT2_OFFSET (MemoryProperties), "Memory Properties", 0}, 357 {ACPI_DMT_UINT32, ACPI_IORT2_OFFSET (AtsAttribute), "ATS Attribute", 0}, 358 {ACPI_DMT_UINT32, ACPI_IORT2_OFFSET (PciSegmentNumber), "PCI Segment Number", 0}, 359 {ACPI_DMT_UINT8, ACPI_IORT2_OFFSET (MemoryAddressLimit), "Memory Size Limit", 0}, 360 {ACPI_DMT_UINT16, ACPI_IORT2_OFFSET (PasidCapabilities), "PASID Capabilities", 0}, 361 {ACPI_DMT_UINT8, ACPI_IORT2_OFFSET (Reserved[0]), "Reserved", 0}, 362 ACPI_DMT_TERMINATOR 363 }; 364 365 /* 0x03: SMMUv1/2 */ 366 367 ACPI_DMTABLE_INFO AcpiDmTableInfoIort3[] = 368 { 369 {ACPI_DMT_UINT64, ACPI_IORT3_OFFSET (BaseAddress), "Base Address", 0}, 370 {ACPI_DMT_UINT64, ACPI_IORT3_OFFSET (Span), "Span", 0}, 371 {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (Model), "Model", 0}, 372 {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (Flags), "Flags (decoded below)", 0}, 373 {ACPI_DMT_FLAG0, ACPI_IORT3_FLAG_OFFSET (Flags, 0), "DVM Supported", 0}, 374 {ACPI_DMT_FLAG1, ACPI_IORT3_FLAG_OFFSET (Flags, 0), "Coherent Walk", 0}, 375 {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (GlobalInterruptOffset), "Global Interrupt Offset", 0}, 376 {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (ContextInterruptCount), "Context Interrupt Count", 0}, 377 {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (ContextInterruptOffset), "Context Interrupt Offset", 0}, 378 {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (PmuInterruptCount), "PMU Interrupt Count", 0}, 379 {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (PmuInterruptOffset), "PMU Interrupt Offset", 0}, 380 ACPI_DMT_TERMINATOR 381 }; 382 383 ACPI_DMTABLE_INFO AcpiDmTableInfoIort3a[] = 384 { 385 {ACPI_DMT_UINT32, ACPI_IORT3A_OFFSET (NSgIrpt), "NSgIrpt", 0}, 386 {ACPI_DMT_UINT32, ACPI_IORT3A_OFFSET (NSgIrptFlags), "NSgIrpt Flags (decoded below)", 0}, 387 {ACPI_DMT_FLAG0, ACPI_IORT3a_FLAG_OFFSET (NSgIrptFlags, 0), "Edge Triggered", 0}, 388 {ACPI_DMT_UINT32, ACPI_IORT3A_OFFSET (NSgCfgIrpt), "NSgCfgIrpt", 0}, 389 {ACPI_DMT_UINT32, ACPI_IORT3A_OFFSET (NSgCfgIrptFlags), "NSgCfgIrpt Flags (decoded below)", 0}, 390 {ACPI_DMT_FLAG0, ACPI_IORT3a_FLAG_OFFSET (NSgCfgIrptFlags, 0), "Edge Triggered", 0}, 391 ACPI_DMT_TERMINATOR 392 }; 393 394 ACPI_DMTABLE_INFO AcpiDmTableInfoIort3b[] = 395 { 396 {ACPI_DMT_UINT64, 0, "Context Interrupt", DT_OPTIONAL}, 397 ACPI_DMT_TERMINATOR 398 }; 399 400 ACPI_DMTABLE_INFO AcpiDmTableInfoIort3c[] = 401 { 402 {ACPI_DMT_UINT64, 0, "PMU Interrupt", DT_OPTIONAL}, 403 ACPI_DMT_TERMINATOR 404 }; 405 406 /* 0x04: SMMUv3 */ 407 408 ACPI_DMTABLE_INFO AcpiDmTableInfoIort4[] = 409 { 410 {ACPI_DMT_UINT64, ACPI_IORT4_OFFSET (BaseAddress), "Base Address", 0}, 411 {ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (Flags), "Flags (decoded below)", 0}, 412 {ACPI_DMT_FLAG0, ACPI_IORT4_FLAG_OFFSET (Flags, 0), "COHACC Override", 0}, 413 {ACPI_DMT_FLAG1, ACPI_IORT4_FLAG_OFFSET (Flags, 0), "HTTU Override", 0}, 414 {ACPI_DMT_FLAG3, ACPI_IORT4_FLAG_OFFSET (Flags, 0), "Proximity Domain Valid", 0}, 415 {ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (Reserved), "Reserved", 0}, 416 {ACPI_DMT_UINT64, ACPI_IORT4_OFFSET (VatosAddress), "VATOS Address", 0}, 417 {ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (Model), "Model", 0}, 418 {ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (EventGsiv), "Event GSIV", 0}, 419 {ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (PriGsiv), "PRI GSIV", 0}, 420 {ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (GerrGsiv), "GERR GSIV", 0}, 421 {ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (SyncGsiv), "Sync GSIV", 0}, 422 {ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (Pxm), "Proximity Domain", 0}, 423 {ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (IdMappingIndex), "Device ID Mapping Index", 0}, 424 ACPI_DMT_TERMINATOR 425 }; 426 427 /* 0x05: PMCG */ 428 429 ACPI_DMTABLE_INFO AcpiDmTableInfoIort5[] = 430 { 431 {ACPI_DMT_UINT64, ACPI_IORT5_OFFSET (Page0BaseAddress), "Page 0 Base Address", 0}, 432 {ACPI_DMT_UINT32, ACPI_IORT5_OFFSET (OverflowGsiv), "Overflow Interrupt GSIV", 0}, 433 {ACPI_DMT_UINT32, ACPI_IORT5_OFFSET (NodeReference), "Node Reference", 0}, 434 {ACPI_DMT_UINT64, ACPI_IORT5_OFFSET (Page1BaseAddress), "Page 1 Base Address", 0}, 435 ACPI_DMT_TERMINATOR 436 }; 437 438 439 /* 0x06: RMR */ 440 441 ACPI_DMTABLE_INFO AcpiDmTableInfoIort6[] = 442 { 443 {ACPI_DMT_UINT32, ACPI_IORT6_OFFSET (Flags), "Flags (decoded below)", 0}, 444 {ACPI_DMT_FLAG0, ACPI_IORT6_FLAG_OFFSET (Flags, 0), "Remapping Permitted", 0}, 445 {ACPI_DMT_FLAG1, ACPI_IORT6_FLAG_OFFSET (Flags, 0), "Access Privileged", 0}, 446 {ACPI_DMT_FLAGS8_2, ACPI_IORT6_FLAG_OFFSET (Flags, 0), "Access Attributes", 0}, 447 {ACPI_DMT_UINT32, ACPI_IORT6_OFFSET (RmrCount), "Number of RMR Descriptors", 0}, 448 {ACPI_DMT_UINT32, ACPI_IORT6_OFFSET (RmrOffset), "RMR Descriptor Offset", 0}, 449 ACPI_DMT_TERMINATOR 450 }; 451 452 ACPI_DMTABLE_INFO AcpiDmTableInfoIort6a[] = 453 { 454 {ACPI_DMT_UINT64, ACPI_IORT6A_OFFSET (BaseAddress), "Base Address of RMR", DT_OPTIONAL}, 455 {ACPI_DMT_UINT64, ACPI_IORT6A_OFFSET (Length), "Length of RMR", 0}, 456 {ACPI_DMT_UINT32, ACPI_IORT6A_OFFSET (Reserved), "Reserved", 0}, 457 ACPI_DMT_TERMINATOR 458 }; 459 460 /******************************************************************************* 461 * 462 * IVRS - I/O Virtualization Reporting Structure 463 * 464 ******************************************************************************/ 465 466 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs[] = 467 { 468 {ACPI_DMT_UINT32, ACPI_IVRS_OFFSET (Info), "Virtualization Info", 0}, 469 {ACPI_DMT_UINT64, ACPI_IVRS_OFFSET (Reserved), "Reserved", 0}, 470 ACPI_DMT_TERMINATOR 471 }; 472 473 /* IVRS subtables */ 474 475 /* 0x10: I/O Virtualization Hardware Definition (IVHD) Block */ 476 477 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsHware1[] = 478 { 479 {ACPI_DMT_IVRS, ACPI_IVRSH_OFFSET (Type), "Subtable Type", 0}, 480 {ACPI_DMT_UINT8, ACPI_IVRSH_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 481 {ACPI_DMT_FLAG0, ACPI_IVRS_FLAG_OFFSET (Flags,0), "HtTunEn", 0}, 482 {ACPI_DMT_FLAG1, ACPI_IVRS_FLAG_OFFSET (Flags,0), "PassPW", 0}, 483 {ACPI_DMT_FLAG2, ACPI_IVRS_FLAG_OFFSET (Flags,0), "ResPassPW", 0}, 484 {ACPI_DMT_FLAG3, ACPI_IVRS_FLAG_OFFSET (Flags,0), "Isoc Control", 0}, 485 {ACPI_DMT_FLAG4, ACPI_IVRS_FLAG_OFFSET (Flags,0), "Iotlb Support", 0}, 486 {ACPI_DMT_FLAG5, ACPI_IVRS_FLAG_OFFSET (Flags,0), "Coherent", 0}, 487 {ACPI_DMT_FLAG6, ACPI_IVRS_FLAG_OFFSET (Flags,0), "Prefetch Support", 0}, 488 {ACPI_DMT_FLAG7, ACPI_IVRS_FLAG_OFFSET (Flags,0), "PPR Support", 0}, 489 {ACPI_DMT_UINT16, ACPI_IVRSH_OFFSET (Length), "Length", DT_LENGTH}, 490 {ACPI_DMT_UINT16, ACPI_IVRSH_OFFSET (DeviceId), "DeviceId", 0}, 491 {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (CapabilityOffset), "Capability Offset", 0}, 492 {ACPI_DMT_UINT64, ACPI_IVRS0_OFFSET (BaseAddress), "Base Address", 0}, 493 {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (PciSegmentGroup), "PCI Segment Group", 0}, 494 {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (Info), "Virtualization Info", 0}, 495 {ACPI_DMT_UINT32, ACPI_IVRS0_OFFSET (FeatureReporting), "Feature Reporting", 0}, 496 ACPI_DMT_TERMINATOR 497 }; 498 499 /* 0x11, 0x40: I/O Virtualization Hardware Definition (IVHD) Block */ 500 501 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsHware23[] = 502 { 503 {ACPI_DMT_IVRS, ACPI_IVRSH_OFFSET (Type), "Subtable Type", 0}, 504 {ACPI_DMT_UINT8, ACPI_IVRSH_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 505 {ACPI_DMT_FLAG0, ACPI_IVRS_FLAG_OFFSET (Flags,0), "HtTunEn", 0}, 506 {ACPI_DMT_FLAG1, ACPI_IVRS_FLAG_OFFSET (Flags,0), "PassPW", 0}, 507 {ACPI_DMT_FLAG2, ACPI_IVRS_FLAG_OFFSET (Flags,0), "ResPassPW", 0}, 508 {ACPI_DMT_FLAG3, ACPI_IVRS_FLAG_OFFSET (Flags,0), "Isoc Control", 0}, 509 {ACPI_DMT_FLAG4, ACPI_IVRS_FLAG_OFFSET (Flags,0), "Iotlb Support", 0}, 510 {ACPI_DMT_FLAG5, ACPI_IVRS_FLAG_OFFSET (Flags,0), "Coherent", 0}, 511 {ACPI_DMT_FLAG6, ACPI_IVRS_FLAG_OFFSET (Flags,0), "Prefetch Support", 0}, 512 {ACPI_DMT_FLAG7, ACPI_IVRS_FLAG_OFFSET (Flags,0), "PPR Support", 0}, 513 {ACPI_DMT_UINT16, ACPI_IVRS01_OFFSET (Header.Length), "Length", DT_LENGTH}, 514 {ACPI_DMT_UINT16, ACPI_IVRS01_OFFSET (Header.DeviceId), "DeviceId", 0}, 515 {ACPI_DMT_UINT16, ACPI_IVRS01_OFFSET (CapabilityOffset), "Capability Offset", 0}, 516 {ACPI_DMT_UINT64, ACPI_IVRS01_OFFSET (BaseAddress), "Base Address", 0}, 517 {ACPI_DMT_UINT16, ACPI_IVRS01_OFFSET (PciSegmentGroup), "PCI Segment Group", 0}, 518 {ACPI_DMT_UINT16, ACPI_IVRS01_OFFSET (Info), "Virtualization Info", 0}, 519 {ACPI_DMT_UINT32, ACPI_IVRS01_OFFSET (Attributes), "Attributes", 0}, 520 {ACPI_DMT_UINT64, ACPI_IVRS01_OFFSET (EfrRegisterImage), "EFR Image", 0}, 521 {ACPI_DMT_UINT64, ACPI_IVRS01_OFFSET (Reserved), "Reserved", 0}, 522 ACPI_DMT_TERMINATOR 523 }; 524 525 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition (IVMD) Device Entry Block */ 526 527 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsMemory[] = 528 { 529 {ACPI_DMT_IVRS, ACPI_IVRSH_OFFSET (Type), "Subtable Type", 0}, 530 {ACPI_DMT_UINT8, ACPI_IVRSH_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 531 {ACPI_DMT_FLAG0, ACPI_IVRS_FLAG_OFFSET (Flags,0), "Unity", 0}, 532 {ACPI_DMT_FLAG1, ACPI_IVRS_FLAG_OFFSET (Flags,0), "Readable", 0}, 533 {ACPI_DMT_FLAG2, ACPI_IVRS_FLAG_OFFSET (Flags,0), "Writeable", 0}, 534 {ACPI_DMT_FLAG3, ACPI_IVRS_FLAG_OFFSET (Flags,0), "Exclusion Range", 0}, 535 {ACPI_DMT_UINT16, ACPI_IVRSH_OFFSET (Length), "Length", DT_LENGTH}, 536 {ACPI_DMT_UINT16, ACPI_IVRSH_OFFSET (DeviceId), "DeviceId", 0}, 537 {ACPI_DMT_UINT16, ACPI_IVRS1_OFFSET (AuxData), "Auxiliary Data", 0}, 538 {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (Reserved), "Reserved", 0}, 539 {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (StartAddress), "Start Address", 0}, 540 {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (MemoryLength), "Memory Length", 0}, 541 ACPI_DMT_TERMINATOR 542 }; 543 544 /* Device entry header for IVHD block */ 545 546 #define ACPI_DMT_IVRS_DE_HEADER \ 547 {ACPI_DMT_IVRS_DE, ACPI_IVRSD_OFFSET (Type), "Subtable Type", 0}, \ 548 {ACPI_DMT_UINT16, ACPI_IVRSD_OFFSET (Id), "Device ID", 0}, \ 549 {ACPI_DMT_UINT8, ACPI_IVRSD_OFFSET (DataSetting), "Data Setting (decoded below)", 0}, \ 550 {ACPI_DMT_FLAG0, ACPI_IVRSDE_FLAG_OFFSET (DataSetting, 0), "INITPass", 0}, \ 551 {ACPI_DMT_FLAG1, ACPI_IVRSDE_FLAG_OFFSET (DataSetting, 0), "EIntPass", 0}, \ 552 {ACPI_DMT_FLAG2, ACPI_IVRSDE_FLAG_OFFSET (DataSetting, 0), "NMIPass", 0}, \ 553 {ACPI_DMT_FLAG3, ACPI_IVRSDE_FLAG_OFFSET (DataSetting, 0), "Reserved", 0}, \ 554 {ACPI_DMT_FLAGS4, ACPI_IVRSDE_FLAG_OFFSET (DataSetting, 0), "System MGMT", 0}, \ 555 {ACPI_DMT_FLAG6, ACPI_IVRSDE_FLAG_OFFSET (DataSetting, 0), "LINT0 Pass", 0}, \ 556 {ACPI_DMT_FLAG7, ACPI_IVRSDE_FLAG_OFFSET (DataSetting, 0), "LINT1 Pass", 0} 557 558 /* 4-byte device entry (Types 1,2,3,4) */ 559 560 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs4[] = 561 { 562 ACPI_DMT_IVRS_DE_HEADER, 563 ACPI_DMT_TERMINATOR 564 }; 565 566 /* 8-byte device entry (Type Alias Select, Alias Start of Range) */ 567 568 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8a[] = 569 { 570 ACPI_DMT_IVRS_DE_HEADER, 571 {ACPI_DMT_UINT8, ACPI_IVRS8A_OFFSET (Reserved1), "Reserved", 0}, 572 {ACPI_DMT_UINT16, ACPI_IVRS8A_OFFSET (UsedId), "Source Used Device ID", 0}, 573 {ACPI_DMT_UINT8, ACPI_IVRS8A_OFFSET (Reserved2), "Reserved", 0}, 574 ACPI_DMT_TERMINATOR 575 }; 576 577 /* 8-byte device entry (Type Extended Select, Extended Start of Range) */ 578 579 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8b[] = 580 { 581 ACPI_DMT_IVRS_DE_HEADER, 582 {ACPI_DMT_UINT32, ACPI_IVRS8B_OFFSET (ExtendedData), "Extended Data", 0}, 583 ACPI_DMT_TERMINATOR 584 }; 585 586 /* 8-byte device entry (Type Special Device) */ 587 588 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8c[] = 589 { 590 ACPI_DMT_IVRS_DE_HEADER, 591 {ACPI_DMT_UINT8, ACPI_IVRS8C_OFFSET (Handle), "Handle", 0}, 592 {ACPI_DMT_UINT16, ACPI_IVRS8C_OFFSET (UsedId), "Source Used Device ID", 0}, 593 {ACPI_DMT_UINT8, ACPI_IVRS8C_OFFSET (Variety), "Variety", 0}, 594 ACPI_DMT_TERMINATOR 595 }; 596 597 /* Variable-length Device Entry Type 0xF0 */ 598 599 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsHid[] = 600 { 601 ACPI_DMT_IVRS_DE_HEADER, 602 ACPI_DMT_TERMINATOR 603 }; 604 605 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsUidString[] = 606 { 607 {ACPI_DMT_UINT8, 0, "UID Format", DT_DESCRIBES_OPTIONAL}, 608 {ACPI_DMT_UINT8, 1, "UID Length", DT_DESCRIBES_OPTIONAL}, 609 {ACPI_DMT_IVRS_UNTERMINATED_STRING, 2, "UID", DT_OPTIONAL}, 610 ACPI_DMT_TERMINATOR 611 }; 612 613 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsUidInteger[] = 614 { 615 {ACPI_DMT_UINT8, 0, "UID Format", DT_DESCRIBES_OPTIONAL}, 616 {ACPI_DMT_UINT8, 1, "UID Length", DT_DESCRIBES_OPTIONAL}, 617 {ACPI_DMT_UINT64, 2, "UID", DT_OPTIONAL}, 618 ACPI_DMT_TERMINATOR 619 }; 620 621 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsHidString[] = 622 { 623 {ACPI_DMT_NAME8, 0, "ACPI HID", 0}, 624 ACPI_DMT_TERMINATOR 625 }; 626 627 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsHidInteger[] = 628 { 629 {ACPI_DMT_UINT64, 0, "ACPI HID", 0}, 630 ACPI_DMT_TERMINATOR 631 }; 632 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsCidString[] = 633 { 634 {ACPI_DMT_NAME8, 0, "ACPI CID", 0}, 635 ACPI_DMT_TERMINATOR 636 }; 637 638 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsCidInteger[] = 639 { 640 {ACPI_DMT_UINT64, 0, "ACPI CID", 0}, 641 ACPI_DMT_TERMINATOR 642 }; 643 644 645 /******************************************************************************* 646 * 647 * LPIT - Low Power Idle Table 648 * 649 ******************************************************************************/ 650 651 /* Main table consists only of the standard ACPI table header */ 652 653 /* Common Subtable header (one per Subtable) */ 654 655 ACPI_DMTABLE_INFO AcpiDmTableInfoLpitHdr[] = 656 { 657 {ACPI_DMT_LPIT, ACPI_LPITH_OFFSET (Type), "Subtable Type", 0}, 658 {ACPI_DMT_UINT32, ACPI_LPITH_OFFSET (Length), "Length", DT_LENGTH}, 659 {ACPI_DMT_UINT16, ACPI_LPITH_OFFSET (UniqueId), "Unique ID", 0}, 660 {ACPI_DMT_UINT16, ACPI_LPITH_OFFSET (Reserved), "Reserved", 0}, 661 {ACPI_DMT_UINT32, ACPI_LPITH_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 662 {ACPI_DMT_FLAG0, ACPI_LPITH_FLAG_OFFSET (Flags, 0), "State Disabled", 0}, 663 {ACPI_DMT_FLAG1, ACPI_LPITH_FLAG_OFFSET (Flags, 0), "No Counter", 0}, 664 ACPI_DMT_TERMINATOR 665 }; 666 667 /* LPIT Subtables */ 668 669 /* 0: Native C-state */ 670 671 ACPI_DMTABLE_INFO AcpiDmTableInfoLpit0[] = 672 { 673 {ACPI_DMT_GAS, ACPI_LPIT0_OFFSET (EntryTrigger), "Entry Trigger", 0}, 674 {ACPI_DMT_UINT32, ACPI_LPIT0_OFFSET (Residency), "Residency", 0}, 675 {ACPI_DMT_UINT32, ACPI_LPIT0_OFFSET (Latency), "Latency", 0}, 676 {ACPI_DMT_GAS, ACPI_LPIT0_OFFSET (ResidencyCounter), "Residency Counter", 0}, 677 {ACPI_DMT_UINT64, ACPI_LPIT0_OFFSET (CounterFrequency), "Counter Frequency", 0}, 678 ACPI_DMT_TERMINATOR 679 }; 680 681 682 /******************************************************************************* 683 * 684 * MADT - Multiple APIC Description Table and subtables 685 * 686 ******************************************************************************/ 687 688 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt[] = 689 { 690 {ACPI_DMT_UINT32, ACPI_MADT_OFFSET (Address), "Local Apic Address", 0}, 691 {ACPI_DMT_UINT32, ACPI_MADT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 692 {ACPI_DMT_FLAG0, ACPI_MADT_FLAG_OFFSET (Flags,0), "PC-AT Compatibility", 0}, 693 ACPI_DMT_TERMINATOR 694 }; 695 696 /* Common Subtable header (one per Subtable) */ 697 698 ACPI_DMTABLE_INFO AcpiDmTableInfoMadtHdr[] = 699 { 700 {ACPI_DMT_MADT, ACPI_MADTH_OFFSET (Type), "Subtable Type", 0}, 701 {ACPI_DMT_UINT8, ACPI_MADTH_OFFSET (Length), "Length", DT_LENGTH}, 702 ACPI_DMT_TERMINATOR 703 }; 704 705 /* MADT Subtables */ 706 707 /* 0: processor APIC */ 708 709 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt0[] = 710 { 711 {ACPI_DMT_UINT8, ACPI_MADT0_OFFSET (ProcessorId), "Processor ID", 0}, 712 {ACPI_DMT_UINT8, ACPI_MADT0_OFFSET (Id), "Local Apic ID", 0}, 713 {ACPI_DMT_UINT32, ACPI_MADT0_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG}, 714 {ACPI_DMT_FLAG0, ACPI_MADT0_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0}, 715 {ACPI_DMT_FLAG1, ACPI_MADT0_FLAG_OFFSET (LapicFlags,0), "Runtime Online Capable", 0}, 716 ACPI_DMT_TERMINATOR 717 }; 718 719 /* 1: IO APIC */ 720 721 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt1[] = 722 { 723 {ACPI_DMT_UINT8, ACPI_MADT1_OFFSET (Id), "I/O Apic ID", 0}, 724 {ACPI_DMT_UINT8, ACPI_MADT1_OFFSET (Reserved), "Reserved", 0}, 725 {ACPI_DMT_UINT32, ACPI_MADT1_OFFSET (Address), "Address", 0}, 726 {ACPI_DMT_UINT32, ACPI_MADT1_OFFSET (GlobalIrqBase), "Interrupt", 0}, 727 ACPI_DMT_TERMINATOR 728 }; 729 730 /* 2: Interrupt Override */ 731 732 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt2[] = 733 { 734 {ACPI_DMT_UINT8, ACPI_MADT2_OFFSET (Bus), "Bus", 0}, 735 {ACPI_DMT_UINT8, ACPI_MADT2_OFFSET (SourceIrq), "Source", 0}, 736 {ACPI_DMT_UINT32, ACPI_MADT2_OFFSET (GlobalIrq), "Interrupt", 0}, 737 {ACPI_DMT_UINT16, ACPI_MADT2_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, 738 {ACPI_DMT_FLAGS0, ACPI_MADT2_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, 739 {ACPI_DMT_FLAGS2, ACPI_MADT2_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, 740 ACPI_DMT_TERMINATOR 741 }; 742 743 /* 3: NMI Sources */ 744 745 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt3[] = 746 { 747 {ACPI_DMT_UINT16, ACPI_MADT3_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, 748 {ACPI_DMT_FLAGS0, ACPI_MADT3_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, 749 {ACPI_DMT_FLAGS2, ACPI_MADT3_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, 750 {ACPI_DMT_UINT32, ACPI_MADT3_OFFSET (GlobalIrq), "Interrupt", 0}, 751 ACPI_DMT_TERMINATOR 752 }; 753 754 /* 4: Local APIC NMI */ 755 756 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt4[] = 757 { 758 {ACPI_DMT_UINT8, ACPI_MADT4_OFFSET (ProcessorId), "Processor ID", 0}, 759 {ACPI_DMT_UINT16, ACPI_MADT4_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, 760 {ACPI_DMT_FLAGS0, ACPI_MADT4_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, 761 {ACPI_DMT_FLAGS2, ACPI_MADT4_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, 762 {ACPI_DMT_UINT8, ACPI_MADT4_OFFSET (Lint), "Interrupt Input LINT", 0}, 763 ACPI_DMT_TERMINATOR 764 }; 765 766 /* 5: Address Override */ 767 768 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt5[] = 769 { 770 {ACPI_DMT_UINT16, ACPI_MADT5_OFFSET (Reserved), "Reserved", 0}, 771 {ACPI_DMT_UINT64, ACPI_MADT5_OFFSET (Address), "APIC Address", 0}, 772 ACPI_DMT_TERMINATOR 773 }; 774 775 /* 6: I/O Sapic */ 776 777 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt6[] = 778 { 779 {ACPI_DMT_UINT8, ACPI_MADT6_OFFSET (Id), "I/O Sapic ID", 0}, 780 {ACPI_DMT_UINT8, ACPI_MADT6_OFFSET (Reserved), "Reserved", 0}, 781 {ACPI_DMT_UINT32, ACPI_MADT6_OFFSET (GlobalIrqBase), "Interrupt Base", 0}, 782 {ACPI_DMT_UINT64, ACPI_MADT6_OFFSET (Address), "Address", 0}, 783 ACPI_DMT_TERMINATOR 784 }; 785 786 /* 7: Local Sapic */ 787 788 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt7[] = 789 { 790 {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (ProcessorId), "Processor ID", 0}, 791 {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (Id), "Local Sapic ID", 0}, 792 {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (Eid), "Local Sapic EID", 0}, 793 {ACPI_DMT_UINT24, ACPI_MADT7_OFFSET (Reserved[0]), "Reserved", 0}, 794 {ACPI_DMT_UINT32, ACPI_MADT7_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG}, 795 {ACPI_DMT_FLAG0, ACPI_MADT7_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0}, 796 {ACPI_DMT_UINT32, ACPI_MADT7_OFFSET (Uid), "Processor UID", 0}, 797 {ACPI_DMT_STRING, ACPI_MADT7_OFFSET (UidString[0]), "Processor UID String", 0}, 798 ACPI_DMT_TERMINATOR 799 }; 800 801 /* 8: Platform Interrupt Source */ 802 803 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt8[] = 804 { 805 {ACPI_DMT_UINT16, ACPI_MADT8_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, 806 {ACPI_DMT_FLAGS0, ACPI_MADT8_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, 807 {ACPI_DMT_FLAGS2, ACPI_MADT8_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, 808 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Type), "InterruptType", 0}, 809 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Id), "Processor ID", 0}, 810 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Eid), "Processor EID", 0}, 811 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (IoSapicVector), "I/O Sapic Vector", 0}, 812 {ACPI_DMT_UINT32, ACPI_MADT8_OFFSET (GlobalIrq), "Interrupt", 0}, 813 {ACPI_DMT_UINT32, ACPI_MADT8_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 814 {ACPI_DMT_FLAG0, ACPI_MADT8_OFFSET (Flags), "CPEI Override", 0}, 815 ACPI_DMT_TERMINATOR 816 }; 817 818 /* 9: Processor Local X2_APIC (ACPI 4.0) */ 819 820 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt9[] = 821 { 822 {ACPI_DMT_UINT16, ACPI_MADT9_OFFSET (Reserved), "Reserved", 0}, 823 {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (LocalApicId), "Processor x2Apic ID", 0}, 824 {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG}, 825 {ACPI_DMT_FLAG0, ACPI_MADT9_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0}, 826 {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (Uid), "Processor UID", 0}, 827 ACPI_DMT_TERMINATOR 828 }; 829 830 /* 10: Local X2_APIC NMI (ACPI 4.0) */ 831 832 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt10[] = 833 { 834 {ACPI_DMT_UINT16, ACPI_MADT10_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, 835 {ACPI_DMT_FLAGS0, ACPI_MADT10_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, 836 {ACPI_DMT_FLAGS2, ACPI_MADT10_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, 837 {ACPI_DMT_UINT32, ACPI_MADT10_OFFSET (Uid), "Processor UID", 0}, 838 {ACPI_DMT_UINT8, ACPI_MADT10_OFFSET (Lint), "Interrupt Input LINT", 0}, 839 {ACPI_DMT_UINT24, ACPI_MADT10_OFFSET (Reserved[0]), "Reserved", 0}, 840 ACPI_DMT_TERMINATOR 841 }; 842 843 /* 11: Generic Interrupt Controller (ACPI 5.0) */ 844 845 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt11[] = 846 { 847 {ACPI_DMT_UINT16, ACPI_MADT11_OFFSET (Reserved), "Reserved", 0}, 848 {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (CpuInterfaceNumber), "CPU Interface Number", 0}, 849 {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (Uid), "Processor UID", 0}, 850 {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 851 {ACPI_DMT_FLAG0, ACPI_MADT11_FLAG_OFFSET (Flags,0), "Processor Enabled", 0}, 852 {ACPI_DMT_FLAG1, ACPI_MADT11_FLAG_OFFSET (Flags,0), "Performance Interrupt Trigger Mode", 0}, 853 {ACPI_DMT_FLAG2, ACPI_MADT11_FLAG_OFFSET (Flags,0), "Virtual GIC Interrupt Trigger Mode", 0}, 854 {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (ParkingVersion), "Parking Protocol Version", 0}, 855 {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (PerformanceInterrupt), "Performance Interrupt", 0}, 856 {ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (ParkedAddress), "Parked Address", 0}, 857 {ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (BaseAddress), "Base Address", 0}, 858 {ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (GicvBaseAddress), "Virtual GIC Base Address", 0}, 859 {ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (GichBaseAddress), "Hypervisor GIC Base Address", 0}, 860 {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (VgicInterrupt), "Virtual GIC Interrupt", 0}, 861 {ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (GicrBaseAddress), "Redistributor Base Address", 0}, 862 {ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (ArmMpidr), "ARM MPIDR", 0}, 863 {ACPI_DMT_UINT8, ACPI_MADT11_OFFSET (EfficiencyClass), "Efficiency Class", 0}, 864 {ACPI_DMT_UINT8, ACPI_MADT11_OFFSET (Reserved2[0]), "Reserved", 0}, 865 {ACPI_DMT_UINT16, ACPI_MADT11_OFFSET (SpeInterrupt), "SPE Overflow Interrupt", 0}, 866 ACPI_DMT_TERMINATOR 867 }; 868 869 /* 12: Generic Interrupt Distributor (ACPI 5.0) */ 870 871 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt12[] = 872 { 873 {ACPI_DMT_UINT16, ACPI_MADT12_OFFSET (Reserved), "Reserved", 0}, 874 {ACPI_DMT_UINT32, ACPI_MADT12_OFFSET (GicId), "Local GIC Hardware ID", 0}, 875 {ACPI_DMT_UINT64, ACPI_MADT12_OFFSET (BaseAddress), "Base Address", 0}, 876 {ACPI_DMT_UINT32, ACPI_MADT12_OFFSET (GlobalIrqBase), "Interrupt Base", 0}, 877 {ACPI_DMT_UINT8, ACPI_MADT12_OFFSET (Version), "Version", 0}, 878 {ACPI_DMT_UINT24, ACPI_MADT12_OFFSET (Reserved2[0]), "Reserved", 0}, 879 ACPI_DMT_TERMINATOR 880 }; 881 882 /* 13: Generic MSI Frame (ACPI 5.1) */ 883 884 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt13[] = 885 { 886 {ACPI_DMT_UINT16, ACPI_MADT13_OFFSET (Reserved), "Reserved", 0}, 887 {ACPI_DMT_UINT32, ACPI_MADT13_OFFSET (MsiFrameId), "MSI Frame ID", 0}, 888 {ACPI_DMT_UINT64, ACPI_MADT13_OFFSET (BaseAddress), "Base Address", 0}, 889 {ACPI_DMT_UINT32, ACPI_MADT13_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 890 {ACPI_DMT_FLAG0, ACPI_MADT13_FLAG_OFFSET (Flags,0), "Select SPI", 0}, 891 {ACPI_DMT_UINT16, ACPI_MADT13_OFFSET (SpiCount), "SPI Count", 0}, 892 {ACPI_DMT_UINT16, ACPI_MADT13_OFFSET (SpiBase), "SPI Base", 0}, 893 ACPI_DMT_TERMINATOR 894 }; 895 896 /* 14: Generic Redistributor (ACPI 5.1) */ 897 898 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt14[] = 899 { 900 {ACPI_DMT_UINT16, ACPI_MADT14_OFFSET (Reserved), "Reserved", 0}, 901 {ACPI_DMT_UINT64, ACPI_MADT14_OFFSET (BaseAddress), "Base Address", 0}, 902 {ACPI_DMT_UINT32, ACPI_MADT14_OFFSET (Length), "Length", 0}, 903 ACPI_DMT_TERMINATOR 904 }; 905 906 /* 15: Generic Translator (ACPI 6.0) */ 907 908 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt15[] = 909 { 910 {ACPI_DMT_UINT16, ACPI_MADT15_OFFSET (Reserved), "Reserved", 0}, 911 {ACPI_DMT_UINT32, ACPI_MADT15_OFFSET (TranslationId), "Translation ID", 0}, 912 {ACPI_DMT_UINT64, ACPI_MADT15_OFFSET (BaseAddress), "Base Address", 0}, 913 {ACPI_DMT_UINT32, ACPI_MADT15_OFFSET (Reserved2), "Reserved", 0}, 914 ACPI_DMT_TERMINATOR 915 }; 916 917 /* 16: Multiprocessor wakeup structure (ACPI 6.4) */ 918 919 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt16[] = 920 { 921 {ACPI_DMT_UINT16, ACPI_MADT16_OFFSET (MailboxVersion), "Mailbox Version", 0}, 922 {ACPI_DMT_UINT32, ACPI_MADT16_OFFSET (Reserved), "Reserved", 0}, 923 {ACPI_DMT_UINT64, ACPI_MADT16_OFFSET (BaseAddress), "Mailbox Address", 0}, 924 ACPI_DMT_TERMINATOR 925 }; 926 927 /* 17: OEM data structure */ 928 929 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt17[] = 930 { 931 {ACPI_DMT_RAW_BUFFER, 0, "OEM Data", 0}, 932 ACPI_DMT_TERMINATOR 933 }; 934 935 /******************************************************************************* 936 * 937 * MCFG - PCI Memory Mapped Configuration table and Subtable 938 * 939 ******************************************************************************/ 940 941 ACPI_DMTABLE_INFO AcpiDmTableInfoMcfg[] = 942 { 943 {ACPI_DMT_UINT64, ACPI_MCFG_OFFSET (Reserved[0]), "Reserved", 0}, 944 ACPI_DMT_TERMINATOR 945 }; 946 947 ACPI_DMTABLE_INFO AcpiDmTableInfoMcfg0[] = 948 { 949 {ACPI_DMT_UINT64, ACPI_MCFG0_OFFSET (Address), "Base Address", 0}, 950 {ACPI_DMT_UINT16, ACPI_MCFG0_OFFSET (PciSegment), "Segment Group Number", 0}, 951 {ACPI_DMT_UINT8, ACPI_MCFG0_OFFSET (StartBusNumber), "Start Bus Number", 0}, 952 {ACPI_DMT_UINT8, ACPI_MCFG0_OFFSET (EndBusNumber), "End Bus Number", 0}, 953 {ACPI_DMT_UINT32, ACPI_MCFG0_OFFSET (Reserved), "Reserved", 0}, 954 ACPI_DMT_TERMINATOR 955 }; 956 957 958 /******************************************************************************* 959 * 960 * MCHI - Management Controller Host Interface table 961 * 962 ******************************************************************************/ 963 964 ACPI_DMTABLE_INFO AcpiDmTableInfoMchi[] = 965 { 966 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (InterfaceType), "Interface Type", 0}, 967 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (Protocol), "Protocol", 0}, 968 {ACPI_DMT_UINT64, ACPI_MCHI_OFFSET (ProtocolData), "Protocol Data", 0}, 969 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (InterruptType), "Interrupt Type", 0}, 970 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (Gpe), "Gpe", 0}, 971 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciDeviceFlag), "Pci Device Flag", 0}, 972 {ACPI_DMT_UINT32, ACPI_MCHI_OFFSET (GlobalInterrupt), "Global Interrupt", 0}, 973 {ACPI_DMT_GAS, ACPI_MCHI_OFFSET (ControlRegister), "Control Register", 0}, 974 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciSegment), "Pci Segment", 0}, 975 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciBus), "Pci Bus", 0}, 976 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciDevice), "Pci Device", 0}, 977 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciFunction), "Pci Function", 0}, 978 ACPI_DMT_TERMINATOR 979 }; 980 981 982 /******************************************************************************* 983 * 984 * MPST - Memory Power State Table 985 * 986 ******************************************************************************/ 987 988 ACPI_DMTABLE_INFO AcpiDmTableInfoMpst[] = 989 { 990 {ACPI_DMT_UINT8, ACPI_MPST_OFFSET (ChannelId), "Channel ID", 0}, 991 {ACPI_DMT_UINT24, ACPI_MPST_OFFSET (Reserved1[0]), "Reserved", 0}, 992 {ACPI_DMT_UINT16, ACPI_MPST_OFFSET (PowerNodeCount), "Power Node Count", 0}, 993 {ACPI_DMT_UINT16, ACPI_MPST_OFFSET (Reserved2), "Reserved", 0}, 994 ACPI_DMT_TERMINATOR 995 }; 996 997 /* MPST subtables */ 998 999 /* 0: Memory Power Node Structure */ 1000 1001 ACPI_DMTABLE_INFO AcpiDmTableInfoMpst0[] = 1002 { 1003 {ACPI_DMT_UINT8, ACPI_MPST0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1004 {ACPI_DMT_FLAG0, ACPI_MPST0_FLAG_OFFSET (Flags,0), "Node Enabled", 0}, 1005 {ACPI_DMT_FLAG1, ACPI_MPST0_FLAG_OFFSET (Flags,0), "Power Managed", 0}, 1006 {ACPI_DMT_FLAG2, ACPI_MPST0_FLAG_OFFSET (Flags,0), "Hot Plug Capable", 0}, 1007 1008 {ACPI_DMT_UINT8, ACPI_MPST0_OFFSET (Reserved1), "Reserved", 0}, 1009 {ACPI_DMT_UINT16, ACPI_MPST0_OFFSET (NodeId), "Node ID", 0}, 1010 {ACPI_DMT_UINT32, ACPI_MPST0_OFFSET (Length), "Length", 0}, 1011 {ACPI_DMT_UINT64, ACPI_MPST0_OFFSET (RangeAddress), "Range Address", 0}, 1012 {ACPI_DMT_UINT64, ACPI_MPST0_OFFSET (RangeLength), "Range Length", 0}, 1013 {ACPI_DMT_UINT32, ACPI_MPST0_OFFSET (NumPowerStates), "Num Power States", 0}, 1014 {ACPI_DMT_UINT32, ACPI_MPST0_OFFSET (NumPhysicalComponents), "Num Physical Components", 0}, 1015 ACPI_DMT_TERMINATOR 1016 }; 1017 1018 /* 0A: Sub-subtable - Memory Power State Structure (follows Memory Power Node above) */ 1019 1020 ACPI_DMTABLE_INFO AcpiDmTableInfoMpst0A[] = 1021 { 1022 {ACPI_DMT_UINT8, ACPI_MPST0A_OFFSET (PowerState), "Power State", 0}, 1023 {ACPI_DMT_UINT8, ACPI_MPST0A_OFFSET (InfoIndex), "InfoIndex", 0}, 1024 ACPI_DMT_TERMINATOR 1025 }; 1026 1027 /* 0B: Sub-subtable - Physical Component ID Structure (follows Memory Power State(s) above) */ 1028 1029 ACPI_DMTABLE_INFO AcpiDmTableInfoMpst0B[] = 1030 { 1031 {ACPI_DMT_UINT16, ACPI_MPST0B_OFFSET (ComponentId), "Component Id", 0}, 1032 ACPI_DMT_TERMINATOR 1033 }; 1034 1035 /* 01: Power Characteristics Count (follows all Power Node(s) above) */ 1036 1037 ACPI_DMTABLE_INFO AcpiDmTableInfoMpst1[] = 1038 { 1039 {ACPI_DMT_UINT16, ACPI_MPST1_OFFSET (CharacteristicsCount), "Characteristics Count", 0}, 1040 {ACPI_DMT_UINT16, ACPI_MPST1_OFFSET (Reserved), "Reserved", 0}, 1041 ACPI_DMT_TERMINATOR 1042 }; 1043 1044 /* 02: Memory Power State Characteristics Structure */ 1045 1046 ACPI_DMTABLE_INFO AcpiDmTableInfoMpst2[] = 1047 { 1048 {ACPI_DMT_UINT8, ACPI_MPST2_OFFSET (StructureId), "Structure ID", 0}, 1049 {ACPI_DMT_UINT8, ACPI_MPST2_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1050 {ACPI_DMT_FLAG0, ACPI_MPST2_FLAG_OFFSET (Flags,0), "Memory Preserved", 0}, 1051 {ACPI_DMT_FLAG1, ACPI_MPST2_FLAG_OFFSET (Flags,0), "Auto Entry", 0}, 1052 {ACPI_DMT_FLAG2, ACPI_MPST2_FLAG_OFFSET (Flags,0), "Auto Exit", 0}, 1053 1054 {ACPI_DMT_UINT16, ACPI_MPST2_OFFSET (Reserved1), "Reserved", 0}, 1055 {ACPI_DMT_UINT32, ACPI_MPST2_OFFSET (AveragePower), "Average Power", 0}, 1056 {ACPI_DMT_UINT32, ACPI_MPST2_OFFSET (PowerSaving), "Power Saving", 0}, 1057 {ACPI_DMT_UINT64, ACPI_MPST2_OFFSET (ExitLatency), "Exit Latency", 0}, 1058 {ACPI_DMT_UINT64, ACPI_MPST2_OFFSET (Reserved2), "Reserved", 0}, 1059 ACPI_DMT_TERMINATOR 1060 }; 1061 1062 1063 /******************************************************************************* 1064 * 1065 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 1066 * 1067 ******************************************************************************/ 1068 1069 ACPI_DMTABLE_INFO AcpiDmTableInfoMsct[] = 1070 { 1071 {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (ProximityOffset), "Proximity Offset", 0}, 1072 {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (MaxProximityDomains), "Max Proximity Domains", 0}, 1073 {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (MaxClockDomains), "Max Clock Domains", 0}, 1074 {ACPI_DMT_UINT64, ACPI_MSCT_OFFSET (MaxAddress), "Max Physical Address", 0}, 1075 ACPI_DMT_TERMINATOR 1076 }; 1077 1078 /* Subtable - Maximum Proximity Domain Information. Version 1 */ 1079 1080 ACPI_DMTABLE_INFO AcpiDmTableInfoMsct0[] = 1081 { 1082 {ACPI_DMT_UINT8, ACPI_MSCT0_OFFSET (Revision), "Revision", 0}, 1083 {ACPI_DMT_UINT8, ACPI_MSCT0_OFFSET (Length), "Length", DT_LENGTH}, 1084 {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (RangeStart), "Domain Range Start", 0}, 1085 {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (RangeEnd), "Domain Range End", 0}, 1086 {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (ProcessorCapacity), "Processor Capacity", 0}, 1087 {ACPI_DMT_UINT64, ACPI_MSCT0_OFFSET (MemoryCapacity), "Memory Capacity", 0}, 1088 ACPI_DMT_TERMINATOR 1089 }; 1090 1091 1092 /******************************************************************************* 1093 * 1094 * NFIT - NVDIMM Firmware Interface Table and Subtables - (ACPI 6.0) 1095 * 1096 ******************************************************************************/ 1097 1098 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit[] = 1099 { 1100 {ACPI_DMT_UINT32, ACPI_NFIT_OFFSET (Reserved), "Reserved", 0}, 1101 ACPI_DMT_TERMINATOR 1102 }; 1103 1104 /* Common Subtable header */ 1105 1106 ACPI_DMTABLE_INFO AcpiDmTableInfoNfitHdr[] = 1107 { 1108 {ACPI_DMT_NFIT, ACPI_NFITH_OFFSET (Type), "Subtable Type", 0}, 1109 {ACPI_DMT_UINT16, ACPI_NFITH_OFFSET (Length), "Length", DT_LENGTH}, 1110 ACPI_DMT_TERMINATOR 1111 }; 1112 1113 /* 0: System Physical Address Range Structure */ 1114 1115 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit0[] = 1116 { 1117 {ACPI_DMT_UINT16, ACPI_NFIT0_OFFSET (RangeIndex), "Range Index", 0}, 1118 {ACPI_DMT_UINT16, ACPI_NFIT0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1119 {ACPI_DMT_FLAG0, ACPI_NFIT0_FLAG_OFFSET (Flags,0), "Add/Online Operation Only", 0}, 1120 {ACPI_DMT_FLAG1, ACPI_NFIT0_FLAG_OFFSET (Flags,0), "Proximity Domain Valid", 0}, 1121 {ACPI_DMT_FLAG2, ACPI_NFIT0_FLAG_OFFSET (Flags,0), "Location Cookie Valid", 0}, 1122 {ACPI_DMT_UINT32, ACPI_NFIT0_OFFSET (Reserved), "Reserved", 0}, 1123 {ACPI_DMT_UINT32, ACPI_NFIT0_OFFSET (ProximityDomain), "Proximity Domain", 0}, 1124 {ACPI_DMT_UUID, ACPI_NFIT0_OFFSET (RangeGuid[0]), "Region Type GUID", 0}, 1125 {ACPI_DMT_UINT64, ACPI_NFIT0_OFFSET (Address), "Address Range Base", 0}, 1126 {ACPI_DMT_UINT64, ACPI_NFIT0_OFFSET (Length), "Address Range Length", 0}, 1127 {ACPI_DMT_UINT64, ACPI_NFIT0_OFFSET (MemoryMapping), "Memory Map Attribute", 0}, 1128 {ACPI_DMT_UINT64, ACPI_NFIT0_OFFSET (LocationCookie), "Location Cookie", 0}, /* ACPI 6.4 */ 1129 ACPI_DMT_TERMINATOR 1130 }; 1131 1132 /* 1: Memory Device to System Address Range Map Structure */ 1133 1134 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit1[] = 1135 { 1136 {ACPI_DMT_UINT32, ACPI_NFIT1_OFFSET (DeviceHandle), "Device Handle", 0}, 1137 {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (PhysicalId), "Physical Id", 0}, 1138 {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (RegionId), "Region Id", 0}, 1139 {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (RangeIndex), "Range Index", 0}, 1140 {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (RegionIndex), "Control Region Index", 0}, 1141 {ACPI_DMT_UINT64, ACPI_NFIT1_OFFSET (RegionSize), "Region Size", 0}, 1142 {ACPI_DMT_UINT64, ACPI_NFIT1_OFFSET (RegionOffset), "Region Offset", 0}, 1143 {ACPI_DMT_UINT64, ACPI_NFIT1_OFFSET (Address), "Address Region Base", 0}, 1144 {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (InterleaveIndex), "Interleave Index", 0}, 1145 {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (InterleaveWays), "Interleave Ways", 0}, 1146 {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (Flags), "Flags", DT_FLAG}, 1147 {ACPI_DMT_FLAG0, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Save to device failed", 0}, 1148 {ACPI_DMT_FLAG1, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Restore from device failed", 0}, 1149 {ACPI_DMT_FLAG2, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Platform flush failed", 0}, 1150 {ACPI_DMT_FLAG3, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Device not armed", 0}, 1151 {ACPI_DMT_FLAG4, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Health events observed", 0}, 1152 {ACPI_DMT_FLAG5, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Health events enabled", 0}, 1153 {ACPI_DMT_FLAG6, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Mapping failed", 0}, 1154 {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (Reserved), "Reserved", 0}, 1155 ACPI_DMT_TERMINATOR 1156 }; 1157 1158 /* 2: Interleave Structure */ 1159 1160 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit2[] = 1161 { 1162 {ACPI_DMT_UINT16, ACPI_NFIT2_OFFSET (InterleaveIndex), "Interleave Index", 0}, 1163 {ACPI_DMT_UINT16, ACPI_NFIT2_OFFSET (Reserved), "Reserved", 0}, 1164 {ACPI_DMT_UINT32, ACPI_NFIT2_OFFSET (LineCount), "Line Count", 0}, 1165 {ACPI_DMT_UINT32, ACPI_NFIT2_OFFSET (LineSize), "Line Size", 0}, 1166 ACPI_DMT_TERMINATOR 1167 }; 1168 1169 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit2a[] = 1170 { 1171 {ACPI_DMT_UINT32, 0, "Line Offset", DT_OPTIONAL}, 1172 ACPI_DMT_TERMINATOR 1173 }; 1174 1175 /* 3: SMBIOS Management Information Structure */ 1176 1177 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit3[] = 1178 { 1179 {ACPI_DMT_UINT32, ACPI_NFIT3_OFFSET (Reserved), "Reserved", 0}, 1180 ACPI_DMT_TERMINATOR 1181 }; 1182 1183 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit3a[] = 1184 { 1185 {ACPI_DMT_RAW_BUFFER, 0, "SMBIOS Table Entries", DT_OPTIONAL}, 1186 ACPI_DMT_TERMINATOR 1187 }; 1188 1189 /* 4: NVDIMM Control Region Structure */ 1190 1191 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit4[] = 1192 { 1193 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (RegionIndex), "Region Index", 0}, 1194 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (VendorId), "Vendor Id", 0}, 1195 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (DeviceId), "Device Id", 0}, 1196 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (RevisionId), "Revision Id", 0}, 1197 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (SubsystemVendorId), "Subsystem Vendor Id", 0}, 1198 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (SubsystemDeviceId), "Subsystem Device Id", 0}, 1199 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (SubsystemRevisionId), "Subsystem Revision Id", 0}, 1200 {ACPI_DMT_UINT8, ACPI_NFIT4_OFFSET (ValidFields), "Valid Fields", 0}, 1201 {ACPI_DMT_UINT8, ACPI_NFIT4_OFFSET (ManufacturingLocation), "Manufacturing Location", 0}, 1202 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (ManufacturingDate), "Manufacturing Date", 0}, 1203 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (Reserved[0]), "Reserved", 0}, 1204 {ACPI_DMT_UINT32, ACPI_NFIT4_OFFSET (SerialNumber), "Serial Number", 0}, 1205 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (Code), "Code", 0}, 1206 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (Windows), "Window Count", 0}, 1207 {ACPI_DMT_UINT64, ACPI_NFIT4_OFFSET (WindowSize), "Window Size", 0}, 1208 {ACPI_DMT_UINT64, ACPI_NFIT4_OFFSET (CommandOffset), "Command Offset", 0}, 1209 {ACPI_DMT_UINT64, ACPI_NFIT4_OFFSET (CommandSize), "Command Size", 0}, 1210 {ACPI_DMT_UINT64, ACPI_NFIT4_OFFSET (StatusOffset), "Status Offset", 0}, 1211 {ACPI_DMT_UINT64, ACPI_NFIT4_OFFSET (StatusSize), "Status Size", 0}, 1212 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (Flags), "Flags", DT_FLAG}, 1213 {ACPI_DMT_FLAG0, ACPI_NFIT4_FLAG_OFFSET (Flags,0), "Windows buffered", 0}, 1214 {ACPI_DMT_UINT48, ACPI_NFIT4_OFFSET (Reserved1[0]), "Reserved1", 0}, 1215 ACPI_DMT_TERMINATOR 1216 }; 1217 1218 /* 5: NVDIMM Block Data Window Region Structure */ 1219 1220 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit5[] = 1221 { 1222 {ACPI_DMT_UINT16, ACPI_NFIT5_OFFSET (RegionIndex), "Region Index", 0}, 1223 {ACPI_DMT_UINT16, ACPI_NFIT5_OFFSET (Windows), "Window Count", 0}, 1224 {ACPI_DMT_UINT64, ACPI_NFIT5_OFFSET (Offset), "Offset", 0}, 1225 {ACPI_DMT_UINT64, ACPI_NFIT5_OFFSET (Size), "Size", 0}, 1226 {ACPI_DMT_UINT64, ACPI_NFIT5_OFFSET (Capacity), "Capacity", 0}, 1227 {ACPI_DMT_UINT64, ACPI_NFIT5_OFFSET (StartAddress), "Start Address", 0}, 1228 ACPI_DMT_TERMINATOR 1229 }; 1230 1231 /* 6: Flush Hint Address Structure */ 1232 1233 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit6[] = 1234 { 1235 {ACPI_DMT_UINT32, ACPI_NFIT6_OFFSET (DeviceHandle), "Device Handle", 0}, 1236 {ACPI_DMT_UINT16, ACPI_NFIT6_OFFSET (HintCount), "Hint Count", 0}, 1237 {ACPI_DMT_UINT48, ACPI_NFIT6_OFFSET (Reserved[0]), "Reserved", 0}, 1238 ACPI_DMT_TERMINATOR 1239 }; 1240 1241 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit6a[] = 1242 { 1243 {ACPI_DMT_UINT64, 0, "Hint Address", DT_OPTIONAL}, 1244 ACPI_DMT_TERMINATOR 1245 }; 1246 1247 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit7[] = 1248 { 1249 {ACPI_DMT_UINT8, ACPI_NFIT7_OFFSET (HighestCapability), "Highest Capability", 0}, 1250 {ACPI_DMT_UINT24, ACPI_NFIT7_OFFSET (Reserved[0]), "Reserved", 0}, 1251 {ACPI_DMT_UINT32, ACPI_NFIT7_OFFSET (Capabilities), "Capabilities (decoded below)", DT_FLAG}, 1252 {ACPI_DMT_FLAG0, ACPI_NFIT7_FLAG_OFFSET (Capabilities,0), "Cache Flush to NVDIMM", 0}, 1253 {ACPI_DMT_FLAG1, ACPI_NFIT7_FLAG_OFFSET (Capabilities,0), "Memory Flush to NVDIMM", 0}, 1254 {ACPI_DMT_FLAG2, ACPI_NFIT7_FLAG_OFFSET (Capabilities,0), "Memory Mirroring", 0}, 1255 {ACPI_DMT_UINT32, ACPI_NFIT7_OFFSET (Reserved2), "Reserved", 0}, 1256 ACPI_DMT_TERMINATOR 1257 }; 1258 1259 1260 /******************************************************************************* 1261 * 1262 * NHLT - Non HD Audio Link Table. Conforms to Intel Smart Sound Technology 1263 * NHLT Specification, January 2020 Revision 0.8.1 1264 * 1265 ******************************************************************************/ 1266 1267 /* Main table */ 1268 1269 ACPI_DMTABLE_INFO AcpiDmTableInfoNhlt[] = 1270 { 1271 {ACPI_DMT_UINT8, ACPI_NHLT_OFFSET (EndpointCount), "Endpoint Count", 0}, 1272 ACPI_DMT_TERMINATOR 1273 }; 1274 1275 /* Endpoint config */ 1276 1277 ACPI_DMTABLE_INFO AcpiDmTableInfoNhlt0[] = 1278 { 1279 {ACPI_DMT_UINT32, ACPI_NHLT0_OFFSET (DescriptorLength), "Descriptor Length", DT_LENGTH}, 1280 {ACPI_DMT_NHLT1, ACPI_NHLT0_OFFSET (LinkType), "Link Type", 0}, 1281 {ACPI_DMT_UINT8, ACPI_NHLT0_OFFSET (InstanceId), "Instance Id", 0}, 1282 {ACPI_DMT_UINT16, ACPI_NHLT0_OFFSET (VendorId), "Vendor Id", 0}, 1283 {ACPI_DMT_NHLT1e, ACPI_NHLT0_OFFSET (DeviceId), "Device Id", 0}, 1284 {ACPI_DMT_UINT16, ACPI_NHLT0_OFFSET (RevisionId), "Revision Id", 0}, 1285 {ACPI_DMT_UINT32, ACPI_NHLT0_OFFSET (SubsystemId), "Subsystem Id", 0}, 1286 {ACPI_DMT_UINT8, ACPI_NHLT0_OFFSET (DeviceType), "Device Type", 0}, 1287 {ACPI_DMT_NHLT1a, ACPI_NHLT0_OFFSET (Direction), "Direction", 0}, 1288 {ACPI_DMT_UINT8, ACPI_NHLT0_OFFSET (VirtualBusId), "Virtual Bus Id", 0}, 1289 ACPI_DMT_TERMINATOR 1290 }; 1291 1292 /* Device_Specific config */ 1293 1294 ACPI_DMTABLE_INFO AcpiDmTableInfoNhlt1[] = 1295 { 1296 {ACPI_DMT_UINT32, ACPI_NHLT1_OFFSET (CapabilitiesSize), "Capabilities Size", 0}, 1297 {ACPI_DMT_UINT8, ACPI_NHLT1_OFFSET (VirtualSlot), "Virtual Slot", 0}, 1298 {ACPI_DMT_NHLT1f, ACPI_NHLT1_OFFSET (ConfigType), "Config Type", 0}, 1299 ACPI_DMT_TERMINATOR 1300 }; 1301 1302 /* Wave Format Extensible */ 1303 1304 ACPI_DMTABLE_INFO AcpiDmTableInfoNhlt2[] = 1305 { 1306 {ACPI_DMT_UINT16, ACPI_NHLT2_OFFSET (FormatTag), "Format Tag", 0}, 1307 {ACPI_DMT_UINT16, ACPI_NHLT2_OFFSET (ChannelCount), "Channel Count", 0}, 1308 {ACPI_DMT_UINT32, ACPI_NHLT2_OFFSET (SamplesPerSec), "Samples Per Second", 0}, 1309 {ACPI_DMT_UINT32, ACPI_NHLT2_OFFSET (AvgBytesPerSec), "Average Bytes Per Second", 0}, 1310 {ACPI_DMT_UINT16, ACPI_NHLT2_OFFSET (BlockAlign), "Block Alignment", 0}, 1311 {ACPI_DMT_UINT16, ACPI_NHLT2_OFFSET (BitsPerSample), "Bits Per Sample", 0}, 1312 {ACPI_DMT_UINT16, ACPI_NHLT2_OFFSET (ExtraFormatSize), "Extra Format Size", 0}, 1313 {ACPI_DMT_UINT16, ACPI_NHLT2_OFFSET (ValidBitsPerSample), "Valid Bits Per Sample", 0}, 1314 {ACPI_DMT_UINT32, ACPI_NHLT2_OFFSET (ChannelMask), "Channel Mask", 0}, 1315 {ACPI_DMT_UUID, ACPI_NHLT2_OFFSET (SubFormatGuid), "SubFormat GUID", 0}, 1316 ACPI_DMT_TERMINATOR 1317 }; 1318 1319 /* Format Config (wave_format_extensible structure) */ 1320 1321 ACPI_DMTABLE_INFO AcpiDmTableInfoNhlt3[] = 1322 { 1323 {ACPI_DMT_UINT16, ACPI_NHLT3_OFFSET (Format.FormatTag), "Format Tag", 0}, 1324 {ACPI_DMT_UINT16, ACPI_NHLT3_OFFSET (Format.ChannelCount), "Channel Count", 0}, 1325 {ACPI_DMT_UINT32, ACPI_NHLT3_OFFSET (Format.SamplesPerSec), "Samples Per Second", 0}, 1326 {ACPI_DMT_UINT32, ACPI_NHLT3_OFFSET (Format.AvgBytesPerSec), "Average Bytes Per Second", 0}, 1327 {ACPI_DMT_UINT16, ACPI_NHLT3_OFFSET (Format.BlockAlign), "Block Alignment", 0}, 1328 {ACPI_DMT_UINT16, ACPI_NHLT3_OFFSET (Format.BitsPerSample), "Bits Per Sample", 0}, 1329 {ACPI_DMT_UINT16, ACPI_NHLT3_OFFSET (Format.ExtraFormatSize), "Extra Format Size", 0}, 1330 {ACPI_DMT_UINT16, ACPI_NHLT3_OFFSET (Format.ValidBitsPerSample), "Valid Bits Per Sample", 0}, 1331 {ACPI_DMT_UINT32, ACPI_NHLT3_OFFSET (Format.ChannelMask), "Channel Mask", 0}, 1332 {ACPI_DMT_UUID, ACPI_NHLT3_OFFSET (Format.SubFormatGuid), "SubFormat GUID", 0}, 1333 {ACPI_DMT_UINT32, ACPI_NHLT3_OFFSET (CapabilitySize), "Capabilities Length", 0}, 1334 ACPI_DMT_TERMINATOR 1335 }; 1336 1337 /* 1338 * We treat the binary Capabilities field as its own subtable (to make 1339 * ACPI_DMT_RAW_BUFFER work properly). 1340 */ 1341 ACPI_DMTABLE_INFO AcpiDmTableInfoNhlt3a[] = 1342 { 1343 {ACPI_DMT_RAW_BUFFER, 0, "Capabilities", 0}, 1344 ACPI_DMT_TERMINATOR 1345 }; 1346 1347 /* Formats Config */ 1348 1349 ACPI_DMTABLE_INFO AcpiDmTableInfoNhlt4[] = 1350 { 1351 {ACPI_DMT_UINT8, ACPI_NHLT4_OFFSET (FormatsCount), "Formats Count", 0}, 1352 ACPI_DMT_TERMINATOR 1353 }; 1354 1355 /* Specific Config, CapabilitiesSize == 2 */ 1356 1357 ACPI_DMTABLE_INFO AcpiDmTableInfoNhlt5[] = 1358 { 1359 {ACPI_DMT_UINT8, ACPI_NHLT5_OFFSET (VirtualSlot), "Virtual Slot", 0}, 1360 {ACPI_DMT_NHLT1f, ACPI_NHLT5_OFFSET (ConfigType), "Config Type", 0}, 1361 ACPI_DMT_TERMINATOR 1362 }; 1363 1364 /* Specific Config, CapabilitiesSize == 3 */ 1365 1366 ACPI_DMTABLE_INFO AcpiDmTableInfoNhlt5a[] = 1367 { 1368 {ACPI_DMT_UINT8, ACPI_NHLT5A_OFFSET (VirtualSlot), "Virtual Slot", 0}, 1369 {ACPI_DMT_NHLT1f, ACPI_NHLT5A_OFFSET (ConfigType), "Config Type", 0}, 1370 {ACPI_DMT_NHLT1d, ACPI_NHLT5A_OFFSET (ArrayType), "Array Type", 0}, 1371 ACPI_DMT_TERMINATOR 1372 }; 1373 1374 /* Specific Config, CapabilitiesSize == 0 */ 1375 1376 ACPI_DMTABLE_INFO AcpiDmTableInfoNhlt5b[] = 1377 { 1378 {ACPI_DMT_UINT32, ACPI_NHLT5B_OFFSET (CapabilitiesSize), "Capabilities Size", 0}, 1379 ACPI_DMT_TERMINATOR 1380 }; 1381 1382 /* Specific Config, CapabilitiesSize == 1 */ 1383 1384 ACPI_DMTABLE_INFO AcpiDmTableInfoNhlt5c[] = 1385 { 1386 {ACPI_DMT_UINT8, ACPI_NHLT5C_OFFSET (VirtualSlot), "Virtual Slot", 0}, 1387 ACPI_DMT_TERMINATOR 1388 }; 1389 1390 /* Microphone array Config */ 1391 1392 ACPI_DMTABLE_INFO AcpiDmTableInfoNhlt6a[] = 1393 { 1394 {ACPI_DMT_UINT8, ACPI_NHLT6A_OFFSET (MicrophoneCount), "Microphone Count", 0}, 1395 ACPI_DMT_TERMINATOR 1396 }; 1397 1398 /* Render Feedback Device Config, CapabilitiesSize == 7 */ 1399 1400 ACPI_DMTABLE_INFO AcpiDmTableInfoNhlt6b[] = 1401 { 1402 {ACPI_DMT_UINT8, ACPI_NHLT6B_OFFSET (FeedbackVirtualSlot), "Feedback Virtual Slot", 0}, 1403 {ACPI_DMT_UINT16, ACPI_NHLT6B_OFFSET (FeedbackChannels), "Feedback Channels", 0}, 1404 {ACPI_DMT_UINT16, ACPI_NHLT6B_OFFSET (FeedbackValidBitsPerSample),"Valid Bits Per Sample", 0}, 1405 ACPI_DMT_TERMINATOR 1406 }; 1407 1408 ACPI_DMTABLE_INFO AcpiDmTableInfoNhlt6[] = 1409 { 1410 {ACPI_DMT_NHLT1b, ACPI_NHLT6_OFFSET (Type), "Type", 0}, 1411 {ACPI_DMT_NHLT1c, ACPI_NHLT6_OFFSET (Panel), "Panel", 0}, 1412 {ACPI_DMT_UINT16, ACPI_NHLT6_OFFSET (SpeakerPositionDistance), "Speaker Position Distance", 0}, 1413 {ACPI_DMT_UINT16, ACPI_NHLT6_OFFSET (HorizontalOffset), "Horizontal Offset", 0}, 1414 {ACPI_DMT_UINT16, ACPI_NHLT6_OFFSET (VerticalOffset), "Vertical Offset", 0}, 1415 {ACPI_DMT_UINT8, ACPI_NHLT6_OFFSET (FrequencyLowBand), "Frequency Low Band", 0}, 1416 {ACPI_DMT_UINT8, ACPI_NHLT6_OFFSET (FrequencyHighBand), "Frequency High Band", 0}, 1417 {ACPI_DMT_UINT16, ACPI_NHLT6_OFFSET (DirectionAngle), "Direction Angle", 0}, 1418 {ACPI_DMT_UINT16, ACPI_NHLT6_OFFSET (ElevationAngle), "Elevation Angle", 0}, 1419 {ACPI_DMT_UINT16, ACPI_NHLT6_OFFSET (WorkVerticalAngleBegin), "Work Vertical Angle Begin", 0}, 1420 {ACPI_DMT_UINT16, ACPI_NHLT6_OFFSET (WorkVerticalAngleEnd), "Work Vertical Angle End", 0}, 1421 {ACPI_DMT_UINT16, ACPI_NHLT6_OFFSET (WorkHorizontalAngleBegin), "Work Horizontal Angle Begin", 0}, 1422 {ACPI_DMT_UINT16, ACPI_NHLT6_OFFSET (WorkHorizontalAngleEnd), "Work Horizontal Angle End", 0}, 1423 ACPI_DMT_TERMINATOR 1424 }; 1425 1426 /* Number of DeviceInfo structures */ 1427 1428 ACPI_DMTABLE_INFO AcpiDmTableInfoNhlt7[] = 1429 { 1430 {ACPI_DMT_UINT8, ACPI_NHLT7_OFFSET (StructureCount), "Device Info struct count", 0}, 1431 ACPI_DMT_TERMINATOR 1432 }; 1433 1434 /* The DeviceInfo structure */ 1435 1436 ACPI_DMTABLE_INFO AcpiDmTableInfoNhlt7a[] = 1437 { 1438 {ACPI_DMT_UUID, ACPI_NHLT7A_OFFSET (DeviceId), "Device ID GUID", 0}, 1439 {ACPI_DMT_UINT8, ACPI_NHLT7A_OFFSET (DeviceInstanceId), "Device Instance ID", 0}, 1440 {ACPI_DMT_UINT8, ACPI_NHLT7A_OFFSET (DevicePortId), "Device Port ID", 0}, 1441 ACPI_DMT_TERMINATOR 1442 }; 1443 1444 ACPI_DMTABLE_INFO AcpiDmTableInfoNhlt7b[] = 1445 { 1446 {ACPI_DMT_RAW_BUFFER, 0, "Bytes", 0}, 1447 ACPI_DMT_TERMINATOR 1448 }; 1449 1450 /* Sensitivity Extension */ 1451 1452 ACPI_DMTABLE_INFO AcpiDmTableInfoNhlt9[] = 1453 { 1454 {ACPI_DMT_UINT32, ACPI_NHLT9_OFFSET (SNR), "Signal-to-noise ratio", 0}, 1455 {ACPI_DMT_UINT32, ACPI_NHLT9_OFFSET (Sensitivity), "Mic Sensitivity", 0}, 1456 ACPI_DMT_TERMINATOR 1457 }; 1458 1459 1460 /******************************************************************************* 1461 * 1462 * PCCT - Platform Communications Channel Table (ACPI 5.0) 1463 * 1464 ******************************************************************************/ 1465 1466 ACPI_DMTABLE_INFO AcpiDmTableInfoPcct[] = 1467 { 1468 {ACPI_DMT_UINT32, ACPI_PCCT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1469 {ACPI_DMT_FLAG0, ACPI_PCCT_FLAG_OFFSET (Flags,0), "Platform", 0}, 1470 {ACPI_DMT_UINT64, ACPI_PCCT_OFFSET (Reserved), "Reserved", 0}, 1471 ACPI_DMT_TERMINATOR 1472 }; 1473 1474 /* PCCT subtables */ 1475 1476 ACPI_DMTABLE_INFO AcpiDmTableInfoPcctHdr[] = 1477 { 1478 {ACPI_DMT_PCCT, ACPI_PCCT0_OFFSET (Header.Type), "Subtable Type", 0}, 1479 {ACPI_DMT_UINT8, ACPI_PCCT0_OFFSET (Header.Length), "Length", DT_LENGTH}, 1480 ACPI_DMT_TERMINATOR 1481 }; 1482 1483 /* 0: Generic Communications Subspace */ 1484 1485 ACPI_DMTABLE_INFO AcpiDmTableInfoPcct0[] = 1486 { 1487 {ACPI_DMT_UINT48, ACPI_PCCT0_OFFSET (Reserved[0]), "Reserved", 0}, 1488 {ACPI_DMT_UINT64, ACPI_PCCT0_OFFSET (BaseAddress), "Base Address", 0}, 1489 {ACPI_DMT_UINT64, ACPI_PCCT0_OFFSET (Length), "Address Length", 0}, 1490 {ACPI_DMT_GAS, ACPI_PCCT0_OFFSET (DoorbellRegister), "Doorbell Register", 0}, 1491 {ACPI_DMT_UINT64, ACPI_PCCT0_OFFSET (PreserveMask), "Preserve Mask", 0}, 1492 {ACPI_DMT_UINT64, ACPI_PCCT0_OFFSET (WriteMask), "Write Mask", 0}, 1493 {ACPI_DMT_UINT32, ACPI_PCCT0_OFFSET (Latency), "Command Latency", 0}, 1494 {ACPI_DMT_UINT32, ACPI_PCCT0_OFFSET (MaxAccessRate), "Maximum Access Rate", 0}, 1495 {ACPI_DMT_UINT16, ACPI_PCCT0_OFFSET (MinTurnaroundTime), "Minimum Turnaround Time", 0}, 1496 ACPI_DMT_TERMINATOR 1497 }; 1498 1499 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 1500 1501 ACPI_DMTABLE_INFO AcpiDmTableInfoPcct1[] = 1502 { 1503 {ACPI_DMT_UINT32, ACPI_PCCT1_OFFSET (PlatformInterrupt), "Platform Interrupt", 0}, 1504 {ACPI_DMT_UINT8, ACPI_PCCT1_OFFSET (Flags), "Flags (Decoded Below)", DT_FLAG}, 1505 {ACPI_DMT_FLAG0, ACPI_PCCT1_FLAG_OFFSET (Flags,0), "Polarity", 0}, 1506 {ACPI_DMT_FLAG1, ACPI_PCCT1_FLAG_OFFSET (Flags,0), "Mode", 0}, 1507 {ACPI_DMT_UINT8, ACPI_PCCT1_OFFSET (Reserved), "Reserved", 0}, 1508 {ACPI_DMT_UINT64, ACPI_PCCT1_OFFSET (BaseAddress), "Base Address", 0}, 1509 {ACPI_DMT_UINT64, ACPI_PCCT1_OFFSET (Length), "Address Length", 0}, 1510 {ACPI_DMT_GAS, ACPI_PCCT1_OFFSET (DoorbellRegister), "Doorbell Register", 0}, 1511 {ACPI_DMT_UINT64, ACPI_PCCT1_OFFSET (PreserveMask), "Preserve Mask", 0}, 1512 {ACPI_DMT_UINT64, ACPI_PCCT1_OFFSET (WriteMask), "Write Mask", 0}, 1513 {ACPI_DMT_UINT32, ACPI_PCCT1_OFFSET (Latency), "Command Latency", 0}, 1514 {ACPI_DMT_UINT32, ACPI_PCCT1_OFFSET (MaxAccessRate), "Maximum Access Rate", 0}, 1515 {ACPI_DMT_UINT16, ACPI_PCCT1_OFFSET (MinTurnaroundTime), "Minimum Turnaround Time", 0}, 1516 ACPI_DMT_TERMINATOR 1517 }; 1518 1519 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 1520 1521 ACPI_DMTABLE_INFO AcpiDmTableInfoPcct2[] = 1522 { 1523 {ACPI_DMT_UINT32, ACPI_PCCT2_OFFSET (PlatformInterrupt), "Platform Interrupt", 0}, 1524 {ACPI_DMT_UINT8, ACPI_PCCT2_OFFSET (Flags), "Flags (Decoded Below)", DT_FLAG}, 1525 {ACPI_DMT_FLAG0, ACPI_PCCT2_FLAG_OFFSET (Flags,0), "Polarity", 0}, 1526 {ACPI_DMT_FLAG1, ACPI_PCCT2_FLAG_OFFSET (Flags,0), "Mode", 0}, 1527 {ACPI_DMT_UINT8, ACPI_PCCT2_OFFSET (Reserved), "Reserved", 0}, 1528 {ACPI_DMT_UINT64, ACPI_PCCT2_OFFSET (BaseAddress), "Base Address", 0}, 1529 {ACPI_DMT_UINT64, ACPI_PCCT2_OFFSET (Length), "Address Length", 0}, 1530 {ACPI_DMT_GAS, ACPI_PCCT2_OFFSET (DoorbellRegister), "Doorbell Register", 0}, 1531 {ACPI_DMT_UINT64, ACPI_PCCT2_OFFSET (PreserveMask), "Preserve Mask", 0}, 1532 {ACPI_DMT_UINT64, ACPI_PCCT2_OFFSET (WriteMask), "Write Mask", 0}, 1533 {ACPI_DMT_UINT32, ACPI_PCCT2_OFFSET (Latency), "Command Latency", 0}, 1534 {ACPI_DMT_UINT32, ACPI_PCCT2_OFFSET (MaxAccessRate), "Maximum Access Rate", 0}, 1535 {ACPI_DMT_UINT16, ACPI_PCCT2_OFFSET (MinTurnaroundTime), "Minimum Turnaround Time", 0}, 1536 {ACPI_DMT_GAS, ACPI_PCCT2_OFFSET (PlatformAckRegister), "Platform ACK Register", 0}, 1537 {ACPI_DMT_UINT64, ACPI_PCCT2_OFFSET (AckPreserveMask), "ACK Preserve Mask", 0}, 1538 {ACPI_DMT_UINT64, ACPI_PCCT2_OFFSET (AckWriteMask), "ACK Write Mask", 0}, 1539 ACPI_DMT_TERMINATOR 1540 }; 1541 1542 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 1543 1544 ACPI_DMTABLE_INFO AcpiDmTableInfoPcct3[] = 1545 { 1546 {ACPI_DMT_UINT32, ACPI_PCCT3_OFFSET (PlatformInterrupt), "Platform Interrupt", 0}, 1547 {ACPI_DMT_UINT8, ACPI_PCCT3_OFFSET (Flags), "Flags (Decoded Below)", DT_FLAG}, 1548 {ACPI_DMT_FLAG0, ACPI_PCCT3_FLAG_OFFSET (Flags,0), "Polarity", 0}, 1549 {ACPI_DMT_FLAG1, ACPI_PCCT3_FLAG_OFFSET (Flags,0), "Mode", 0}, 1550 {ACPI_DMT_UINT8, ACPI_PCCT3_OFFSET (Reserved1), "Reserved", 0}, 1551 {ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (BaseAddress), "Base Address", 0}, 1552 {ACPI_DMT_UINT32, ACPI_PCCT3_OFFSET (Length), "Address Length", 0}, 1553 {ACPI_DMT_GAS, ACPI_PCCT3_OFFSET (DoorbellRegister), "Doorbell Register", 0}, 1554 {ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (PreserveMask), "Preserve Mask", 0}, 1555 {ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (WriteMask), "Write Mask", 0}, 1556 {ACPI_DMT_UINT32, ACPI_PCCT3_OFFSET (Latency), "Command Latency", 0}, 1557 {ACPI_DMT_UINT32, ACPI_PCCT3_OFFSET (MaxAccessRate), "Maximum Access Rate", 0}, 1558 {ACPI_DMT_UINT32, ACPI_PCCT3_OFFSET (MinTurnaroundTime), "Minimum Turnaround Time", 0}, 1559 {ACPI_DMT_GAS, ACPI_PCCT3_OFFSET (PlatformAckRegister), "Platform ACK Register", 0}, 1560 {ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (AckPreserveMask), "ACK Preserve Mask", 0}, 1561 {ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (AckSetMask), "ACK Set Mask", 0}, 1562 {ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (Reserved2), "Reserved", 0}, 1563 {ACPI_DMT_GAS, ACPI_PCCT3_OFFSET (CmdCompleteRegister), "Command Complete Register", 0}, 1564 {ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (CmdCompleteMask), "Command Complete Check Mask", 0}, 1565 {ACPI_DMT_GAS, ACPI_PCCT3_OFFSET (CmdUpdateRegister), "Command Update Register", 0}, 1566 {ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (CmdUpdatePreserveMask), "Command Update Preserve Mask", 0}, 1567 {ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (CmdUpdateSetMask), "Command Update Set Mask", 0}, 1568 {ACPI_DMT_GAS, ACPI_PCCT3_OFFSET (ErrorStatusRegister), "Error Status Register", 0}, 1569 {ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (ErrorStatusMask), "Error Status Mask", 0}, 1570 ACPI_DMT_TERMINATOR 1571 }; 1572 1573 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 1574 1575 ACPI_DMTABLE_INFO AcpiDmTableInfoPcct4[] = 1576 { 1577 {ACPI_DMT_UINT32, ACPI_PCCT4_OFFSET (PlatformInterrupt), "Platform Interrupt", 0}, 1578 {ACPI_DMT_UINT8, ACPI_PCCT4_OFFSET (Flags), "Flags (Decoded Below)", DT_FLAG}, 1579 {ACPI_DMT_FLAG0, ACPI_PCCT4_FLAG_OFFSET (Flags,0), "Polarity", 0}, 1580 {ACPI_DMT_FLAG1, ACPI_PCCT4_FLAG_OFFSET (Flags,0), "Mode", 0}, 1581 {ACPI_DMT_UINT8, ACPI_PCCT4_OFFSET (Reserved1), "Reserved", 0}, 1582 {ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (BaseAddress), "Base Address", 0}, 1583 {ACPI_DMT_UINT32, ACPI_PCCT4_OFFSET (Length), "Address Length", 0}, 1584 {ACPI_DMT_GAS, ACPI_PCCT4_OFFSET (DoorbellRegister), "Doorbell Register", 0}, 1585 {ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (PreserveMask), "Preserve Mask", 0}, 1586 {ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (WriteMask), "Write Mask", 0}, 1587 {ACPI_DMT_UINT32, ACPI_PCCT4_OFFSET (Latency), "Command Latency", 0}, 1588 {ACPI_DMT_UINT32, ACPI_PCCT4_OFFSET (MaxAccessRate), "Maximum Access Rate", 0}, 1589 {ACPI_DMT_UINT32, ACPI_PCCT4_OFFSET (MinTurnaroundTime), "Minimum Turnaround Time", 0}, 1590 {ACPI_DMT_GAS, ACPI_PCCT4_OFFSET (PlatformAckRegister), "Platform ACK Register", 0}, 1591 {ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (AckPreserveMask), "ACK Preserve Mask", 0}, 1592 {ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (AckSetMask), "ACK Set Mask", 0}, 1593 {ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (Reserved2), "Reserved", 0}, 1594 {ACPI_DMT_GAS, ACPI_PCCT4_OFFSET (CmdCompleteRegister), "Command Complete Register", 0}, 1595 {ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (CmdCompleteMask), "Command Complete Check Mask", 0}, 1596 {ACPI_DMT_GAS, ACPI_PCCT4_OFFSET (CmdUpdateRegister), "Command Update Register", 0}, 1597 {ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (CmdUpdatePreserveMask), "Command Update Preserve Mask", 0}, 1598 {ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (CmdUpdateSetMask), "Command Update Set Mask", 0}, 1599 {ACPI_DMT_GAS, ACPI_PCCT4_OFFSET (ErrorStatusRegister), "Error Status Register", 0}, 1600 {ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (ErrorStatusMask), "Error Status Mask", 0}, 1601 ACPI_DMT_TERMINATOR 1602 }; 1603 1604 /* 5: HW Registers based Communications Subspace */ 1605 1606 ACPI_DMTABLE_INFO AcpiDmTableInfoPcct5[] = 1607 { 1608 {ACPI_DMT_UINT16, ACPI_PCCT5_OFFSET (Version), "Version", 0}, 1609 {ACPI_DMT_UINT64, ACPI_PCCT5_OFFSET (BaseAddress), "Base Address", 0}, 1610 {ACPI_DMT_UINT64, ACPI_PCCT5_OFFSET (Length), "Length", 0}, 1611 {ACPI_DMT_GAS, ACPI_PCCT5_OFFSET (DoorbellRegister), "Doorbell Register", 0}, 1612 {ACPI_DMT_UINT64, ACPI_PCCT5_OFFSET (DoorbellPreserve), "Preserve Mask", 0}, 1613 {ACPI_DMT_UINT64, ACPI_PCCT5_OFFSET (DoorbellWrite), "Write Mask", 0}, 1614 {ACPI_DMT_GAS, ACPI_PCCT5_OFFSET (CmdCompleteRegister), "Command Complete Register", 0}, 1615 {ACPI_DMT_UINT64, ACPI_PCCT5_OFFSET (CmdCompleteMask), "Command Complete Check Mask", 0}, 1616 {ACPI_DMT_GAS, ACPI_PCCT5_OFFSET (ErrorStatusRegister), "Error Status Register", 0}, 1617 {ACPI_DMT_UINT64, ACPI_PCCT5_OFFSET (ErrorStatusMask), "Error Status Mask", 0}, 1618 {ACPI_DMT_UINT32, ACPI_PCCT5_OFFSET (NominalLatency), "Nominal Latency", 0}, 1619 {ACPI_DMT_UINT32, ACPI_PCCT5_OFFSET (MinTurnaroundTime), "Minimum Turnaround Time", 0}, 1620 ACPI_DMT_TERMINATOR 1621 }; 1622 1623 1624 /******************************************************************************* 1625 * 1626 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 1627 * 1628 ******************************************************************************/ 1629 1630 ACPI_DMTABLE_INFO AcpiDmTableInfoPdtt[] = 1631 { 1632 {ACPI_DMT_UINT8, ACPI_PDTT_OFFSET (TriggerCount), "Trigger Count", 0}, 1633 {ACPI_DMT_UINT24, ACPI_PDTT_OFFSET (Reserved), "Reserved", 0}, 1634 {ACPI_DMT_UINT32, ACPI_PDTT_OFFSET (ArrayOffset), "Array Offset", 0}, 1635 ACPI_DMT_TERMINATOR 1636 }; 1637 1638 ACPI_DMTABLE_INFO AcpiDmTableInfoPdtt0[] = 1639 { 1640 {ACPI_DMT_UINT8, ACPI_PDTT0_OFFSET (SubchannelId), "Subchannel Id", 0}, 1641 {ACPI_DMT_UINT8, ACPI_PDTT0_OFFSET (Flags), "Flags (Decoded Below)", DT_FLAG}, 1642 {ACPI_DMT_FLAG0, ACPI_PDTT0_FLAG_OFFSET (Flags,0), "Runtime Trigger", 0}, 1643 {ACPI_DMT_FLAG1, ACPI_PDTT0_FLAG_OFFSET (Flags,0), "Wait for Completion", 0}, 1644 {ACPI_DMT_FLAG2, ACPI_PDTT0_FLAG_OFFSET (Flags,0), "Trigger Order", 0}, 1645 ACPI_DMT_TERMINATOR 1646 }; 1647 1648 1649 /******************************************************************************* 1650 * 1651 * PHAT - Platform Health Assessment Table (ACPI 6.4) 1652 * 1653 ******************************************************************************/ 1654 1655 ACPI_DMTABLE_INFO AcpiDmTableInfoPhatHdr[] = 1656 { 1657 {ACPI_DMT_PHAT, ACPI_PHATH_OFFSET (Type), "Subtable Type", 0}, 1658 {ACPI_DMT_UINT16, ACPI_PHATH_OFFSET (Length), "Length", 0}, 1659 {ACPI_DMT_UINT8, ACPI_PHATH_OFFSET (Revision), "Revision", 0}, 1660 ACPI_DMT_TERMINATOR 1661 }; 1662 1663 /* 0: Firmware version table */ 1664 1665 ACPI_DMTABLE_INFO AcpiDmTableInfoPhat0[] = 1666 { 1667 {ACPI_DMT_UINT24, ACPI_PHAT0_OFFSET (Reserved), "Reserved", 0}, 1668 {ACPI_DMT_UINT32, ACPI_PHAT0_OFFSET (ElementCount), "Element Count", 0}, 1669 ACPI_DMT_TERMINATOR 1670 }; 1671 1672 ACPI_DMTABLE_INFO AcpiDmTableInfoPhat0a[] = 1673 { 1674 {ACPI_DMT_UUID, ACPI_PHAT0A_OFFSET (Guid), "GUID", 0}, 1675 {ACPI_DMT_UINT64, ACPI_PHAT0A_OFFSET (VersionValue), "Version Value", 0}, 1676 {ACPI_DMT_UINT32, ACPI_PHAT0A_OFFSET (ProducerId), "Producer ID", 0}, 1677 ACPI_DMT_TERMINATOR 1678 }; 1679 1680 /* 1: Firmware Health Data Record */ 1681 1682 ACPI_DMTABLE_INFO AcpiDmTableInfoPhat1[] = 1683 { 1684 {ACPI_DMT_UINT16, ACPI_PHAT1_OFFSET (Reserved), "Reserved", 0}, 1685 {ACPI_DMT_UINT8, ACPI_PHAT1_OFFSET (Health), "Health", 0}, 1686 {ACPI_DMT_UUID, ACPI_PHAT1_OFFSET (DeviceGuid), "Device GUID", 0}, 1687 {ACPI_DMT_UINT32, ACPI_PHAT1_OFFSET (DeviceSpecificOffset), "Device specific offset", 0}, 1688 ACPI_DMT_TERMINATOR 1689 }; 1690 1691 ACPI_DMTABLE_INFO AcpiDmTableInfoPhat1a[] = 1692 { 1693 {ACPI_DMT_STRING, 0, "Namepath", 0}, 1694 ACPI_DMT_TERMINATOR 1695 }; 1696 1697 ACPI_DMTABLE_INFO AcpiDmTableInfoPhat1b[] = 1698 { 1699 {ACPI_DMT_RAW_BUFFER, 0, "Vendor Data", 0}, 1700 ACPI_DMT_TERMINATOR 1701 }; 1702 1703 1704 /******************************************************************************* 1705 * 1706 * PMTT - Platform Memory Topology Table 1707 * 1708 ******************************************************************************/ 1709 1710 ACPI_DMTABLE_INFO AcpiDmTableInfoPmtt[] = 1711 { 1712 {ACPI_DMT_UINT32, ACPI_PMTT_OFFSET (MemoryDeviceCount), "Memory Device Count", 0}, 1713 ACPI_DMT_TERMINATOR 1714 }; 1715 1716 /* Common Subtable header (one per Subtable) */ 1717 1718 #define ACPI_DM_PMTT_HEADER \ 1719 {ACPI_DMT_PMTT, ACPI_PMTTH_OFFSET (Type), "Subtable Type", 0}, \ 1720 {ACPI_DMT_UINT8, ACPI_PMTTH_OFFSET (Reserved1), "Reserved", 0}, \ 1721 {ACPI_DMT_UINT16, ACPI_PMTTH_OFFSET (Length), "Length", DT_LENGTH}, \ 1722 {ACPI_DMT_UINT16, ACPI_PMTTH_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, \ 1723 {ACPI_DMT_FLAG0, ACPI_PMTTH_FLAG_OFFSET (Flags,0), "Top-level Device", 0}, \ 1724 {ACPI_DMT_FLAG1, ACPI_PMTTH_FLAG_OFFSET (Flags,0), "Physical Element", 0}, \ 1725 {ACPI_DMT_FLAGS2, ACPI_PMTTH_FLAG_OFFSET (Flags,0), "Memory Type", 0}, \ 1726 {ACPI_DMT_UINT16, ACPI_PMTTH_OFFSET (Reserved2), "Reserved", 0}, \ 1727 {ACPI_DMT_UINT32, ACPI_PMTTH_OFFSET (MemoryDeviceCount), "Memory Device Count", 0} 1728 1729 /* PMTT Subtables */ 1730 1731 /* 0: Socket */ 1732 1733 ACPI_DMTABLE_INFO AcpiDmTableInfoPmtt0[] = 1734 { 1735 ACPI_DM_PMTT_HEADER, 1736 {ACPI_DMT_UINT16, ACPI_PMTT0_OFFSET (SocketId), "Socket ID", 0}, 1737 {ACPI_DMT_UINT16, ACPI_PMTT0_OFFSET (Reserved), "Reserved", 0}, 1738 ACPI_DMT_TERMINATOR 1739 }; 1740 1741 /* 1: Memory Controller */ 1742 1743 ACPI_DMTABLE_INFO AcpiDmTableInfoPmtt1[] = 1744 { 1745 ACPI_DM_PMTT_HEADER, 1746 {ACPI_DMT_UINT16, ACPI_PMTT1_OFFSET (ControllerId), "Controller ID", 0}, 1747 {ACPI_DMT_UINT16, ACPI_PMTT1_OFFSET (Reserved), "Reserved", 0}, 1748 ACPI_DMT_TERMINATOR 1749 }; 1750 1751 /* 2: Physical Component */ 1752 1753 ACPI_DMTABLE_INFO AcpiDmTableInfoPmtt2[] = 1754 { 1755 ACPI_DM_PMTT_HEADER, 1756 {ACPI_DMT_UINT32, ACPI_PMTT2_OFFSET (BiosHandle), "Bios Handle", 0}, 1757 ACPI_DMT_TERMINATOR 1758 }; 1759 1760 /* 0xFF: Vendor Specific */ 1761 1762 ACPI_DMTABLE_INFO AcpiDmTableInfoPmttVendor[] = 1763 { 1764 ACPI_DM_PMTT_HEADER, 1765 {ACPI_DMT_UUID, ACPI_PMTT_VENDOR_OFFSET (TypeUuid), "Type Uuid", 0}, 1766 {ACPI_DMT_PMTT_VENDOR, ACPI_PMTT_VENDOR_OFFSET (Specific), "Vendor Data", 0}, 1767 ACPI_DMT_TERMINATOR 1768 }; 1769 1770 1771 /******************************************************************************* 1772 * 1773 * PPTT - Processor Properties Topology Table (ACPI 6.2) 1774 * 1775 ******************************************************************************/ 1776 1777 /* Main table consists of only the standard ACPI header - subtables follow */ 1778 1779 /* Common Subtable header (one per Subtable) */ 1780 1781 ACPI_DMTABLE_INFO AcpiDmTableInfoPpttHdr[] = 1782 { 1783 {ACPI_DMT_PPTT, ACPI_PPTTH_OFFSET (Type), "Subtable Type", 0}, 1784 {ACPI_DMT_UINT8, ACPI_PPTTH_OFFSET (Length), "Length", 0}, 1785 ACPI_DMT_TERMINATOR 1786 }; 1787 1788 /* 0: Processor hierarchy node */ 1789 1790 ACPI_DMTABLE_INFO AcpiDmTableInfoPptt0[] = 1791 { 1792 {ACPI_DMT_UINT16, ACPI_PPTT0_OFFSET (Reserved), "Reserved", 0}, 1793 {ACPI_DMT_UINT32, ACPI_PPTT0_OFFSET (Flags), "Flags (decoded below)", 0}, 1794 {ACPI_DMT_FLAG0, ACPI_PPTT0_FLAG_OFFSET (Flags,0), "Physical package", 0}, 1795 {ACPI_DMT_FLAG1, ACPI_PPTT0_FLAG_OFFSET (Flags,0), "ACPI Processor ID valid", 0}, 1796 {ACPI_DMT_FLAG2, ACPI_PPTT0_FLAG_OFFSET (Flags,0), "Processor is a thread", 0}, 1797 {ACPI_DMT_FLAG3, ACPI_PPTT0_FLAG_OFFSET (Flags,0), "Node is a leaf", 0}, 1798 {ACPI_DMT_FLAG4, ACPI_PPTT0_FLAG_OFFSET (Flags,0), "Identical Implementation", 0}, 1799 {ACPI_DMT_UINT32, ACPI_PPTT0_OFFSET (Parent), "Parent", 0}, 1800 {ACPI_DMT_UINT32, ACPI_PPTT0_OFFSET (AcpiProcessorId), "ACPI Processor ID", 0}, 1801 {ACPI_DMT_UINT32, ACPI_PPTT0_OFFSET (NumberOfPrivResources), "Private Resource Number", 0}, 1802 ACPI_DMT_TERMINATOR 1803 }; 1804 1805 ACPI_DMTABLE_INFO AcpiDmTableInfoPptt0a[] = 1806 { 1807 {ACPI_DMT_UINT32, 0, "Private Resource", DT_OPTIONAL}, 1808 ACPI_DMT_TERMINATOR 1809 }; 1810 1811 /* 1: Cache type */ 1812 1813 ACPI_DMTABLE_INFO AcpiDmTableInfoPptt1[] = 1814 { 1815 {ACPI_DMT_UINT16, ACPI_PPTT1_OFFSET (Reserved), "Reserved", 0}, 1816 {ACPI_DMT_UINT32, ACPI_PPTT1_OFFSET (Flags), "Flags (decoded below)", 0}, 1817 {ACPI_DMT_FLAG0, ACPI_PPTT1_FLAG_OFFSET (Flags,0), "Size valid", 0}, 1818 {ACPI_DMT_FLAG1, ACPI_PPTT1_FLAG_OFFSET (Flags,0), "Number of Sets valid", 0}, 1819 {ACPI_DMT_FLAG2, ACPI_PPTT1_FLAG_OFFSET (Flags,0), "Associativity valid", 0}, 1820 {ACPI_DMT_FLAG3, ACPI_PPTT1_FLAG_OFFSET (Flags,0), "Allocation Type valid", 0}, 1821 {ACPI_DMT_FLAG4, ACPI_PPTT1_FLAG_OFFSET (Flags,0), "Cache Type valid", 0}, 1822 {ACPI_DMT_FLAG5, ACPI_PPTT1_FLAG_OFFSET (Flags,0), "Write Policy valid", 0}, 1823 {ACPI_DMT_FLAG6, ACPI_PPTT1_FLAG_OFFSET (Flags,0), "Line Size valid", 0}, 1824 {ACPI_DMT_FLAG7, ACPI_PPTT1_FLAG_OFFSET (Flags,0), "Cache ID valid", 0}, 1825 {ACPI_DMT_UINT32, ACPI_PPTT1_OFFSET (NextLevelOfCache), "Next Level of Cache", 0}, 1826 {ACPI_DMT_UINT32, ACPI_PPTT1_OFFSET (Size), "Size", 0}, 1827 {ACPI_DMT_UINT32, ACPI_PPTT1_OFFSET (NumberOfSets), "Number of Sets", 0}, 1828 {ACPI_DMT_UINT8, ACPI_PPTT1_OFFSET (Associativity), "Associativity", 0}, 1829 {ACPI_DMT_UINT8, ACPI_PPTT1_OFFSET (Attributes), "Attributes", 0}, 1830 {ACPI_DMT_FLAGS0, ACPI_PPTT1_OFFSET (Attributes), "Allocation Type", 0}, 1831 {ACPI_DMT_FLAGS2, ACPI_PPTT1_OFFSET (Attributes), "Cache Type", 0}, 1832 {ACPI_DMT_FLAG4, ACPI_PPTT1_OFFSET (Attributes), "Write Policy", 0}, 1833 {ACPI_DMT_UINT16, ACPI_PPTT1_OFFSET (LineSize), "Line Size", 0}, 1834 ACPI_DMT_TERMINATOR 1835 }; 1836 1837 /* 1: cache type v1 */ 1838 1839 ACPI_DMTABLE_INFO AcpiDmTableInfoPptt1a[] = 1840 { 1841 {ACPI_DMT_UINT32, ACPI_PPTT1A_OFFSET (CacheId), "Cache ID", 0}, 1842 ACPI_DMT_TERMINATOR 1843 }; 1844 1845 /* 2: ID */ 1846 1847 ACPI_DMTABLE_INFO AcpiDmTableInfoPptt2[] = 1848 { 1849 {ACPI_DMT_UINT16, ACPI_PPTT2_OFFSET (Reserved), "Reserved", 0}, 1850 {ACPI_DMT_UINT32, ACPI_PPTT2_OFFSET (VendorId), "Vendor ID", 0}, 1851 {ACPI_DMT_UINT64, ACPI_PPTT2_OFFSET (Level1Id), "Level1 ID", 0}, 1852 {ACPI_DMT_UINT64, ACPI_PPTT2_OFFSET (Level2Id), "Level2 ID", 0}, 1853 {ACPI_DMT_UINT16, ACPI_PPTT2_OFFSET (MajorRev), "Major revision", 0}, 1854 {ACPI_DMT_UINT16, ACPI_PPTT2_OFFSET (MinorRev), "Minor revision", 0}, 1855 {ACPI_DMT_UINT16, ACPI_PPTT2_OFFSET (SpinRev), "Spin revision", 0}, 1856 ACPI_DMT_TERMINATOR 1857 }; 1858 1859 1860 /******************************************************************************* 1861 * 1862 * PRMT - Platform Runtime Mechanism Table 1863 * Version 1 1864 * 1865 ******************************************************************************/ 1866 1867 ACPI_DMTABLE_INFO AcpiDmTableInfoPrmtHdr[] = 1868 { 1869 {ACPI_DMT_UUID, ACPI_PRMTH_OFFSET (PlatformGuid[0]), "Platform GUID", 0}, 1870 {ACPI_DMT_UINT32, ACPI_PRMTH_OFFSET (ModuleInfoOffset), "Module info offset", 0}, 1871 {ACPI_DMT_UINT32, ACPI_PRMTH_OFFSET (ModuleInfoCount), "Module info count", 0}, 1872 ACPI_DMT_NEW_LINE, 1873 ACPI_DMT_TERMINATOR 1874 1875 }; 1876 1877 ACPI_DMTABLE_INFO AcpiDmTableInfoPrmtModule[] = 1878 { 1879 {ACPI_DMT_UINT16, ACPI_PRMT0_OFFSET (Revision), "Revision", 0}, 1880 {ACPI_DMT_UINT16, ACPI_PRMT0_OFFSET (Length), "Length", 0}, 1881 {ACPI_DMT_UUID, ACPI_PRMT0_OFFSET (ModuleGuid[0]), "Module GUID", 0}, 1882 {ACPI_DMT_UINT16, ACPI_PRMT0_OFFSET (MajorRev), "Major Revision", 0}, 1883 {ACPI_DMT_UINT16, ACPI_PRMT0_OFFSET (MinorRev), "Minor Revision", 0}, 1884 {ACPI_DMT_UINT16, ACPI_PRMT0_OFFSET (HandlerInfoCount), "Handler Info Count", 0}, 1885 {ACPI_DMT_UINT32, ACPI_PRMT0_OFFSET (HandlerInfoOffset), "Handler Info Offset", 0}, 1886 {ACPI_DMT_UINT64, ACPI_PRMT0_OFFSET (MmioListPointer), "Mmio List pointer", 0}, 1887 ACPI_DMT_NEW_LINE, 1888 ACPI_DMT_TERMINATOR 1889 1890 }; 1891 1892 ACPI_DMTABLE_INFO AcpiDmTableInfoPrmtHandler[] = 1893 { 1894 {ACPI_DMT_UINT16, ACPI_PRMT1_OFFSET (Revision), "Revision", 0}, 1895 {ACPI_DMT_UINT16, ACPI_PRMT1_OFFSET (Length), "Length", 0}, 1896 {ACPI_DMT_UUID, ACPI_PRMT1_OFFSET (HandlerGuid[0]), "Handler GUID", 0}, 1897 {ACPI_DMT_UINT64, ACPI_PRMT1_OFFSET (HandlerAddress), "Handler address", 0}, 1898 {ACPI_DMT_UINT64, ACPI_PRMT1_OFFSET (StaticDataBufferAddress),"Satic Data Address", 0}, 1899 {ACPI_DMT_UINT64, ACPI_PRMT1_OFFSET (AcpiParamBufferAddress), "ACPI Parameter Address", 0}, 1900 ACPI_DMT_NEW_LINE, 1901 ACPI_DMT_TERMINATOR 1902 1903 }; 1904 1905 1906 /******************************************************************************* 1907 * 1908 * RASF - RAS Feature table 1909 * 1910 ******************************************************************************/ 1911 1912 ACPI_DMTABLE_INFO AcpiDmTableInfoRasf[] = 1913 { 1914 {ACPI_DMT_BUF12, ACPI_RASF_OFFSET (ChannelId[0]), "Channel ID", 0}, 1915 ACPI_DMT_TERMINATOR 1916 }; 1917 1918 1919 /******************************************************************************* 1920 * 1921 * RGRT - Regulatory Graphics Resource Table 1922 * 1923 ******************************************************************************/ 1924 1925 ACPI_DMTABLE_INFO AcpiDmTableInfoRgrt[] = 1926 { 1927 {ACPI_DMT_UINT16, ACPI_RGRT_OFFSET (Version), "Version", 0}, 1928 {ACPI_DMT_RGRT, ACPI_RGRT_OFFSET (ImageType), "Image Type", 0}, 1929 {ACPI_DMT_UINT8, ACPI_RGRT_OFFSET (Reserved), "Reserved", 0}, 1930 ACPI_DMT_TERMINATOR 1931 }; 1932 1933 /* 1934 * We treat the binary image field as its own subtable (to make 1935 * ACPI_DMT_RAW_BUFFER work properly). 1936 */ 1937 ACPI_DMTABLE_INFO AcpiDmTableInfoRgrt0[] = 1938 { 1939 {ACPI_DMT_RAW_BUFFER, 0, "Image", 0}, 1940 ACPI_DMT_TERMINATOR 1941 }; 1942 1943 1944 /******************************************************************************* 1945 * 1946 * S3PT - S3 Performance Table 1947 * 1948 ******************************************************************************/ 1949 1950 ACPI_DMTABLE_INFO AcpiDmTableInfoS3pt[] = 1951 { 1952 {ACPI_DMT_SIG, ACPI_S3PT_OFFSET (Signature[0]), "Signature", 0}, 1953 {ACPI_DMT_UINT32, ACPI_S3PT_OFFSET (Length), "Length", DT_LENGTH}, 1954 ACPI_DMT_TERMINATOR 1955 }; 1956 1957 /* S3PT subtable header */ 1958 1959 ACPI_DMTABLE_INFO AcpiDmTableInfoS3ptHdr[] = 1960 { 1961 {ACPI_DMT_UINT16, ACPI_S3PTH_OFFSET (Type), "Type", 0}, 1962 {ACPI_DMT_UINT8, ACPI_S3PTH_OFFSET (Length), "Length", DT_LENGTH}, 1963 {ACPI_DMT_UINT8, ACPI_S3PTH_OFFSET (Revision), "Revision", 0}, 1964 ACPI_DMT_TERMINATOR 1965 }; 1966 1967 /* 0: Basic S3 Resume Performance Record */ 1968 1969 ACPI_DMTABLE_INFO AcpiDmTableInfoS3pt0[] = 1970 { 1971 {ACPI_DMT_UINT32, ACPI_S3PT0_OFFSET (ResumeCount), "Resume Count", 0}, 1972 {ACPI_DMT_UINT64, ACPI_S3PT0_OFFSET (FullResume), "Full Resume", 0}, 1973 {ACPI_DMT_UINT64, ACPI_S3PT0_OFFSET (AverageResume), "Average Resume", 0}, 1974 ACPI_DMT_TERMINATOR 1975 }; 1976 1977 /* 1: Basic S3 Suspend Performance Record */ 1978 1979 ACPI_DMTABLE_INFO AcpiDmTableInfoS3pt1[] = 1980 { 1981 {ACPI_DMT_UINT64, ACPI_S3PT1_OFFSET (SuspendStart), "Suspend Start", 0}, 1982 {ACPI_DMT_UINT64, ACPI_S3PT1_OFFSET (SuspendEnd), "Suspend End", 0}, 1983 ACPI_DMT_TERMINATOR 1984 }; 1985 1986 1987 /******************************************************************************* 1988 * 1989 * SBST - Smart Battery Specification Table 1990 * 1991 ******************************************************************************/ 1992 1993 ACPI_DMTABLE_INFO AcpiDmTableInfoSbst[] = 1994 { 1995 {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (WarningLevel), "Warning Level", 0}, 1996 {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (LowLevel), "Low Level", 0}, 1997 {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (CriticalLevel), "Critical Level", 0}, 1998 ACPI_DMT_TERMINATOR 1999 }; 2000 2001 2002 /******************************************************************************* 2003 * 2004 * SDEI - Software Delegated Exception Interface Descriptor Table 2005 * 2006 ******************************************************************************/ 2007 2008 ACPI_DMTABLE_INFO AcpiDmTableInfoSdei[] = 2009 { 2010 ACPI_DMT_TERMINATOR 2011 }; 2012 2013 2014 /******************************************************************************* 2015 * 2016 * SDEV - Secure Devices Table (ACPI 6.2) 2017 * 2018 ******************************************************************************/ 2019 2020 ACPI_DMTABLE_INFO AcpiDmTableInfoSdev[] = 2021 { 2022 ACPI_DMT_TERMINATOR 2023 }; 2024 2025 /* Common Subtable header (one per Subtable) */ 2026 2027 ACPI_DMTABLE_INFO AcpiDmTableInfoSdevHdr[] = 2028 { 2029 {ACPI_DMT_SDEV, ACPI_SDEVH_OFFSET (Type), "Subtable Type", 0}, 2030 {ACPI_DMT_UINT8, ACPI_SDEVH_OFFSET (Flags), "Flags (decoded below)", 0}, 2031 {ACPI_DMT_FLAG0, ACPI_SDEVH_FLAG_OFFSET (Flags,0), "Allow handoff to unsecure OS", 0}, 2032 {ACPI_DMT_FLAG1, ACPI_SDEVH_FLAG_OFFSET (Flags,0), "Secure access components present", 0}, 2033 {ACPI_DMT_UINT16, ACPI_SDEVH_OFFSET (Length), "Length", DT_LENGTH}, 2034 ACPI_DMT_TERMINATOR 2035 }; 2036 2037 /* SDEV Subtables */ 2038 2039 /* 0: Namespace Device Based Secure Device Structure */ 2040 2041 ACPI_DMTABLE_INFO AcpiDmTableInfoSdev0[] = 2042 { 2043 {ACPI_DMT_UINT16, ACPI_SDEV0_OFFSET (DeviceIdOffset), "Device ID Offset", 0}, 2044 {ACPI_DMT_UINT16, ACPI_SDEV0_OFFSET (DeviceIdLength), "Device ID Length", 0}, 2045 {ACPI_DMT_UINT16, ACPI_SDEV0_OFFSET (VendorDataOffset), "Vendor Data Offset", 0}, 2046 {ACPI_DMT_UINT16, ACPI_SDEV0_OFFSET (VendorDataLength), "Vendor Data Length", 0}, 2047 ACPI_DMT_TERMINATOR 2048 }; 2049 2050 ACPI_DMTABLE_INFO AcpiDmTableInfoSdev0a[] = 2051 { 2052 {ACPI_DMT_STRING, 0, "Namepath", 0}, 2053 ACPI_DMT_TERMINATOR 2054 }; 2055 2056 ACPI_DMTABLE_INFO AcpiDmTableInfoSdev0b[] = 2057 { 2058 {ACPI_DMT_UINT16, ACPI_SDEV0B_OFFSET (SecureComponentOffset), "Secure Access Components Offset", 0}, 2059 {ACPI_DMT_UINT16, ACPI_SDEV0B_OFFSET (SecureComponentLength), "Secure Access Components Length", 0}, 2060 ACPI_DMT_TERMINATOR 2061 }; 2062 2063 /* Secure access components */ 2064 2065 /* Common secure access components header secure access component */ 2066 2067 ACPI_DMTABLE_INFO AcpiDmTableInfoSdevSecCompHdr[] = 2068 { 2069 {ACPI_DMT_UINT8, ACPI_SDEVCH_OFFSET (Type), "Secure Component Type", 0}, 2070 {ACPI_DMT_UINT8, ACPI_SDEVCH_OFFSET (Flags), "Flags (decoded below)", 0}, 2071 {ACPI_DMT_UINT16, ACPI_SDEVCH_OFFSET (Length), "Length", 0}, 2072 ACPI_DMT_TERMINATOR 2073 }; 2074 2075 /* 0: Identification Based Secure Access Component */ 2076 2077 ACPI_DMTABLE_INFO AcpiDmTableInfoSdevSecCompId[] = 2078 { 2079 {ACPI_DMT_UINT16, ACPI_SDEVC0_OFFSET (HardwareIdOffset), "Hardware ID Offset", 0}, 2080 {ACPI_DMT_UINT16, ACPI_SDEVC0_OFFSET (HardwareIdLength), "Hardware ID Length", 0}, 2081 {ACPI_DMT_UINT16, ACPI_SDEVC0_OFFSET (SubsystemIdOffset), "Subsystem ID Offset", 0}, 2082 {ACPI_DMT_UINT16, ACPI_SDEVC0_OFFSET (SubsystemIdLength), "Subsystem ID Length", 0}, 2083 {ACPI_DMT_UINT16, ACPI_SDEVC0_OFFSET (HardwareRevision), "Hardware Revision", 0}, 2084 {ACPI_DMT_UINT8, ACPI_SDEVC0_OFFSET (HardwareRevPresent), "Hardware Rev Present", 0}, 2085 {ACPI_DMT_UINT8, ACPI_SDEVC0_OFFSET (ClassCodePresent), "Class Code Present", 0}, 2086 {ACPI_DMT_UINT8, ACPI_SDEVC0_OFFSET (PciBaseClass), "PCI Base Class", 0}, 2087 {ACPI_DMT_UINT8, ACPI_SDEVC0_OFFSET (PciSubClass), "PCI SubClass", 0}, 2088 {ACPI_DMT_UINT8, ACPI_SDEVC0_OFFSET (PciProgrammingXface), "PCI Programming Xface", 0}, 2089 ACPI_DMT_TERMINATOR 2090 }; 2091 2092 /* 1: Memory Based Secure Access Component */ 2093 2094 ACPI_DMTABLE_INFO AcpiDmTableInfoSdevSecCompMem[] = 2095 { 2096 {ACPI_DMT_UINT32, ACPI_SDEVC1_OFFSET (Reserved), "Reserved", 0}, 2097 {ACPI_DMT_UINT64, ACPI_SDEVC1_OFFSET (MemoryBaseAddress), "Memory Base Address", 0}, 2098 {ACPI_DMT_UINT64, ACPI_SDEVC1_OFFSET (MemoryLength), "Memory Length", 0}, 2099 ACPI_DMT_TERMINATOR 2100 }; 2101 2102 2103 /* 1: PCIe Endpoint Device Based Device Structure */ 2104 2105 ACPI_DMTABLE_INFO AcpiDmTableInfoSdev1[] = 2106 { 2107 {ACPI_DMT_UINT16, ACPI_SDEV1_OFFSET (Segment), "Segment", 0}, 2108 {ACPI_DMT_UINT16, ACPI_SDEV1_OFFSET (StartBus), "Start Bus", 0}, 2109 {ACPI_DMT_UINT16, ACPI_SDEV1_OFFSET (PathOffset), "Path Offset", 0}, 2110 {ACPI_DMT_UINT16, ACPI_SDEV1_OFFSET (PathLength), "Path Length", 0}, 2111 {ACPI_DMT_UINT16, ACPI_SDEV1_OFFSET (VendorDataOffset), "Vendor Data Offset", 0}, 2112 {ACPI_DMT_UINT16, ACPI_SDEV1_OFFSET (VendorDataLength), "Vendor Data Length", 0}, 2113 ACPI_DMT_TERMINATOR 2114 }; 2115 2116 ACPI_DMTABLE_INFO AcpiDmTableInfoSdev1a[] = 2117 { 2118 {ACPI_DMT_UINT8, ACPI_SDEV1A_OFFSET (Device), "Device", 0}, 2119 {ACPI_DMT_UINT8, ACPI_SDEV1A_OFFSET (Function), "Function", 0}, 2120 ACPI_DMT_TERMINATOR 2121 }; 2122 2123 ACPI_DMTABLE_INFO AcpiDmTableInfoSdev1b[] = 2124 { 2125 {ACPI_DMT_RAW_BUFFER, 0, "Vendor Data", 0}, /*, DT_OPTIONAL}, */ 2126 ACPI_DMT_TERMINATOR 2127 }; 2128 2129 /*! [End] no source code translation !*/ 2130