1 /* SPDX-License-Identifier: ISC */ 2 /* 3 * Copyright (C) 2022 MediaTek Inc. 4 */ 5 6 #ifndef __MT7996_H 7 #define __MT7996_H 8 9 #include <linux/interrupt.h> 10 #include <linux/ktime.h> 11 #if defined(__FreeBSD__) 12 #include <linux/uuid.h> 13 #endif 14 #include "../mt76_connac.h" 15 #include "regs.h" 16 17 #define MT7996_MAX_INTERFACES 19 /* per-band */ 18 #define MT7996_MAX_WMM_SETS 4 19 #define MT7996_WTBL_RESERVED (mt7996_wtbl_size(dev) - 1) 20 #define MT7996_WTBL_STA (MT7996_WTBL_RESERVED - \ 21 mt7996_max_interface_num(dev)) 22 23 #define MT7996_WATCHDOG_TIME (HZ / 10) 24 #define MT7996_RESET_TIMEOUT (30 * HZ) 25 26 #define MT7996_TX_RING_SIZE 2048 27 #define MT7996_TX_MCU_RING_SIZE 256 28 #define MT7996_TX_FWDL_RING_SIZE 128 29 30 #define MT7996_RX_RING_SIZE 1536 31 #define MT7996_RX_MCU_RING_SIZE 512 32 #define MT7996_RX_MCU_RING_SIZE_WA 1024 33 34 #define MT7996_FIRMWARE_WA "mediatek/mt7996/mt7996_wa.bin" 35 #define MT7996_FIRMWARE_WM "mediatek/mt7996/mt7996_wm.bin" 36 #define MT7996_FIRMWARE_DSP "mediatek/mt7996/mt7996_dsp.bin" 37 #define MT7996_ROM_PATCH "mediatek/mt7996/mt7996_rom_patch.bin" 38 39 #define MT7996_EEPROM_DEFAULT "mediatek/mt7996/mt7996_eeprom.bin" 40 #define MT7996_EEPROM_SIZE 7680 41 #define MT7996_EEPROM_BLOCK_SIZE 16 42 #define MT7996_TOKEN_SIZE 16384 43 44 #define MT7996_CFEND_RATE_DEFAULT 0x49 /* OFDM 24M */ 45 #define MT7996_CFEND_RATE_11B 0x03 /* 11B LP, 11M */ 46 47 #define MT7996_MAX_TWT_AGRT 16 48 #define MT7996_MAX_STA_TWT_AGRT 8 49 #define MT7996_MAX_QUEUE (__MT_RXQ_MAX + __MT_MCUQ_MAX + 3) 50 51 /* NOTE: used to map mt76_rates. idx may change if firmware expands table */ 52 #define MT7996_BASIC_RATES_TBL 11 53 #define MT7996_BEACON_RATES_TBL 25 54 55 struct mt7996_vif; 56 struct mt7996_sta; 57 struct mt7996_dfs_pulse; 58 struct mt7996_dfs_pattern; 59 60 enum mt7996_ram_type { 61 MT7996_RAM_TYPE_WM, 62 MT7996_RAM_TYPE_WA, 63 MT7996_RAM_TYPE_DSP, 64 }; 65 66 enum mt7996_txq_id { 67 MT7996_TXQ_FWDL = 16, 68 MT7996_TXQ_MCU_WM, 69 MT7996_TXQ_BAND0, 70 MT7996_TXQ_BAND1, 71 MT7996_TXQ_MCU_WA, 72 MT7996_TXQ_BAND2, 73 }; 74 75 enum mt7996_rxq_id { 76 MT7996_RXQ_MCU_WM = 0, 77 MT7996_RXQ_MCU_WA, 78 MT7996_RXQ_MCU_WA_MAIN = 2, 79 MT7996_RXQ_MCU_WA_EXT = 2,/* unused */ 80 MT7996_RXQ_MCU_WA_TRI = 3, 81 MT7996_RXQ_BAND0 = 4, 82 MT7996_RXQ_BAND1 = 4,/* unused */ 83 MT7996_RXQ_BAND2 = 5, 84 }; 85 86 struct mt7996_twt_flow { 87 struct list_head list; 88 u64 start_tsf; 89 u64 tsf; 90 u32 duration; 91 u16 wcid; 92 __le16 mantissa; 93 u8 exp; 94 u8 table_id; 95 u8 id; 96 u8 protection:1; 97 u8 flowtype:1; 98 u8 trigger:1; 99 u8 sched:1; 100 }; 101 102 DECLARE_EWMA(avg_signal, 10, 8) 103 104 struct mt7996_sta { 105 struct mt76_wcid wcid; /* must be first */ 106 107 struct mt7996_vif *vif; 108 109 struct list_head rc_list; 110 u32 airtime_ac[8]; 111 112 int ack_signal; 113 struct ewma_avg_signal avg_ack_signal; 114 115 unsigned long changed; 116 unsigned long jiffies; 117 118 struct mt76_connac_sta_key_conf bip; 119 120 struct { 121 u8 flowid_mask; 122 struct mt7996_twt_flow flow[MT7996_MAX_STA_TWT_AGRT]; 123 } twt; 124 }; 125 126 struct mt7996_vif { 127 struct mt76_vif mt76; /* must be first */ 128 129 struct mt7996_sta sta; 130 struct mt7996_phy *phy; 131 132 struct ieee80211_tx_queue_params queue_params[IEEE80211_NUM_ACS]; 133 struct cfg80211_bitrate_mask bitrate_mask; 134 }; 135 136 /* crash-dump */ 137 struct mt7996_crash_data { 138 guid_t guid; 139 struct timespec64 timestamp; 140 141 u8 *memdump_buf; 142 size_t memdump_buf_len; 143 }; 144 145 struct mt7996_hif { 146 struct list_head list; 147 148 struct device *dev; 149 void __iomem *regs; 150 int irq; 151 }; 152 153 struct mt7996_phy { 154 struct mt76_phy *mt76; 155 struct mt7996_dev *dev; 156 157 struct ieee80211_sband_iftype_data iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES]; 158 159 struct ieee80211_vif *monitor_vif; 160 161 u32 rxfilter; 162 u64 omac_mask; 163 164 u16 noise; 165 166 s16 coverage_class; 167 u8 slottime; 168 169 u8 rdd_state; 170 171 u32 rx_ampdu_ts; 172 u32 ampdu_ref; 173 174 struct mt76_mib_stats mib; 175 struct mt76_channel_state state_ts; 176 }; 177 178 struct mt7996_dev { 179 union { /* must be first */ 180 struct mt76_dev mt76; 181 struct mt76_phy mphy; 182 }; 183 184 struct mt7996_hif *hif2; 185 struct mt7996_reg_desc reg; 186 u8 q_id[MT7996_MAX_QUEUE]; 187 u32 q_int_mask[MT7996_MAX_QUEUE]; 188 u32 q_wfdma_mask; 189 190 const struct mt76_bus_ops *bus_ops; 191 struct mt7996_phy phy; 192 193 /* monitor rx chain configured channel */ 194 struct cfg80211_chan_def rdd2_chandef; 195 struct mt7996_phy *rdd2_phy; 196 197 u16 chainmask; 198 u8 chainshift[__MT_MAX_BAND]; 199 u32 hif_idx; 200 201 struct work_struct init_work; 202 struct work_struct rc_work; 203 struct work_struct dump_work; 204 struct work_struct reset_work; 205 wait_queue_head_t reset_wait; 206 struct { 207 u32 state; 208 u32 wa_reset_count; 209 u32 wm_reset_count; 210 bool hw_full_reset:1; 211 bool hw_init_done:1; 212 bool restart:1; 213 } recovery; 214 215 /* protects coredump data */ 216 struct mutex dump_mutex; 217 #ifdef CONFIG_DEV_COREDUMP 218 struct { 219 struct mt7996_crash_data *crash_data; 220 } coredump; 221 #endif 222 223 struct list_head sta_rc_list; 224 struct list_head twt_list; 225 226 u32 hw_pattern; 227 228 bool dbdc_support:1; 229 bool tbtc_support:1; 230 bool flash_mode:1; 231 bool has_eht:1; 232 233 bool ibf; 234 u8 fw_debug_wm; 235 u8 fw_debug_wa; 236 u8 fw_debug_bin; 237 u16 fw_debug_seq; 238 239 struct dentry *debugfs_dir; 240 struct rchan *relay_fwlog; 241 242 struct { 243 u8 table_mask; 244 u8 n_agrt; 245 } twt; 246 247 u32 reg_l1_backup; 248 u32 reg_l2_backup; 249 250 u8 wtbl_size_group; 251 }; 252 253 enum { 254 WFDMA0 = 0x0, 255 WFDMA1, 256 WFDMA_EXT, 257 __MT_WFDMA_MAX, 258 }; 259 260 enum { 261 MT_RX_SEL0, 262 MT_RX_SEL1, 263 MT_RX_SEL2, /* monitor chain */ 264 }; 265 266 enum mt7996_rdd_cmd { 267 RDD_STOP, 268 RDD_START, 269 RDD_DET_MODE, 270 RDD_RADAR_EMULATE, 271 RDD_START_TXQ = 20, 272 RDD_CAC_START = 50, 273 RDD_CAC_END, 274 RDD_NORMAL_START, 275 RDD_DISABLE_DFS_CAL, 276 RDD_PULSE_DBG, 277 RDD_READ_PULSE, 278 RDD_RESUME_BF, 279 RDD_IRQ_OFF, 280 }; 281 282 static inline struct mt7996_phy * 283 mt7996_hw_phy(struct ieee80211_hw *hw) 284 { 285 struct mt76_phy *phy = hw->priv; 286 287 return phy->priv; 288 } 289 290 static inline struct mt7996_dev * 291 mt7996_hw_dev(struct ieee80211_hw *hw) 292 { 293 struct mt76_phy *phy = hw->priv; 294 295 return container_of(phy->dev, struct mt7996_dev, mt76); 296 } 297 298 static inline struct mt7996_phy * 299 __mt7996_phy(struct mt7996_dev *dev, enum mt76_band_id band) 300 { 301 struct mt76_phy *phy = dev->mt76.phys[band]; 302 303 if (!phy) 304 return NULL; 305 306 return phy->priv; 307 } 308 309 static inline struct mt7996_phy * 310 mt7996_phy2(struct mt7996_dev *dev) 311 { 312 return __mt7996_phy(dev, MT_BAND1); 313 } 314 315 static inline struct mt7996_phy * 316 mt7996_phy3(struct mt7996_dev *dev) 317 { 318 return __mt7996_phy(dev, MT_BAND2); 319 } 320 321 extern const struct ieee80211_ops mt7996_ops; 322 extern struct pci_driver mt7996_pci_driver; 323 extern struct pci_driver mt7996_hif_driver; 324 325 struct mt7996_dev *mt7996_mmio_probe(struct device *pdev, 326 void __iomem *mem_base, u32 device_id); 327 void mt7996_wfsys_reset(struct mt7996_dev *dev); 328 irqreturn_t mt7996_irq_handler(int irq, void *dev_instance); 329 u64 __mt7996_get_tsf(struct ieee80211_hw *hw, struct mt7996_vif *mvif); 330 int mt7996_register_device(struct mt7996_dev *dev); 331 void mt7996_unregister_device(struct mt7996_dev *dev); 332 int mt7996_eeprom_init(struct mt7996_dev *dev); 333 int mt7996_eeprom_parse_hw_cap(struct mt7996_dev *dev, struct mt7996_phy *phy); 334 int mt7996_eeprom_get_target_power(struct mt7996_dev *dev, 335 struct ieee80211_channel *chan); 336 s8 mt7996_eeprom_get_power_delta(struct mt7996_dev *dev, int band); 337 int mt7996_dma_init(struct mt7996_dev *dev); 338 void mt7996_dma_reset(struct mt7996_dev *dev, bool force); 339 void mt7996_dma_prefetch(struct mt7996_dev *dev); 340 void mt7996_dma_cleanup(struct mt7996_dev *dev); 341 void mt7996_dma_start(struct mt7996_dev *dev, bool reset); 342 void mt7996_init_txpower(struct mt7996_dev *dev, 343 struct ieee80211_supported_band *sband); 344 int mt7996_txbf_init(struct mt7996_dev *dev); 345 void mt7996_reset(struct mt7996_dev *dev); 346 int mt7996_run(struct ieee80211_hw *hw); 347 int mt7996_mcu_init(struct mt7996_dev *dev); 348 int mt7996_mcu_init_firmware(struct mt7996_dev *dev); 349 int mt7996_mcu_twt_agrt_update(struct mt7996_dev *dev, 350 struct mt7996_vif *mvif, 351 struct mt7996_twt_flow *flow, 352 int cmd); 353 int mt7996_mcu_add_dev_info(struct mt7996_phy *phy, 354 struct ieee80211_vif *vif, bool enable); 355 int mt7996_mcu_add_bss_info(struct mt7996_phy *phy, 356 struct ieee80211_vif *vif, int enable); 357 int mt7996_mcu_add_sta(struct mt7996_dev *dev, struct ieee80211_vif *vif, 358 struct ieee80211_sta *sta, bool enable); 359 int mt7996_mcu_add_tx_ba(struct mt7996_dev *dev, 360 struct ieee80211_ampdu_params *params, 361 bool add); 362 int mt7996_mcu_add_rx_ba(struct mt7996_dev *dev, 363 struct ieee80211_ampdu_params *params, 364 bool add); 365 int mt7996_mcu_update_bss_color(struct mt7996_dev *dev, struct ieee80211_vif *vif, 366 struct cfg80211_he_bss_color *he_bss_color); 367 int mt7996_mcu_add_beacon(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 368 int enable); 369 int mt7996_mcu_beacon_inband_discov(struct mt7996_dev *dev, 370 struct ieee80211_vif *vif, u32 changed); 371 int mt7996_mcu_add_obss_spr(struct mt7996_phy *phy, struct ieee80211_vif *vif, 372 struct ieee80211_he_obss_pd *he_obss_pd); 373 int mt7996_mcu_add_rate_ctrl(struct mt7996_dev *dev, struct ieee80211_vif *vif, 374 struct ieee80211_sta *sta, bool changed); 375 int mt7996_set_channel(struct mt7996_phy *phy); 376 int mt7996_mcu_set_chan_info(struct mt7996_phy *phy, u16 tag); 377 int mt7996_mcu_set_tx(struct mt7996_dev *dev, struct ieee80211_vif *vif); 378 int mt7996_mcu_set_fixed_rate_ctrl(struct mt7996_dev *dev, 379 void *data, u16 version); 380 int mt7996_mcu_set_eeprom(struct mt7996_dev *dev); 381 int mt7996_mcu_get_eeprom(struct mt7996_dev *dev, u32 offset); 382 int mt7996_mcu_get_eeprom_free_block(struct mt7996_dev *dev, u8 *block_num); 383 int mt7996_mcu_get_chip_config(struct mt7996_dev *dev, u32 *cap); 384 int mt7996_mcu_set_ser(struct mt7996_dev *dev, u8 action, u8 set, u8 band); 385 int mt7996_mcu_set_txbf(struct mt7996_dev *dev, u8 action); 386 int mt7996_mcu_set_fcc5_lpn(struct mt7996_dev *dev, int val); 387 int mt7996_mcu_set_pulse_th(struct mt7996_dev *dev, 388 const struct mt7996_dfs_pulse *pulse); 389 int mt7996_mcu_set_radar_th(struct mt7996_dev *dev, int index, 390 const struct mt7996_dfs_pattern *pattern); 391 int mt7996_mcu_set_radio_en(struct mt7996_phy *phy, bool enable); 392 int mt7996_mcu_set_rts_thresh(struct mt7996_phy *phy, u32 val); 393 int mt7996_mcu_set_timing(struct mt7996_phy *phy, struct ieee80211_vif *vif); 394 int mt7996_mcu_get_chan_mib_info(struct mt7996_phy *phy, bool chan_switch); 395 int mt7996_mcu_rdd_cmd(struct mt7996_dev *dev, int cmd, u8 index, 396 u8 rx_sel, u8 val); 397 int mt7996_mcu_rdd_background_enable(struct mt7996_phy *phy, 398 struct cfg80211_chan_def *chandef); 399 int mt7996_mcu_rf_regval(struct mt7996_dev *dev, u32 regidx, u32 *val, bool set); 400 int mt7996_mcu_set_hdr_trans(struct mt7996_dev *dev, bool hdr_trans); 401 int mt7996_mcu_set_rro(struct mt7996_dev *dev, u16 tag, u8 val); 402 int mt7996_mcu_wa_cmd(struct mt7996_dev *dev, int cmd, u32 a1, u32 a2, u32 a3); 403 int mt7996_mcu_fw_log_2_host(struct mt7996_dev *dev, u8 type, u8 ctrl); 404 int mt7996_mcu_fw_dbg_ctrl(struct mt7996_dev *dev, u32 module, u8 level); 405 int mt7996_mcu_trigger_assert(struct mt7996_dev *dev); 406 void mt7996_mcu_rx_event(struct mt7996_dev *dev, struct sk_buff *skb); 407 void mt7996_mcu_exit(struct mt7996_dev *dev); 408 409 static inline u8 mt7996_max_interface_num(struct mt7996_dev *dev) 410 { 411 return MT7996_MAX_INTERFACES * (1 + dev->dbdc_support + dev->tbtc_support); 412 } 413 414 static inline u16 mt7996_wtbl_size(struct mt7996_dev *dev) 415 { 416 return (dev->wtbl_size_group << 8) + 64; 417 } 418 419 void mt7996_dual_hif_set_irq_mask(struct mt7996_dev *dev, bool write_reg, 420 u32 clear, u32 set); 421 422 static inline void mt7996_irq_enable(struct mt7996_dev *dev, u32 mask) 423 { 424 if (dev->hif2) 425 mt7996_dual_hif_set_irq_mask(dev, false, 0, mask); 426 else 427 mt76_set_irq_mask(&dev->mt76, 0, 0, mask); 428 429 tasklet_schedule(&dev->mt76.irq_tasklet); 430 } 431 432 static inline void mt7996_irq_disable(struct mt7996_dev *dev, u32 mask) 433 { 434 if (dev->hif2) 435 mt7996_dual_hif_set_irq_mask(dev, true, mask, 0); 436 else 437 mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, mask, 0); 438 } 439 440 void mt7996_memcpy_fromio(struct mt7996_dev *dev, void *buf, u32 offset, 441 size_t len); 442 443 void mt7996_mac_init(struct mt7996_dev *dev); 444 u32 mt7996_mac_wtbl_lmac_addr(struct mt7996_dev *dev, u16 wcid, u8 dw); 445 bool mt7996_mac_wtbl_update(struct mt7996_dev *dev, int idx, u32 mask); 446 void mt7996_mac_reset_counters(struct mt7996_phy *phy); 447 void mt7996_mac_cca_stats_reset(struct mt7996_phy *phy); 448 void mt7996_mac_enable_nf(struct mt7996_dev *dev, u8 band); 449 void mt7996_mac_enable_rtscts(struct mt7996_dev *dev, 450 struct ieee80211_vif *vif, bool enable); 451 void mt7996_mac_set_fixed_rate_table(struct mt7996_dev *dev, 452 u8 tbl_idx, u16 rate_idx); 453 void mt7996_mac_write_txwi(struct mt7996_dev *dev, __le32 *txwi, 454 struct sk_buff *skb, struct mt76_wcid *wcid, 455 struct ieee80211_key_conf *key, int pid, 456 enum mt76_txq_id qid, u32 changed); 457 void mt7996_mac_set_coverage_class(struct mt7996_phy *phy); 458 int mt7996_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif, 459 struct ieee80211_sta *sta); 460 void mt7996_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif, 461 struct ieee80211_sta *sta); 462 void mt7996_mac_work(struct work_struct *work); 463 void mt7996_mac_reset_work(struct work_struct *work); 464 void mt7996_mac_dump_work(struct work_struct *work); 465 void mt7996_mac_sta_rc_work(struct work_struct *work); 466 void mt7996_mac_update_stats(struct mt7996_phy *phy); 467 void mt7996_mac_twt_teardown_flow(struct mt7996_dev *dev, 468 struct mt7996_sta *msta, 469 u8 flowid); 470 void mt7996_mac_add_twt_setup(struct ieee80211_hw *hw, 471 struct ieee80211_sta *sta, 472 struct ieee80211_twt_setup *twt); 473 int mt7996_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, 474 enum mt76_txq_id qid, struct mt76_wcid *wcid, 475 struct ieee80211_sta *sta, 476 struct mt76_tx_info *tx_info); 477 void mt7996_tx_token_put(struct mt7996_dev *dev); 478 void mt7996_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, 479 struct sk_buff *skb, u32 *info); 480 bool mt7996_rx_check(struct mt76_dev *mdev, void *data, int len); 481 void mt7996_stats_work(struct work_struct *work); 482 int mt76_dfs_start_rdd(struct mt7996_dev *dev, bool force); 483 int mt7996_dfs_init_radar_detector(struct mt7996_phy *phy); 484 void mt7996_set_stream_he_eht_caps(struct mt7996_phy *phy); 485 void mt7996_set_stream_vht_txbf_caps(struct mt7996_phy *phy); 486 void mt7996_update_channel(struct mt76_phy *mphy); 487 int mt7996_init_debugfs(struct mt7996_phy *phy); 488 void mt7996_debugfs_rx_fw_monitor(struct mt7996_dev *dev, const void *data, int len); 489 bool mt7996_debugfs_rx_log(struct mt7996_dev *dev, const void *data, int len); 490 int mt7996_mcu_add_key(struct mt76_dev *dev, struct ieee80211_vif *vif, 491 struct mt76_connac_sta_key_conf *sta_key_conf, 492 struct ieee80211_key_conf *key, int mcu_cmd, 493 struct mt76_wcid *wcid, enum set_key_cmd cmd); 494 int mt7996_mcu_wtbl_update_hdr_trans(struct mt7996_dev *dev, 495 struct ieee80211_vif *vif, 496 struct ieee80211_sta *sta); 497 #ifdef CONFIG_MAC80211_DEBUGFS 498 void mt7996_sta_add_debugfs(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 499 struct ieee80211_sta *sta, struct dentry *dir); 500 #endif 501 502 #endif 503