1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 /* Copyright(c) 2018-2019 Realtek Corporation 3 */ 4 5 #if defined(__FreeBSD__) 6 #define LINUXKPI_PARAM_PREFIX rtw88_ 7 #endif 8 9 #include <linux/devcoredump.h> 10 11 #include "main.h" 12 #include "regd.h" 13 #include "fw.h" 14 #include "ps.h" 15 #include "sec.h" 16 #include "mac.h" 17 #include "coex.h" 18 #include "phy.h" 19 #include "reg.h" 20 #include "efuse.h" 21 #include "tx.h" 22 #include "debug.h" 23 #include "bf.h" 24 #include "sar.h" 25 26 bool rtw_disable_lps_deep_mode; 27 EXPORT_SYMBOL(rtw_disable_lps_deep_mode); 28 bool rtw_bf_support = true; 29 unsigned int rtw_debug_mask; 30 EXPORT_SYMBOL(rtw_debug_mask); 31 /* EDCCA is enabled during normal behavior. For debugging purpose in 32 * a noisy environment, it can be disabled via edcca debugfs. Because 33 * all rtw88 devices will probably be affected if environment is noisy, 34 * rtw_edcca_enabled is just declared by driver instead of by device. 35 * So, turning it off will take effect for all rtw88 devices before 36 * there is a tough reason to maintain rtw_edcca_enabled by device. 37 */ 38 bool rtw_edcca_enabled = true; 39 40 module_param_named(disable_lps_deep, rtw_disable_lps_deep_mode, bool, 0644); 41 module_param_named(support_bf, rtw_bf_support, bool, 0644); 42 module_param_named(debug_mask, rtw_debug_mask, uint, 0644); 43 44 MODULE_PARM_DESC(disable_lps_deep, "Set Y to disable Deep PS"); 45 MODULE_PARM_DESC(support_bf, "Set Y to enable beamformee support"); 46 MODULE_PARM_DESC(debug_mask, "Debugging mask"); 47 48 static struct ieee80211_channel rtw_channeltable_2g[] = { 49 {.center_freq = 2412, .hw_value = 1,}, 50 {.center_freq = 2417, .hw_value = 2,}, 51 {.center_freq = 2422, .hw_value = 3,}, 52 {.center_freq = 2427, .hw_value = 4,}, 53 {.center_freq = 2432, .hw_value = 5,}, 54 {.center_freq = 2437, .hw_value = 6,}, 55 {.center_freq = 2442, .hw_value = 7,}, 56 {.center_freq = 2447, .hw_value = 8,}, 57 {.center_freq = 2452, .hw_value = 9,}, 58 {.center_freq = 2457, .hw_value = 10,}, 59 {.center_freq = 2462, .hw_value = 11,}, 60 {.center_freq = 2467, .hw_value = 12,}, 61 {.center_freq = 2472, .hw_value = 13,}, 62 {.center_freq = 2484, .hw_value = 14,}, 63 }; 64 65 static struct ieee80211_channel rtw_channeltable_5g[] = { 66 {.center_freq = 5180, .hw_value = 36,}, 67 {.center_freq = 5200, .hw_value = 40,}, 68 {.center_freq = 5220, .hw_value = 44,}, 69 {.center_freq = 5240, .hw_value = 48,}, 70 {.center_freq = 5260, .hw_value = 52,}, 71 {.center_freq = 5280, .hw_value = 56,}, 72 {.center_freq = 5300, .hw_value = 60,}, 73 {.center_freq = 5320, .hw_value = 64,}, 74 {.center_freq = 5500, .hw_value = 100,}, 75 {.center_freq = 5520, .hw_value = 104,}, 76 {.center_freq = 5540, .hw_value = 108,}, 77 {.center_freq = 5560, .hw_value = 112,}, 78 {.center_freq = 5580, .hw_value = 116,}, 79 {.center_freq = 5600, .hw_value = 120,}, 80 {.center_freq = 5620, .hw_value = 124,}, 81 {.center_freq = 5640, .hw_value = 128,}, 82 {.center_freq = 5660, .hw_value = 132,}, 83 {.center_freq = 5680, .hw_value = 136,}, 84 {.center_freq = 5700, .hw_value = 140,}, 85 {.center_freq = 5720, .hw_value = 144,}, 86 {.center_freq = 5745, .hw_value = 149,}, 87 {.center_freq = 5765, .hw_value = 153,}, 88 {.center_freq = 5785, .hw_value = 157,}, 89 {.center_freq = 5805, .hw_value = 161,}, 90 {.center_freq = 5825, .hw_value = 165, 91 .flags = IEEE80211_CHAN_NO_HT40MINUS}, 92 }; 93 94 static struct ieee80211_rate rtw_ratetable[] = { 95 {.bitrate = 10, .hw_value = 0x00,}, 96 {.bitrate = 20, .hw_value = 0x01,}, 97 {.bitrate = 55, .hw_value = 0x02,}, 98 {.bitrate = 110, .hw_value = 0x03,}, 99 {.bitrate = 60, .hw_value = 0x04,}, 100 {.bitrate = 90, .hw_value = 0x05,}, 101 {.bitrate = 120, .hw_value = 0x06,}, 102 {.bitrate = 180, .hw_value = 0x07,}, 103 {.bitrate = 240, .hw_value = 0x08,}, 104 {.bitrate = 360, .hw_value = 0x09,}, 105 {.bitrate = 480, .hw_value = 0x0a,}, 106 {.bitrate = 540, .hw_value = 0x0b,}, 107 }; 108 109 u16 rtw_desc_to_bitrate(u8 desc_rate) 110 { 111 struct ieee80211_rate rate; 112 113 if (WARN(desc_rate >= ARRAY_SIZE(rtw_ratetable), "invalid desc rate\n")) 114 return 0; 115 116 rate = rtw_ratetable[desc_rate]; 117 118 return rate.bitrate; 119 } 120 121 static struct ieee80211_supported_band rtw_band_2ghz = { 122 .band = NL80211_BAND_2GHZ, 123 124 .channels = rtw_channeltable_2g, 125 .n_channels = ARRAY_SIZE(rtw_channeltable_2g), 126 127 .bitrates = rtw_ratetable, 128 .n_bitrates = ARRAY_SIZE(rtw_ratetable), 129 130 .ht_cap = {0}, 131 .vht_cap = {0}, 132 }; 133 134 static struct ieee80211_supported_band rtw_band_5ghz = { 135 .band = NL80211_BAND_5GHZ, 136 137 .channels = rtw_channeltable_5g, 138 .n_channels = ARRAY_SIZE(rtw_channeltable_5g), 139 140 /* 5G has no CCK rates */ 141 .bitrates = rtw_ratetable + 4, 142 .n_bitrates = ARRAY_SIZE(rtw_ratetable) - 4, 143 144 .ht_cap = {0}, 145 .vht_cap = {0}, 146 }; 147 148 struct rtw_watch_dog_iter_data { 149 struct rtw_dev *rtwdev; 150 struct rtw_vif *rtwvif; 151 }; 152 153 static void rtw_dynamic_csi_rate(struct rtw_dev *rtwdev, struct rtw_vif *rtwvif) 154 { 155 struct rtw_bf_info *bf_info = &rtwdev->bf_info; 156 u8 fix_rate_enable = 0; 157 u8 new_csi_rate_idx; 158 159 if (rtwvif->bfee.role != RTW_BFEE_SU && 160 rtwvif->bfee.role != RTW_BFEE_MU) 161 return; 162 163 rtw_chip_cfg_csi_rate(rtwdev, rtwdev->dm_info.min_rssi, 164 bf_info->cur_csi_rpt_rate, 165 fix_rate_enable, &new_csi_rate_idx); 166 167 if (new_csi_rate_idx != bf_info->cur_csi_rpt_rate) 168 bf_info->cur_csi_rpt_rate = new_csi_rate_idx; 169 } 170 171 static void rtw_vif_watch_dog_iter(void *data, u8 *mac, 172 struct ieee80211_vif *vif) 173 { 174 struct rtw_watch_dog_iter_data *iter_data = data; 175 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; 176 177 if (vif->type == NL80211_IFTYPE_STATION) 178 if (vif->bss_conf.assoc) 179 iter_data->rtwvif = rtwvif; 180 181 rtw_dynamic_csi_rate(iter_data->rtwdev, rtwvif); 182 183 rtwvif->stats.tx_unicast = 0; 184 rtwvif->stats.rx_unicast = 0; 185 rtwvif->stats.tx_cnt = 0; 186 rtwvif->stats.rx_cnt = 0; 187 } 188 189 /* process TX/RX statistics periodically for hardware, 190 * the information helps hardware to enhance performance 191 */ 192 static void rtw_watch_dog_work(struct work_struct *work) 193 { 194 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, 195 watch_dog_work.work); 196 struct rtw_traffic_stats *stats = &rtwdev->stats; 197 struct rtw_watch_dog_iter_data data = {}; 198 bool busy_traffic = test_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags); 199 bool ps_active; 200 201 mutex_lock(&rtwdev->mutex); 202 203 if (!test_bit(RTW_FLAG_RUNNING, rtwdev->flags)) 204 goto unlock; 205 206 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work, 207 RTW_WATCH_DOG_DELAY_TIME); 208 209 if (rtwdev->stats.tx_cnt > 100 || rtwdev->stats.rx_cnt > 100) 210 set_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags); 211 else 212 clear_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags); 213 214 if (busy_traffic != test_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags)) 215 rtw_coex_wl_status_change_notify(rtwdev, 0); 216 217 if (stats->tx_cnt > RTW_LPS_THRESHOLD || 218 stats->rx_cnt > RTW_LPS_THRESHOLD) 219 ps_active = true; 220 else 221 ps_active = false; 222 223 ewma_tp_add(&stats->tx_ewma_tp, 224 (u32)(stats->tx_unicast >> RTW_TP_SHIFT)); 225 ewma_tp_add(&stats->rx_ewma_tp, 226 (u32)(stats->rx_unicast >> RTW_TP_SHIFT)); 227 stats->tx_throughput = ewma_tp_read(&stats->tx_ewma_tp); 228 stats->rx_throughput = ewma_tp_read(&stats->rx_ewma_tp); 229 230 /* reset tx/rx statictics */ 231 stats->tx_unicast = 0; 232 stats->rx_unicast = 0; 233 stats->tx_cnt = 0; 234 stats->rx_cnt = 0; 235 236 if (test_bit(RTW_FLAG_SCANNING, rtwdev->flags)) 237 goto unlock; 238 239 /* make sure BB/RF is working for dynamic mech */ 240 rtw_leave_lps(rtwdev); 241 242 rtw_phy_dynamic_mechanism(rtwdev); 243 244 data.rtwdev = rtwdev; 245 /* use atomic version to avoid taking local->iflist_mtx mutex */ 246 rtw_iterate_vifs_atomic(rtwdev, rtw_vif_watch_dog_iter, &data); 247 248 /* fw supports only one station associated to enter lps, if there are 249 * more than two stations associated to the AP, then we can not enter 250 * lps, because fw does not handle the overlapped beacon interval 251 * 252 * mac80211 should iterate vifs and determine if driver can enter 253 * ps by passing IEEE80211_CONF_PS to us, all we need to do is to 254 * get that vif and check if device is having traffic more than the 255 * threshold. 256 */ 257 if (rtwdev->ps_enabled && data.rtwvif && !ps_active && 258 !rtwdev->beacon_loss) 259 rtw_enter_lps(rtwdev, data.rtwvif->port); 260 261 rtwdev->watch_dog_cnt++; 262 263 unlock: 264 mutex_unlock(&rtwdev->mutex); 265 } 266 267 static void rtw_c2h_work(struct work_struct *work) 268 { 269 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, c2h_work); 270 struct sk_buff *skb, *tmp; 271 272 skb_queue_walk_safe(&rtwdev->c2h_queue, skb, tmp) { 273 skb_unlink(skb, &rtwdev->c2h_queue); 274 rtw_fw_c2h_cmd_handle(rtwdev, skb); 275 dev_kfree_skb_any(skb); 276 } 277 } 278 279 static u8 rtw_acquire_macid(struct rtw_dev *rtwdev) 280 { 281 unsigned long mac_id; 282 283 mac_id = find_first_zero_bit(rtwdev->mac_id_map, RTW_MAX_MAC_ID_NUM); 284 if (mac_id < RTW_MAX_MAC_ID_NUM) 285 set_bit(mac_id, rtwdev->mac_id_map); 286 287 return mac_id; 288 } 289 290 int rtw_sta_add(struct rtw_dev *rtwdev, struct ieee80211_sta *sta, 291 struct ieee80211_vif *vif) 292 { 293 struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv; 294 int i; 295 296 si->mac_id = rtw_acquire_macid(rtwdev); 297 if (si->mac_id >= RTW_MAX_MAC_ID_NUM) 298 return -ENOSPC; 299 300 si->sta = sta; 301 si->vif = vif; 302 si->init_ra_lv = 1; 303 ewma_rssi_init(&si->avg_rssi); 304 for (i = 0; i < ARRAY_SIZE(sta->txq); i++) 305 rtw_txq_init(rtwdev, sta->txq[i]); 306 307 rtw_update_sta_info(rtwdev, si); 308 rtw_fw_media_status_report(rtwdev, si->mac_id, true); 309 310 rtwdev->sta_cnt++; 311 rtwdev->beacon_loss = false; 312 #if defined(__linux__) 313 rtw_info(rtwdev, "sta %pM joined with macid %d\n", 314 sta->addr, si->mac_id); 315 #elif defined(__FreeBSD__) 316 rtw_info(rtwdev, "sta %6D joined with macid %d\n", 317 sta->addr, ":", si->mac_id); 318 #endif 319 320 return 0; 321 } 322 323 void rtw_sta_remove(struct rtw_dev *rtwdev, struct ieee80211_sta *sta, 324 bool fw_exist) 325 { 326 struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv; 327 int i; 328 329 rtw_release_macid(rtwdev, si->mac_id); 330 if (fw_exist) 331 rtw_fw_media_status_report(rtwdev, si->mac_id, false); 332 333 for (i = 0; i < ARRAY_SIZE(sta->txq); i++) 334 rtw_txq_cleanup(rtwdev, sta->txq[i]); 335 336 kfree(si->mask); 337 338 rtwdev->sta_cnt--; 339 #if defined(__linux__) 340 rtw_info(rtwdev, "sta %pM with macid %d left\n", 341 sta->addr, si->mac_id); 342 #elif defined(__FreeBSD__) 343 rtw_info(rtwdev, "sta %6D with macid %d left\n", 344 sta->addr, ":", si->mac_id); 345 #endif 346 } 347 348 struct rtw_fwcd_hdr { 349 u32 item; 350 u32 size; 351 u32 padding1; 352 u32 padding2; 353 } __packed; 354 355 static int rtw_fwcd_prep(struct rtw_dev *rtwdev) 356 { 357 struct rtw_chip_info *chip = rtwdev->chip; 358 struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc; 359 const struct rtw_fwcd_segs *segs = chip->fwcd_segs; 360 u32 prep_size = chip->fw_rxff_size + sizeof(struct rtw_fwcd_hdr); 361 u8 i; 362 363 if (segs) { 364 prep_size += segs->num * sizeof(struct rtw_fwcd_hdr); 365 366 for (i = 0; i < segs->num; i++) 367 prep_size += segs->segs[i]; 368 } 369 370 desc->data = vmalloc(prep_size); 371 if (!desc->data) 372 return -ENOMEM; 373 374 desc->size = prep_size; 375 desc->next = desc->data; 376 377 return 0; 378 } 379 380 static u8 *rtw_fwcd_next(struct rtw_dev *rtwdev, u32 item, u32 size) 381 { 382 struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc; 383 struct rtw_fwcd_hdr *hdr; 384 u8 *next; 385 386 if (!desc->data) { 387 rtw_dbg(rtwdev, RTW_DBG_FW, "fwcd isn't prepared successfully\n"); 388 return NULL; 389 } 390 391 next = desc->next + sizeof(struct rtw_fwcd_hdr); 392 if (next - desc->data + size > desc->size) { 393 rtw_dbg(rtwdev, RTW_DBG_FW, "fwcd isn't prepared enough\n"); 394 return NULL; 395 } 396 397 hdr = (struct rtw_fwcd_hdr *)(desc->next); 398 hdr->item = item; 399 hdr->size = size; 400 hdr->padding1 = 0x01234567; 401 hdr->padding2 = 0x89abcdef; 402 desc->next = next + size; 403 404 return next; 405 } 406 407 static void rtw_fwcd_dump(struct rtw_dev *rtwdev) 408 { 409 struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc; 410 411 rtw_dbg(rtwdev, RTW_DBG_FW, "dump fwcd\n"); 412 413 /* Data will be freed after lifetime of device coredump. After calling 414 * dev_coredump, data is supposed to be handled by the device coredump 415 * framework. Note that a new dump will be discarded if a previous one 416 * hasn't been released yet. 417 */ 418 dev_coredumpv(rtwdev->dev, desc->data, desc->size, GFP_KERNEL); 419 } 420 421 static void rtw_fwcd_free(struct rtw_dev *rtwdev, bool free_self) 422 { 423 struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc; 424 425 if (free_self) { 426 rtw_dbg(rtwdev, RTW_DBG_FW, "free fwcd by self\n"); 427 vfree(desc->data); 428 } 429 430 desc->data = NULL; 431 desc->next = NULL; 432 } 433 434 static int rtw_fw_dump_crash_log(struct rtw_dev *rtwdev) 435 { 436 u32 size = rtwdev->chip->fw_rxff_size; 437 u32 *buf; 438 u8 seq; 439 440 buf = (u32 *)rtw_fwcd_next(rtwdev, RTW_FWCD_TLV, size); 441 if (!buf) 442 return -ENOMEM; 443 444 if (rtw_fw_dump_fifo(rtwdev, RTW_FW_FIFO_SEL_RXBUF_FW, 0, size, buf)) { 445 rtw_dbg(rtwdev, RTW_DBG_FW, "dump fw fifo fail\n"); 446 return -EINVAL; 447 } 448 449 if (GET_FW_DUMP_LEN(buf) == 0) { 450 rtw_dbg(rtwdev, RTW_DBG_FW, "fw crash dump's length is 0\n"); 451 return -EINVAL; 452 } 453 454 seq = GET_FW_DUMP_SEQ(buf); 455 if (seq > 0) { 456 rtw_dbg(rtwdev, RTW_DBG_FW, 457 "fw crash dump's seq is wrong: %d\n", seq); 458 return -EINVAL; 459 } 460 461 return 0; 462 } 463 464 int rtw_dump_fw(struct rtw_dev *rtwdev, const u32 ocp_src, u32 size, 465 u32 fwcd_item) 466 { 467 u32 rxff = rtwdev->chip->fw_rxff_size; 468 u32 dump_size, done_size = 0; 469 u8 *buf; 470 int ret; 471 472 buf = rtw_fwcd_next(rtwdev, fwcd_item, size); 473 if (!buf) 474 return -ENOMEM; 475 476 while (size) { 477 dump_size = size > rxff ? rxff : size; 478 479 ret = rtw_ddma_to_fw_fifo(rtwdev, ocp_src + done_size, 480 dump_size); 481 if (ret) { 482 rtw_err(rtwdev, 483 "ddma fw 0x%x [+0x%x] to fw fifo fail\n", 484 ocp_src, done_size); 485 return ret; 486 } 487 488 ret = rtw_fw_dump_fifo(rtwdev, RTW_FW_FIFO_SEL_RXBUF_FW, 0, 489 dump_size, (u32 *)(buf + done_size)); 490 if (ret) { 491 rtw_err(rtwdev, 492 "dump fw 0x%x [+0x%x] from fw fifo fail\n", 493 ocp_src, done_size); 494 return ret; 495 } 496 497 size -= dump_size; 498 done_size += dump_size; 499 } 500 501 return 0; 502 } 503 EXPORT_SYMBOL(rtw_dump_fw); 504 505 int rtw_dump_reg(struct rtw_dev *rtwdev, const u32 addr, const u32 size) 506 { 507 u8 *buf; 508 u32 i; 509 510 if (addr & 0x3) { 511 WARN(1, "should be 4-byte aligned, addr = 0x%08x\n", addr); 512 return -EINVAL; 513 } 514 515 buf = rtw_fwcd_next(rtwdev, RTW_FWCD_REG, size); 516 if (!buf) 517 return -ENOMEM; 518 519 for (i = 0; i < size; i += 4) 520 *(u32 *)(buf + i) = rtw_read32(rtwdev, addr + i); 521 522 return 0; 523 } 524 EXPORT_SYMBOL(rtw_dump_reg); 525 526 void rtw_vif_assoc_changed(struct rtw_vif *rtwvif, 527 struct ieee80211_bss_conf *conf) 528 { 529 if (conf && conf->assoc) { 530 rtwvif->aid = conf->aid; 531 rtwvif->net_type = RTW_NET_MGD_LINKED; 532 } else { 533 rtwvif->aid = 0; 534 rtwvif->net_type = RTW_NET_NO_LINK; 535 } 536 } 537 538 static void rtw_reset_key_iter(struct ieee80211_hw *hw, 539 struct ieee80211_vif *vif, 540 struct ieee80211_sta *sta, 541 struct ieee80211_key_conf *key, 542 void *data) 543 { 544 struct rtw_dev *rtwdev = (struct rtw_dev *)data; 545 struct rtw_sec_desc *sec = &rtwdev->sec; 546 547 rtw_sec_clear_cam(rtwdev, sec, key->hw_key_idx); 548 } 549 550 static void rtw_reset_sta_iter(void *data, struct ieee80211_sta *sta) 551 { 552 struct rtw_dev *rtwdev = (struct rtw_dev *)data; 553 554 if (rtwdev->sta_cnt == 0) { 555 rtw_warn(rtwdev, "sta count before reset should not be 0\n"); 556 return; 557 } 558 rtw_sta_remove(rtwdev, sta, false); 559 } 560 561 static void rtw_reset_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif) 562 { 563 struct rtw_dev *rtwdev = (struct rtw_dev *)data; 564 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; 565 566 rtw_bf_disassoc(rtwdev, vif, NULL); 567 rtw_vif_assoc_changed(rtwvif, NULL); 568 rtw_txq_cleanup(rtwdev, vif->txq); 569 } 570 571 void rtw_fw_recovery(struct rtw_dev *rtwdev) 572 { 573 if (!test_bit(RTW_FLAG_RESTARTING, rtwdev->flags)) 574 ieee80211_queue_work(rtwdev->hw, &rtwdev->fw_recovery_work); 575 } 576 577 static void __fw_recovery_work(struct rtw_dev *rtwdev) 578 { 579 int ret = 0; 580 581 set_bit(RTW_FLAG_RESTARTING, rtwdev->flags); 582 clear_bit(RTW_FLAG_RESTART_TRIGGERING, rtwdev->flags); 583 584 ret = rtw_fwcd_prep(rtwdev); 585 if (ret) 586 goto free; 587 ret = rtw_fw_dump_crash_log(rtwdev); 588 if (ret) 589 goto free; 590 ret = rtw_chip_dump_fw_crash(rtwdev); 591 if (ret) 592 goto free; 593 594 rtw_fwcd_dump(rtwdev); 595 free: 596 rtw_fwcd_free(rtwdev, !!ret); 597 rtw_write8(rtwdev, REG_MCU_TST_CFG, 0); 598 599 WARN(1, "firmware crash, start reset and recover\n"); 600 601 rcu_read_lock(); 602 rtw_iterate_keys_rcu(rtwdev, NULL, rtw_reset_key_iter, rtwdev); 603 rcu_read_unlock(); 604 rtw_iterate_stas_atomic(rtwdev, rtw_reset_sta_iter, rtwdev); 605 rtw_iterate_vifs_atomic(rtwdev, rtw_reset_vif_iter, rtwdev); 606 rtw_enter_ips(rtwdev); 607 } 608 609 static void rtw_fw_recovery_work(struct work_struct *work) 610 { 611 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, 612 fw_recovery_work); 613 614 mutex_lock(&rtwdev->mutex); 615 __fw_recovery_work(rtwdev); 616 mutex_unlock(&rtwdev->mutex); 617 618 ieee80211_restart_hw(rtwdev->hw); 619 } 620 621 struct rtw_txq_ba_iter_data { 622 }; 623 624 static void rtw_txq_ba_iter(void *data, struct ieee80211_sta *sta) 625 { 626 struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv; 627 int ret; 628 u8 tid; 629 630 tid = find_first_bit(si->tid_ba, IEEE80211_NUM_TIDS); 631 while (tid != IEEE80211_NUM_TIDS) { 632 clear_bit(tid, si->tid_ba); 633 ret = ieee80211_start_tx_ba_session(sta, tid, 0); 634 if (ret == -EINVAL) { 635 struct ieee80211_txq *txq; 636 struct rtw_txq *rtwtxq; 637 638 txq = sta->txq[tid]; 639 rtwtxq = (struct rtw_txq *)txq->drv_priv; 640 set_bit(RTW_TXQ_BLOCK_BA, &rtwtxq->flags); 641 } 642 643 tid = find_first_bit(si->tid_ba, IEEE80211_NUM_TIDS); 644 } 645 } 646 647 static void rtw_txq_ba_work(struct work_struct *work) 648 { 649 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, ba_work); 650 struct rtw_txq_ba_iter_data data; 651 652 rtw_iterate_stas_atomic(rtwdev, rtw_txq_ba_iter, &data); 653 } 654 655 void rtw_set_rx_freq_band(struct rtw_rx_pkt_stat *pkt_stat, u8 channel) 656 { 657 if (IS_CH_2G_BAND(channel)) 658 pkt_stat->band = NL80211_BAND_2GHZ; 659 else if (IS_CH_5G_BAND(channel)) 660 pkt_stat->band = NL80211_BAND_5GHZ; 661 else 662 return; 663 664 pkt_stat->freq = ieee80211_channel_to_frequency(channel, pkt_stat->band); 665 } 666 EXPORT_SYMBOL(rtw_set_rx_freq_band); 667 668 void rtw_get_channel_params(struct cfg80211_chan_def *chandef, 669 struct rtw_channel_params *chan_params) 670 { 671 struct ieee80211_channel *channel = chandef->chan; 672 enum nl80211_chan_width width = chandef->width; 673 u8 *cch_by_bw = chan_params->cch_by_bw; 674 u32 primary_freq, center_freq; 675 u8 center_chan; 676 u8 bandwidth = RTW_CHANNEL_WIDTH_20; 677 u8 primary_chan_idx = 0; 678 u8 i; 679 680 center_chan = channel->hw_value; 681 primary_freq = channel->center_freq; 682 center_freq = chandef->center_freq1; 683 684 /* assign the center channel used while 20M bw is selected */ 685 cch_by_bw[RTW_CHANNEL_WIDTH_20] = channel->hw_value; 686 687 switch (width) { 688 case NL80211_CHAN_WIDTH_20_NOHT: 689 case NL80211_CHAN_WIDTH_20: 690 bandwidth = RTW_CHANNEL_WIDTH_20; 691 primary_chan_idx = RTW_SC_DONT_CARE; 692 break; 693 case NL80211_CHAN_WIDTH_40: 694 bandwidth = RTW_CHANNEL_WIDTH_40; 695 if (primary_freq > center_freq) { 696 primary_chan_idx = RTW_SC_20_UPPER; 697 center_chan -= 2; 698 } else { 699 primary_chan_idx = RTW_SC_20_LOWER; 700 center_chan += 2; 701 } 702 break; 703 case NL80211_CHAN_WIDTH_80: 704 bandwidth = RTW_CHANNEL_WIDTH_80; 705 if (primary_freq > center_freq) { 706 if (primary_freq - center_freq == 10) { 707 primary_chan_idx = RTW_SC_20_UPPER; 708 center_chan -= 2; 709 } else { 710 primary_chan_idx = RTW_SC_20_UPMOST; 711 center_chan -= 6; 712 } 713 /* assign the center channel used 714 * while 40M bw is selected 715 */ 716 cch_by_bw[RTW_CHANNEL_WIDTH_40] = center_chan + 4; 717 } else { 718 if (center_freq - primary_freq == 10) { 719 primary_chan_idx = RTW_SC_20_LOWER; 720 center_chan += 2; 721 } else { 722 primary_chan_idx = RTW_SC_20_LOWEST; 723 center_chan += 6; 724 } 725 /* assign the center channel used 726 * while 40M bw is selected 727 */ 728 cch_by_bw[RTW_CHANNEL_WIDTH_40] = center_chan - 4; 729 } 730 break; 731 default: 732 center_chan = 0; 733 break; 734 } 735 736 chan_params->center_chan = center_chan; 737 chan_params->bandwidth = bandwidth; 738 chan_params->primary_chan_idx = primary_chan_idx; 739 740 /* assign the center channel used while current bw is selected */ 741 cch_by_bw[bandwidth] = center_chan; 742 743 for (i = bandwidth + 1; i <= RTW_MAX_CHANNEL_WIDTH; i++) 744 cch_by_bw[i] = 0; 745 } 746 747 void rtw_set_channel(struct rtw_dev *rtwdev) 748 { 749 struct ieee80211_hw *hw = rtwdev->hw; 750 struct rtw_hal *hal = &rtwdev->hal; 751 struct rtw_chip_info *chip = rtwdev->chip; 752 struct rtw_channel_params ch_param; 753 u8 center_chan, bandwidth, primary_chan_idx; 754 u8 i; 755 756 rtw_get_channel_params(&hw->conf.chandef, &ch_param); 757 if (WARN(ch_param.center_chan == 0, "Invalid channel\n")) 758 return; 759 760 center_chan = ch_param.center_chan; 761 bandwidth = ch_param.bandwidth; 762 primary_chan_idx = ch_param.primary_chan_idx; 763 764 hal->current_band_width = bandwidth; 765 hal->current_channel = center_chan; 766 hal->current_primary_channel_index = primary_chan_idx; 767 hal->current_band_type = center_chan > 14 ? RTW_BAND_5G : RTW_BAND_2G; 768 769 switch (center_chan) { 770 case 1 ... 14: 771 hal->sar_band = RTW_SAR_BAND_0; 772 break; 773 case 36 ... 64: 774 hal->sar_band = RTW_SAR_BAND_1; 775 break; 776 case 100 ... 144: 777 hal->sar_band = RTW_SAR_BAND_3; 778 break; 779 case 149 ... 177: 780 hal->sar_band = RTW_SAR_BAND_4; 781 break; 782 default: 783 WARN(1, "unknown ch(%u) to SAR band\n", center_chan); 784 hal->sar_band = RTW_SAR_BAND_0; 785 break; 786 } 787 788 for (i = RTW_CHANNEL_WIDTH_20; i <= RTW_MAX_CHANNEL_WIDTH; i++) 789 hal->cch_by_bw[i] = ch_param.cch_by_bw[i]; 790 791 chip->ops->set_channel(rtwdev, center_chan, bandwidth, primary_chan_idx); 792 793 if (hal->current_band_type == RTW_BAND_5G) { 794 rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_5G); 795 } else { 796 if (test_bit(RTW_FLAG_SCANNING, rtwdev->flags)) 797 rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_24G); 798 else 799 rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_24G_NOFORSCAN); 800 } 801 802 rtw_phy_set_tx_power_level(rtwdev, center_chan); 803 804 /* if the channel isn't set for scanning, we will do RF calibration 805 * in ieee80211_ops::mgd_prepare_tx(). Performing the calibration 806 * during scanning on each channel takes too long. 807 */ 808 if (!test_bit(RTW_FLAG_SCANNING, rtwdev->flags)) 809 rtwdev->need_rfk = true; 810 } 811 812 void rtw_chip_prepare_tx(struct rtw_dev *rtwdev) 813 { 814 struct rtw_chip_info *chip = rtwdev->chip; 815 816 if (rtwdev->need_rfk) { 817 rtwdev->need_rfk = false; 818 chip->ops->phy_calibration(rtwdev); 819 } 820 } 821 822 static void rtw_vif_write_addr(struct rtw_dev *rtwdev, u32 start, u8 *addr) 823 { 824 int i; 825 826 for (i = 0; i < ETH_ALEN; i++) 827 rtw_write8(rtwdev, start + i, addr[i]); 828 } 829 830 void rtw_vif_port_config(struct rtw_dev *rtwdev, 831 struct rtw_vif *rtwvif, 832 u32 config) 833 { 834 u32 addr, mask; 835 836 if (config & PORT_SET_MAC_ADDR) { 837 addr = rtwvif->conf->mac_addr.addr; 838 rtw_vif_write_addr(rtwdev, addr, rtwvif->mac_addr); 839 } 840 if (config & PORT_SET_BSSID) { 841 addr = rtwvif->conf->bssid.addr; 842 rtw_vif_write_addr(rtwdev, addr, rtwvif->bssid); 843 } 844 if (config & PORT_SET_NET_TYPE) { 845 addr = rtwvif->conf->net_type.addr; 846 mask = rtwvif->conf->net_type.mask; 847 rtw_write32_mask(rtwdev, addr, mask, rtwvif->net_type); 848 } 849 if (config & PORT_SET_AID) { 850 addr = rtwvif->conf->aid.addr; 851 mask = rtwvif->conf->aid.mask; 852 rtw_write32_mask(rtwdev, addr, mask, rtwvif->aid); 853 } 854 if (config & PORT_SET_BCN_CTRL) { 855 addr = rtwvif->conf->bcn_ctrl.addr; 856 mask = rtwvif->conf->bcn_ctrl.mask; 857 rtw_write8_mask(rtwdev, addr, mask, rtwvif->bcn_ctrl); 858 } 859 } 860 861 static u8 hw_bw_cap_to_bitamp(u8 bw_cap) 862 { 863 u8 bw = 0; 864 865 switch (bw_cap) { 866 case EFUSE_HW_CAP_IGNORE: 867 case EFUSE_HW_CAP_SUPP_BW80: 868 bw |= BIT(RTW_CHANNEL_WIDTH_80); 869 fallthrough; 870 case EFUSE_HW_CAP_SUPP_BW40: 871 bw |= BIT(RTW_CHANNEL_WIDTH_40); 872 fallthrough; 873 default: 874 bw |= BIT(RTW_CHANNEL_WIDTH_20); 875 break; 876 } 877 878 return bw; 879 } 880 881 static void rtw_hw_config_rf_ant_num(struct rtw_dev *rtwdev, u8 hw_ant_num) 882 { 883 struct rtw_hal *hal = &rtwdev->hal; 884 struct rtw_chip_info *chip = rtwdev->chip; 885 886 if (hw_ant_num == EFUSE_HW_CAP_IGNORE || 887 hw_ant_num >= hal->rf_path_num) 888 return; 889 890 switch (hw_ant_num) { 891 case 1: 892 hal->rf_type = RF_1T1R; 893 hal->rf_path_num = 1; 894 if (!chip->fix_rf_phy_num) 895 hal->rf_phy_num = hal->rf_path_num; 896 hal->antenna_tx = BB_PATH_A; 897 hal->antenna_rx = BB_PATH_A; 898 break; 899 default: 900 WARN(1, "invalid hw configuration from efuse\n"); 901 break; 902 } 903 } 904 905 static u64 get_vht_ra_mask(struct ieee80211_sta *sta) 906 { 907 u64 ra_mask = 0; 908 u16 mcs_map = le16_to_cpu(sta->vht_cap.vht_mcs.rx_mcs_map); 909 u8 vht_mcs_cap; 910 int i, nss; 911 912 /* 4SS, every two bits for MCS7/8/9 */ 913 for (i = 0, nss = 12; i < 4; i++, mcs_map >>= 2, nss += 10) { 914 vht_mcs_cap = mcs_map & 0x3; 915 switch (vht_mcs_cap) { 916 case 2: /* MCS9 */ 917 ra_mask |= 0x3ffULL << nss; 918 break; 919 case 1: /* MCS8 */ 920 ra_mask |= 0x1ffULL << nss; 921 break; 922 case 0: /* MCS7 */ 923 ra_mask |= 0x0ffULL << nss; 924 break; 925 default: 926 break; 927 } 928 } 929 930 return ra_mask; 931 } 932 933 static u8 get_rate_id(u8 wireless_set, enum rtw_bandwidth bw_mode, u8 tx_num) 934 { 935 u8 rate_id = 0; 936 937 switch (wireless_set) { 938 case WIRELESS_CCK: 939 rate_id = RTW_RATEID_B_20M; 940 break; 941 case WIRELESS_OFDM: 942 rate_id = RTW_RATEID_G; 943 break; 944 case WIRELESS_CCK | WIRELESS_OFDM: 945 rate_id = RTW_RATEID_BG; 946 break; 947 case WIRELESS_OFDM | WIRELESS_HT: 948 if (tx_num == 1) 949 rate_id = RTW_RATEID_GN_N1SS; 950 else if (tx_num == 2) 951 rate_id = RTW_RATEID_GN_N2SS; 952 else if (tx_num == 3) 953 rate_id = RTW_RATEID_ARFR5_N_3SS; 954 break; 955 case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_HT: 956 if (bw_mode == RTW_CHANNEL_WIDTH_40) { 957 if (tx_num == 1) 958 rate_id = RTW_RATEID_BGN_40M_1SS; 959 else if (tx_num == 2) 960 rate_id = RTW_RATEID_BGN_40M_2SS; 961 else if (tx_num == 3) 962 rate_id = RTW_RATEID_ARFR5_N_3SS; 963 else if (tx_num == 4) 964 rate_id = RTW_RATEID_ARFR7_N_4SS; 965 } else { 966 if (tx_num == 1) 967 rate_id = RTW_RATEID_BGN_20M_1SS; 968 else if (tx_num == 2) 969 rate_id = RTW_RATEID_BGN_20M_2SS; 970 else if (tx_num == 3) 971 rate_id = RTW_RATEID_ARFR5_N_3SS; 972 else if (tx_num == 4) 973 rate_id = RTW_RATEID_ARFR7_N_4SS; 974 } 975 break; 976 case WIRELESS_OFDM | WIRELESS_VHT: 977 if (tx_num == 1) 978 rate_id = RTW_RATEID_ARFR1_AC_1SS; 979 else if (tx_num == 2) 980 rate_id = RTW_RATEID_ARFR0_AC_2SS; 981 else if (tx_num == 3) 982 rate_id = RTW_RATEID_ARFR4_AC_3SS; 983 else if (tx_num == 4) 984 rate_id = RTW_RATEID_ARFR6_AC_4SS; 985 break; 986 case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_VHT: 987 if (bw_mode >= RTW_CHANNEL_WIDTH_80) { 988 if (tx_num == 1) 989 rate_id = RTW_RATEID_ARFR1_AC_1SS; 990 else if (tx_num == 2) 991 rate_id = RTW_RATEID_ARFR0_AC_2SS; 992 else if (tx_num == 3) 993 rate_id = RTW_RATEID_ARFR4_AC_3SS; 994 else if (tx_num == 4) 995 rate_id = RTW_RATEID_ARFR6_AC_4SS; 996 } else { 997 if (tx_num == 1) 998 rate_id = RTW_RATEID_ARFR2_AC_2G_1SS; 999 else if (tx_num == 2) 1000 rate_id = RTW_RATEID_ARFR3_AC_2G_2SS; 1001 else if (tx_num == 3) 1002 rate_id = RTW_RATEID_ARFR4_AC_3SS; 1003 else if (tx_num == 4) 1004 rate_id = RTW_RATEID_ARFR6_AC_4SS; 1005 } 1006 break; 1007 default: 1008 break; 1009 } 1010 1011 return rate_id; 1012 } 1013 1014 #define RA_MASK_CCK_RATES 0x0000f 1015 #define RA_MASK_OFDM_RATES 0x00ff0 1016 #define RA_MASK_HT_RATES_1SS (0xff000ULL << 0) 1017 #define RA_MASK_HT_RATES_2SS (0xff000ULL << 8) 1018 #define RA_MASK_HT_RATES_3SS (0xff000ULL << 16) 1019 #define RA_MASK_HT_RATES (RA_MASK_HT_RATES_1SS | \ 1020 RA_MASK_HT_RATES_2SS | \ 1021 RA_MASK_HT_RATES_3SS) 1022 #define RA_MASK_VHT_RATES_1SS (0x3ff000ULL << 0) 1023 #define RA_MASK_VHT_RATES_2SS (0x3ff000ULL << 10) 1024 #define RA_MASK_VHT_RATES_3SS (0x3ff000ULL << 20) 1025 #define RA_MASK_VHT_RATES (RA_MASK_VHT_RATES_1SS | \ 1026 RA_MASK_VHT_RATES_2SS | \ 1027 RA_MASK_VHT_RATES_3SS) 1028 #define RA_MASK_CCK_IN_HT 0x00005 1029 #define RA_MASK_CCK_IN_VHT 0x00005 1030 #define RA_MASK_OFDM_IN_VHT 0x00010 1031 #define RA_MASK_OFDM_IN_HT_2G 0x00010 1032 #define RA_MASK_OFDM_IN_HT_5G 0x00030 1033 1034 static u64 rtw_update_rate_mask(struct rtw_dev *rtwdev, 1035 struct rtw_sta_info *si, 1036 u64 ra_mask, bool is_vht_enable, 1037 u8 wireless_set) 1038 { 1039 struct rtw_hal *hal = &rtwdev->hal; 1040 const struct cfg80211_bitrate_mask *mask = si->mask; 1041 u64 cfg_mask = GENMASK_ULL(63, 0); 1042 u8 rssi_level, band; 1043 1044 if (wireless_set != WIRELESS_CCK) { 1045 rssi_level = si->rssi_level; 1046 if (rssi_level == 0) 1047 ra_mask &= 0xffffffffffffffffULL; 1048 else if (rssi_level == 1) 1049 ra_mask &= 0xfffffffffffffff0ULL; 1050 else if (rssi_level == 2) 1051 ra_mask &= 0xffffffffffffefe0ULL; 1052 else if (rssi_level == 3) 1053 ra_mask &= 0xffffffffffffcfc0ULL; 1054 else if (rssi_level == 4) 1055 ra_mask &= 0xffffffffffff8f80ULL; 1056 else if (rssi_level >= 5) 1057 ra_mask &= 0xffffffffffff0f00ULL; 1058 } 1059 1060 if (!si->use_cfg_mask) 1061 return ra_mask; 1062 1063 band = hal->current_band_type; 1064 if (band == RTW_BAND_2G) { 1065 band = NL80211_BAND_2GHZ; 1066 cfg_mask = mask->control[band].legacy; 1067 } else if (band == RTW_BAND_5G) { 1068 band = NL80211_BAND_5GHZ; 1069 cfg_mask = u64_encode_bits(mask->control[band].legacy, 1070 RA_MASK_OFDM_RATES); 1071 } 1072 1073 if (!is_vht_enable) { 1074 if (ra_mask & RA_MASK_HT_RATES_1SS) 1075 cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[0], 1076 RA_MASK_HT_RATES_1SS); 1077 if (ra_mask & RA_MASK_HT_RATES_2SS) 1078 cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[1], 1079 RA_MASK_HT_RATES_2SS); 1080 } else { 1081 if (ra_mask & RA_MASK_VHT_RATES_1SS) 1082 cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[0], 1083 RA_MASK_VHT_RATES_1SS); 1084 if (ra_mask & RA_MASK_VHT_RATES_2SS) 1085 cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[1], 1086 RA_MASK_VHT_RATES_2SS); 1087 } 1088 1089 ra_mask &= cfg_mask; 1090 1091 return ra_mask; 1092 } 1093 1094 void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si) 1095 { 1096 struct rtw_dm_info *dm_info = &rtwdev->dm_info; 1097 struct ieee80211_sta *sta = si->sta; 1098 struct rtw_efuse *efuse = &rtwdev->efuse; 1099 struct rtw_hal *hal = &rtwdev->hal; 1100 u8 wireless_set; 1101 u8 bw_mode; 1102 u8 rate_id; 1103 u8 rf_type = RF_1T1R; 1104 u8 stbc_en = 0; 1105 u8 ldpc_en = 0; 1106 u8 tx_num = 1; 1107 u64 ra_mask = 0; 1108 bool is_vht_enable = false; 1109 bool is_support_sgi = false; 1110 1111 if (sta->vht_cap.vht_supported) { 1112 is_vht_enable = true; 1113 ra_mask |= get_vht_ra_mask(sta); 1114 if (sta->vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_MASK) 1115 stbc_en = VHT_STBC_EN; 1116 if (sta->vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC) 1117 ldpc_en = VHT_LDPC_EN; 1118 } else if (sta->ht_cap.ht_supported) { 1119 ra_mask |= (sta->ht_cap.mcs.rx_mask[1] << 20) | 1120 (sta->ht_cap.mcs.rx_mask[0] << 12); 1121 if (sta->ht_cap.cap & IEEE80211_HT_CAP_RX_STBC) 1122 stbc_en = HT_STBC_EN; 1123 if (sta->ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING) 1124 ldpc_en = HT_LDPC_EN; 1125 } 1126 1127 if (efuse->hw_cap.nss == 1) 1128 ra_mask &= RA_MASK_VHT_RATES_1SS | RA_MASK_HT_RATES_1SS; 1129 1130 if (hal->current_band_type == RTW_BAND_5G) { 1131 ra_mask |= (u64)sta->supp_rates[NL80211_BAND_5GHZ] << 4; 1132 if (sta->vht_cap.vht_supported) { 1133 ra_mask &= RA_MASK_VHT_RATES | RA_MASK_OFDM_IN_VHT; 1134 wireless_set = WIRELESS_OFDM | WIRELESS_VHT; 1135 } else if (sta->ht_cap.ht_supported) { 1136 ra_mask &= RA_MASK_HT_RATES | RA_MASK_OFDM_IN_HT_5G; 1137 wireless_set = WIRELESS_OFDM | WIRELESS_HT; 1138 } else { 1139 wireless_set = WIRELESS_OFDM; 1140 } 1141 dm_info->rrsr_val_init = RRSR_INIT_5G; 1142 } else if (hal->current_band_type == RTW_BAND_2G) { 1143 ra_mask |= sta->supp_rates[NL80211_BAND_2GHZ]; 1144 if (sta->vht_cap.vht_supported) { 1145 ra_mask &= RA_MASK_VHT_RATES | RA_MASK_CCK_IN_VHT | 1146 RA_MASK_OFDM_IN_VHT; 1147 wireless_set = WIRELESS_CCK | WIRELESS_OFDM | 1148 WIRELESS_HT | WIRELESS_VHT; 1149 } else if (sta->ht_cap.ht_supported) { 1150 ra_mask &= RA_MASK_HT_RATES | RA_MASK_CCK_IN_HT | 1151 RA_MASK_OFDM_IN_HT_2G; 1152 wireless_set = WIRELESS_CCK | WIRELESS_OFDM | 1153 WIRELESS_HT; 1154 } else if (sta->supp_rates[0] <= 0xf) { 1155 wireless_set = WIRELESS_CCK; 1156 } else { 1157 wireless_set = WIRELESS_CCK | WIRELESS_OFDM; 1158 } 1159 dm_info->rrsr_val_init = RRSR_INIT_2G; 1160 } else { 1161 rtw_err(rtwdev, "Unknown band type\n"); 1162 wireless_set = 0; 1163 } 1164 1165 switch (sta->bandwidth) { 1166 case IEEE80211_STA_RX_BW_80: 1167 bw_mode = RTW_CHANNEL_WIDTH_80; 1168 is_support_sgi = sta->vht_cap.vht_supported && 1169 (sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80); 1170 break; 1171 case IEEE80211_STA_RX_BW_40: 1172 bw_mode = RTW_CHANNEL_WIDTH_40; 1173 is_support_sgi = sta->ht_cap.ht_supported && 1174 (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40); 1175 break; 1176 default: 1177 bw_mode = RTW_CHANNEL_WIDTH_20; 1178 is_support_sgi = sta->ht_cap.ht_supported && 1179 (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_20); 1180 break; 1181 } 1182 1183 if (sta->vht_cap.vht_supported && ra_mask & 0xffc00000) { 1184 tx_num = 2; 1185 rf_type = RF_2T2R; 1186 } else if (sta->ht_cap.ht_supported && ra_mask & 0xfff00000) { 1187 tx_num = 2; 1188 rf_type = RF_2T2R; 1189 } 1190 1191 rate_id = get_rate_id(wireless_set, bw_mode, tx_num); 1192 1193 ra_mask = rtw_update_rate_mask(rtwdev, si, ra_mask, is_vht_enable, 1194 wireless_set); 1195 1196 si->bw_mode = bw_mode; 1197 si->stbc_en = stbc_en; 1198 si->ldpc_en = ldpc_en; 1199 si->rf_type = rf_type; 1200 si->wireless_set = wireless_set; 1201 si->sgi_enable = is_support_sgi; 1202 si->vht_enable = is_vht_enable; 1203 si->ra_mask = ra_mask; 1204 si->rate_id = rate_id; 1205 1206 rtw_fw_send_ra_info(rtwdev, si); 1207 } 1208 1209 static int rtw_wait_firmware_completion(struct rtw_dev *rtwdev) 1210 { 1211 struct rtw_chip_info *chip = rtwdev->chip; 1212 struct rtw_fw_state *fw; 1213 1214 fw = &rtwdev->fw; 1215 wait_for_completion(&fw->completion); 1216 if (!fw->firmware) 1217 return -EINVAL; 1218 1219 if (chip->wow_fw_name) { 1220 fw = &rtwdev->wow_fw; 1221 wait_for_completion(&fw->completion); 1222 if (!fw->firmware) 1223 return -EINVAL; 1224 } 1225 1226 return 0; 1227 } 1228 1229 static enum rtw_lps_deep_mode rtw_update_lps_deep_mode(struct rtw_dev *rtwdev, 1230 struct rtw_fw_state *fw) 1231 { 1232 struct rtw_chip_info *chip = rtwdev->chip; 1233 1234 if (rtw_disable_lps_deep_mode || !chip->lps_deep_mode_supported || 1235 !fw->feature) 1236 return LPS_DEEP_MODE_NONE; 1237 1238 if ((chip->lps_deep_mode_supported & BIT(LPS_DEEP_MODE_PG)) && 1239 rtw_fw_feature_check(fw, FW_FEATURE_PG)) 1240 return LPS_DEEP_MODE_PG; 1241 1242 if ((chip->lps_deep_mode_supported & BIT(LPS_DEEP_MODE_LCLK)) && 1243 rtw_fw_feature_check(fw, FW_FEATURE_LCLK)) 1244 return LPS_DEEP_MODE_LCLK; 1245 1246 return LPS_DEEP_MODE_NONE; 1247 } 1248 1249 static int rtw_power_on(struct rtw_dev *rtwdev) 1250 { 1251 struct rtw_chip_info *chip = rtwdev->chip; 1252 struct rtw_fw_state *fw = &rtwdev->fw; 1253 bool wifi_only; 1254 int ret; 1255 1256 ret = rtw_hci_setup(rtwdev); 1257 if (ret) { 1258 rtw_err(rtwdev, "failed to setup hci\n"); 1259 goto err; 1260 } 1261 1262 /* power on MAC before firmware downloaded */ 1263 ret = rtw_mac_power_on(rtwdev); 1264 if (ret) { 1265 rtw_err(rtwdev, "failed to power on mac\n"); 1266 goto err; 1267 } 1268 1269 ret = rtw_wait_firmware_completion(rtwdev); 1270 if (ret) { 1271 rtw_err(rtwdev, "failed to wait firmware completion\n"); 1272 goto err_off; 1273 } 1274 1275 ret = rtw_download_firmware(rtwdev, fw); 1276 if (ret) { 1277 rtw_err(rtwdev, "failed to download firmware\n"); 1278 goto err_off; 1279 } 1280 1281 /* config mac after firmware downloaded */ 1282 ret = rtw_mac_init(rtwdev); 1283 if (ret) { 1284 rtw_err(rtwdev, "failed to configure mac\n"); 1285 goto err_off; 1286 } 1287 1288 chip->ops->phy_set_param(rtwdev); 1289 1290 ret = rtw_hci_start(rtwdev); 1291 if (ret) { 1292 rtw_err(rtwdev, "failed to start hci\n"); 1293 goto err_off; 1294 } 1295 1296 /* send H2C after HCI has started */ 1297 rtw_fw_send_general_info(rtwdev); 1298 rtw_fw_send_phydm_info(rtwdev); 1299 1300 wifi_only = !rtwdev->efuse.btcoex; 1301 rtw_coex_power_on_setting(rtwdev); 1302 rtw_coex_init_hw_config(rtwdev, wifi_only); 1303 1304 return 0; 1305 1306 err_off: 1307 rtw_mac_power_off(rtwdev); 1308 1309 err: 1310 return ret; 1311 } 1312 1313 void rtw_core_fw_scan_notify(struct rtw_dev *rtwdev, bool start) 1314 { 1315 if (!rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_NOTIFY_SCAN)) 1316 return; 1317 1318 if (start) { 1319 rtw_fw_scan_notify(rtwdev, true); 1320 } else { 1321 reinit_completion(&rtwdev->fw_scan_density); 1322 rtw_fw_scan_notify(rtwdev, false); 1323 if (!wait_for_completion_timeout(&rtwdev->fw_scan_density, 1324 SCAN_NOTIFY_TIMEOUT)) 1325 rtw_warn(rtwdev, "firmware failed to report density after scan\n"); 1326 } 1327 } 1328 1329 void rtw_core_scan_start(struct rtw_dev *rtwdev, struct rtw_vif *rtwvif, 1330 const u8 *mac_addr, bool hw_scan) 1331 { 1332 u32 config = 0; 1333 int ret = 0; 1334 1335 rtw_leave_lps(rtwdev); 1336 1337 if (hw_scan && rtwvif->net_type == RTW_NET_NO_LINK) { 1338 ret = rtw_leave_ips(rtwdev); 1339 if (ret) { 1340 rtw_err(rtwdev, "failed to leave idle state\n"); 1341 return; 1342 } 1343 } 1344 1345 ether_addr_copy(rtwvif->mac_addr, mac_addr); 1346 config |= PORT_SET_MAC_ADDR; 1347 rtw_vif_port_config(rtwdev, rtwvif, config); 1348 1349 rtw_coex_scan_notify(rtwdev, COEX_SCAN_START); 1350 rtw_core_fw_scan_notify(rtwdev, true); 1351 1352 set_bit(RTW_FLAG_DIG_DISABLE, rtwdev->flags); 1353 set_bit(RTW_FLAG_SCANNING, rtwdev->flags); 1354 } 1355 1356 void rtw_core_scan_complete(struct rtw_dev *rtwdev, struct ieee80211_vif *vif) 1357 { 1358 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; 1359 u32 config = 0; 1360 1361 clear_bit(RTW_FLAG_SCANNING, rtwdev->flags); 1362 clear_bit(RTW_FLAG_DIG_DISABLE, rtwdev->flags); 1363 1364 rtw_core_fw_scan_notify(rtwdev, false); 1365 1366 ether_addr_copy(rtwvif->mac_addr, vif->addr); 1367 config |= PORT_SET_MAC_ADDR; 1368 rtw_vif_port_config(rtwdev, rtwvif, config); 1369 1370 rtw_coex_scan_notify(rtwdev, COEX_SCAN_FINISH); 1371 } 1372 1373 int rtw_core_start(struct rtw_dev *rtwdev) 1374 { 1375 int ret; 1376 1377 ret = rtw_power_on(rtwdev); 1378 if (ret) 1379 return ret; 1380 1381 rtw_sec_enable_sec_engine(rtwdev); 1382 1383 rtwdev->lps_conf.deep_mode = rtw_update_lps_deep_mode(rtwdev, &rtwdev->fw); 1384 rtwdev->lps_conf.wow_deep_mode = rtw_update_lps_deep_mode(rtwdev, &rtwdev->wow_fw); 1385 1386 /* rcr reset after powered on */ 1387 rtw_write32(rtwdev, REG_RCR, rtwdev->hal.rcr); 1388 1389 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work, 1390 RTW_WATCH_DOG_DELAY_TIME); 1391 1392 set_bit(RTW_FLAG_RUNNING, rtwdev->flags); 1393 1394 return 0; 1395 } 1396 1397 static void rtw_power_off(struct rtw_dev *rtwdev) 1398 { 1399 rtw_hci_stop(rtwdev); 1400 rtw_coex_power_off_setting(rtwdev); 1401 rtw_mac_power_off(rtwdev); 1402 } 1403 1404 void rtw_core_stop(struct rtw_dev *rtwdev) 1405 { 1406 struct rtw_coex *coex = &rtwdev->coex; 1407 1408 clear_bit(RTW_FLAG_RUNNING, rtwdev->flags); 1409 clear_bit(RTW_FLAG_FW_RUNNING, rtwdev->flags); 1410 1411 mutex_unlock(&rtwdev->mutex); 1412 1413 cancel_work_sync(&rtwdev->c2h_work); 1414 cancel_delayed_work_sync(&rtwdev->watch_dog_work); 1415 cancel_delayed_work_sync(&coex->bt_relink_work); 1416 cancel_delayed_work_sync(&coex->bt_reenable_work); 1417 cancel_delayed_work_sync(&coex->defreeze_work); 1418 cancel_delayed_work_sync(&coex->wl_remain_work); 1419 cancel_delayed_work_sync(&coex->bt_remain_work); 1420 cancel_delayed_work_sync(&coex->wl_connecting_work); 1421 cancel_delayed_work_sync(&coex->bt_multi_link_remain_work); 1422 cancel_delayed_work_sync(&coex->wl_ccklock_work); 1423 1424 mutex_lock(&rtwdev->mutex); 1425 1426 rtw_power_off(rtwdev); 1427 } 1428 1429 static void rtw_init_ht_cap(struct rtw_dev *rtwdev, 1430 struct ieee80211_sta_ht_cap *ht_cap) 1431 { 1432 struct rtw_efuse *efuse = &rtwdev->efuse; 1433 1434 ht_cap->ht_supported = true; 1435 ht_cap->cap = 0; 1436 ht_cap->cap |= IEEE80211_HT_CAP_SGI_20 | 1437 IEEE80211_HT_CAP_MAX_AMSDU | 1438 (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT); 1439 1440 if (rtw_chip_has_rx_ldpc(rtwdev)) 1441 ht_cap->cap |= IEEE80211_HT_CAP_LDPC_CODING; 1442 if (rtw_chip_has_tx_stbc(rtwdev)) 1443 ht_cap->cap |= IEEE80211_HT_CAP_TX_STBC; 1444 1445 if (efuse->hw_cap.bw & BIT(RTW_CHANNEL_WIDTH_40)) 1446 ht_cap->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40 | 1447 IEEE80211_HT_CAP_DSSSCCK40 | 1448 IEEE80211_HT_CAP_SGI_40; 1449 ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; 1450 ht_cap->ampdu_density = IEEE80211_HT_MPDU_DENSITY_16; 1451 ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; 1452 if (efuse->hw_cap.nss > 1) { 1453 ht_cap->mcs.rx_mask[0] = 0xFF; 1454 ht_cap->mcs.rx_mask[1] = 0xFF; 1455 ht_cap->mcs.rx_mask[4] = 0x01; 1456 ht_cap->mcs.rx_highest = cpu_to_le16(300); 1457 } else { 1458 ht_cap->mcs.rx_mask[0] = 0xFF; 1459 ht_cap->mcs.rx_mask[1] = 0x00; 1460 ht_cap->mcs.rx_mask[4] = 0x01; 1461 ht_cap->mcs.rx_highest = cpu_to_le16(150); 1462 } 1463 } 1464 1465 static void rtw_init_vht_cap(struct rtw_dev *rtwdev, 1466 struct ieee80211_sta_vht_cap *vht_cap) 1467 { 1468 struct rtw_efuse *efuse = &rtwdev->efuse; 1469 u16 mcs_map; 1470 __le16 highest; 1471 1472 if (efuse->hw_cap.ptcl != EFUSE_HW_CAP_IGNORE && 1473 efuse->hw_cap.ptcl != EFUSE_HW_CAP_PTCL_VHT) 1474 return; 1475 1476 vht_cap->vht_supported = true; 1477 vht_cap->cap = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 | 1478 IEEE80211_VHT_CAP_SHORT_GI_80 | 1479 IEEE80211_VHT_CAP_RXSTBC_1 | 1480 IEEE80211_VHT_CAP_HTC_VHT | 1481 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK | 1482 0; 1483 if (rtwdev->hal.rf_path_num > 1) 1484 vht_cap->cap |= IEEE80211_VHT_CAP_TXSTBC; 1485 vht_cap->cap |= IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE | 1486 IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE; 1487 vht_cap->cap |= (rtwdev->hal.bfee_sts_cap << 1488 IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT); 1489 1490 if (rtw_chip_has_rx_ldpc(rtwdev)) 1491 vht_cap->cap |= IEEE80211_VHT_CAP_RXLDPC; 1492 1493 mcs_map = IEEE80211_VHT_MCS_SUPPORT_0_9 << 0 | 1494 IEEE80211_VHT_MCS_NOT_SUPPORTED << 4 | 1495 IEEE80211_VHT_MCS_NOT_SUPPORTED << 6 | 1496 IEEE80211_VHT_MCS_NOT_SUPPORTED << 8 | 1497 IEEE80211_VHT_MCS_NOT_SUPPORTED << 10 | 1498 IEEE80211_VHT_MCS_NOT_SUPPORTED << 12 | 1499 IEEE80211_VHT_MCS_NOT_SUPPORTED << 14; 1500 if (efuse->hw_cap.nss > 1) { 1501 highest = cpu_to_le16(780); 1502 mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << 2; 1503 } else { 1504 highest = cpu_to_le16(390); 1505 mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << 2; 1506 } 1507 1508 vht_cap->vht_mcs.rx_mcs_map = cpu_to_le16(mcs_map); 1509 vht_cap->vht_mcs.tx_mcs_map = cpu_to_le16(mcs_map); 1510 vht_cap->vht_mcs.rx_highest = highest; 1511 vht_cap->vht_mcs.tx_highest = highest; 1512 } 1513 1514 static void rtw_set_supported_band(struct ieee80211_hw *hw, 1515 struct rtw_chip_info *chip) 1516 { 1517 struct rtw_dev *rtwdev = hw->priv; 1518 struct ieee80211_supported_band *sband; 1519 1520 if (chip->band & RTW_BAND_2G) { 1521 sband = kmemdup(&rtw_band_2ghz, sizeof(*sband), GFP_KERNEL); 1522 if (!sband) 1523 goto err_out; 1524 if (chip->ht_supported) 1525 rtw_init_ht_cap(rtwdev, &sband->ht_cap); 1526 hw->wiphy->bands[NL80211_BAND_2GHZ] = sband; 1527 } 1528 1529 if (chip->band & RTW_BAND_5G) { 1530 sband = kmemdup(&rtw_band_5ghz, sizeof(*sband), GFP_KERNEL); 1531 if (!sband) 1532 goto err_out; 1533 if (chip->ht_supported) 1534 rtw_init_ht_cap(rtwdev, &sband->ht_cap); 1535 if (chip->vht_supported) 1536 rtw_init_vht_cap(rtwdev, &sband->vht_cap); 1537 hw->wiphy->bands[NL80211_BAND_5GHZ] = sband; 1538 } 1539 1540 return; 1541 1542 err_out: 1543 rtw_err(rtwdev, "failed to set supported band\n"); 1544 } 1545 1546 static void rtw_unset_supported_band(struct ieee80211_hw *hw, 1547 struct rtw_chip_info *chip) 1548 { 1549 kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]); 1550 kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]); 1551 } 1552 1553 static void __update_firmware_feature(struct rtw_dev *rtwdev, 1554 struct rtw_fw_state *fw) 1555 { 1556 u32 feature; 1557 const struct rtw_fw_hdr *fw_hdr = 1558 (const struct rtw_fw_hdr *)fw->firmware->data; 1559 1560 feature = le32_to_cpu(fw_hdr->feature); 1561 fw->feature = feature & FW_FEATURE_SIG ? feature : 0; 1562 } 1563 1564 static void __update_firmware_info(struct rtw_dev *rtwdev, 1565 struct rtw_fw_state *fw) 1566 { 1567 const struct rtw_fw_hdr *fw_hdr = 1568 (const struct rtw_fw_hdr *)fw->firmware->data; 1569 1570 fw->h2c_version = le16_to_cpu(fw_hdr->h2c_fmt_ver); 1571 fw->version = le16_to_cpu(fw_hdr->version); 1572 fw->sub_version = fw_hdr->subversion; 1573 fw->sub_index = fw_hdr->subindex; 1574 1575 __update_firmware_feature(rtwdev, fw); 1576 } 1577 1578 static void __update_firmware_info_legacy(struct rtw_dev *rtwdev, 1579 struct rtw_fw_state *fw) 1580 { 1581 struct rtw_fw_hdr_legacy *legacy = 1582 #if defined(__linux__) 1583 (struct rtw_fw_hdr_legacy *)fw->firmware->data; 1584 #elif defined(__FreeBSD__) 1585 __DECONST(struct rtw_fw_hdr_legacy *, fw->firmware->data); 1586 #endif 1587 1588 fw->h2c_version = 0; 1589 fw->version = le16_to_cpu(legacy->version); 1590 fw->sub_version = legacy->subversion1; 1591 fw->sub_index = legacy->subversion2; 1592 } 1593 1594 static void update_firmware_info(struct rtw_dev *rtwdev, 1595 struct rtw_fw_state *fw) 1596 { 1597 if (rtw_chip_wcpu_11n(rtwdev)) 1598 __update_firmware_info_legacy(rtwdev, fw); 1599 else 1600 __update_firmware_info(rtwdev, fw); 1601 } 1602 1603 static void rtw_load_firmware_cb(const struct firmware *firmware, void *context) 1604 { 1605 struct rtw_fw_state *fw = context; 1606 struct rtw_dev *rtwdev = fw->rtwdev; 1607 1608 if (!firmware || !firmware->data) { 1609 rtw_err(rtwdev, "failed to request firmware\n"); 1610 complete_all(&fw->completion); 1611 return; 1612 } 1613 1614 fw->firmware = firmware; 1615 update_firmware_info(rtwdev, fw); 1616 complete_all(&fw->completion); 1617 1618 rtw_info(rtwdev, "Firmware version %u.%u.%u, H2C version %u\n", 1619 fw->version, fw->sub_version, fw->sub_index, fw->h2c_version); 1620 } 1621 1622 static int rtw_load_firmware(struct rtw_dev *rtwdev, enum rtw_fw_type type) 1623 { 1624 const char *fw_name; 1625 struct rtw_fw_state *fw; 1626 int ret; 1627 1628 switch (type) { 1629 case RTW_WOWLAN_FW: 1630 fw = &rtwdev->wow_fw; 1631 fw_name = rtwdev->chip->wow_fw_name; 1632 break; 1633 1634 case RTW_NORMAL_FW: 1635 fw = &rtwdev->fw; 1636 fw_name = rtwdev->chip->fw_name; 1637 break; 1638 1639 default: 1640 rtw_warn(rtwdev, "unsupported firmware type\n"); 1641 return -ENOENT; 1642 } 1643 1644 fw->rtwdev = rtwdev; 1645 init_completion(&fw->completion); 1646 1647 ret = request_firmware_nowait(THIS_MODULE, true, fw_name, rtwdev->dev, 1648 GFP_KERNEL, fw, rtw_load_firmware_cb); 1649 if (ret) { 1650 rtw_err(rtwdev, "failed to async firmware request\n"); 1651 return ret; 1652 } 1653 1654 return 0; 1655 } 1656 1657 static int rtw_chip_parameter_setup(struct rtw_dev *rtwdev) 1658 { 1659 struct rtw_chip_info *chip = rtwdev->chip; 1660 struct rtw_hal *hal = &rtwdev->hal; 1661 struct rtw_efuse *efuse = &rtwdev->efuse; 1662 1663 switch (rtw_hci_type(rtwdev)) { 1664 case RTW_HCI_TYPE_PCIE: 1665 rtwdev->hci.rpwm_addr = 0x03d9; 1666 rtwdev->hci.cpwm_addr = 0x03da; 1667 break; 1668 default: 1669 rtw_err(rtwdev, "unsupported hci type\n"); 1670 return -EINVAL; 1671 } 1672 1673 hal->chip_version = rtw_read32(rtwdev, REG_SYS_CFG1); 1674 hal->cut_version = BIT_GET_CHIP_VER(hal->chip_version); 1675 hal->mp_chip = (hal->chip_version & BIT_RTL_ID) ? 0 : 1; 1676 if (hal->chip_version & BIT_RF_TYPE_ID) { 1677 hal->rf_type = RF_2T2R; 1678 hal->rf_path_num = 2; 1679 hal->antenna_tx = BB_PATH_AB; 1680 hal->antenna_rx = BB_PATH_AB; 1681 } else { 1682 hal->rf_type = RF_1T1R; 1683 hal->rf_path_num = 1; 1684 hal->antenna_tx = BB_PATH_A; 1685 hal->antenna_rx = BB_PATH_A; 1686 } 1687 hal->rf_phy_num = chip->fix_rf_phy_num ? chip->fix_rf_phy_num : 1688 hal->rf_path_num; 1689 1690 efuse->physical_size = chip->phy_efuse_size; 1691 efuse->logical_size = chip->log_efuse_size; 1692 efuse->protect_size = chip->ptct_efuse_size; 1693 1694 /* default use ack */ 1695 rtwdev->hal.rcr |= BIT_VHT_DACK; 1696 1697 hal->bfee_sts_cap = 3; 1698 1699 return 0; 1700 } 1701 1702 static int rtw_chip_efuse_enable(struct rtw_dev *rtwdev) 1703 { 1704 struct rtw_fw_state *fw = &rtwdev->fw; 1705 int ret; 1706 1707 ret = rtw_hci_setup(rtwdev); 1708 if (ret) { 1709 rtw_err(rtwdev, "failed to setup hci\n"); 1710 goto err; 1711 } 1712 1713 ret = rtw_mac_power_on(rtwdev); 1714 if (ret) { 1715 rtw_err(rtwdev, "failed to power on mac\n"); 1716 goto err; 1717 } 1718 1719 rtw_write8(rtwdev, REG_C2HEVT, C2H_HW_FEATURE_DUMP); 1720 1721 wait_for_completion(&fw->completion); 1722 if (!fw->firmware) { 1723 ret = -EINVAL; 1724 rtw_err(rtwdev, "failed to load firmware\n"); 1725 goto err; 1726 } 1727 1728 ret = rtw_download_firmware(rtwdev, fw); 1729 if (ret) { 1730 rtw_err(rtwdev, "failed to download firmware\n"); 1731 goto err_off; 1732 } 1733 1734 return 0; 1735 1736 err_off: 1737 rtw_mac_power_off(rtwdev); 1738 1739 err: 1740 return ret; 1741 } 1742 1743 static int rtw_dump_hw_feature(struct rtw_dev *rtwdev) 1744 { 1745 struct rtw_efuse *efuse = &rtwdev->efuse; 1746 u8 hw_feature[HW_FEATURE_LEN]; 1747 u8 id; 1748 u8 bw; 1749 int i; 1750 1751 id = rtw_read8(rtwdev, REG_C2HEVT); 1752 if (id != C2H_HW_FEATURE_REPORT) { 1753 rtw_err(rtwdev, "failed to read hw feature report\n"); 1754 return -EBUSY; 1755 } 1756 1757 for (i = 0; i < HW_FEATURE_LEN; i++) 1758 hw_feature[i] = rtw_read8(rtwdev, REG_C2HEVT + 2 + i); 1759 1760 rtw_write8(rtwdev, REG_C2HEVT, 0); 1761 1762 bw = GET_EFUSE_HW_CAP_BW(hw_feature); 1763 efuse->hw_cap.bw = hw_bw_cap_to_bitamp(bw); 1764 efuse->hw_cap.hci = GET_EFUSE_HW_CAP_HCI(hw_feature); 1765 efuse->hw_cap.nss = GET_EFUSE_HW_CAP_NSS(hw_feature); 1766 efuse->hw_cap.ptcl = GET_EFUSE_HW_CAP_PTCL(hw_feature); 1767 efuse->hw_cap.ant_num = GET_EFUSE_HW_CAP_ANT_NUM(hw_feature); 1768 1769 rtw_hw_config_rf_ant_num(rtwdev, efuse->hw_cap.ant_num); 1770 1771 if (efuse->hw_cap.nss == EFUSE_HW_CAP_IGNORE || 1772 efuse->hw_cap.nss > rtwdev->hal.rf_path_num) 1773 efuse->hw_cap.nss = rtwdev->hal.rf_path_num; 1774 1775 rtw_dbg(rtwdev, RTW_DBG_EFUSE, 1776 "hw cap: hci=0x%02x, bw=0x%02x, ptcl=0x%02x, ant_num=%d, nss=%d\n", 1777 efuse->hw_cap.hci, efuse->hw_cap.bw, efuse->hw_cap.ptcl, 1778 efuse->hw_cap.ant_num, efuse->hw_cap.nss); 1779 1780 return 0; 1781 } 1782 1783 static void rtw_chip_efuse_disable(struct rtw_dev *rtwdev) 1784 { 1785 rtw_hci_stop(rtwdev); 1786 rtw_mac_power_off(rtwdev); 1787 } 1788 1789 static int rtw_chip_efuse_info_setup(struct rtw_dev *rtwdev) 1790 { 1791 struct rtw_efuse *efuse = &rtwdev->efuse; 1792 int ret; 1793 1794 mutex_lock(&rtwdev->mutex); 1795 1796 /* power on mac to read efuse */ 1797 ret = rtw_chip_efuse_enable(rtwdev); 1798 if (ret) 1799 goto out_unlock; 1800 1801 ret = rtw_parse_efuse_map(rtwdev); 1802 if (ret) 1803 goto out_disable; 1804 1805 ret = rtw_dump_hw_feature(rtwdev); 1806 if (ret) 1807 goto out_disable; 1808 1809 ret = rtw_check_supported_rfe(rtwdev); 1810 if (ret) 1811 goto out_disable; 1812 1813 if (efuse->crystal_cap == 0xff) 1814 efuse->crystal_cap = 0; 1815 if (efuse->pa_type_2g == 0xff) 1816 efuse->pa_type_2g = 0; 1817 if (efuse->pa_type_5g == 0xff) 1818 efuse->pa_type_5g = 0; 1819 if (efuse->lna_type_2g == 0xff) 1820 efuse->lna_type_2g = 0; 1821 if (efuse->lna_type_5g == 0xff) 1822 efuse->lna_type_5g = 0; 1823 if (efuse->channel_plan == 0xff) 1824 efuse->channel_plan = 0x7f; 1825 if (efuse->rf_board_option == 0xff) 1826 efuse->rf_board_option = 0; 1827 if (efuse->bt_setting & BIT(0)) 1828 efuse->share_ant = true; 1829 if (efuse->regd == 0xff) 1830 efuse->regd = 0; 1831 if (efuse->tx_bb_swing_setting_2g == 0xff) 1832 efuse->tx_bb_swing_setting_2g = 0; 1833 if (efuse->tx_bb_swing_setting_5g == 0xff) 1834 efuse->tx_bb_swing_setting_5g = 0; 1835 1836 efuse->btcoex = (efuse->rf_board_option & 0xe0) == 0x20; 1837 efuse->ext_pa_2g = efuse->pa_type_2g & BIT(4) ? 1 : 0; 1838 efuse->ext_lna_2g = efuse->lna_type_2g & BIT(3) ? 1 : 0; 1839 efuse->ext_pa_5g = efuse->pa_type_5g & BIT(0) ? 1 : 0; 1840 efuse->ext_lna_2g = efuse->lna_type_5g & BIT(3) ? 1 : 0; 1841 1842 out_disable: 1843 rtw_chip_efuse_disable(rtwdev); 1844 1845 out_unlock: 1846 mutex_unlock(&rtwdev->mutex); 1847 return ret; 1848 } 1849 1850 static int rtw_chip_board_info_setup(struct rtw_dev *rtwdev) 1851 { 1852 struct rtw_hal *hal = &rtwdev->hal; 1853 const struct rtw_rfe_def *rfe_def = rtw_get_rfe_def(rtwdev); 1854 1855 if (!rfe_def) 1856 return -ENODEV; 1857 1858 rtw_phy_setup_phy_cond(rtwdev, 0); 1859 1860 rtw_phy_init_tx_power(rtwdev); 1861 if (rfe_def->agc_btg_tbl) 1862 rtw_load_table(rtwdev, rfe_def->agc_btg_tbl); 1863 rtw_load_table(rtwdev, rfe_def->phy_pg_tbl); 1864 rtw_load_table(rtwdev, rfe_def->txpwr_lmt_tbl); 1865 rtw_phy_tx_power_by_rate_config(hal); 1866 rtw_phy_tx_power_limit_config(hal); 1867 1868 return 0; 1869 } 1870 1871 int rtw_chip_info_setup(struct rtw_dev *rtwdev) 1872 { 1873 int ret; 1874 1875 ret = rtw_chip_parameter_setup(rtwdev); 1876 if (ret) { 1877 rtw_err(rtwdev, "failed to setup chip parameters\n"); 1878 goto err_out; 1879 } 1880 1881 ret = rtw_chip_efuse_info_setup(rtwdev); 1882 if (ret) { 1883 rtw_err(rtwdev, "failed to setup chip efuse info\n"); 1884 goto err_out; 1885 } 1886 1887 ret = rtw_chip_board_info_setup(rtwdev); 1888 if (ret) { 1889 rtw_err(rtwdev, "failed to setup chip board info\n"); 1890 goto err_out; 1891 } 1892 1893 return 0; 1894 1895 err_out: 1896 return ret; 1897 } 1898 EXPORT_SYMBOL(rtw_chip_info_setup); 1899 1900 static void rtw_stats_init(struct rtw_dev *rtwdev) 1901 { 1902 struct rtw_traffic_stats *stats = &rtwdev->stats; 1903 struct rtw_dm_info *dm_info = &rtwdev->dm_info; 1904 int i; 1905 1906 ewma_tp_init(&stats->tx_ewma_tp); 1907 ewma_tp_init(&stats->rx_ewma_tp); 1908 1909 for (i = 0; i < RTW_EVM_NUM; i++) 1910 ewma_evm_init(&dm_info->ewma_evm[i]); 1911 for (i = 0; i < RTW_SNR_NUM; i++) 1912 ewma_snr_init(&dm_info->ewma_snr[i]); 1913 } 1914 1915 int rtw_core_init(struct rtw_dev *rtwdev) 1916 { 1917 struct rtw_chip_info *chip = rtwdev->chip; 1918 struct rtw_coex *coex = &rtwdev->coex; 1919 int ret; 1920 1921 INIT_LIST_HEAD(&rtwdev->rsvd_page_list); 1922 INIT_LIST_HEAD(&rtwdev->txqs); 1923 1924 timer_setup(&rtwdev->tx_report.purge_timer, 1925 rtw_tx_report_purge_timer, 0); 1926 rtwdev->tx_wq = alloc_workqueue("rtw_tx_wq", WQ_UNBOUND | WQ_HIGHPRI, 0); 1927 1928 INIT_DELAYED_WORK(&rtwdev->watch_dog_work, rtw_watch_dog_work); 1929 INIT_DELAYED_WORK(&coex->bt_relink_work, rtw_coex_bt_relink_work); 1930 INIT_DELAYED_WORK(&coex->bt_reenable_work, rtw_coex_bt_reenable_work); 1931 INIT_DELAYED_WORK(&coex->defreeze_work, rtw_coex_defreeze_work); 1932 INIT_DELAYED_WORK(&coex->wl_remain_work, rtw_coex_wl_remain_work); 1933 INIT_DELAYED_WORK(&coex->bt_remain_work, rtw_coex_bt_remain_work); 1934 INIT_DELAYED_WORK(&coex->wl_connecting_work, rtw_coex_wl_connecting_work); 1935 INIT_DELAYED_WORK(&coex->bt_multi_link_remain_work, 1936 rtw_coex_bt_multi_link_remain_work); 1937 INIT_DELAYED_WORK(&coex->wl_ccklock_work, rtw_coex_wl_ccklock_work); 1938 INIT_WORK(&rtwdev->tx_work, rtw_tx_work); 1939 INIT_WORK(&rtwdev->c2h_work, rtw_c2h_work); 1940 INIT_WORK(&rtwdev->fw_recovery_work, rtw_fw_recovery_work); 1941 INIT_WORK(&rtwdev->ba_work, rtw_txq_ba_work); 1942 skb_queue_head_init(&rtwdev->c2h_queue); 1943 skb_queue_head_init(&rtwdev->coex.queue); 1944 skb_queue_head_init(&rtwdev->tx_report.queue); 1945 1946 spin_lock_init(&rtwdev->rf_lock); 1947 spin_lock_init(&rtwdev->h2c.lock); 1948 spin_lock_init(&rtwdev->txq_lock); 1949 spin_lock_init(&rtwdev->tx_report.q_lock); 1950 1951 mutex_init(&rtwdev->mutex); 1952 mutex_init(&rtwdev->coex.mutex); 1953 mutex_init(&rtwdev->hal.tx_power_mutex); 1954 1955 init_waitqueue_head(&rtwdev->coex.wait); 1956 init_completion(&rtwdev->lps_leave_check); 1957 init_completion(&rtwdev->fw_scan_density); 1958 1959 rtwdev->sec.total_cam_num = 32; 1960 rtwdev->hal.current_channel = 1; 1961 rtwdev->dm_info.fix_rate = U8_MAX; 1962 set_bit(RTW_BC_MC_MACID, rtwdev->mac_id_map); 1963 1964 rtw_stats_init(rtwdev); 1965 1966 /* default rx filter setting */ 1967 rtwdev->hal.rcr = BIT_APP_FCS | BIT_APP_MIC | BIT_APP_ICV | 1968 BIT_PKTCTL_DLEN | BIT_HTC_LOC_CTRL | BIT_APP_PHYSTS | 1969 BIT_AB | BIT_AM | BIT_APM; 1970 1971 ret = rtw_load_firmware(rtwdev, RTW_NORMAL_FW); 1972 if (ret) { 1973 rtw_warn(rtwdev, "no firmware loaded\n"); 1974 return ret; 1975 } 1976 1977 if (chip->wow_fw_name) { 1978 ret = rtw_load_firmware(rtwdev, RTW_WOWLAN_FW); 1979 if (ret) { 1980 rtw_warn(rtwdev, "no wow firmware loaded\n"); 1981 wait_for_completion(&rtwdev->fw.completion); 1982 if (rtwdev->fw.firmware) 1983 release_firmware(rtwdev->fw.firmware); 1984 return ret; 1985 } 1986 } 1987 1988 #if defined(__FreeBSD__) 1989 rtw_wait_firmware_completion(rtwdev); 1990 #endif 1991 1992 return 0; 1993 } 1994 EXPORT_SYMBOL(rtw_core_init); 1995 1996 void rtw_core_deinit(struct rtw_dev *rtwdev) 1997 { 1998 struct rtw_fw_state *fw = &rtwdev->fw; 1999 struct rtw_fw_state *wow_fw = &rtwdev->wow_fw; 2000 struct rtw_rsvd_page *rsvd_pkt, *tmp; 2001 unsigned long flags; 2002 2003 rtw_wait_firmware_completion(rtwdev); 2004 2005 if (fw->firmware) 2006 release_firmware(fw->firmware); 2007 2008 if (wow_fw->firmware) 2009 release_firmware(wow_fw->firmware); 2010 2011 destroy_workqueue(rtwdev->tx_wq); 2012 spin_lock_irqsave(&rtwdev->tx_report.q_lock, flags); 2013 skb_queue_purge(&rtwdev->tx_report.queue); 2014 skb_queue_purge(&rtwdev->coex.queue); 2015 spin_unlock_irqrestore(&rtwdev->tx_report.q_lock, flags); 2016 2017 list_for_each_entry_safe(rsvd_pkt, tmp, &rtwdev->rsvd_page_list, 2018 build_list) { 2019 list_del(&rsvd_pkt->build_list); 2020 kfree(rsvd_pkt); 2021 } 2022 2023 mutex_destroy(&rtwdev->mutex); 2024 mutex_destroy(&rtwdev->coex.mutex); 2025 mutex_destroy(&rtwdev->hal.tx_power_mutex); 2026 } 2027 EXPORT_SYMBOL(rtw_core_deinit); 2028 2029 int rtw_register_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw) 2030 { 2031 struct rtw_hal *hal = &rtwdev->hal; 2032 int max_tx_headroom = 0; 2033 int ret; 2034 2035 /* TODO: USB & SDIO may need extra room? */ 2036 max_tx_headroom = rtwdev->chip->tx_pkt_desc_sz; 2037 2038 hw->extra_tx_headroom = max_tx_headroom; 2039 hw->queues = IEEE80211_NUM_ACS; 2040 hw->txq_data_size = sizeof(struct rtw_txq); 2041 hw->sta_data_size = sizeof(struct rtw_sta_info); 2042 hw->vif_data_size = sizeof(struct rtw_vif); 2043 2044 ieee80211_hw_set(hw, SIGNAL_DBM); 2045 ieee80211_hw_set(hw, RX_INCLUDES_FCS); 2046 ieee80211_hw_set(hw, AMPDU_AGGREGATION); 2047 ieee80211_hw_set(hw, MFP_CAPABLE); 2048 ieee80211_hw_set(hw, REPORTS_TX_ACK_STATUS); 2049 ieee80211_hw_set(hw, SUPPORTS_PS); 2050 ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS); 2051 ieee80211_hw_set(hw, SUPPORT_FAST_XMIT); 2052 ieee80211_hw_set(hw, SUPPORTS_AMSDU_IN_AMPDU); 2053 ieee80211_hw_set(hw, HAS_RATE_CONTROL); 2054 ieee80211_hw_set(hw, TX_AMSDU); 2055 ieee80211_hw_set(hw, SINGLE_SCAN_ON_ALL_BANDS); 2056 2057 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) | 2058 BIT(NL80211_IFTYPE_AP) | 2059 BIT(NL80211_IFTYPE_ADHOC) | 2060 BIT(NL80211_IFTYPE_MESH_POINT); 2061 hw->wiphy->available_antennas_tx = hal->antenna_tx; 2062 hw->wiphy->available_antennas_rx = hal->antenna_rx; 2063 2064 hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS | 2065 WIPHY_FLAG_TDLS_EXTERNAL_SETUP; 2066 2067 hw->wiphy->features |= NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR; 2068 hw->wiphy->max_scan_ssids = RTW_SCAN_MAX_SSIDS; 2069 hw->wiphy->max_scan_ie_len = RTW_SCAN_MAX_IE_LEN; 2070 2071 wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0); 2072 wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_SCAN_RANDOM_SN); 2073 wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_SET_SCAN_DWELL); 2074 2075 #ifdef CONFIG_PM 2076 hw->wiphy->wowlan = rtwdev->chip->wowlan_stub; 2077 hw->wiphy->max_sched_scan_ssids = rtwdev->chip->max_sched_scan_ssids; 2078 #endif 2079 rtw_set_supported_band(hw, rtwdev->chip); 2080 SET_IEEE80211_PERM_ADDR(hw, rtwdev->efuse.addr); 2081 2082 hw->wiphy->sar_capa = &rtw_sar_capa; 2083 2084 ret = rtw_regd_init(rtwdev); 2085 if (ret) { 2086 rtw_err(rtwdev, "failed to init regd\n"); 2087 return ret; 2088 } 2089 2090 ret = ieee80211_register_hw(hw); 2091 if (ret) { 2092 rtw_err(rtwdev, "failed to register hw\n"); 2093 return ret; 2094 } 2095 2096 ret = rtw_regd_hint(rtwdev); 2097 if (ret) { 2098 rtw_err(rtwdev, "failed to hint regd\n"); 2099 return ret; 2100 } 2101 2102 rtw_debugfs_init(rtwdev); 2103 2104 rtwdev->bf_info.bfer_mu_cnt = 0; 2105 rtwdev->bf_info.bfer_su_cnt = 0; 2106 2107 return 0; 2108 } 2109 EXPORT_SYMBOL(rtw_register_hw); 2110 2111 void rtw_unregister_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw) 2112 { 2113 struct rtw_chip_info *chip = rtwdev->chip; 2114 2115 ieee80211_unregister_hw(hw); 2116 rtw_unset_supported_band(hw, chip); 2117 } 2118 EXPORT_SYMBOL(rtw_unregister_hw); 2119 2120 MODULE_AUTHOR("Realtek Corporation"); 2121 MODULE_DESCRIPTION("Realtek 802.11ac wireless core module"); 2122 MODULE_LICENSE("Dual BSD/GPL"); 2123