1*354d7675SEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*354d7675SEmmanuel Vadot%YAML 1.2 3*354d7675SEmmanuel Vadot--- 4*354d7675SEmmanuel Vadot$id: http://devicetree.org/schemas/bus/intel,ixp4xx-expansion-bus-controller.yaml# 5*354d7675SEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 6*354d7675SEmmanuel Vadot 7*354d7675SEmmanuel Vadottitle: Intel IXP4xx Expansion Bus Controller 8*354d7675SEmmanuel Vadot 9*354d7675SEmmanuel Vadotdescription: | 10*354d7675SEmmanuel Vadot The IXP4xx expansion bus controller handles access to devices on the 11*354d7675SEmmanuel Vadot memory-mapped expansion bus on the Intel IXP4xx family of system on chips, 12*354d7675SEmmanuel Vadot including IXP42x, IXP43x, IXP45x and IXP46x. 13*354d7675SEmmanuel Vadot 14*354d7675SEmmanuel Vadotmaintainers: 15*354d7675SEmmanuel Vadot - Linus Walleij <linus.walleij@linaro.org> 16*354d7675SEmmanuel Vadot 17*354d7675SEmmanuel Vadotproperties: 18*354d7675SEmmanuel Vadot $nodename: 19*354d7675SEmmanuel Vadot pattern: '^bus@[0-9a-f]+$' 20*354d7675SEmmanuel Vadot 21*354d7675SEmmanuel Vadot compatible: 22*354d7675SEmmanuel Vadot items: 23*354d7675SEmmanuel Vadot - enum: 24*354d7675SEmmanuel Vadot - intel,ixp42x-expansion-bus-controller 25*354d7675SEmmanuel Vadot - intel,ixp43x-expansion-bus-controller 26*354d7675SEmmanuel Vadot - intel,ixp45x-expansion-bus-controller 27*354d7675SEmmanuel Vadot - intel,ixp46x-expansion-bus-controller 28*354d7675SEmmanuel Vadot - const: syscon 29*354d7675SEmmanuel Vadot 30*354d7675SEmmanuel Vadot reg: 31*354d7675SEmmanuel Vadot description: Control registers for the expansion bus, these are not 32*354d7675SEmmanuel Vadot inside the memory range handled by the expansion bus. 33*354d7675SEmmanuel Vadot maxItems: 1 34*354d7675SEmmanuel Vadot 35*354d7675SEmmanuel Vadot native-endian: 36*354d7675SEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/flag 37*354d7675SEmmanuel Vadot description: The IXP4xx has a peculiar MMIO access scheme, as it changes 38*354d7675SEmmanuel Vadot the access pattern for words (swizzling) on the bus depending on whether 39*354d7675SEmmanuel Vadot the SoC is running in big-endian or little-endian mode. Thus the 40*354d7675SEmmanuel Vadot registers must always be accessed using native endianness. 41*354d7675SEmmanuel Vadot 42*354d7675SEmmanuel Vadot "#address-cells": 43*354d7675SEmmanuel Vadot description: | 44*354d7675SEmmanuel Vadot The first cell is the chip select number. 45*354d7675SEmmanuel Vadot The second cell is the address offset within the bank. 46*354d7675SEmmanuel Vadot const: 2 47*354d7675SEmmanuel Vadot 48*354d7675SEmmanuel Vadot "#size-cells": 49*354d7675SEmmanuel Vadot const: 1 50*354d7675SEmmanuel Vadot 51*354d7675SEmmanuel Vadot ranges: true 52*354d7675SEmmanuel Vadot dma-ranges: true 53*354d7675SEmmanuel Vadot 54*354d7675SEmmanuel VadotpatternProperties: 55*354d7675SEmmanuel Vadot "^.*@[0-7],[0-9a-f]+$": 56*354d7675SEmmanuel Vadot description: Devices attached to chip selects are represented as 57*354d7675SEmmanuel Vadot subnodes. 58*354d7675SEmmanuel Vadot type: object 59*354d7675SEmmanuel Vadot 60*354d7675SEmmanuel Vadot properties: 61*354d7675SEmmanuel Vadot intel,ixp4xx-eb-t1: 62*354d7675SEmmanuel Vadot description: Address timing, extend address phase with n cycles. 63*354d7675SEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/uint32 64*354d7675SEmmanuel Vadot maximum: 3 65*354d7675SEmmanuel Vadot 66*354d7675SEmmanuel Vadot intel,ixp4xx-eb-t2: 67*354d7675SEmmanuel Vadot description: Setup chip select timing, extend setup phase with n cycles. 68*354d7675SEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/uint32 69*354d7675SEmmanuel Vadot maximum: 3 70*354d7675SEmmanuel Vadot 71*354d7675SEmmanuel Vadot intel,ixp4xx-eb-t3: 72*354d7675SEmmanuel Vadot description: Strobe timing, extend strobe phase with n cycles. 73*354d7675SEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/uint32 74*354d7675SEmmanuel Vadot maximum: 15 75*354d7675SEmmanuel Vadot 76*354d7675SEmmanuel Vadot intel,ixp4xx-eb-t4: 77*354d7675SEmmanuel Vadot description: Hold timing, extend hold phase with n cycles. 78*354d7675SEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/uint32 79*354d7675SEmmanuel Vadot maximum: 3 80*354d7675SEmmanuel Vadot 81*354d7675SEmmanuel Vadot intel,ixp4xx-eb-t5: 82*354d7675SEmmanuel Vadot description: Recovery timing, extend recovery phase with n cycles. 83*354d7675SEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/uint32 84*354d7675SEmmanuel Vadot maximum: 15 85*354d7675SEmmanuel Vadot 86*354d7675SEmmanuel Vadot intel,ixp4xx-eb-cycle-type: 87*354d7675SEmmanuel Vadot description: The type of cycles to use on the expansion bus for this 88*354d7675SEmmanuel Vadot chip select. 0 = Intel cycles, 1 = Motorola cycles, 2 = HPI cycles. 89*354d7675SEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/uint32 90*354d7675SEmmanuel Vadot enum: [0, 1, 2] 91*354d7675SEmmanuel Vadot 92*354d7675SEmmanuel Vadot intel,ixp4xx-eb-byte-access-on-halfword: 93*354d7675SEmmanuel Vadot description: Allow byte read access on half word devices. 94*354d7675SEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/uint32 95*354d7675SEmmanuel Vadot enum: [0, 1] 96*354d7675SEmmanuel Vadot 97*354d7675SEmmanuel Vadot intel,ixp4xx-eb-hpi-hrdy-pol-high: 98*354d7675SEmmanuel Vadot description: Set HPI HRDY polarity to active high when using HPI. 99*354d7675SEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/uint32 100*354d7675SEmmanuel Vadot enum: [0, 1] 101*354d7675SEmmanuel Vadot 102*354d7675SEmmanuel Vadot intel,ixp4xx-eb-mux-address-and-data: 103*354d7675SEmmanuel Vadot description: Multiplex address and data on the data bus. 104*354d7675SEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/uint32 105*354d7675SEmmanuel Vadot enum: [0, 1] 106*354d7675SEmmanuel Vadot 107*354d7675SEmmanuel Vadot intel,ixp4xx-eb-ahb-split-transfers: 108*354d7675SEmmanuel Vadot description: Enable AHB split transfers. 109*354d7675SEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/uint32 110*354d7675SEmmanuel Vadot enum: [0, 1] 111*354d7675SEmmanuel Vadot 112*354d7675SEmmanuel Vadot intel,ixp4xx-eb-write-enable: 113*354d7675SEmmanuel Vadot description: Enable write cycles. 114*354d7675SEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/uint32 115*354d7675SEmmanuel Vadot enum: [0, 1] 116*354d7675SEmmanuel Vadot 117*354d7675SEmmanuel Vadot intel,ixp4xx-eb-byte-access: 118*354d7675SEmmanuel Vadot description: Expansion bus uses only 8 bits. The default is to use 119*354d7675SEmmanuel Vadot 16 bits. 120*354d7675SEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/uint32 121*354d7675SEmmanuel Vadot enum: [0, 1] 122*354d7675SEmmanuel Vadot 123*354d7675SEmmanuel Vadotrequired: 124*354d7675SEmmanuel Vadot - compatible 125*354d7675SEmmanuel Vadot - reg 126*354d7675SEmmanuel Vadot - native-endian 127*354d7675SEmmanuel Vadot - "#address-cells" 128*354d7675SEmmanuel Vadot - "#size-cells" 129*354d7675SEmmanuel Vadot - ranges 130*354d7675SEmmanuel Vadot - dma-ranges 131*354d7675SEmmanuel Vadot 132*354d7675SEmmanuel VadotadditionalProperties: false 133*354d7675SEmmanuel Vadot 134*354d7675SEmmanuel Vadotexamples: 135*354d7675SEmmanuel Vadot - | 136*354d7675SEmmanuel Vadot #include <dt-bindings/interrupt-controller/irq.h> 137*354d7675SEmmanuel Vadot bus@50000000 { 138*354d7675SEmmanuel Vadot compatible = "intel,ixp42x-expansion-bus-controller", "syscon"; 139*354d7675SEmmanuel Vadot reg = <0xc4000000 0x28>; 140*354d7675SEmmanuel Vadot native-endian; 141*354d7675SEmmanuel Vadot #address-cells = <2>; 142*354d7675SEmmanuel Vadot #size-cells = <1>; 143*354d7675SEmmanuel Vadot ranges = <0 0x0 0x50000000 0x01000000>, 144*354d7675SEmmanuel Vadot <1 0x0 0x51000000 0x01000000>; 145*354d7675SEmmanuel Vadot dma-ranges = <0 0x0 0x50000000 0x01000000>, 146*354d7675SEmmanuel Vadot <1 0x0 0x51000000 0x01000000>; 147*354d7675SEmmanuel Vadot flash@0,0 { 148*354d7675SEmmanuel Vadot compatible = "intel,ixp4xx-flash", "cfi-flash"; 149*354d7675SEmmanuel Vadot bank-width = <2>; 150*354d7675SEmmanuel Vadot reg = <0 0x00000000 0x1000000>; 151*354d7675SEmmanuel Vadot intel,ixp4xx-eb-t3 = <3>; 152*354d7675SEmmanuel Vadot intel,ixp4xx-eb-cycle-type = <0>; 153*354d7675SEmmanuel Vadot intel,ixp4xx-eb-byte-access-on-halfword = <1>; 154*354d7675SEmmanuel Vadot intel,ixp4xx-eb-write-enable = <1>; 155*354d7675SEmmanuel Vadot intel,ixp4xx-eb-byte-access = <0>; 156*354d7675SEmmanuel Vadot }; 157*354d7675SEmmanuel Vadot serial@1,0 { 158*354d7675SEmmanuel Vadot compatible = "exar,xr16l2551", "ns8250"; 159*354d7675SEmmanuel Vadot reg = <1 0x00000000 0x10>; 160*354d7675SEmmanuel Vadot interrupt-parent = <&gpio0>; 161*354d7675SEmmanuel Vadot interrupts = <4 IRQ_TYPE_LEVEL_LOW>; 162*354d7675SEmmanuel Vadot clock-frequency = <1843200>; 163*354d7675SEmmanuel Vadot intel,ixp4xx-eb-t3 = <3>; 164*354d7675SEmmanuel Vadot intel,ixp4xx-eb-cycle-type = <1>; 165*354d7675SEmmanuel Vadot intel,ixp4xx-eb-write-enable = <1>; 166*354d7675SEmmanuel Vadot intel,ixp4xx-eb-byte-access = <1>; 167*354d7675SEmmanuel Vadot }; 168*354d7675SEmmanuel Vadot }; 169