1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/marvell,armada-3700-uart-clock.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6title: Marvell Armada 3720 UART clocks
7
8maintainers:
9  - Pali Rohár <pali@kernel.org>
10
11properties:
12  compatible:
13    const: marvell,armada-3700-uart-clock
14
15  reg:
16    items:
17      - description: UART Clock Control Register
18      - description: UART 2 Baud Rate Divisor Register
19
20  clocks:
21    description: |
22      List of parent clocks suitable for UART from following set:
23        "TBG-A-P", "TBG-B-P", "TBG-A-S", "TBG-B-S", "xtal"
24      UART clock can use one from this set and when more are provided
25      then kernel would choose and configure the most suitable one.
26      It is suggest to specify at least one TBG clock to achieve
27      baudrates above 230400 and also to specify clock which bootloader
28      used for UART (most probably xtal) for smooth boot log on UART.
29
30  clock-names:
31    items:
32      - const: TBG-A-P
33      - const: TBG-B-P
34      - const: TBG-A-S
35      - const: TBG-B-S
36      - const: xtal
37    minItems: 1
38
39  '#clock-cells':
40    const: 1
41
42required:
43  - compatible
44  - reg
45  - clocks
46  - clock-names
47  - '#clock-cells'
48
49additionalProperties: false
50
51examples:
52  - |
53    uartclk: clock-controller@12010 {
54      compatible = "marvell,armada-3700-uart-clock";
55      reg = <0x12010 0x4>, <0x12210 0x4>;
56      clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>, <&tbg 3>, <&xtalclk>;
57      clock-names = "TBG-A-P", "TBG-B-P", "TBG-A-S", "TBG-B-S", "xtal";
58      #clock-cells = <1>;
59    };
60