1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2
3%YAML 1.2
4---
5$id: "http://devicetree.org/schemas/media/qcom,msm8996-camss.yaml#"
6$schema: "http://devicetree.org/meta-schemas/core.yaml#"
7
8title: Qualcomm CAMSS ISP
9
10maintainers:
11  - Robert Foss <robert.foss@linaro.org>
12  - Todor Tomov <todor.too@gmail.com>
13
14description: |
15  The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms
16
17properties:
18  compatible:
19    const: qcom,msm8996-camss
20
21  clocks:
22    minItems: 36
23    maxItems: 36
24
25  clock-names:
26    items:
27      - const: top_ahb
28      - const: ispif_ahb
29      - const: csiphy0_timer
30      - const: csiphy1_timer
31      - const: csiphy2_timer
32      - const: csi0_ahb
33      - const: csi0
34      - const: csi0_phy
35      - const: csi0_pix
36      - const: csi0_rdi
37      - const: csi1_ahb
38      - const: csi1
39      - const: csi1_phy
40      - const: csi1_pix
41      - const: csi1_rdi
42      - const: csi2_ahb
43      - const: csi2
44      - const: csi2_phy
45      - const: csi2_pix
46      - const: csi2_rdi
47      - const: csi3_ahb
48      - const: csi3
49      - const: csi3_phy
50      - const: csi3_pix
51      - const: csi3_rdi
52      - const: ahb
53      - const: vfe0
54      - const: csi_vfe0
55      - const: vfe0_ahb
56      - const: vfe0_stream
57      - const: vfe1
58      - const: csi_vfe1
59      - const: vfe1_ahb
60      - const: vfe1_stream
61      - const: vfe_ahb
62      - const: vfe_axi
63
64  interrupts:
65    minItems: 10
66    maxItems: 10
67
68  interrupt-names:
69    items:
70      - const: csiphy0
71      - const: csiphy1
72      - const: csiphy2
73      - const: csid0
74      - const: csid1
75      - const: csid2
76      - const: csid3
77      - const: ispif
78      - const: vfe0
79      - const: vfe1
80
81  iommus:
82    maxItems: 4
83
84  power-domains:
85    items:
86      - description: VFE0 GDSC - Video Front End, Global Distributed Switch Controller.
87      - description: VFE1 GDSC - Video Front End, Global Distributed Switch Controller.
88
89  ports:
90    $ref: /schemas/graph.yaml#/properties/ports
91
92    description:
93      CSI input ports.
94
95    properties:
96      port@0:
97        $ref: /schemas/graph.yaml#/$defs/port-base
98        unevaluatedProperties: false
99        description:
100          Input port for receiving CSI data.
101
102        properties:
103          endpoint:
104            $ref: video-interfaces.yaml#
105            unevaluatedProperties: false
106
107            properties:
108              clock-lanes:
109                items:
110                  - const: 7
111
112              data-lanes:
113                description:
114                  An array of physical data lanes indexes.
115                  Position of an entry determines the logical
116                  lane number, while the value of an entry
117                  indicates physical lane index. Lane swapping
118                  is supported. Physical lane indexes are;
119                  0, 1, 2, 3
120                minItems: 1
121                maxItems: 4
122
123            required:
124              - clock-lanes
125              - data-lanes
126
127      port@1:
128        $ref: /schemas/graph.yaml#/$defs/port-base
129        unevaluatedProperties: false
130        description:
131          Input port for receiving CSI data.
132
133        properties:
134          endpoint:
135            $ref: video-interfaces.yaml#
136            unevaluatedProperties: false
137
138            properties:
139              clock-lanes:
140                items:
141                  - const: 7
142
143              data-lanes:
144                minItems: 1
145                maxItems: 4
146
147            required:
148              - clock-lanes
149              - data-lanes
150
151      port@2:
152        $ref: /schemas/graph.yaml#/$defs/port-base
153        unevaluatedProperties: false
154        description:
155          Input port for receiving CSI data.
156
157        properties:
158          endpoint:
159            $ref: video-interfaces.yaml#
160            unevaluatedProperties: false
161
162            properties:
163              clock-lanes:
164                items:
165                  - const: 7
166
167              data-lanes:
168                minItems: 1
169                maxItems: 4
170
171            required:
172              - clock-lanes
173              - data-lanes
174
175      port@3:
176        $ref: /schemas/graph.yaml#/$defs/port-base
177        unevaluatedProperties: false
178        description:
179          Input port for receiving CSI data.
180
181        properties:
182          endpoint:
183            $ref: video-interfaces.yaml#
184            unevaluatedProperties: false
185
186            properties:
187              clock-lanes:
188                items:
189                  - const: 7
190
191              data-lanes:
192                minItems: 1
193                maxItems: 4
194
195            required:
196              - clock-lanes
197              - data-lanes
198
199  reg:
200    minItems: 14
201    maxItems: 14
202
203  reg-names:
204    items:
205      - const: csiphy0
206      - const: csiphy0_clk_mux
207      - const: csiphy1
208      - const: csiphy1_clk_mux
209      - const: csiphy2
210      - const: csiphy2_clk_mux
211      - const: csid0
212      - const: csid1
213      - const: csid2
214      - const: csid3
215      - const: ispif
216      - const: csi_clk_mux
217      - const: vfe0
218      - const: vfe1
219
220  vdda-supply:
221    description:
222      Definition of the regulator used as analog power supply.
223
224required:
225  - clock-names
226  - clocks
227  - compatible
228  - interrupt-names
229  - interrupts
230  - iommus
231  - power-domains
232  - reg
233  - reg-names
234  - vdda-supply
235
236additionalProperties: false
237
238examples:
239  - |
240    #include <dt-bindings/interrupt-controller/arm-gic.h>
241    #include <dt-bindings/clock/qcom,gcc-msm8996.h>
242    #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
243
244    camss: camss@a00000 {
245      compatible = "qcom,msm8996-camss";
246
247      clocks = <&mmcc CAMSS_TOP_AHB_CLK>,
248        <&mmcc CAMSS_ISPIF_AHB_CLK>,
249        <&mmcc CAMSS_CSI0PHYTIMER_CLK>,
250        <&mmcc CAMSS_CSI1PHYTIMER_CLK>,
251        <&mmcc CAMSS_CSI2PHYTIMER_CLK>,
252        <&mmcc CAMSS_CSI0_AHB_CLK>,
253        <&mmcc CAMSS_CSI0_CLK>,
254        <&mmcc CAMSS_CSI0PHY_CLK>,
255        <&mmcc CAMSS_CSI0PIX_CLK>,
256        <&mmcc CAMSS_CSI0RDI_CLK>,
257        <&mmcc CAMSS_CSI1_AHB_CLK>,
258        <&mmcc CAMSS_CSI1_CLK>,
259        <&mmcc CAMSS_CSI1PHY_CLK>,
260        <&mmcc CAMSS_CSI1PIX_CLK>,
261        <&mmcc CAMSS_CSI1RDI_CLK>,
262        <&mmcc CAMSS_CSI2_AHB_CLK>,
263        <&mmcc CAMSS_CSI2_CLK>,
264        <&mmcc CAMSS_CSI2PHY_CLK>,
265        <&mmcc CAMSS_CSI2PIX_CLK>,
266        <&mmcc CAMSS_CSI2RDI_CLK>,
267        <&mmcc CAMSS_CSI3_AHB_CLK>,
268        <&mmcc CAMSS_CSI3_CLK>,
269        <&mmcc CAMSS_CSI3PHY_CLK>,
270        <&mmcc CAMSS_CSI3PIX_CLK>,
271        <&mmcc CAMSS_CSI3RDI_CLK>,
272        <&mmcc CAMSS_AHB_CLK>,
273        <&mmcc CAMSS_VFE0_CLK>,
274        <&mmcc CAMSS_CSI_VFE0_CLK>,
275        <&mmcc CAMSS_VFE0_AHB_CLK>,
276        <&mmcc CAMSS_VFE0_STREAM_CLK>,
277        <&mmcc CAMSS_VFE1_CLK>,
278        <&mmcc CAMSS_CSI_VFE1_CLK>,
279        <&mmcc CAMSS_VFE1_AHB_CLK>,
280        <&mmcc CAMSS_VFE1_STREAM_CLK>,
281        <&mmcc CAMSS_VFE_AHB_CLK>,
282        <&mmcc CAMSS_VFE_AXI_CLK>;
283
284      clock-names = "top_ahb",
285        "ispif_ahb",
286        "csiphy0_timer",
287        "csiphy1_timer",
288        "csiphy2_timer",
289        "csi0_ahb",
290        "csi0",
291        "csi0_phy",
292        "csi0_pix",
293        "csi0_rdi",
294        "csi1_ahb",
295        "csi1",
296        "csi1_phy",
297        "csi1_pix",
298        "csi1_rdi",
299        "csi2_ahb",
300        "csi2",
301        "csi2_phy",
302        "csi2_pix",
303        "csi2_rdi",
304        "csi3_ahb",
305        "csi3",
306        "csi3_phy",
307        "csi3_pix",
308        "csi3_rdi",
309        "ahb",
310        "vfe0",
311        "csi_vfe0",
312        "vfe0_ahb",
313        "vfe0_stream",
314        "vfe1",
315        "csi_vfe1",
316        "vfe1_ahb",
317        "vfe1_stream",
318        "vfe_ahb",
319        "vfe_axi";
320
321      interrupts = <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>,
322        <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>,
323        <GIC_SPI 80 IRQ_TYPE_EDGE_RISING>,
324        <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>,
325        <GIC_SPI 297 IRQ_TYPE_EDGE_RISING>,
326        <GIC_SPI 298 IRQ_TYPE_EDGE_RISING>,
327        <GIC_SPI 299 IRQ_TYPE_EDGE_RISING>,
328        <GIC_SPI 309 IRQ_TYPE_EDGE_RISING>,
329        <GIC_SPI 314 IRQ_TYPE_EDGE_RISING>,
330        <GIC_SPI 315 IRQ_TYPE_EDGE_RISING>;
331
332      interrupt-names = "csiphy0",
333        "csiphy1",
334        "csiphy2",
335        "csid0",
336        "csid1",
337        "csid2",
338        "csid3",
339        "ispif",
340        "vfe0",
341        "vfe1";
342
343      iommus = <&vfe_smmu 0>,
344         <&vfe_smmu 1>,
345         <&vfe_smmu 2>,
346         <&vfe_smmu 3>;
347
348      power-domains = <&mmcc VFE0_GDSC>,
349        <&mmcc VFE1_GDSC>;
350
351      reg = <0x00a34000 0x1000>,
352        <0x00a00030 0x4>,
353        <0x00a35000 0x1000>,
354        <0x00a00038 0x4>,
355        <0x00a36000 0x1000>,
356        <0x00a00040 0x4>,
357        <0x00a30000 0x100>,
358        <0x00a30400 0x100>,
359        <0x00a30800 0x100>,
360        <0x00a30c00 0x100>,
361        <0x00a31000 0x500>,
362        <0x00a00020 0x10>,
363        <0x00a10000 0x1000>,
364        <0x00a14000 0x1000>;
365
366      reg-names = "csiphy0",
367        "csiphy0_clk_mux",
368        "csiphy1",
369        "csiphy1_clk_mux",
370        "csiphy2",
371        "csiphy2_clk_mux",
372        "csid0",
373        "csid1",
374        "csid2",
375        "csid3",
376        "ispif",
377        "csi_clk_mux",
378        "vfe0",
379        "vfe1";
380
381      vdda-supply = <&reg_2v8>;
382
383      ports {
384        #address-cells = <1>;
385        #size-cells = <0>;
386      };
387    };
388