18cc087a1SEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 28cc087a1SEmmanuel Vadot%YAML 1.2 38cc087a1SEmmanuel Vadot--- 48cc087a1SEmmanuel Vadot$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr2.yaml# 58cc087a1SEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 68cc087a1SEmmanuel Vadot 78cc087a1SEmmanuel Vadottitle: LPDDR2 SDRAM compliant to JEDEC JESD209-2 88cc087a1SEmmanuel Vadot 98cc087a1SEmmanuel Vadotmaintainers: 10c9ccf3a3SEmmanuel Vadot - Krzysztof Kozlowski <krzk@kernel.org> 118cc087a1SEmmanuel Vadot 12*8bab661aSEmmanuel VadotallOf: 13*8bab661aSEmmanuel Vadot - $ref: jedec,lpddr-props.yaml# 14*8bab661aSEmmanuel Vadot 158cc087a1SEmmanuel Vadotproperties: 168cc087a1SEmmanuel Vadot compatible: 178cc087a1SEmmanuel Vadot oneOf: 188cc087a1SEmmanuel Vadot - items: 198cc087a1SEmmanuel Vadot - enum: 208cc087a1SEmmanuel Vadot - elpida,ECB240ABACN 218cc087a1SEmmanuel Vadot - elpida,B8132B2PB-6D-F 228cc087a1SEmmanuel Vadot - enum: 23*8bab661aSEmmanuel Vadot - jedec,lpddr2-nvm 24*8bab661aSEmmanuel Vadot - jedec,lpddr2-s2 258cc087a1SEmmanuel Vadot - jedec,lpddr2-s4 268cc087a1SEmmanuel Vadot - items: 27*8bab661aSEmmanuel Vadot - pattern: "^lpddr2-[0-9a-f]{2},[0-9a-f]{4}$" 288cc087a1SEmmanuel Vadot - enum: 298cc087a1SEmmanuel Vadot - jedec,lpddr2-nvm 30*8bab661aSEmmanuel Vadot - jedec,lpddr2-s2 31*8bab661aSEmmanuel Vadot - jedec,lpddr2-s4 328cc087a1SEmmanuel Vadot 338cc087a1SEmmanuel Vadot revision-id1: 348cc087a1SEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/uint32 358cc087a1SEmmanuel Vadot maximum: 255 368cc087a1SEmmanuel Vadot description: | 378cc087a1SEmmanuel Vadot Revision 1 value of SDRAM chip. Obtained from device datasheet. 38c9ccf3a3SEmmanuel Vadot Property is deprecated, use revision-id instead. 39c9ccf3a3SEmmanuel Vadot deprecated: true 408cc087a1SEmmanuel Vadot 418cc087a1SEmmanuel Vadot revision-id2: 428cc087a1SEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/uint32 438cc087a1SEmmanuel Vadot maximum: 255 448cc087a1SEmmanuel Vadot description: | 458cc087a1SEmmanuel Vadot Revision 2 value of SDRAM chip. Obtained from device datasheet. 46c9ccf3a3SEmmanuel Vadot Property is deprecated, use revision-id instead. 47c9ccf3a3SEmmanuel Vadot deprecated: true 48c9ccf3a3SEmmanuel Vadot 498cc087a1SEmmanuel Vadot tRRD-min-tck: 508cc087a1SEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/uint32 518cc087a1SEmmanuel Vadot maximum: 16 528cc087a1SEmmanuel Vadot description: | 538cc087a1SEmmanuel Vadot Active bank a to active bank b in terms of number of clock cycles. 548cc087a1SEmmanuel Vadot Obtained from device datasheet. 558cc087a1SEmmanuel Vadot 568cc087a1SEmmanuel Vadot tWTR-min-tck: 578cc087a1SEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/uint32 588cc087a1SEmmanuel Vadot maximum: 16 598cc087a1SEmmanuel Vadot description: | 608cc087a1SEmmanuel Vadot Internal WRITE-to-READ command delay in terms of number of clock cycles. 618cc087a1SEmmanuel Vadot Obtained from device datasheet. 628cc087a1SEmmanuel Vadot 638cc087a1SEmmanuel Vadot tXP-min-tck: 648cc087a1SEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/uint32 658cc087a1SEmmanuel Vadot maximum: 16 668cc087a1SEmmanuel Vadot description: | 678cc087a1SEmmanuel Vadot Exit power-down to next valid command delay in terms of number of clock 688cc087a1SEmmanuel Vadot cycles. Obtained from device datasheet. 698cc087a1SEmmanuel Vadot 708cc087a1SEmmanuel Vadot tRTP-min-tck: 718cc087a1SEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/uint32 728cc087a1SEmmanuel Vadot maximum: 16 738cc087a1SEmmanuel Vadot description: | 748cc087a1SEmmanuel Vadot Internal READ to PRECHARGE command delay in terms of number of clock 758cc087a1SEmmanuel Vadot cycles. Obtained from device datasheet. 768cc087a1SEmmanuel Vadot 778cc087a1SEmmanuel Vadot tCKE-min-tck: 788cc087a1SEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/uint32 798cc087a1SEmmanuel Vadot maximum: 16 808cc087a1SEmmanuel Vadot description: | 818cc087a1SEmmanuel Vadot CKE minimum pulse width (HIGH and LOW pulse width) in terms of number 828cc087a1SEmmanuel Vadot of clock cycles. Obtained from device datasheet. 838cc087a1SEmmanuel Vadot 848cc087a1SEmmanuel Vadot tRPab-min-tck: 858cc087a1SEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/uint32 868cc087a1SEmmanuel Vadot maximum: 16 878cc087a1SEmmanuel Vadot description: | 888cc087a1SEmmanuel Vadot Row precharge time (all banks) in terms of number of clock cycles. 898cc087a1SEmmanuel Vadot Obtained from device datasheet. 908cc087a1SEmmanuel Vadot 918cc087a1SEmmanuel Vadot tRCD-min-tck: 928cc087a1SEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/uint32 938cc087a1SEmmanuel Vadot maximum: 16 948cc087a1SEmmanuel Vadot description: | 958cc087a1SEmmanuel Vadot RAS-to-CAS delay in terms of number of clock cycles. Obtained from 968cc087a1SEmmanuel Vadot device datasheet. 978cc087a1SEmmanuel Vadot 988cc087a1SEmmanuel Vadot tWR-min-tck: 998cc087a1SEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/uint32 1008cc087a1SEmmanuel Vadot maximum: 16 1018cc087a1SEmmanuel Vadot description: | 1028cc087a1SEmmanuel Vadot WRITE recovery time in terms of number of clock cycles. Obtained from 1038cc087a1SEmmanuel Vadot device datasheet. 1048cc087a1SEmmanuel Vadot 1058cc087a1SEmmanuel Vadot tRASmin-min-tck: 1068cc087a1SEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/uint32 1078cc087a1SEmmanuel Vadot maximum: 16 1088cc087a1SEmmanuel Vadot description: | 1098cc087a1SEmmanuel Vadot Row active time in terms of number of clock cycles. Obtained from device 1108cc087a1SEmmanuel Vadot datasheet. 1118cc087a1SEmmanuel Vadot 1128cc087a1SEmmanuel Vadot tCKESR-min-tck: 1138cc087a1SEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/uint32 1148cc087a1SEmmanuel Vadot maximum: 16 1158cc087a1SEmmanuel Vadot description: | 1168cc087a1SEmmanuel Vadot CKE minimum pulse width during SELF REFRESH (low pulse width during 1178cc087a1SEmmanuel Vadot SELF REFRESH) in terms of number of clock cycles. Obtained from device 1188cc087a1SEmmanuel Vadot datasheet. 1198cc087a1SEmmanuel Vadot 1208cc087a1SEmmanuel Vadot tFAW-min-tck: 1218cc087a1SEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/uint32 1228cc087a1SEmmanuel Vadot maximum: 16 1238cc087a1SEmmanuel Vadot description: | 1248cc087a1SEmmanuel Vadot Four-bank activate window in terms of number of clock cycles. Obtained 1258cc087a1SEmmanuel Vadot from device datasheet. 1268cc087a1SEmmanuel Vadot 1278cc087a1SEmmanuel VadotpatternProperties: 1288cc087a1SEmmanuel Vadot "^lpddr2-timings": 129c9ccf3a3SEmmanuel Vadot $ref: jedec,lpddr2-timings.yaml 1308cc087a1SEmmanuel Vadot description: | 1318cc087a1SEmmanuel Vadot The lpddr2 node may have one or more child nodes of type "lpddr2-timings". 1328cc087a1SEmmanuel Vadot "lpddr2-timings" provides AC timing parameters of the device for 1338cc087a1SEmmanuel Vadot a given speed-bin. The user may provide the timings for as many 134c9ccf3a3SEmmanuel Vadot speed-bins as is required. 1358cc087a1SEmmanuel Vadot 1368cc087a1SEmmanuel Vadotrequired: 1378cc087a1SEmmanuel Vadot - compatible 1388cc087a1SEmmanuel Vadot - density 1398cc087a1SEmmanuel Vadot - io-width 1408cc087a1SEmmanuel Vadot 141*8bab661aSEmmanuel VadotunevaluatedProperties: false 1428cc087a1SEmmanuel Vadot 1438cc087a1SEmmanuel Vadotexamples: 1448cc087a1SEmmanuel Vadot - | 1458cc087a1SEmmanuel Vadot elpida_ECB240ABACN: lpddr2 { 1468cc087a1SEmmanuel Vadot compatible = "elpida,ECB240ABACN", "jedec,lpddr2-s4"; 1478cc087a1SEmmanuel Vadot density = <2048>; 1488cc087a1SEmmanuel Vadot io-width = <32>; 149c9ccf3a3SEmmanuel Vadot revision-id = <1 0>; 1508cc087a1SEmmanuel Vadot 1518cc087a1SEmmanuel Vadot tRPab-min-tck = <3>; 1528cc087a1SEmmanuel Vadot tRCD-min-tck = <3>; 1538cc087a1SEmmanuel Vadot tWR-min-tck = <3>; 1548cc087a1SEmmanuel Vadot tRASmin-min-tck = <3>; 1558cc087a1SEmmanuel Vadot tRRD-min-tck = <2>; 1568cc087a1SEmmanuel Vadot tWTR-min-tck = <2>; 1578cc087a1SEmmanuel Vadot tXP-min-tck = <2>; 1588cc087a1SEmmanuel Vadot tRTP-min-tck = <2>; 1598cc087a1SEmmanuel Vadot tCKE-min-tck = <3>; 1608cc087a1SEmmanuel Vadot tCKESR-min-tck = <3>; 1618cc087a1SEmmanuel Vadot tFAW-min-tck = <8>; 1628cc087a1SEmmanuel Vadot 1638cc087a1SEmmanuel Vadot timings_elpida_ECB240ABACN_400mhz: lpddr2-timings0 { 1648cc087a1SEmmanuel Vadot compatible = "jedec,lpddr2-timings"; 1658cc087a1SEmmanuel Vadot min-freq = <10000000>; 1668cc087a1SEmmanuel Vadot max-freq = <400000000>; 1678cc087a1SEmmanuel Vadot tRPab = <21000>; 1688cc087a1SEmmanuel Vadot tRCD = <18000>; 1698cc087a1SEmmanuel Vadot tWR = <15000>; 1708cc087a1SEmmanuel Vadot tRAS-min = <42000>; 1718cc087a1SEmmanuel Vadot tRRD = <10000>; 1728cc087a1SEmmanuel Vadot tWTR = <7500>; 1738cc087a1SEmmanuel Vadot tXP = <7500>; 1748cc087a1SEmmanuel Vadot tRTP = <7500>; 1758cc087a1SEmmanuel Vadot tCKESR = <15000>; 1768cc087a1SEmmanuel Vadot tDQSCK-max = <5500>; 1778cc087a1SEmmanuel Vadot tFAW = <50000>; 1788cc087a1SEmmanuel Vadot tZQCS = <90000>; 1798cc087a1SEmmanuel Vadot tZQCL = <360000>; 1808cc087a1SEmmanuel Vadot tZQinit = <1000000>; 1818cc087a1SEmmanuel Vadot tRAS-max-ns = <70000>; 1828cc087a1SEmmanuel Vadot }; 1838cc087a1SEmmanuel Vadot 1848cc087a1SEmmanuel Vadot timings_elpida_ECB240ABACN_200mhz: lpddr2-timings1 { 1858cc087a1SEmmanuel Vadot compatible = "jedec,lpddr2-timings"; 1868cc087a1SEmmanuel Vadot min-freq = <10000000>; 1878cc087a1SEmmanuel Vadot max-freq = <200000000>; 1888cc087a1SEmmanuel Vadot tRPab = <21000>; 1898cc087a1SEmmanuel Vadot tRCD = <18000>; 1908cc087a1SEmmanuel Vadot tWR = <15000>; 1918cc087a1SEmmanuel Vadot tRAS-min = <42000>; 1928cc087a1SEmmanuel Vadot tRRD = <10000>; 1938cc087a1SEmmanuel Vadot tWTR = <10000>; 1948cc087a1SEmmanuel Vadot tXP = <7500>; 1958cc087a1SEmmanuel Vadot tRTP = <7500>; 1968cc087a1SEmmanuel Vadot tCKESR = <15000>; 1978cc087a1SEmmanuel Vadot tDQSCK-max = <5500>; 1988cc087a1SEmmanuel Vadot tFAW = <50000>; 1998cc087a1SEmmanuel Vadot tZQCS = <90000>; 2008cc087a1SEmmanuel Vadot tZQCL = <360000>; 2018cc087a1SEmmanuel Vadot tZQinit = <1000000>; 2028cc087a1SEmmanuel Vadot tRAS-max-ns = <70000>; 2038cc087a1SEmmanuel Vadot }; 2048cc087a1SEmmanuel Vadot }; 205