1# SPDX-License-Identifier: GPL-2.0+
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mfd/allwinner,sun8i-a23-prcm.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Allwinner A23 PRCM
8
9maintainers:
10  - Chen-Yu Tsai <wens@csie.org>
11  - Maxime Ripard <mripard@kernel.org>
12
13deprecated: true
14
15properties:
16  compatible:
17    const: allwinner,sun8i-a23-prcm
18
19  reg:
20    maxItems: 1
21
22patternProperties:
23  "^.*(clk|rst|codec).*$":
24    type: object
25    unevaluatedProperties: false
26
27    properties:
28      compatible:
29        enum:
30          - fixed-factor-clock
31          - allwinner,sun8i-a23-apb0-clk
32          - allwinner,sun8i-a23-apb0-gates-clk
33          - allwinner,sun6i-a31-clock-reset
34          - allwinner,sun8i-a23-codec-analog
35
36    required:
37      - compatible
38
39    allOf:
40      - if:
41          properties:
42            compatible:
43              contains:
44                const: fixed-factor-clock
45
46        then:
47          $ref: /schemas/clock/fixed-factor-clock.yaml#
48
49      - if:
50          properties:
51            compatible:
52              contains:
53                const: allwinner,sun8i-a23-apb0-clk
54
55        then:
56          properties:
57            "#clock-cells":
58              const: 0
59
60            # Already checked in the main schema
61            compatible: true
62
63            clocks:
64              maxItems: 1
65
66            clock-output-names:
67              maxItems: 1
68
69            phandle: true
70
71          required:
72            - "#clock-cells"
73            - compatible
74            - clocks
75            - clock-output-names
76
77          additionalProperties: false
78
79      - if:
80          properties:
81            compatible:
82              contains:
83                const: allwinner,sun8i-a23-apb0-gates-clk
84
85        then:
86          properties:
87            "#clock-cells":
88              const: 1
89              description: >
90                This additional argument passed to that clock is the
91                offset of the bit controlling this particular gate in
92                the register.
93
94            # Already checked in the main schema
95            compatible: true
96
97            clocks:
98              maxItems: 1
99
100            clock-output-names:
101              minItems: 1
102              maxItems: 32
103
104            phandle: true
105
106          required:
107            - "#clock-cells"
108            - compatible
109            - clocks
110            - clock-output-names
111
112          additionalProperties: false
113
114      - if:
115          properties:
116            compatible:
117              contains:
118                const: allwinner,sun6i-a31-clock-reset
119
120        then:
121          properties:
122            "#reset-cells":
123              const: 1
124
125            # Already checked in the main schema
126            compatible: true
127
128            phandle: true
129
130          required:
131            - "#reset-cells"
132            - compatible
133
134          additionalProperties: false
135
136      - if:
137          properties:
138            compatible:
139              contains:
140                const: allwinner,sun8i-a23-codec-analog
141
142        then:
143          properties:
144            # Already checked in the main schema
145            compatible: true
146
147            phandle: true
148
149          required:
150            - compatible
151
152          additionalProperties: false
153
154required:
155  - compatible
156  - reg
157
158additionalProperties: false
159
160examples:
161  - |
162    prcm@1f01400 {
163        compatible = "allwinner,sun8i-a23-prcm";
164        reg = <0x01f01400 0x200>;
165
166        ar100: ar100_clk {
167            compatible = "fixed-factor-clock";
168            #clock-cells = <0>;
169            clock-div = <1>;
170            clock-mult = <1>;
171            clocks = <&osc24M>;
172            clock-output-names = "ar100";
173        };
174
175        ahb0: ahb0_clk {
176            compatible = "fixed-factor-clock";
177            #clock-cells = <0>;
178            clock-div = <1>;
179            clock-mult = <1>;
180            clocks = <&ar100>;
181            clock-output-names = "ahb0";
182        };
183
184        apb0: apb0_clk {
185            compatible = "allwinner,sun8i-a23-apb0-clk";
186            #clock-cells = <0>;
187            clocks = <&ahb0>;
188            clock-output-names = "apb0";
189        };
190
191        apb0_gates: apb0_gates_clk {
192            compatible = "allwinner,sun8i-a23-apb0-gates-clk";
193            #clock-cells = <1>;
194            clocks = <&apb0>;
195            clock-output-names = "apb0_pio", "apb0_timer",
196                                 "apb0_rsb", "apb0_uart",
197                                 "apb0_i2c";
198        };
199
200        apb0_rst: apb0_rst {
201            compatible = "allwinner,sun6i-a31-clock-reset";
202            #reset-cells = <1>;
203        };
204
205        codec_analog: codec-analog {
206            compatible = "allwinner,sun8i-a23-codec-analog";
207        };
208    };
209
210...
211