1Qualcomm PMIC GPIO block
2
3This binding describes the GPIO block(s) found in the 8xxx series of
4PMIC's from Qualcomm.
5
6- compatible:
7	Usage: required
8	Value type: <string>
9	Definition: must be one of:
10		    "qcom,pm8005-gpio"
11		    "qcom,pm8018-gpio"
12		    "qcom,pm8038-gpio"
13		    "qcom,pm8058-gpio"
14		    "qcom,pm8916-gpio"
15		    "qcom,pm8917-gpio"
16		    "qcom,pm8921-gpio"
17		    "qcom,pm8941-gpio"
18		    "qcom,pm8950-gpio"
19		    "qcom,pm8994-gpio"
20		    "qcom,pm8998-gpio"
21		    "qcom,pma8084-gpio"
22		    "qcom,pmi8950-gpio"
23		    "qcom,pmi8994-gpio"
24		    "qcom,pmi8998-gpio"
25		    "qcom,pms405-gpio"
26		    "qcom,pm660-gpio"
27		    "qcom,pm660l-gpio"
28		    "qcom,pm8150-gpio"
29		    "qcom,pm8150b-gpio"
30		    "qcom,pm8350-gpio"
31		    "qcom,pm8350b-gpio"
32		    "qcom,pm8350c-gpio"
33		    "qcom,pmk8350-gpio"
34		    "qcom,pm7325-gpio"
35		    "qcom,pmr735a-gpio"
36		    "qcom,pmr735b-gpio"
37		    "qcom,pm6150-gpio"
38		    "qcom,pm6150l-gpio"
39		    "qcom,pm8008-gpio"
40		    "qcom,pmx55-gpio"
41
42		    And must contain either "qcom,spmi-gpio" or "qcom,ssbi-gpio"
43		    if the device is on an spmi bus or an ssbi bus respectively
44
45- reg:
46	Usage: required
47	Value type: <prop-encoded-array>
48	Definition: Register base of the GPIO block and length.
49
50- interrupts:
51	Usage: required
52	Value type: <prop-encoded-array>
53	Definition: Must contain an array of encoded interrupt specifiers for
54		    each available GPIO
55
56- gpio-controller:
57	Usage: required
58	Value type: <none>
59	Definition: Mark the device node as a GPIO controller
60
61- #gpio-cells:
62	Usage: required
63	Value type: <u32>
64	Definition: Must be 2;
65		    the first cell will be used to define gpio number and the
66		    second denotes the flags for this gpio
67
68Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
69a general description of GPIO and interrupt bindings.
70
71Please refer to pinctrl-bindings.txt in this directory for details of the
72common pinctrl bindings used by client devices, including the meaning of the
73phrase "pin configuration node".
74
75The pin configuration nodes act as a container for an arbitrary number of
76subnodes. Each of these subnodes represents some desired configuration for a
77pin or a list of pins. This configuration can include the
78mux function to select on those pin(s), and various pin configuration
79parameters, as listed below.
80
81
82SUBNODES:
83
84The name of each subnode is not important; all subnodes should be enumerated
85and processed purely based on their content.
86
87Each subnode only affects those parameters that are explicitly listed. In
88other words, a subnode that lists a mux function but no pin configuration
89parameters implies no information about any pin configuration parameters.
90Similarly, a pin subnode that describes a pullup parameter implies no
91information about e.g. the mux function.
92
93The following generic properties as defined in pinctrl-bindings.txt are valid
94to specify in a pin configuration subnode:
95
96- pins:
97	Usage: required
98	Value type: <string-array>
99	Definition: List of gpio pins affected by the properties specified in
100		    this subnode.  Valid pins are:
101		    gpio1-gpio4 for pm8005
102		    gpio1-gpio6 for pm8018
103		    gpio1-gpio12 for pm8038
104		    gpio1-gpio40 for pm8058
105		    gpio1-gpio4 for pm8916
106		    gpio1-gpio38 for pm8917
107		    gpio1-gpio44 for pm8921
108		    gpio1-gpio36 for pm8941
109		    gpio1-gpio8 for pm8950 (hole on gpio3)
110		    gpio1-gpio22 for pm8994
111		    gpio1-gpio26 for pm8998
112		    gpio1-gpio22 for pma8084
113		    gpio1-gpio2 for pmi8950
114		    gpio1-gpio10 for pmi8994
115		    gpio1-gpio12 for pms405 (holes on gpio1, gpio9 and gpio10)
116		    gpio1-gpio10 for pm8150 (holes on gpio2, gpio5, gpio7
117					     and gpio8)
118		    gpio1-gpio12 for pm8150b (holes on gpio3, gpio4, gpio7)
119		    gpio1-gpio12 for pm8150l (hole on gpio7)
120		    gpio1-gpio10 for pm8350
121		    gpio1-gpio8 for pm8350b
122		    gpio1-gpio9 for pm8350c
123		    gpio1-gpio4 for pmk8350
124		    gpio1-gpio10 for pm7325
125		    gpio1-gpio4 for pmr735a
126		    gpio1-gpio4 for pmr735b
127		    gpio1-gpio10 for pm6150
128		    gpio1-gpio12 for pm6150l
129		    gpio1-gpio2 for pm8008
130		    gpio1-gpio11 for pmx55 (holes on gpio3, gpio7, gpio10
131					    and gpio11)
132
133- function:
134	Usage: required
135	Value type: <string>
136	Definition: Specify the alternative function to be configured for the
137		    specified pins.  Valid values are:
138		    "normal",
139		    "paired",
140		    "func1",
141		    "func2",
142		    "dtest1",
143		    "dtest2",
144		    "dtest3",
145		    "dtest4",
146		    And following values are supported by LV/MV GPIO subtypes:
147		    "func3",
148		    "func4"
149
150- bias-disable:
151	Usage: optional
152	Value type: <none>
153	Definition: The specified pins should be configured as no pull.
154
155- bias-pull-down:
156	Usage: optional
157	Value type: <none>
158	Definition: The specified pins should be configured as pull down.
159
160- bias-pull-up:
161	Usage: optional
162	Value type: <empty>
163	Definition: The specified pins should be configured as pull up.
164
165- qcom,pull-up-strength:
166	Usage: optional
167	Value type: <u32>
168	Definition: Specifies the strength to use for pull up, if selected.
169		    Valid values are; as defined in
170		    <dt-bindings/pinctrl/qcom,pmic-gpio.h>:
171		    1: 30uA                     (PMIC_GPIO_PULL_UP_30)
172		    2: 1.5uA                    (PMIC_GPIO_PULL_UP_1P5)
173		    3: 31.5uA                   (PMIC_GPIO_PULL_UP_31P5)
174		    4: 1.5uA + 30uA boost       (PMIC_GPIO_PULL_UP_1P5_30)
175		    If this property is omitted 30uA strength will be used if
176		    pull up is selected
177
178- bias-high-impedance:
179	Usage: optional
180	Value type: <none>
181	Definition: The specified pins will put in high-Z mode and disabled.
182
183- input-enable:
184	Usage: optional
185	Value type: <none>
186	Definition: The specified pins are put in input mode.
187
188- output-high:
189	Usage: optional
190	Value type: <none>
191	Definition: The specified pins are configured in output mode, driven
192		    high.
193
194- output-low:
195	Usage: optional
196	Value type: <none>
197	Definition: The specified pins are configured in output mode, driven
198		    low.
199
200- power-source:
201	Usage: optional
202	Value type: <u32>
203	Definition: Selects the power source for the specified pins. Valid
204		    power sources are defined per chip in
205		    <dt-bindings/pinctrl/qcom,pmic-gpio.h>
206
207- qcom,drive-strength:
208	Usage: optional
209	Value type: <u32>
210	Definition: Selects the drive strength for the specified pins. Value
211		    drive strengths are:
212		    0: no (PMIC_GPIO_STRENGTH_NO)
213		    1: high (PMIC_GPIO_STRENGTH_HIGH) 0.9mA @ 1.8V - 1.9mA @ 2.6V
214		    2: medium (PMIC_GPIO_STRENGTH_MED) 0.6mA @ 1.8V - 1.25mA @ 2.6V
215		    3: low (PMIC_GPIO_STRENGTH_LOW) 0.15mA @ 1.8V - 0.3mA @ 2.6V
216		    as defined in <dt-bindings/pinctrl/qcom,pmic-gpio.h>
217
218- drive-push-pull:
219	Usage: optional
220	Value type: <none>
221	Definition: The specified pins are configured in push-pull mode.
222
223- drive-open-drain:
224	Usage: optional
225	Value type: <none>
226	Definition: The specified pins are configured in open-drain mode.
227
228- drive-open-source:
229	Usage: optional
230	Value type: <none>
231	Definition: The specified pins are configured in open-source mode.
232
233- qcom,analog-pass:
234	Usage: optional
235	Value type: <none>
236	Definition: The specified pins are configured in analog-pass-through mode.
237
238- qcom,atest:
239	Usage: optional
240	Value type: <u32>
241	Definition: Selects ATEST rail to route to GPIO when it's configured
242		    in analog-pass-through mode.
243		    Valid values are 1-4 corresponding to ATEST1 to ATEST4.
244
245- qcom,dtest-buffer:
246	Usage: optional
247	Value type: <u32>
248	Definition: Selects DTEST rail to route to GPIO when it's configured
249		    as digital input.
250		    Valid values are 1-4 corresponding to DTEST1 to DTEST4.
251
252Example:
253
254	pm8921_gpio: gpio@150 {
255		compatible = "qcom,pm8921-gpio", "qcom,ssbi-gpio";
256		reg = <0x150 0x160>;
257		interrupts = <192 1>, <193 1>, <194 1>,
258			     <195 1>, <196 1>, <197 1>,
259			     <198 1>, <199 1>, <200 1>,
260			     <201 1>, <202 1>, <203 1>,
261			     <204 1>, <205 1>, <206 1>,
262			     <207 1>, <208 1>, <209 1>,
263			     <210 1>, <211 1>, <212 1>,
264			     <213 1>, <214 1>, <215 1>,
265			     <216 1>, <217 1>, <218 1>,
266			     <219 1>, <220 1>, <221 1>,
267			     <222 1>, <223 1>, <224 1>,
268			     <225 1>, <226 1>, <227 1>,
269			     <228 1>, <229 1>, <230 1>,
270			     <231 1>, <232 1>, <233 1>,
271			     <234 1>, <235 1>;
272
273		gpio-controller;
274		#gpio-cells = <2>;
275
276		pm8921_gpio_keys: gpio-keys {
277			volume-keys {
278				pins = "gpio20", "gpio21";
279				function = "normal";
280
281				input-enable;
282				bias-pull-up;
283				drive-push-pull;
284				qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
285				power-source = <PM8921_GPIO_S4>;
286			};
287		};
288	};
289