1# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/remoteproc/qcom,sm8350-pas.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm SM8350/SM8450 Peripheral Authentication Service
8
9maintainers:
10  - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
11
12description:
13  Qualcomm SM8350/SM8450 SoC Peripheral Authentication Service loads and boots
14  firmware on the Qualcomm DSP Hexagon cores.
15
16properties:
17  compatible:
18    enum:
19      - qcom,sm8350-adsp-pas
20      - qcom,sm8350-cdsp-pas
21      - qcom,sm8350-slpi-pas
22      - qcom,sm8350-mpss-pas
23      - qcom,sm8450-adsp-pas
24      - qcom,sm8450-cdsp-pas
25      - qcom,sm8450-mpss-pas
26      - qcom,sm8450-slpi-pas
27
28  reg:
29    maxItems: 1
30
31  clocks:
32    items:
33      - description: XO clock
34
35  clock-names:
36    items:
37      - const: xo
38
39  qcom,qmp:
40    $ref: /schemas/types.yaml#/definitions/phandle
41    description: Reference to the AOSS side-channel message RAM.
42
43  smd-edge: false
44
45  memory-region:
46    minItems: 1
47    description: Reference to the reserved-memory for the Hexagon core
48
49  firmware-name:
50    $ref: /schemas/types.yaml#/definitions/string
51    description: Firmware name for the Hexagon core
52
53required:
54  - compatible
55  - reg
56
57allOf:
58  - $ref: /schemas/remoteproc/qcom,pas-common.yaml#
59  - if:
60      properties:
61        compatible:
62          enum:
63            - qcom,sm8350-adsp-pas
64            - qcom,sm8350-cdsp-pas
65            - qcom,sm8350-slpi-pas
66            - qcom,sm8450-adsp-pas
67            - qcom,sm8450-cdsp-pas
68            - qcom,sm8450-slpi-pas
69    then:
70      properties:
71        interrupts:
72          maxItems: 5
73        interrupt-names:
74          maxItems: 5
75    else:
76      properties:
77        interrupts:
78          minItems: 6
79        interrupt-names:
80          minItems: 6
81
82  - if:
83      properties:
84        compatible:
85          enum:
86            - qcom,sm8350-mpss-pas
87            - qcom,sm8450-mpss-pas
88    then:
89      properties:
90        power-domains:
91          items:
92            - description: CX power domain
93            - description: MSS power domain
94        power-domain-names:
95          items:
96            - const: cx
97            - const: mss
98
99  - if:
100      properties:
101        compatible:
102          enum:
103            - qcom,sm8350-adsp-pas
104            - qcom,sm8350-slpi-pas
105            - qcom,sm8450-adsp-pas
106            - qcom,sm8450-slpi-pas
107    then:
108      properties:
109        power-domains:
110          items:
111            - description: LCX power domain
112            - description: LMX power domain
113        power-domain-names:
114          items:
115            - const: lcx
116            - const: lmx
117
118  - if:
119      properties:
120        compatible:
121          enum:
122            - qcom,sm8350-cdsp-pas
123            - qcom,sm8450-cdsp-pas
124    then:
125      properties:
126        power-domains:
127          items:
128            - description: CX power domain
129            - description: MXC power domain
130        power-domain-names:
131          items:
132            - const: cx
133            - const: mxc
134
135unevaluatedProperties: false
136
137examples:
138  - |
139    #include <dt-bindings/clock/qcom,rpmh.h>
140    #include <dt-bindings/interrupt-controller/irq.h>
141    #include <dt-bindings/mailbox/qcom-ipcc.h>
142    #include <dt-bindings/power/qcom-rpmpd.h>
143
144    remoteproc@30000000 {
145        compatible = "qcom,sm8450-adsp-pas";
146        reg = <0x030000000 0x100>;
147
148        clocks = <&rpmhcc RPMH_CXO_CLK>;
149        clock-names = "xo";
150
151        firmware-name = "qcom/sm8450/adsp.mbn";
152
153        interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
154                              <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
155                              <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
156                              <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
157                              <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>;
158        interrupt-names = "wdog", "fatal", "ready",
159                          "handover", "stop-ack";
160
161        memory-region = <&adsp_mem>;
162
163        power-domains = <&rpmhpd SM8450_LCX>,
164                        <&rpmhpd SM8450_LMX>;
165        power-domain-names = "lcx", "lmx";
166
167        qcom,qmp = <&aoss_qmp>;
168        qcom,smem-states = <&smp2p_adsp_out 0>;
169        qcom,smem-state-names = "stop";
170
171        glink-edge {
172            interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
173                                         IPCC_MPROC_SIGNAL_GLINK_QMP
174                                         IRQ_TYPE_EDGE_RISING>;
175            mboxes = <&ipcc IPCC_CLIENT_LPASS IPCC_MPROC_SIGNAL_GLINK_QMP>;
176
177            label = "lpass";
178            qcom,remote-pid = <2>;
179
180            /* ... */
181        };
182    };
183