1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/soc/mediatek/mediatek,pwrap.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Mediatek PMIC Wrapper
8
9maintainers:
10  - Flora Fu <flora.fu@mediatek.com>
11  - Alexandre Mergnat <amergnat@baylibre.com>
12
13description:
14  On MediaTek SoCs the PMIC is connected via SPI. The SPI master interface
15  is not directly visible to the CPU, but only through the PMIC wrapper
16  inside the SoC. The communication between the SoC and the PMIC can
17  optionally be encrypted. Also a non standard Dual IO SPI mode can be
18  used to increase speed.
19
20  IP Pairing
21
22  On MT8135 the pins of some SoC internal peripherals can be on the PMIC.
23  The signals of these pins are routed over the SPI bus using the pwrap
24  bridge. In the binding description below the properties needed for bridging
25  are marked with "IP Pairing". These are optional on SoCs which do not support
26  IP Pairing
27
28properties:
29  compatible:
30    oneOf:
31      - items:
32          - enum:
33              - mediatek,mt2701-pwrap
34              - mediatek,mt6765-pwrap
35              - mediatek,mt6779-pwrap
36              - mediatek,mt6797-pwrap
37              - mediatek,mt6873-pwrap
38              - mediatek,mt7622-pwrap
39              - mediatek,mt8135-pwrap
40              - mediatek,mt8173-pwrap
41              - mediatek,mt8183-pwrap
42              - mediatek,mt8186-pwrap
43              - mediatek,mt8188-pwrap
44              - mediatek,mt8195-pwrap
45              - mediatek,mt8365-pwrap
46              - mediatek,mt8516-pwrap
47      - items:
48          - enum:
49              - mediatek,mt8186-pwrap
50              - mediatek,mt8195-pwrap
51          - const: syscon
52
53  reg:
54    minItems: 1
55    items:
56      - description: PMIC wrapper registers
57      - description: IP pairing registers
58
59  reg-names:
60    minItems: 1
61    items:
62      - const: pwrap
63      - const: pwrap-bridge
64
65  interrupts:
66    maxItems: 1
67
68  clocks:
69    minItems: 2
70    items:
71      - description: SPI bus clock
72      - description: Main module clock
73      - description: System module clock
74      - description: Timer module clock
75
76  clock-names:
77    minItems: 2
78    items:
79      - const: spi
80      - const: wrap
81      - const: sys
82      - const: tmr
83
84  resets:
85    minItems: 1
86    items:
87      - description: PMIC wrapper reset
88      - description: IP pairing reset
89
90  reset-names:
91    minItems: 1
92    items:
93      - const: pwrap
94      - const: pwrap-bridge
95
96  pmic:
97    type: object
98
99required:
100  - compatible
101  - reg
102  - reg-names
103  - interrupts
104  - clocks
105  - clock-names
106
107dependentRequired:
108  resets: [reset-names]
109
110allOf:
111  - if:
112      properties:
113        compatible:
114          contains:
115            const: mediatek,mt8365-pwrap
116    then:
117      properties:
118        clocks:
119          minItems: 4
120
121        clock-names:
122          minItems: 4
123
124additionalProperties: false
125
126examples:
127  - |
128    #include <dt-bindings/interrupt-controller/irq.h>
129    #include <dt-bindings/interrupt-controller/arm-gic.h>
130    #include <dt-bindings/reset/mt8135-resets.h>
131
132    soc {
133        #address-cells = <2>;
134        #size-cells = <2>;
135        pwrap@1000f000 {
136            compatible = "mediatek,mt8135-pwrap";
137            reg = <0 0x1000f000 0 0x1000>,
138                  <0 0x11017000 0 0x1000>;
139            reg-names = "pwrap", "pwrap-bridge";
140            interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
141            clocks = <&clk26m>, <&clk26m>;
142            clock-names = "spi", "wrap";
143            resets = <&infracfg MT8135_INFRA_PMIC_WRAP_RST>,
144                     <&pericfg MT8135_PERI_PWRAP_BRIDGE_SW_RST>;
145            reset-names = "pwrap", "pwrap-bridge";
146        };
147    };
148