1MediaTek PMIC Wrapper Driver
2
3This document describes the binding for the MediaTek PMIC wrapper.
4
5On MediaTek SoCs the PMIC is connected via SPI. The SPI master interface
6is not directly visible to the CPU, but only through the PMIC wrapper
7inside the SoC. The communication between the SoC and the PMIC can
8optionally be encrypted. Also a non standard Dual IO SPI mode can be
9used to increase speed.
10
11IP Pairing
12
13on MT8135 the pins of some SoC internal peripherals can be on the PMIC.
14The signals of these pins are routed over the SPI bus using the pwrap
15bridge. In the binding description below the properties needed for bridging
16are marked with "IP Pairing". These are optional on SoCs which do not support
17IP Pairing
18
19Required properties in pwrap device node.
20- compatible:
21	"mediatek,mt2701-pwrap" for MT2701/7623 SoCs
22	"mediatek,mt6765-pwrap" for MT6765 SoCs
23	"mediatek,mt6779-pwrap" for MT6779 SoCs
24	"mediatek,mt6797-pwrap" for MT6797 SoCs
25	"mediatek,mt6873-pwrap" for MT6873/8192 SoCs
26	"mediatek,mt7622-pwrap" for MT7622 SoCs
27	"mediatek,mt8135-pwrap" for MT8135 SoCs
28	"mediatek,mt8173-pwrap" for MT8173 SoCs
29	"mediatek,mt8183-pwrap" for MT8183 SoCs
30	"mediatek,mt8186-pwrap" for MT8186 SoCs
31	"mediatek,mt8188-pwrap", "mediatek,mt8195-pwrap" for MT8188 SoCs
32	"mediatek,mt8195-pwrap" for MT8195 SoCs
33	"mediatek,mt8365-pwrap" for MT8365 SoCs
34	"mediatek,mt8516-pwrap" for MT8516 SoCs
35- interrupts: IRQ for pwrap in SOC
36- reg-names: "pwrap" is required; "pwrap-bridge" is optional.
37  "pwrap": Main registers base
38  "pwrap-bridge": bridge base (IP Pairing)
39- reg: Must contain an entry for each entry in reg-names.
40- clock-names: Must include the following entries:
41  "spi": SPI bus clock
42  "wrap": Main module clock
43  "sys": Optional system module clock
44  "tmr": Optional timer module clock
45- clocks: Must contain an entry for each entry in clock-names.
46
47Optional properities:
48- reset-names: Some SoCs include the following entries:
49  "pwrap"
50  "pwrap-bridge" (IP Pairing)
51- resets: Must contain an entry for each entry in reset-names.
52- pmic: Using either MediaTek PMIC MFD as the child device of pwrap
53  See the following for child node definitions:
54  Documentation/devicetree/bindings/mfd/mt6397.txt
55  or the regulator-only device as the child device of pwrap, such as MT6380.
56  See the following definitions for such kinds of devices.
57  Documentation/devicetree/bindings/regulator/mt6380-regulator.txt
58
59Example:
60	pwrap: pwrap@1000f000 {
61		compatible = "mediatek,mt8135-pwrap";
62		reg = <0 0x1000f000 0 0x1000>,
63			<0 0x11017000 0 0x1000>;
64		reg-names = "pwrap", "pwrap-bridge";
65		interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
66		resets = <&infracfg MT8135_INFRA_PMIC_WRAP_RST>,
67				<&pericfg MT8135_PERI_PWRAP_BRIDGE_SW_RST>;
68		reset-names = "pwrap", "pwrap-bridge";
69		clocks = <&clk26m>, <&clk26m>;
70		clock-names = "spi", "wrap";
71
72		pmic {
73			compatible = "mediatek,mt6397";
74		};
75	};
76