1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/sound/rockchip-spdif.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Rockchip SPDIF transceiver
8
9description:
10  The S/PDIF audio block is a stereo transceiver that allows the
11  processor to receive and transmit digital audio via a coaxial or
12  fibre cable.
13
14maintainers:
15  - Heiko Stuebner <heiko@sntech.de>
16
17properties:
18  compatible:
19    oneOf:
20      - const: rockchip,rk3066-spdif
21      - const: rockchip,rk3228-spdif
22      - const: rockchip,rk3328-spdif
23      - const: rockchip,rk3366-spdif
24      - const: rockchip,rk3368-spdif
25      - const: rockchip,rk3399-spdif
26      - const: rockchip,rk3568-spdif
27      - items:
28          - enum:
29              - rockchip,rk3188-spdif
30              - rockchip,rk3288-spdif
31              - rockchip,rk3308-spdif
32          - const: rockchip,rk3066-spdif
33
34  reg:
35    maxItems: 1
36
37  interrupts:
38    maxItems: 1
39
40  clocks:
41    items:
42      - description: clock for SPDIF bus
43      - description: clock for SPDIF controller
44
45  clock-names:
46    items:
47      - const: mclk
48      - const: hclk
49
50  dmas:
51    maxItems: 1
52
53  dma-names:
54    const: tx
55
56  power-domains:
57    maxItems: 1
58
59  rockchip,grf:
60    $ref: /schemas/types.yaml#/definitions/phandle
61    description:
62      The phandle of the syscon node for the GRF register.
63      Required property on RK3288.
64
65  "#sound-dai-cells":
66    const: 0
67
68required:
69  - compatible
70  - reg
71  - interrupts
72  - clocks
73  - clock-names
74  - dmas
75  - dma-names
76  - "#sound-dai-cells"
77
78if:
79  properties:
80    compatible:
81      contains:
82        const: rockchip,rk3288-spdif
83
84then:
85  required:
86    - rockchip,grf
87
88additionalProperties: false
89
90examples:
91  - |
92    #include <dt-bindings/clock/rk3188-cru.h>
93    #include <dt-bindings/interrupt-controller/arm-gic.h>
94    spdif: spdif@1011e000 {
95      compatible = "rockchip,rk3188-spdif", "rockchip,rk3066-spdif";
96      reg = <0x1011e000 0x2000>;
97      interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
98      clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF>;
99      clock-names = "mclk", "hclk";
100      dmas = <&dmac1_s 8>;
101      dma-names = "tx";
102      #sound-dai-cells = <0>;
103    };
104