1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/sound/samsung-i2s.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Samsung SoC I2S controller
8
9maintainers:
10  - Krzysztof Kozlowski <krzk@kernel.org>
11  - Sylwester Nawrocki <s.nawrocki@samsung.com>
12
13allOf:
14  - $ref: dai-common.yaml#
15
16properties:
17  compatible:
18    description: |
19      samsung,s3c6410-i2s: for 8/16/24bit stereo I2S.
20
21      samsung,s5pv210-i2s: for 8/16/24bit multichannel (5.1) I2S with
22      secondary FIFO, s/w reset control and internal mux for root clock
23      source.
24
25      samsung,exynos5420-i2s: for 8/16/24bit multichannel (5.1) I2S for
26      playback, stereo channel capture, secondary FIFO using internal
27      or external DMA, s/w reset control, internal mux for root clock
28      source and 7.1 channel TDM support for playback; TDM (Time division
29      multiplexing) is to allow transfer of multiple channel audio data on
30      single data line.
31
32      samsung,exynos7-i2s: with all the available features of Exynos5 I2S.
33      Exynos7 I2S has 7.1 channel TDM support for capture, secondary FIFO
34      with only external DMA and more number of root clock sampling
35      frequencies.
36
37      samsung,exynos7-i2s1: I2S1 on previous samsung platforms supports
38      stereo channels. Exynos7 I2S1 upgraded to 5.1 multichannel with
39      slightly modified bit offsets.
40
41      tesla,fsd-i2s: for 8/16/24bit stereo channel I2S for playback and
42      capture, secondary FIFO using external DMA, s/w reset control,
43      internal mux for root clock source with all root clock sampling
44      frequencies supported by Exynos7 I2S and 7.1 channel TDM support
45      for playback and capture TDM (Time division multiplexing) to allow
46      transfer of multiple channel audio data on single data line.
47    enum:
48      - samsung,s3c6410-i2s
49      - samsung,s5pv210-i2s
50      - samsung,exynos5420-i2s
51      - samsung,exynos7-i2s
52      - samsung,exynos7-i2s1
53      - tesla,fsd-i2s
54
55  '#address-cells':
56    const: 1
57
58  '#size-cells':
59    const: 0
60
61  reg:
62    maxItems: 1
63
64  dmas:
65    minItems: 2
66    maxItems: 3
67
68  dma-names:
69    oneOf:
70      - items:
71          - const: tx
72          - const: rx
73      - items:
74          - const: tx
75          - const: rx
76          - const: tx-sec
77
78  clocks:
79    minItems: 1
80    maxItems: 3
81
82  clock-names:
83    oneOf:
84      - items:
85          - const: iis
86      - items: # for I2S0
87          - const: iis
88          - const: i2s_opclk0
89          - const: i2s_opclk1
90      - items: # for I2S1 and I2S2
91          - const: iis
92          - const: i2s_opclk0
93    description: |
94      "iis" is the I2S bus clock and i2s_opclk0, i2s_opclk1 are sources
95      of the root clock. I2S0 has internal mux to select the source
96      of root clock and I2S1 and I2S2 doesn't have any such mux.
97
98  "#clock-cells":
99    const: 1
100
101  clock-output-names:
102    deprecated: true
103    oneOf:
104      - items: # for I2S0
105          - const: i2s_cdclk0
106      - items: # for I2S1
107          - const: i2s_cdclk1
108      - items: # for I2S2
109          - const: i2s_cdclk2
110    description: Names of the CDCLK I2S output clocks.
111
112  interrupts:
113    maxItems: 1
114
115  samsung,idma-addr:
116    $ref: /schemas/types.yaml#/definitions/uint32
117    description: |
118      Internal DMA register base address of the audio
119      subsystem (used in secondary sound source).
120
121  power-domains:
122    maxItems: 1
123
124  "#sound-dai-cells":
125    const: 1
126
127required:
128  - compatible
129  - reg
130  - dmas
131  - dma-names
132  - clocks
133  - clock-names
134
135unevaluatedProperties: false
136
137examples:
138  - |
139    #include <dt-bindings/clock/exynos-audss-clk.h>
140
141    i2s0: i2s@3830000 {
142        compatible = "samsung,s5pv210-i2s";
143        reg = <0x03830000 0x100>;
144        dmas = <&pdma0 10>,
145                <&pdma0 9>,
146                <&pdma0 8>;
147        dma-names = "tx", "rx", "tx-sec";
148        clocks = <&clock_audss EXYNOS_I2S_BUS>,
149                <&clock_audss EXYNOS_I2S_BUS>,
150                <&clock_audss EXYNOS_SCLK_I2S>;
151        clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
152        #clock-cells = <1>;
153        samsung,idma-addr = <0x03000000>;
154        pinctrl-names = "default";
155        pinctrl-0 = <&i2s0_bus>;
156        #sound-dai-cells = <1>;
157    };
158