1*c9ccf3a3SEmmanuel Vadot /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2*c9ccf3a3SEmmanuel Vadot /*
3*c9ccf3a3SEmmanuel Vadot  * Copyright (c) 2021, The Linux Foundation. All rights reserved.
4*c9ccf3a3SEmmanuel Vadot  * Copyright (c) 2021, Konrad Dybcio <konrad.dybcio@somainline.org>
5*c9ccf3a3SEmmanuel Vadot  */
6*c9ccf3a3SEmmanuel Vadot 
7*c9ccf3a3SEmmanuel Vadot #ifndef _DT_BINDINGS_CLK_QCOM_DISP_CC_SM6350_H
8*c9ccf3a3SEmmanuel Vadot #define _DT_BINDINGS_CLK_QCOM_DISP_CC_SM6350_H
9*c9ccf3a3SEmmanuel Vadot 
10*c9ccf3a3SEmmanuel Vadot /* DISP_CC clocks */
11*c9ccf3a3SEmmanuel Vadot #define DISP_CC_PLL0				0
12*c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_AHB_CLK			1
13*c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_AHB_CLK_SRC		2
14*c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_BYTE0_CLK			3
15*c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_BYTE0_CLK_SRC		4
16*c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_BYTE0_DIV_CLK_SRC		5
17*c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_BYTE0_INTF_CLK		6
18*c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_DP_AUX_CLK			7
19*c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_DP_AUX_CLK_SRC		8
20*c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_DP_CRYPTO_CLK		9
21*c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_DP_CRYPTO_CLK_SRC		10
22*c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_DP_LINK_CLK		11
23*c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_DP_LINK_CLK_SRC		12
24*c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_DP_LINK_DIV_CLK_SRC	13
25*c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_DP_LINK_INTF_CLK		14
26*c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_DP_PIXEL_CLK		15
27*c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_DP_PIXEL_CLK_SRC		16
28*c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_ESC0_CLK			17
29*c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_ESC0_CLK_SRC		18
30*c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_MDP_CLK			19
31*c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_MDP_CLK_SRC		20
32*c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_MDP_LUT_CLK		21
33*c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_NON_GDSC_AHB_CLK		22
34*c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_PCLK0_CLK			23
35*c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_PCLK0_CLK_SRC		24
36*c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_ROT_CLK			25
37*c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_ROT_CLK_SRC		26
38*c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_RSCC_AHB_CLK		27
39*c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_RSCC_VSYNC_CLK		28
40*c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_VSYNC_CLK			29
41*c9ccf3a3SEmmanuel Vadot #define DISP_CC_MDSS_VSYNC_CLK_SRC		30
42*c9ccf3a3SEmmanuel Vadot #define DISP_CC_SLEEP_CLK			31
43*c9ccf3a3SEmmanuel Vadot #define DISP_CC_XO_CLK				32
44*c9ccf3a3SEmmanuel Vadot 
45*c9ccf3a3SEmmanuel Vadot /* GDSCs */
46*c9ccf3a3SEmmanuel Vadot #define MDSS_GDSC				0
47*c9ccf3a3SEmmanuel Vadot 
48*c9ccf3a3SEmmanuel Vadot #endif
49