1*c66ec88fSEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0-only */ 2*c66ec88fSEmmanuel Vadot /* 3*c66ec88fSEmmanuel Vadot * Copyright (c) 2013 Samsung Electronics Co., Ltd. 4*c66ec88fSEmmanuel Vadot * Author: Mateusz Krawczuk <m.krawczuk@partner.samsung.com> 5*c66ec88fSEmmanuel Vadot * 6*c66ec88fSEmmanuel Vadot * Device Tree binding constants for Samsung S5PV210 clock controller. 7*c66ec88fSEmmanuel Vadot */ 8*c66ec88fSEmmanuel Vadot 9*c66ec88fSEmmanuel Vadot #ifndef _DT_BINDINGS_CLOCK_S5PV210_H 10*c66ec88fSEmmanuel Vadot #define _DT_BINDINGS_CLOCK_S5PV210_H 11*c66ec88fSEmmanuel Vadot 12*c66ec88fSEmmanuel Vadot /* Core clocks. */ 13*c66ec88fSEmmanuel Vadot #define FIN_PLL 1 14*c66ec88fSEmmanuel Vadot #define FOUT_APLL 2 15*c66ec88fSEmmanuel Vadot #define FOUT_MPLL 3 16*c66ec88fSEmmanuel Vadot #define FOUT_EPLL 4 17*c66ec88fSEmmanuel Vadot #define FOUT_VPLL 5 18*c66ec88fSEmmanuel Vadot 19*c66ec88fSEmmanuel Vadot /* Muxes. */ 20*c66ec88fSEmmanuel Vadot #define MOUT_FLASH 6 21*c66ec88fSEmmanuel Vadot #define MOUT_PSYS 7 22*c66ec88fSEmmanuel Vadot #define MOUT_DSYS 8 23*c66ec88fSEmmanuel Vadot #define MOUT_MSYS 9 24*c66ec88fSEmmanuel Vadot #define MOUT_VPLL 10 25*c66ec88fSEmmanuel Vadot #define MOUT_EPLL 11 26*c66ec88fSEmmanuel Vadot #define MOUT_MPLL 12 27*c66ec88fSEmmanuel Vadot #define MOUT_APLL 13 28*c66ec88fSEmmanuel Vadot #define MOUT_VPLLSRC 14 29*c66ec88fSEmmanuel Vadot #define MOUT_CSIS 15 30*c66ec88fSEmmanuel Vadot #define MOUT_FIMD 16 31*c66ec88fSEmmanuel Vadot #define MOUT_CAM1 17 32*c66ec88fSEmmanuel Vadot #define MOUT_CAM0 18 33*c66ec88fSEmmanuel Vadot #define MOUT_DAC 19 34*c66ec88fSEmmanuel Vadot #define MOUT_MIXER 20 35*c66ec88fSEmmanuel Vadot #define MOUT_HDMI 21 36*c66ec88fSEmmanuel Vadot #define MOUT_G2D 22 37*c66ec88fSEmmanuel Vadot #define MOUT_MFC 23 38*c66ec88fSEmmanuel Vadot #define MOUT_G3D 24 39*c66ec88fSEmmanuel Vadot #define MOUT_FIMC2 25 40*c66ec88fSEmmanuel Vadot #define MOUT_FIMC1 26 41*c66ec88fSEmmanuel Vadot #define MOUT_FIMC0 27 42*c66ec88fSEmmanuel Vadot #define MOUT_UART3 28 43*c66ec88fSEmmanuel Vadot #define MOUT_UART2 29 44*c66ec88fSEmmanuel Vadot #define MOUT_UART1 30 45*c66ec88fSEmmanuel Vadot #define MOUT_UART0 31 46*c66ec88fSEmmanuel Vadot #define MOUT_MMC3 32 47*c66ec88fSEmmanuel Vadot #define MOUT_MMC2 33 48*c66ec88fSEmmanuel Vadot #define MOUT_MMC1 34 49*c66ec88fSEmmanuel Vadot #define MOUT_MMC0 35 50*c66ec88fSEmmanuel Vadot #define MOUT_PWM 36 51*c66ec88fSEmmanuel Vadot #define MOUT_SPI0 37 52*c66ec88fSEmmanuel Vadot #define MOUT_SPI1 38 53*c66ec88fSEmmanuel Vadot #define MOUT_DMC0 39 54*c66ec88fSEmmanuel Vadot #define MOUT_PWI 40 55*c66ec88fSEmmanuel Vadot #define MOUT_HPM 41 56*c66ec88fSEmmanuel Vadot #define MOUT_SPDIF 42 57*c66ec88fSEmmanuel Vadot #define MOUT_AUDIO2 43 58*c66ec88fSEmmanuel Vadot #define MOUT_AUDIO1 44 59*c66ec88fSEmmanuel Vadot #define MOUT_AUDIO0 45 60*c66ec88fSEmmanuel Vadot 61*c66ec88fSEmmanuel Vadot /* Dividers. */ 62*c66ec88fSEmmanuel Vadot #define DOUT_PCLKP 46 63*c66ec88fSEmmanuel Vadot #define DOUT_HCLKP 47 64*c66ec88fSEmmanuel Vadot #define DOUT_PCLKD 48 65*c66ec88fSEmmanuel Vadot #define DOUT_HCLKD 49 66*c66ec88fSEmmanuel Vadot #define DOUT_PCLKM 50 67*c66ec88fSEmmanuel Vadot #define DOUT_HCLKM 51 68*c66ec88fSEmmanuel Vadot #define DOUT_A2M 52 69*c66ec88fSEmmanuel Vadot #define DOUT_APLL 53 70*c66ec88fSEmmanuel Vadot #define DOUT_CSIS 54 71*c66ec88fSEmmanuel Vadot #define DOUT_FIMD 55 72*c66ec88fSEmmanuel Vadot #define DOUT_CAM1 56 73*c66ec88fSEmmanuel Vadot #define DOUT_CAM0 57 74*c66ec88fSEmmanuel Vadot #define DOUT_TBLK 58 75*c66ec88fSEmmanuel Vadot #define DOUT_G2D 59 76*c66ec88fSEmmanuel Vadot #define DOUT_MFC 60 77*c66ec88fSEmmanuel Vadot #define DOUT_G3D 61 78*c66ec88fSEmmanuel Vadot #define DOUT_FIMC2 62 79*c66ec88fSEmmanuel Vadot #define DOUT_FIMC1 63 80*c66ec88fSEmmanuel Vadot #define DOUT_FIMC0 64 81*c66ec88fSEmmanuel Vadot #define DOUT_UART3 65 82*c66ec88fSEmmanuel Vadot #define DOUT_UART2 66 83*c66ec88fSEmmanuel Vadot #define DOUT_UART1 67 84*c66ec88fSEmmanuel Vadot #define DOUT_UART0 68 85*c66ec88fSEmmanuel Vadot #define DOUT_MMC3 69 86*c66ec88fSEmmanuel Vadot #define DOUT_MMC2 70 87*c66ec88fSEmmanuel Vadot #define DOUT_MMC1 71 88*c66ec88fSEmmanuel Vadot #define DOUT_MMC0 72 89*c66ec88fSEmmanuel Vadot #define DOUT_PWM 73 90*c66ec88fSEmmanuel Vadot #define DOUT_SPI1 74 91*c66ec88fSEmmanuel Vadot #define DOUT_SPI0 75 92*c66ec88fSEmmanuel Vadot #define DOUT_DMC0 76 93*c66ec88fSEmmanuel Vadot #define DOUT_PWI 77 94*c66ec88fSEmmanuel Vadot #define DOUT_HPM 78 95*c66ec88fSEmmanuel Vadot #define DOUT_COPY 79 96*c66ec88fSEmmanuel Vadot #define DOUT_FLASH 80 97*c66ec88fSEmmanuel Vadot #define DOUT_AUDIO2 81 98*c66ec88fSEmmanuel Vadot #define DOUT_AUDIO1 82 99*c66ec88fSEmmanuel Vadot #define DOUT_AUDIO0 83 100*c66ec88fSEmmanuel Vadot #define DOUT_DPM 84 101*c66ec88fSEmmanuel Vadot #define DOUT_DVSEM 85 102*c66ec88fSEmmanuel Vadot 103*c66ec88fSEmmanuel Vadot /* Gates */ 104*c66ec88fSEmmanuel Vadot #define SCLK_FIMC 86 105*c66ec88fSEmmanuel Vadot #define CLK_CSIS 87 106*c66ec88fSEmmanuel Vadot #define CLK_ROTATOR 88 107*c66ec88fSEmmanuel Vadot #define CLK_FIMC2 89 108*c66ec88fSEmmanuel Vadot #define CLK_FIMC1 90 109*c66ec88fSEmmanuel Vadot #define CLK_FIMC0 91 110*c66ec88fSEmmanuel Vadot #define CLK_MFC 92 111*c66ec88fSEmmanuel Vadot #define CLK_G2D 93 112*c66ec88fSEmmanuel Vadot #define CLK_G3D 94 113*c66ec88fSEmmanuel Vadot #define CLK_IMEM 95 114*c66ec88fSEmmanuel Vadot #define CLK_PDMA1 96 115*c66ec88fSEmmanuel Vadot #define CLK_PDMA0 97 116*c66ec88fSEmmanuel Vadot #define CLK_MDMA 98 117*c66ec88fSEmmanuel Vadot #define CLK_DMC1 99 118*c66ec88fSEmmanuel Vadot #define CLK_DMC0 100 119*c66ec88fSEmmanuel Vadot #define CLK_NFCON 101 120*c66ec88fSEmmanuel Vadot #define CLK_SROMC 102 121*c66ec88fSEmmanuel Vadot #define CLK_CFCON 103 122*c66ec88fSEmmanuel Vadot #define CLK_NANDXL 104 123*c66ec88fSEmmanuel Vadot #define CLK_USB_HOST 105 124*c66ec88fSEmmanuel Vadot #define CLK_USB_OTG 106 125*c66ec88fSEmmanuel Vadot #define CLK_HDMI 107 126*c66ec88fSEmmanuel Vadot #define CLK_TVENC 108 127*c66ec88fSEmmanuel Vadot #define CLK_MIXER 109 128*c66ec88fSEmmanuel Vadot #define CLK_VP 110 129*c66ec88fSEmmanuel Vadot #define CLK_DSIM 111 130*c66ec88fSEmmanuel Vadot #define CLK_FIMD 112 131*c66ec88fSEmmanuel Vadot #define CLK_TZIC3 113 132*c66ec88fSEmmanuel Vadot #define CLK_TZIC2 114 133*c66ec88fSEmmanuel Vadot #define CLK_TZIC1 115 134*c66ec88fSEmmanuel Vadot #define CLK_TZIC0 116 135*c66ec88fSEmmanuel Vadot #define CLK_VIC3 117 136*c66ec88fSEmmanuel Vadot #define CLK_VIC2 118 137*c66ec88fSEmmanuel Vadot #define CLK_VIC1 119 138*c66ec88fSEmmanuel Vadot #define CLK_VIC0 120 139*c66ec88fSEmmanuel Vadot #define CLK_TSI 121 140*c66ec88fSEmmanuel Vadot #define CLK_HSMMC3 122 141*c66ec88fSEmmanuel Vadot #define CLK_HSMMC2 123 142*c66ec88fSEmmanuel Vadot #define CLK_HSMMC1 124 143*c66ec88fSEmmanuel Vadot #define CLK_HSMMC0 125 144*c66ec88fSEmmanuel Vadot #define CLK_JTAG 126 145*c66ec88fSEmmanuel Vadot #define CLK_MODEMIF 127 146*c66ec88fSEmmanuel Vadot #define CLK_CORESIGHT 128 147*c66ec88fSEmmanuel Vadot #define CLK_SDM 129 148*c66ec88fSEmmanuel Vadot #define CLK_SECSS 130 149*c66ec88fSEmmanuel Vadot #define CLK_PCM2 131 150*c66ec88fSEmmanuel Vadot #define CLK_PCM1 132 151*c66ec88fSEmmanuel Vadot #define CLK_PCM0 133 152*c66ec88fSEmmanuel Vadot #define CLK_SYSCON 134 153*c66ec88fSEmmanuel Vadot #define CLK_GPIO 135 154*c66ec88fSEmmanuel Vadot #define CLK_TSADC 136 155*c66ec88fSEmmanuel Vadot #define CLK_PWM 137 156*c66ec88fSEmmanuel Vadot #define CLK_WDT 138 157*c66ec88fSEmmanuel Vadot #define CLK_KEYIF 139 158*c66ec88fSEmmanuel Vadot #define CLK_UART3 140 159*c66ec88fSEmmanuel Vadot #define CLK_UART2 141 160*c66ec88fSEmmanuel Vadot #define CLK_UART1 142 161*c66ec88fSEmmanuel Vadot #define CLK_UART0 143 162*c66ec88fSEmmanuel Vadot #define CLK_SYSTIMER 144 163*c66ec88fSEmmanuel Vadot #define CLK_RTC 145 164*c66ec88fSEmmanuel Vadot #define CLK_SPI1 146 165*c66ec88fSEmmanuel Vadot #define CLK_SPI0 147 166*c66ec88fSEmmanuel Vadot #define CLK_I2C_HDMI_PHY 148 167*c66ec88fSEmmanuel Vadot #define CLK_I2C1 149 168*c66ec88fSEmmanuel Vadot #define CLK_I2C2 150 169*c66ec88fSEmmanuel Vadot #define CLK_I2C0 151 170*c66ec88fSEmmanuel Vadot #define CLK_I2S1 152 171*c66ec88fSEmmanuel Vadot #define CLK_I2S2 153 172*c66ec88fSEmmanuel Vadot #define CLK_I2S0 154 173*c66ec88fSEmmanuel Vadot #define CLK_AC97 155 174*c66ec88fSEmmanuel Vadot #define CLK_SPDIF 156 175*c66ec88fSEmmanuel Vadot #define CLK_TZPC3 157 176*c66ec88fSEmmanuel Vadot #define CLK_TZPC2 158 177*c66ec88fSEmmanuel Vadot #define CLK_TZPC1 159 178*c66ec88fSEmmanuel Vadot #define CLK_TZPC0 160 179*c66ec88fSEmmanuel Vadot #define CLK_SECKEY 161 180*c66ec88fSEmmanuel Vadot #define CLK_IEM_APC 162 181*c66ec88fSEmmanuel Vadot #define CLK_IEM_IEC 163 182*c66ec88fSEmmanuel Vadot #define CLK_CHIPID 164 183*c66ec88fSEmmanuel Vadot #define CLK_JPEG 163 184*c66ec88fSEmmanuel Vadot 185*c66ec88fSEmmanuel Vadot /* Special clocks*/ 186*c66ec88fSEmmanuel Vadot #define SCLK_PWI 164 187*c66ec88fSEmmanuel Vadot #define SCLK_SPDIF 165 188*c66ec88fSEmmanuel Vadot #define SCLK_AUDIO2 166 189*c66ec88fSEmmanuel Vadot #define SCLK_AUDIO1 167 190*c66ec88fSEmmanuel Vadot #define SCLK_AUDIO0 168 191*c66ec88fSEmmanuel Vadot #define SCLK_PWM 169 192*c66ec88fSEmmanuel Vadot #define SCLK_SPI1 170 193*c66ec88fSEmmanuel Vadot #define SCLK_SPI0 171 194*c66ec88fSEmmanuel Vadot #define SCLK_UART3 172 195*c66ec88fSEmmanuel Vadot #define SCLK_UART2 173 196*c66ec88fSEmmanuel Vadot #define SCLK_UART1 174 197*c66ec88fSEmmanuel Vadot #define SCLK_UART0 175 198*c66ec88fSEmmanuel Vadot #define SCLK_MMC3 176 199*c66ec88fSEmmanuel Vadot #define SCLK_MMC2 177 200*c66ec88fSEmmanuel Vadot #define SCLK_MMC1 178 201*c66ec88fSEmmanuel Vadot #define SCLK_MMC0 179 202*c66ec88fSEmmanuel Vadot #define SCLK_FINVPLL 180 203*c66ec88fSEmmanuel Vadot #define SCLK_CSIS 181 204*c66ec88fSEmmanuel Vadot #define SCLK_FIMD 182 205*c66ec88fSEmmanuel Vadot #define SCLK_CAM1 183 206*c66ec88fSEmmanuel Vadot #define SCLK_CAM0 184 207*c66ec88fSEmmanuel Vadot #define SCLK_DAC 185 208*c66ec88fSEmmanuel Vadot #define SCLK_MIXER 186 209*c66ec88fSEmmanuel Vadot #define SCLK_HDMI 187 210*c66ec88fSEmmanuel Vadot #define SCLK_FIMC2 188 211*c66ec88fSEmmanuel Vadot #define SCLK_FIMC1 189 212*c66ec88fSEmmanuel Vadot #define SCLK_FIMC0 190 213*c66ec88fSEmmanuel Vadot #define SCLK_HDMI27M 191 214*c66ec88fSEmmanuel Vadot #define SCLK_HDMIPHY 192 215*c66ec88fSEmmanuel Vadot #define SCLK_USBPHY0 193 216*c66ec88fSEmmanuel Vadot #define SCLK_USBPHY1 194 217*c66ec88fSEmmanuel Vadot 218*c66ec88fSEmmanuel Vadot /* S5P6442-specific clocks */ 219*c66ec88fSEmmanuel Vadot #define MOUT_D0SYNC 195 220*c66ec88fSEmmanuel Vadot #define MOUT_D1SYNC 196 221*c66ec88fSEmmanuel Vadot #define DOUT_MIXER 197 222*c66ec88fSEmmanuel Vadot #define CLK_ETB 198 223*c66ec88fSEmmanuel Vadot #define CLK_ETM 199 224*c66ec88fSEmmanuel Vadot 225*c66ec88fSEmmanuel Vadot /* CLKOUT */ 226*c66ec88fSEmmanuel Vadot #define FOUT_APLL_CLKOUT 200 227*c66ec88fSEmmanuel Vadot #define FOUT_MPLL_CLKOUT 201 228*c66ec88fSEmmanuel Vadot #define DOUT_APLL_CLKOUT 202 229*c66ec88fSEmmanuel Vadot #define MOUT_CLKSEL 203 230*c66ec88fSEmmanuel Vadot #define DOUT_CLKOUT 204 231*c66ec88fSEmmanuel Vadot #define MOUT_CLKOUT 205 232*c66ec88fSEmmanuel Vadot 233*c66ec88fSEmmanuel Vadot /* Total number of clocks. */ 234*c66ec88fSEmmanuel Vadot #define NR_CLKS 206 235*c66ec88fSEmmanuel Vadot 236*c66ec88fSEmmanuel Vadot #endif /* _DT_BINDINGS_CLOCK_S5PV210_H */ 237