1*c66ec88fSEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0 */
2*c66ec88fSEmmanuel Vadot /*
3*c66ec88fSEmmanuel Vadot  * Copyright (c) 2013 Tomasz Figa <tomasz.figa at gmail.com>
4*c66ec88fSEmmanuel Vadot  *
5*c66ec88fSEmmanuel Vadot  * Device Tree binding constants for Samsung S3C64xx clock controller.
6*c66ec88fSEmmanuel Vadot  */
7*c66ec88fSEmmanuel Vadot 
8*c66ec88fSEmmanuel Vadot #ifndef _DT_BINDINGS_CLOCK_SAMSUNG_S3C64XX_CLOCK_H
9*c66ec88fSEmmanuel Vadot #define _DT_BINDINGS_CLOCK_SAMSUNG_S3C64XX_CLOCK_H
10*c66ec88fSEmmanuel Vadot 
11*c66ec88fSEmmanuel Vadot /*
12*c66ec88fSEmmanuel Vadot  * Let each exported clock get a unique index, which is used on DT-enabled
13*c66ec88fSEmmanuel Vadot  * platforms to lookup the clock from a clock specifier. These indices are
14*c66ec88fSEmmanuel Vadot  * therefore considered an ABI and so must not be changed. This implies
15*c66ec88fSEmmanuel Vadot  * that new clocks should be added either in free spaces between clock groups
16*c66ec88fSEmmanuel Vadot  * or at the end.
17*c66ec88fSEmmanuel Vadot  */
18*c66ec88fSEmmanuel Vadot 
19*c66ec88fSEmmanuel Vadot /* Core clocks. */
20*c66ec88fSEmmanuel Vadot #define CLK27M			1
21*c66ec88fSEmmanuel Vadot #define CLK48M			2
22*c66ec88fSEmmanuel Vadot #define FOUT_APLL		3
23*c66ec88fSEmmanuel Vadot #define FOUT_MPLL		4
24*c66ec88fSEmmanuel Vadot #define FOUT_EPLL		5
25*c66ec88fSEmmanuel Vadot #define ARMCLK			6
26*c66ec88fSEmmanuel Vadot #define HCLKX2			7
27*c66ec88fSEmmanuel Vadot #define HCLK			8
28*c66ec88fSEmmanuel Vadot #define PCLK			9
29*c66ec88fSEmmanuel Vadot 
30*c66ec88fSEmmanuel Vadot /* HCLK bus clocks. */
31*c66ec88fSEmmanuel Vadot #define HCLK_3DSE		16
32*c66ec88fSEmmanuel Vadot #define HCLK_UHOST		17
33*c66ec88fSEmmanuel Vadot #define HCLK_SECUR		18
34*c66ec88fSEmmanuel Vadot #define HCLK_SDMA1		19
35*c66ec88fSEmmanuel Vadot #define HCLK_SDMA0		20
36*c66ec88fSEmmanuel Vadot #define HCLK_IROM		21
37*c66ec88fSEmmanuel Vadot #define HCLK_DDR1		22
38*c66ec88fSEmmanuel Vadot #define HCLK_MEM1		23
39*c66ec88fSEmmanuel Vadot #define HCLK_MEM0		24
40*c66ec88fSEmmanuel Vadot #define HCLK_USB		25
41*c66ec88fSEmmanuel Vadot #define HCLK_HSMMC2		26
42*c66ec88fSEmmanuel Vadot #define HCLK_HSMMC1		27
43*c66ec88fSEmmanuel Vadot #define HCLK_HSMMC0		28
44*c66ec88fSEmmanuel Vadot #define HCLK_MDP		29
45*c66ec88fSEmmanuel Vadot #define HCLK_DHOST		30
46*c66ec88fSEmmanuel Vadot #define HCLK_IHOST		31
47*c66ec88fSEmmanuel Vadot #define HCLK_DMA1		32
48*c66ec88fSEmmanuel Vadot #define HCLK_DMA0		33
49*c66ec88fSEmmanuel Vadot #define HCLK_JPEG		34
50*c66ec88fSEmmanuel Vadot #define HCLK_CAMIF		35
51*c66ec88fSEmmanuel Vadot #define HCLK_SCALER		36
52*c66ec88fSEmmanuel Vadot #define HCLK_2D			37
53*c66ec88fSEmmanuel Vadot #define HCLK_TV			38
54*c66ec88fSEmmanuel Vadot #define HCLK_POST0		39
55*c66ec88fSEmmanuel Vadot #define HCLK_ROT		40
56*c66ec88fSEmmanuel Vadot #define HCLK_LCD		41
57*c66ec88fSEmmanuel Vadot #define HCLK_TZIC		42
58*c66ec88fSEmmanuel Vadot #define HCLK_INTC		43
59*c66ec88fSEmmanuel Vadot #define HCLK_MFC		44
60*c66ec88fSEmmanuel Vadot #define HCLK_DDR0		45
61*c66ec88fSEmmanuel Vadot 
62*c66ec88fSEmmanuel Vadot /* PCLK bus clocks. */
63*c66ec88fSEmmanuel Vadot #define PCLK_IIC1		48
64*c66ec88fSEmmanuel Vadot #define PCLK_IIS2		49
65*c66ec88fSEmmanuel Vadot #define PCLK_SKEY		50
66*c66ec88fSEmmanuel Vadot #define PCLK_CHIPID		51
67*c66ec88fSEmmanuel Vadot #define PCLK_SPI1		52
68*c66ec88fSEmmanuel Vadot #define PCLK_SPI0		53
69*c66ec88fSEmmanuel Vadot #define PCLK_HSIRX		54
70*c66ec88fSEmmanuel Vadot #define PCLK_HSITX		55
71*c66ec88fSEmmanuel Vadot #define PCLK_GPIO		56
72*c66ec88fSEmmanuel Vadot #define PCLK_IIC0		57
73*c66ec88fSEmmanuel Vadot #define PCLK_IIS1		58
74*c66ec88fSEmmanuel Vadot #define PCLK_IIS0		59
75*c66ec88fSEmmanuel Vadot #define PCLK_AC97		60
76*c66ec88fSEmmanuel Vadot #define PCLK_TZPC		61
77*c66ec88fSEmmanuel Vadot #define PCLK_TSADC		62
78*c66ec88fSEmmanuel Vadot #define PCLK_KEYPAD		63
79*c66ec88fSEmmanuel Vadot #define PCLK_IRDA		64
80*c66ec88fSEmmanuel Vadot #define PCLK_PCM1		65
81*c66ec88fSEmmanuel Vadot #define PCLK_PCM0		66
82*c66ec88fSEmmanuel Vadot #define PCLK_PWM		67
83*c66ec88fSEmmanuel Vadot #define PCLK_RTC		68
84*c66ec88fSEmmanuel Vadot #define PCLK_WDT		69
85*c66ec88fSEmmanuel Vadot #define PCLK_UART3		70
86*c66ec88fSEmmanuel Vadot #define PCLK_UART2		71
87*c66ec88fSEmmanuel Vadot #define PCLK_UART1		72
88*c66ec88fSEmmanuel Vadot #define PCLK_UART0		73
89*c66ec88fSEmmanuel Vadot #define PCLK_MFC		74
90*c66ec88fSEmmanuel Vadot 
91*c66ec88fSEmmanuel Vadot /* Special clocks. */
92*c66ec88fSEmmanuel Vadot #define SCLK_UHOST		80
93*c66ec88fSEmmanuel Vadot #define SCLK_MMC2_48		81
94*c66ec88fSEmmanuel Vadot #define SCLK_MMC1_48		82
95*c66ec88fSEmmanuel Vadot #define SCLK_MMC0_48		83
96*c66ec88fSEmmanuel Vadot #define SCLK_MMC2		84
97*c66ec88fSEmmanuel Vadot #define SCLK_MMC1		85
98*c66ec88fSEmmanuel Vadot #define SCLK_MMC0		86
99*c66ec88fSEmmanuel Vadot #define SCLK_SPI1_48		87
100*c66ec88fSEmmanuel Vadot #define SCLK_SPI0_48		88
101*c66ec88fSEmmanuel Vadot #define SCLK_SPI1		89
102*c66ec88fSEmmanuel Vadot #define SCLK_SPI0		90
103*c66ec88fSEmmanuel Vadot #define SCLK_DAC27		91
104*c66ec88fSEmmanuel Vadot #define SCLK_TV27		92
105*c66ec88fSEmmanuel Vadot #define SCLK_SCALER27		93
106*c66ec88fSEmmanuel Vadot #define SCLK_SCALER		94
107*c66ec88fSEmmanuel Vadot #define SCLK_LCD27		95
108*c66ec88fSEmmanuel Vadot #define SCLK_LCD		96
109*c66ec88fSEmmanuel Vadot #define SCLK_FIMC		97
110*c66ec88fSEmmanuel Vadot #define SCLK_POST0_27		98
111*c66ec88fSEmmanuel Vadot #define SCLK_AUDIO2		99
112*c66ec88fSEmmanuel Vadot #define SCLK_POST0		100
113*c66ec88fSEmmanuel Vadot #define SCLK_AUDIO1		101
114*c66ec88fSEmmanuel Vadot #define SCLK_AUDIO0		102
115*c66ec88fSEmmanuel Vadot #define SCLK_SECUR		103
116*c66ec88fSEmmanuel Vadot #define SCLK_IRDA		104
117*c66ec88fSEmmanuel Vadot #define SCLK_UART		105
118*c66ec88fSEmmanuel Vadot #define SCLK_MFC		106
119*c66ec88fSEmmanuel Vadot #define SCLK_CAM		107
120*c66ec88fSEmmanuel Vadot #define SCLK_JPEG		108
121*c66ec88fSEmmanuel Vadot #define SCLK_ONENAND		109
122*c66ec88fSEmmanuel Vadot 
123*c66ec88fSEmmanuel Vadot /* MEM0 bus clocks - S3C6410-specific. */
124*c66ec88fSEmmanuel Vadot #define MEM0_CFCON		112
125*c66ec88fSEmmanuel Vadot #define MEM0_ONENAND1		113
126*c66ec88fSEmmanuel Vadot #define MEM0_ONENAND0		114
127*c66ec88fSEmmanuel Vadot #define MEM0_NFCON		115
128*c66ec88fSEmmanuel Vadot #define MEM0_SROM		116
129*c66ec88fSEmmanuel Vadot 
130*c66ec88fSEmmanuel Vadot /* Muxes. */
131*c66ec88fSEmmanuel Vadot #define MOUT_APLL		128
132*c66ec88fSEmmanuel Vadot #define MOUT_MPLL		129
133*c66ec88fSEmmanuel Vadot #define MOUT_EPLL		130
134*c66ec88fSEmmanuel Vadot #define MOUT_MFC		131
135*c66ec88fSEmmanuel Vadot #define MOUT_AUDIO0		132
136*c66ec88fSEmmanuel Vadot #define MOUT_AUDIO1		133
137*c66ec88fSEmmanuel Vadot #define MOUT_UART		134
138*c66ec88fSEmmanuel Vadot #define MOUT_SPI0		135
139*c66ec88fSEmmanuel Vadot #define MOUT_SPI1		136
140*c66ec88fSEmmanuel Vadot #define MOUT_MMC0		137
141*c66ec88fSEmmanuel Vadot #define MOUT_MMC1		138
142*c66ec88fSEmmanuel Vadot #define MOUT_MMC2		139
143*c66ec88fSEmmanuel Vadot #define MOUT_UHOST		140
144*c66ec88fSEmmanuel Vadot #define MOUT_IRDA		141
145*c66ec88fSEmmanuel Vadot #define MOUT_LCD		142
146*c66ec88fSEmmanuel Vadot #define MOUT_SCALER		143
147*c66ec88fSEmmanuel Vadot #define MOUT_DAC27		144
148*c66ec88fSEmmanuel Vadot #define MOUT_TV27		145
149*c66ec88fSEmmanuel Vadot #define MOUT_AUDIO2		146
150*c66ec88fSEmmanuel Vadot 
151*c66ec88fSEmmanuel Vadot /* Dividers. */
152*c66ec88fSEmmanuel Vadot #define DOUT_MPLL		160
153*c66ec88fSEmmanuel Vadot #define DOUT_SECUR		161
154*c66ec88fSEmmanuel Vadot #define DOUT_CAM		162
155*c66ec88fSEmmanuel Vadot #define DOUT_JPEG		163
156*c66ec88fSEmmanuel Vadot #define DOUT_MFC		164
157*c66ec88fSEmmanuel Vadot #define DOUT_MMC0		165
158*c66ec88fSEmmanuel Vadot #define DOUT_MMC1		166
159*c66ec88fSEmmanuel Vadot #define DOUT_MMC2		167
160*c66ec88fSEmmanuel Vadot #define DOUT_LCD		168
161*c66ec88fSEmmanuel Vadot #define DOUT_SCALER		169
162*c66ec88fSEmmanuel Vadot #define DOUT_UHOST		170
163*c66ec88fSEmmanuel Vadot #define DOUT_SPI0		171
164*c66ec88fSEmmanuel Vadot #define DOUT_SPI1		172
165*c66ec88fSEmmanuel Vadot #define DOUT_AUDIO0		173
166*c66ec88fSEmmanuel Vadot #define DOUT_AUDIO1		174
167*c66ec88fSEmmanuel Vadot #define DOUT_UART		175
168*c66ec88fSEmmanuel Vadot #define DOUT_IRDA		176
169*c66ec88fSEmmanuel Vadot #define DOUT_FIMC		177
170*c66ec88fSEmmanuel Vadot #define DOUT_AUDIO2		178
171*c66ec88fSEmmanuel Vadot 
172*c66ec88fSEmmanuel Vadot /* Total number of clocks. */
173*c66ec88fSEmmanuel Vadot #define NR_CLKS			(DOUT_AUDIO2 + 1)
174*c66ec88fSEmmanuel Vadot 
175*c66ec88fSEmmanuel Vadot #endif /* _DT_BINDINGS_CLOCK_SAMSUNG_S3C64XX_CLOCK_H */
176