1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0-only 2*f126890aSEmmanuel Vadot/* 3*f126890aSEmmanuel Vadot * Device Tree Source for AM43xx clock data 4*f126890aSEmmanuel Vadot * 5*f126890aSEmmanuel Vadot * Copyright (C) 2013 Texas Instruments, Inc. 6*f126890aSEmmanuel Vadot */ 7*f126890aSEmmanuel Vadot&scm_clocks { 8*f126890aSEmmanuel Vadot sys_clkin_ck: clock-sys-clkin-31@40 { 9*f126890aSEmmanuel Vadot #clock-cells = <0>; 10*f126890aSEmmanuel Vadot compatible = "ti,mux-clock"; 11*f126890aSEmmanuel Vadot clock-output-names = "sys_clkin_ck"; 12*f126890aSEmmanuel Vadot clocks = <&sysboot_freq_sel_ck>, <&crystal_freq_sel_ck>; 13*f126890aSEmmanuel Vadot ti,bit-shift = <31>; 14*f126890aSEmmanuel Vadot reg = <0x0040>; 15*f126890aSEmmanuel Vadot }; 16*f126890aSEmmanuel Vadot 17*f126890aSEmmanuel Vadot crystal_freq_sel_ck: clock-crystal-freq-sel-29@40 { 18*f126890aSEmmanuel Vadot #clock-cells = <0>; 19*f126890aSEmmanuel Vadot compatible = "ti,mux-clock"; 20*f126890aSEmmanuel Vadot clock-output-names = "crystal_freq_sel_ck"; 21*f126890aSEmmanuel Vadot clocks = <&virt_19200000_ck>, <&virt_24000000_ck>, <&virt_25000000_ck>, <&virt_26000000_ck>; 22*f126890aSEmmanuel Vadot ti,bit-shift = <29>; 23*f126890aSEmmanuel Vadot reg = <0x0040>; 24*f126890aSEmmanuel Vadot }; 25*f126890aSEmmanuel Vadot 26*f126890aSEmmanuel Vadot sysboot_freq_sel_ck: clock-sysboot-freq-sel-22@44e10040 { 27*f126890aSEmmanuel Vadot #clock-cells = <0>; 28*f126890aSEmmanuel Vadot compatible = "ti,mux-clock"; 29*f126890aSEmmanuel Vadot clock-output-names = "sysboot_freq_sel_ck"; 30*f126890aSEmmanuel Vadot clocks = <&virt_19200000_ck>, <&virt_24000000_ck>, <&virt_25000000_ck>, <&virt_26000000_ck>; 31*f126890aSEmmanuel Vadot ti,bit-shift = <22>; 32*f126890aSEmmanuel Vadot reg = <0x0040>; 33*f126890aSEmmanuel Vadot }; 34*f126890aSEmmanuel Vadot 35*f126890aSEmmanuel Vadot adc_tsc_fck: clock-adc-tsc-fck { 36*f126890aSEmmanuel Vadot #clock-cells = <0>; 37*f126890aSEmmanuel Vadot compatible = "fixed-factor-clock"; 38*f126890aSEmmanuel Vadot clock-output-names = "adc_tsc_fck"; 39*f126890aSEmmanuel Vadot clocks = <&sys_clkin_ck>; 40*f126890aSEmmanuel Vadot clock-mult = <1>; 41*f126890aSEmmanuel Vadot clock-div = <1>; 42*f126890aSEmmanuel Vadot }; 43*f126890aSEmmanuel Vadot 44*f126890aSEmmanuel Vadot dcan0_fck: clock-dcan0-fck { 45*f126890aSEmmanuel Vadot #clock-cells = <0>; 46*f126890aSEmmanuel Vadot compatible = "fixed-factor-clock"; 47*f126890aSEmmanuel Vadot clock-output-names = "dcan0_fck"; 48*f126890aSEmmanuel Vadot clocks = <&sys_clkin_ck>; 49*f126890aSEmmanuel Vadot clock-mult = <1>; 50*f126890aSEmmanuel Vadot clock-div = <1>; 51*f126890aSEmmanuel Vadot }; 52*f126890aSEmmanuel Vadot 53*f126890aSEmmanuel Vadot dcan1_fck: clock-dcan1-fck { 54*f126890aSEmmanuel Vadot #clock-cells = <0>; 55*f126890aSEmmanuel Vadot compatible = "fixed-factor-clock"; 56*f126890aSEmmanuel Vadot clock-output-names = "dcan1_fck"; 57*f126890aSEmmanuel Vadot clocks = <&sys_clkin_ck>; 58*f126890aSEmmanuel Vadot clock-mult = <1>; 59*f126890aSEmmanuel Vadot clock-div = <1>; 60*f126890aSEmmanuel Vadot }; 61*f126890aSEmmanuel Vadot 62*f126890aSEmmanuel Vadot mcasp0_fck: clock-mcasp0-fck { 63*f126890aSEmmanuel Vadot #clock-cells = <0>; 64*f126890aSEmmanuel Vadot compatible = "fixed-factor-clock"; 65*f126890aSEmmanuel Vadot clock-output-names = "mcasp0_fck"; 66*f126890aSEmmanuel Vadot clocks = <&sys_clkin_ck>; 67*f126890aSEmmanuel Vadot clock-mult = <1>; 68*f126890aSEmmanuel Vadot clock-div = <1>; 69*f126890aSEmmanuel Vadot }; 70*f126890aSEmmanuel Vadot 71*f126890aSEmmanuel Vadot mcasp1_fck: clock-mcasp1-fck { 72*f126890aSEmmanuel Vadot #clock-cells = <0>; 73*f126890aSEmmanuel Vadot compatible = "fixed-factor-clock"; 74*f126890aSEmmanuel Vadot clock-output-names = "mcasp1_fck"; 75*f126890aSEmmanuel Vadot clocks = <&sys_clkin_ck>; 76*f126890aSEmmanuel Vadot clock-mult = <1>; 77*f126890aSEmmanuel Vadot clock-div = <1>; 78*f126890aSEmmanuel Vadot }; 79*f126890aSEmmanuel Vadot 80*f126890aSEmmanuel Vadot smartreflex0_fck: clock-smartreflex0-fck { 81*f126890aSEmmanuel Vadot #clock-cells = <0>; 82*f126890aSEmmanuel Vadot compatible = "fixed-factor-clock"; 83*f126890aSEmmanuel Vadot clock-output-names = "smartreflex0_fck"; 84*f126890aSEmmanuel Vadot clocks = <&sys_clkin_ck>; 85*f126890aSEmmanuel Vadot clock-mult = <1>; 86*f126890aSEmmanuel Vadot clock-div = <1>; 87*f126890aSEmmanuel Vadot }; 88*f126890aSEmmanuel Vadot 89*f126890aSEmmanuel Vadot smartreflex1_fck: clock-smartreflex1-fck { 90*f126890aSEmmanuel Vadot #clock-cells = <0>; 91*f126890aSEmmanuel Vadot compatible = "fixed-factor-clock"; 92*f126890aSEmmanuel Vadot clock-output-names = "smartreflex1_fck"; 93*f126890aSEmmanuel Vadot clocks = <&sys_clkin_ck>; 94*f126890aSEmmanuel Vadot clock-mult = <1>; 95*f126890aSEmmanuel Vadot clock-div = <1>; 96*f126890aSEmmanuel Vadot }; 97*f126890aSEmmanuel Vadot 98*f126890aSEmmanuel Vadot sha0_fck: clock-sha0-fck { 99*f126890aSEmmanuel Vadot #clock-cells = <0>; 100*f126890aSEmmanuel Vadot compatible = "fixed-factor-clock"; 101*f126890aSEmmanuel Vadot clock-output-names = "sha0_fck"; 102*f126890aSEmmanuel Vadot clocks = <&sys_clkin_ck>; 103*f126890aSEmmanuel Vadot clock-mult = <1>; 104*f126890aSEmmanuel Vadot clock-div = <1>; 105*f126890aSEmmanuel Vadot }; 106*f126890aSEmmanuel Vadot 107*f126890aSEmmanuel Vadot aes0_fck: clock-aes0-fck { 108*f126890aSEmmanuel Vadot #clock-cells = <0>; 109*f126890aSEmmanuel Vadot compatible = "fixed-factor-clock"; 110*f126890aSEmmanuel Vadot clock-output-names = "aes0_fck"; 111*f126890aSEmmanuel Vadot clocks = <&sys_clkin_ck>; 112*f126890aSEmmanuel Vadot clock-mult = <1>; 113*f126890aSEmmanuel Vadot clock-div = <1>; 114*f126890aSEmmanuel Vadot }; 115*f126890aSEmmanuel Vadot 116*f126890aSEmmanuel Vadot rng_fck: clock-rng-fck { 117*f126890aSEmmanuel Vadot #clock-cells = <0>; 118*f126890aSEmmanuel Vadot compatible = "fixed-factor-clock"; 119*f126890aSEmmanuel Vadot clock-output-names = "rng_fck"; 120*f126890aSEmmanuel Vadot clocks = <&sys_clkin_ck>; 121*f126890aSEmmanuel Vadot clock-mult = <1>; 122*f126890aSEmmanuel Vadot clock-div = <1>; 123*f126890aSEmmanuel Vadot }; 124*f126890aSEmmanuel Vadot 125*f126890aSEmmanuel Vadot ehrpwm0_tbclk: clock-ehrpwm0-tbclk-0@664 { 126*f126890aSEmmanuel Vadot #clock-cells = <0>; 127*f126890aSEmmanuel Vadot compatible = "ti,gate-clock"; 128*f126890aSEmmanuel Vadot clock-output-names = "ehrpwm0_tbclk"; 129*f126890aSEmmanuel Vadot clocks = <&l4ls_gclk>; 130*f126890aSEmmanuel Vadot ti,bit-shift = <0>; 131*f126890aSEmmanuel Vadot reg = <0x0664>; 132*f126890aSEmmanuel Vadot }; 133*f126890aSEmmanuel Vadot 134*f126890aSEmmanuel Vadot ehrpwm1_tbclk: clock-ehrpwm1-tbclk-1@664 { 135*f126890aSEmmanuel Vadot #clock-cells = <0>; 136*f126890aSEmmanuel Vadot compatible = "ti,gate-clock"; 137*f126890aSEmmanuel Vadot clock-output-names = "ehrpwm1_tbclk"; 138*f126890aSEmmanuel Vadot clocks = <&l4ls_gclk>; 139*f126890aSEmmanuel Vadot ti,bit-shift = <1>; 140*f126890aSEmmanuel Vadot reg = <0x0664>; 141*f126890aSEmmanuel Vadot }; 142*f126890aSEmmanuel Vadot 143*f126890aSEmmanuel Vadot ehrpwm2_tbclk: clock-ehrpwm2-tbclk-2@664 { 144*f126890aSEmmanuel Vadot #clock-cells = <0>; 145*f126890aSEmmanuel Vadot compatible = "ti,gate-clock"; 146*f126890aSEmmanuel Vadot clock-output-names = "ehrpwm2_tbclk"; 147*f126890aSEmmanuel Vadot clocks = <&l4ls_gclk>; 148*f126890aSEmmanuel Vadot ti,bit-shift = <2>; 149*f126890aSEmmanuel Vadot reg = <0x0664>; 150*f126890aSEmmanuel Vadot }; 151*f126890aSEmmanuel Vadot 152*f126890aSEmmanuel Vadot ehrpwm3_tbclk: clock-ehrpwm3-tbclk-4@664 { 153*f126890aSEmmanuel Vadot #clock-cells = <0>; 154*f126890aSEmmanuel Vadot compatible = "ti,gate-clock"; 155*f126890aSEmmanuel Vadot clock-output-names = "ehrpwm3_tbclk"; 156*f126890aSEmmanuel Vadot clocks = <&l4ls_gclk>; 157*f126890aSEmmanuel Vadot ti,bit-shift = <4>; 158*f126890aSEmmanuel Vadot reg = <0x0664>; 159*f126890aSEmmanuel Vadot }; 160*f126890aSEmmanuel Vadot 161*f126890aSEmmanuel Vadot ehrpwm4_tbclk: clock-ehrpwm4-tbclk-5@664 { 162*f126890aSEmmanuel Vadot #clock-cells = <0>; 163*f126890aSEmmanuel Vadot compatible = "ti,gate-clock"; 164*f126890aSEmmanuel Vadot clock-output-names = "ehrpwm4_tbclk"; 165*f126890aSEmmanuel Vadot clocks = <&l4ls_gclk>; 166*f126890aSEmmanuel Vadot ti,bit-shift = <5>; 167*f126890aSEmmanuel Vadot reg = <0x0664>; 168*f126890aSEmmanuel Vadot }; 169*f126890aSEmmanuel Vadot 170*f126890aSEmmanuel Vadot ehrpwm5_tbclk: clock-ehrpwm5-tbclk-6@664 { 171*f126890aSEmmanuel Vadot #clock-cells = <0>; 172*f126890aSEmmanuel Vadot compatible = "ti,gate-clock"; 173*f126890aSEmmanuel Vadot clock-output-names = "ehrpwm5_tbclk"; 174*f126890aSEmmanuel Vadot clocks = <&l4ls_gclk>; 175*f126890aSEmmanuel Vadot ti,bit-shift = <6>; 176*f126890aSEmmanuel Vadot reg = <0x0664>; 177*f126890aSEmmanuel Vadot }; 178*f126890aSEmmanuel Vadot}; 179*f126890aSEmmanuel Vadot&prcm_clocks { 180*f126890aSEmmanuel Vadot clk_32768_ck: clock-clk-32768 { 181*f126890aSEmmanuel Vadot #clock-cells = <0>; 182*f126890aSEmmanuel Vadot compatible = "fixed-clock"; 183*f126890aSEmmanuel Vadot clock-output-names = "clk_32768_ck"; 184*f126890aSEmmanuel Vadot clock-frequency = <32768>; 185*f126890aSEmmanuel Vadot }; 186*f126890aSEmmanuel Vadot 187*f126890aSEmmanuel Vadot clk_rc32k_ck: clock-clk-rc32k { 188*f126890aSEmmanuel Vadot #clock-cells = <0>; 189*f126890aSEmmanuel Vadot compatible = "fixed-clock"; 190*f126890aSEmmanuel Vadot clock-output-names = "clk_rc32k_ck"; 191*f126890aSEmmanuel Vadot clock-frequency = <32768>; 192*f126890aSEmmanuel Vadot }; 193*f126890aSEmmanuel Vadot 194*f126890aSEmmanuel Vadot virt_19200000_ck: clock-virt-19200000 { 195*f126890aSEmmanuel Vadot #clock-cells = <0>; 196*f126890aSEmmanuel Vadot compatible = "fixed-clock"; 197*f126890aSEmmanuel Vadot clock-output-names = "virt_19200000_ck"; 198*f126890aSEmmanuel Vadot clock-frequency = <19200000>; 199*f126890aSEmmanuel Vadot }; 200*f126890aSEmmanuel Vadot 201*f126890aSEmmanuel Vadot virt_24000000_ck: clock-virt-24000000 { 202*f126890aSEmmanuel Vadot #clock-cells = <0>; 203*f126890aSEmmanuel Vadot compatible = "fixed-clock"; 204*f126890aSEmmanuel Vadot clock-output-names = "virt_24000000_ck"; 205*f126890aSEmmanuel Vadot clock-frequency = <24000000>; 206*f126890aSEmmanuel Vadot }; 207*f126890aSEmmanuel Vadot 208*f126890aSEmmanuel Vadot virt_25000000_ck: clock-virt-25000000 { 209*f126890aSEmmanuel Vadot #clock-cells = <0>; 210*f126890aSEmmanuel Vadot compatible = "fixed-clock"; 211*f126890aSEmmanuel Vadot clock-output-names = "virt_25000000_ck"; 212*f126890aSEmmanuel Vadot clock-frequency = <25000000>; 213*f126890aSEmmanuel Vadot }; 214*f126890aSEmmanuel Vadot 215*f126890aSEmmanuel Vadot virt_26000000_ck: clock-virt-26000000 { 216*f126890aSEmmanuel Vadot #clock-cells = <0>; 217*f126890aSEmmanuel Vadot compatible = "fixed-clock"; 218*f126890aSEmmanuel Vadot clock-output-names = "virt_26000000_ck"; 219*f126890aSEmmanuel Vadot clock-frequency = <26000000>; 220*f126890aSEmmanuel Vadot }; 221*f126890aSEmmanuel Vadot 222*f126890aSEmmanuel Vadot tclkin_ck: clock-tclkin { 223*f126890aSEmmanuel Vadot #clock-cells = <0>; 224*f126890aSEmmanuel Vadot compatible = "fixed-clock"; 225*f126890aSEmmanuel Vadot clock-output-names = "tclkin_ck"; 226*f126890aSEmmanuel Vadot clock-frequency = <26000000>; 227*f126890aSEmmanuel Vadot }; 228*f126890aSEmmanuel Vadot 229*f126890aSEmmanuel Vadot dpll_core_ck: clock@2d20 { 230*f126890aSEmmanuel Vadot #clock-cells = <0>; 231*f126890aSEmmanuel Vadot compatible = "ti,am3-dpll-core-clock"; 232*f126890aSEmmanuel Vadot clock-output-names = "dpll_core_ck"; 233*f126890aSEmmanuel Vadot clocks = <&sys_clkin_ck>, <&sys_clkin_ck>; 234*f126890aSEmmanuel Vadot reg = <0x2d20>, <0x2d24>, <0x2d2c>, <0x2d48>, <0x2d4c>; 235*f126890aSEmmanuel Vadot }; 236*f126890aSEmmanuel Vadot 237*f126890aSEmmanuel Vadot dpll_core_x2_ck: clock-dpll-core-x2 { 238*f126890aSEmmanuel Vadot #clock-cells = <0>; 239*f126890aSEmmanuel Vadot compatible = "ti,am3-dpll-x2-clock"; 240*f126890aSEmmanuel Vadot clock-output-names = "dpll_core_x2_ck"; 241*f126890aSEmmanuel Vadot clocks = <&dpll_core_ck>; 242*f126890aSEmmanuel Vadot }; 243*f126890aSEmmanuel Vadot 244*f126890aSEmmanuel Vadot dpll_core_m4_ck: clock-dpll-core-m4-8@2d38 { 245*f126890aSEmmanuel Vadot #clock-cells = <0>; 246*f126890aSEmmanuel Vadot compatible = "ti,divider-clock"; 247*f126890aSEmmanuel Vadot clock-output-names = "dpll_core_m4_ck"; 248*f126890aSEmmanuel Vadot clocks = <&dpll_core_x2_ck>; 249*f126890aSEmmanuel Vadot ti,max-div = <31>; 250*f126890aSEmmanuel Vadot ti,autoidle-shift = <8>; 251*f126890aSEmmanuel Vadot reg = <0x2d38>; 252*f126890aSEmmanuel Vadot ti,index-starts-at-one; 253*f126890aSEmmanuel Vadot ti,invert-autoidle-bit; 254*f126890aSEmmanuel Vadot }; 255*f126890aSEmmanuel Vadot 256*f126890aSEmmanuel Vadot dpll_core_m5_ck: clock-dpll-core-m5-8@2d3c { 257*f126890aSEmmanuel Vadot #clock-cells = <0>; 258*f126890aSEmmanuel Vadot compatible = "ti,divider-clock"; 259*f126890aSEmmanuel Vadot clock-output-names = "dpll_core_m5_ck"; 260*f126890aSEmmanuel Vadot clocks = <&dpll_core_x2_ck>; 261*f126890aSEmmanuel Vadot ti,max-div = <31>; 262*f126890aSEmmanuel Vadot ti,autoidle-shift = <8>; 263*f126890aSEmmanuel Vadot reg = <0x2d3c>; 264*f126890aSEmmanuel Vadot ti,index-starts-at-one; 265*f126890aSEmmanuel Vadot ti,invert-autoidle-bit; 266*f126890aSEmmanuel Vadot }; 267*f126890aSEmmanuel Vadot 268*f126890aSEmmanuel Vadot dpll_core_m6_ck: clock-dpll-core-m6-8@2d40 { 269*f126890aSEmmanuel Vadot #clock-cells = <0>; 270*f126890aSEmmanuel Vadot compatible = "ti,divider-clock"; 271*f126890aSEmmanuel Vadot clock-output-names = "dpll_core_m6_ck"; 272*f126890aSEmmanuel Vadot clocks = <&dpll_core_x2_ck>; 273*f126890aSEmmanuel Vadot ti,max-div = <31>; 274*f126890aSEmmanuel Vadot ti,autoidle-shift = <8>; 275*f126890aSEmmanuel Vadot reg = <0x2d40>; 276*f126890aSEmmanuel Vadot ti,index-starts-at-one; 277*f126890aSEmmanuel Vadot ti,invert-autoidle-bit; 278*f126890aSEmmanuel Vadot }; 279*f126890aSEmmanuel Vadot 280*f126890aSEmmanuel Vadot dpll_mpu_ck: clock@2d60 { 281*f126890aSEmmanuel Vadot #clock-cells = <0>; 282*f126890aSEmmanuel Vadot compatible = "ti,am3-dpll-clock"; 283*f126890aSEmmanuel Vadot clock-output-names = "dpll_mpu_ck"; 284*f126890aSEmmanuel Vadot clocks = <&sys_clkin_ck>, <&sys_clkin_ck>; 285*f126890aSEmmanuel Vadot reg = <0x2d60>, <0x2d64>, <0x2d6c>, <0x2d88>, <0x2d8c>; 286*f126890aSEmmanuel Vadot }; 287*f126890aSEmmanuel Vadot 288*f126890aSEmmanuel Vadot dpll_mpu_m2_ck: clock-dpll-mpu-m2-8@2d70 { 289*f126890aSEmmanuel Vadot #clock-cells = <0>; 290*f126890aSEmmanuel Vadot compatible = "ti,divider-clock"; 291*f126890aSEmmanuel Vadot clock-output-names = "dpll_mpu_m2_ck"; 292*f126890aSEmmanuel Vadot clocks = <&dpll_mpu_ck>; 293*f126890aSEmmanuel Vadot ti,max-div = <31>; 294*f126890aSEmmanuel Vadot ti,autoidle-shift = <8>; 295*f126890aSEmmanuel Vadot reg = <0x2d70>; 296*f126890aSEmmanuel Vadot ti,index-starts-at-one; 297*f126890aSEmmanuel Vadot ti,invert-autoidle-bit; 298*f126890aSEmmanuel Vadot }; 299*f126890aSEmmanuel Vadot 300*f126890aSEmmanuel Vadot mpu_periphclk: clock-mpu-periphclk { 301*f126890aSEmmanuel Vadot #clock-cells = <0>; 302*f126890aSEmmanuel Vadot compatible = "fixed-factor-clock"; 303*f126890aSEmmanuel Vadot clock-output-names = "mpu_periphclk"; 304*f126890aSEmmanuel Vadot clocks = <&dpll_mpu_m2_ck>; 305*f126890aSEmmanuel Vadot clock-mult = <1>; 306*f126890aSEmmanuel Vadot clock-div = <2>; 307*f126890aSEmmanuel Vadot }; 308*f126890aSEmmanuel Vadot 309*f126890aSEmmanuel Vadot dpll_ddr_ck: clock@2da0 { 310*f126890aSEmmanuel Vadot #clock-cells = <0>; 311*f126890aSEmmanuel Vadot compatible = "ti,am3-dpll-clock"; 312*f126890aSEmmanuel Vadot clock-output-names = "dpll_ddr_ck"; 313*f126890aSEmmanuel Vadot clocks = <&sys_clkin_ck>, <&sys_clkin_ck>; 314*f126890aSEmmanuel Vadot reg = <0x2da0>, <0x2da4>, <0x2dac>, <0x2dc8>, <0x2dcc>; 315*f126890aSEmmanuel Vadot }; 316*f126890aSEmmanuel Vadot 317*f126890aSEmmanuel Vadot dpll_ddr_m2_ck: clock-dpll-ddr-m2-8@2db0 { 318*f126890aSEmmanuel Vadot #clock-cells = <0>; 319*f126890aSEmmanuel Vadot compatible = "ti,divider-clock"; 320*f126890aSEmmanuel Vadot clock-output-names = "dpll_ddr_m2_ck"; 321*f126890aSEmmanuel Vadot clocks = <&dpll_ddr_ck>; 322*f126890aSEmmanuel Vadot ti,max-div = <31>; 323*f126890aSEmmanuel Vadot ti,autoidle-shift = <8>; 324*f126890aSEmmanuel Vadot reg = <0x2db0>; 325*f126890aSEmmanuel Vadot ti,index-starts-at-one; 326*f126890aSEmmanuel Vadot ti,invert-autoidle-bit; 327*f126890aSEmmanuel Vadot }; 328*f126890aSEmmanuel Vadot 329*f126890aSEmmanuel Vadot dpll_disp_ck: clock@2e20 { 330*f126890aSEmmanuel Vadot #clock-cells = <0>; 331*f126890aSEmmanuel Vadot compatible = "ti,am3-dpll-clock"; 332*f126890aSEmmanuel Vadot clock-output-names = "dpll_disp_ck"; 333*f126890aSEmmanuel Vadot clocks = <&sys_clkin_ck>, <&sys_clkin_ck>; 334*f126890aSEmmanuel Vadot reg = <0x2e20>, <0x2e24>, <0x2e2c>, <0x2e48>, <0x2e4c>; 335*f126890aSEmmanuel Vadot }; 336*f126890aSEmmanuel Vadot 337*f126890aSEmmanuel Vadot dpll_disp_m2_ck: clock-dpll-disp-m2-8@2e30 { 338*f126890aSEmmanuel Vadot #clock-cells = <0>; 339*f126890aSEmmanuel Vadot compatible = "ti,divider-clock"; 340*f126890aSEmmanuel Vadot clock-output-names = "dpll_disp_m2_ck"; 341*f126890aSEmmanuel Vadot clocks = <&dpll_disp_ck>; 342*f126890aSEmmanuel Vadot ti,max-div = <31>; 343*f126890aSEmmanuel Vadot ti,autoidle-shift = <8>; 344*f126890aSEmmanuel Vadot reg = <0x2e30>; 345*f126890aSEmmanuel Vadot ti,index-starts-at-one; 346*f126890aSEmmanuel Vadot ti,invert-autoidle-bit; 347*f126890aSEmmanuel Vadot ti,set-rate-parent; 348*f126890aSEmmanuel Vadot }; 349*f126890aSEmmanuel Vadot 350*f126890aSEmmanuel Vadot dpll_per_ck: clock@2de0 { 351*f126890aSEmmanuel Vadot #clock-cells = <0>; 352*f126890aSEmmanuel Vadot compatible = "ti,am3-dpll-j-type-clock"; 353*f126890aSEmmanuel Vadot clock-output-names = "dpll_per_ck"; 354*f126890aSEmmanuel Vadot clocks = <&sys_clkin_ck>, <&sys_clkin_ck>; 355*f126890aSEmmanuel Vadot reg = <0x2de0>, <0x2de4>, <0x2dec>, <0x2e08>, <0x2e0c>; 356*f126890aSEmmanuel Vadot }; 357*f126890aSEmmanuel Vadot 358*f126890aSEmmanuel Vadot dpll_per_m2_ck: clock-dpll-per-m2-8@2df0 { 359*f126890aSEmmanuel Vadot #clock-cells = <0>; 360*f126890aSEmmanuel Vadot compatible = "ti,divider-clock"; 361*f126890aSEmmanuel Vadot clock-output-names = "dpll_per_m2_ck"; 362*f126890aSEmmanuel Vadot clocks = <&dpll_per_ck>; 363*f126890aSEmmanuel Vadot ti,max-div = <127>; 364*f126890aSEmmanuel Vadot ti,autoidle-shift = <8>; 365*f126890aSEmmanuel Vadot reg = <0x2df0>; 366*f126890aSEmmanuel Vadot ti,index-starts-at-one; 367*f126890aSEmmanuel Vadot ti,invert-autoidle-bit; 368*f126890aSEmmanuel Vadot }; 369*f126890aSEmmanuel Vadot 370*f126890aSEmmanuel Vadot dpll_per_m2_div4_wkupdm_ck: clock-dpll-per-m2-div4-wkupdm { 371*f126890aSEmmanuel Vadot #clock-cells = <0>; 372*f126890aSEmmanuel Vadot compatible = "fixed-factor-clock"; 373*f126890aSEmmanuel Vadot clock-output-names = "dpll_per_m2_div4_wkupdm_ck"; 374*f126890aSEmmanuel Vadot clocks = <&dpll_per_m2_ck>; 375*f126890aSEmmanuel Vadot clock-mult = <1>; 376*f126890aSEmmanuel Vadot clock-div = <4>; 377*f126890aSEmmanuel Vadot }; 378*f126890aSEmmanuel Vadot 379*f126890aSEmmanuel Vadot dpll_per_m2_div4_ck: clock-dpll-per-m2-div4 { 380*f126890aSEmmanuel Vadot #clock-cells = <0>; 381*f126890aSEmmanuel Vadot compatible = "fixed-factor-clock"; 382*f126890aSEmmanuel Vadot clock-output-names = "dpll_per_m2_div4_ck"; 383*f126890aSEmmanuel Vadot clocks = <&dpll_per_m2_ck>; 384*f126890aSEmmanuel Vadot clock-mult = <1>; 385*f126890aSEmmanuel Vadot clock-div = <4>; 386*f126890aSEmmanuel Vadot }; 387*f126890aSEmmanuel Vadot 388*f126890aSEmmanuel Vadot clk_24mhz: clock-clk-24mhz { 389*f126890aSEmmanuel Vadot #clock-cells = <0>; 390*f126890aSEmmanuel Vadot compatible = "fixed-factor-clock"; 391*f126890aSEmmanuel Vadot clock-output-names = "clk_24mhz"; 392*f126890aSEmmanuel Vadot clocks = <&dpll_per_m2_ck>; 393*f126890aSEmmanuel Vadot clock-mult = <1>; 394*f126890aSEmmanuel Vadot clock-div = <8>; 395*f126890aSEmmanuel Vadot }; 396*f126890aSEmmanuel Vadot 397*f126890aSEmmanuel Vadot clkdiv32k_ck: clock-clkdiv32k { 398*f126890aSEmmanuel Vadot #clock-cells = <0>; 399*f126890aSEmmanuel Vadot compatible = "fixed-factor-clock"; 400*f126890aSEmmanuel Vadot clock-output-names = "clkdiv32k_ck"; 401*f126890aSEmmanuel Vadot clocks = <&clk_24mhz>; 402*f126890aSEmmanuel Vadot clock-mult = <1>; 403*f126890aSEmmanuel Vadot clock-div = <732>; 404*f126890aSEmmanuel Vadot }; 405*f126890aSEmmanuel Vadot 406*f126890aSEmmanuel Vadot clkdiv32k_ick: clock-clkdiv32k-ick-8@2a38 { 407*f126890aSEmmanuel Vadot #clock-cells = <0>; 408*f126890aSEmmanuel Vadot compatible = "ti,gate-clock"; 409*f126890aSEmmanuel Vadot clock-output-names = "clkdiv32k_ick"; 410*f126890aSEmmanuel Vadot clocks = <&clkdiv32k_ck>; 411*f126890aSEmmanuel Vadot ti,bit-shift = <8>; 412*f126890aSEmmanuel Vadot reg = <0x2a38>; 413*f126890aSEmmanuel Vadot }; 414*f126890aSEmmanuel Vadot 415*f126890aSEmmanuel Vadot sysclk_div: clock-sysclk-div { 416*f126890aSEmmanuel Vadot #clock-cells = <0>; 417*f126890aSEmmanuel Vadot compatible = "fixed-factor-clock"; 418*f126890aSEmmanuel Vadot clock-output-names = "sysclk_div"; 419*f126890aSEmmanuel Vadot clocks = <&dpll_core_m4_ck>; 420*f126890aSEmmanuel Vadot clock-mult = <1>; 421*f126890aSEmmanuel Vadot clock-div = <1>; 422*f126890aSEmmanuel Vadot }; 423*f126890aSEmmanuel Vadot 424*f126890aSEmmanuel Vadot pruss_ocp_gclk: clock-pruss-ocp-gclk@4248 { 425*f126890aSEmmanuel Vadot #clock-cells = <0>; 426*f126890aSEmmanuel Vadot compatible = "ti,mux-clock"; 427*f126890aSEmmanuel Vadot clock-output-names = "pruss_ocp_gclk"; 428*f126890aSEmmanuel Vadot clocks = <&sysclk_div>, <&dpll_disp_m2_ck>; 429*f126890aSEmmanuel Vadot reg = <0x4248>; 430*f126890aSEmmanuel Vadot }; 431*f126890aSEmmanuel Vadot 432*f126890aSEmmanuel Vadot clk_32k_tpm_ck: clock-clk-32k-tpm { 433*f126890aSEmmanuel Vadot #clock-cells = <0>; 434*f126890aSEmmanuel Vadot compatible = "fixed-clock"; 435*f126890aSEmmanuel Vadot clock-output-names = "clk_32k_tpm_ck"; 436*f126890aSEmmanuel Vadot clock-frequency = <32768>; 437*f126890aSEmmanuel Vadot }; 438*f126890aSEmmanuel Vadot 439*f126890aSEmmanuel Vadot timer1_fck: clock-timer1-fck@4200 { 440*f126890aSEmmanuel Vadot #clock-cells = <0>; 441*f126890aSEmmanuel Vadot compatible = "ti,mux-clock"; 442*f126890aSEmmanuel Vadot clock-output-names = "timer1_fck"; 443*f126890aSEmmanuel Vadot clocks = <&sys_clkin_ck>, <&clkdiv32k_ick>, <&tclkin_ck>, <&clk_rc32k_ck>, <&clk_32768_ck>, <&clk_32k_tpm_ck>; 444*f126890aSEmmanuel Vadot reg = <0x4200>; 445*f126890aSEmmanuel Vadot }; 446*f126890aSEmmanuel Vadot 447*f126890aSEmmanuel Vadot timer2_fck: clock-timer2-fck@4204 { 448*f126890aSEmmanuel Vadot #clock-cells = <0>; 449*f126890aSEmmanuel Vadot compatible = "ti,mux-clock"; 450*f126890aSEmmanuel Vadot clock-output-names = "timer2_fck"; 451*f126890aSEmmanuel Vadot clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>; 452*f126890aSEmmanuel Vadot reg = <0x4204>; 453*f126890aSEmmanuel Vadot }; 454*f126890aSEmmanuel Vadot 455*f126890aSEmmanuel Vadot timer3_fck: clock-timer3-fck@4208 { 456*f126890aSEmmanuel Vadot #clock-cells = <0>; 457*f126890aSEmmanuel Vadot compatible = "ti,mux-clock"; 458*f126890aSEmmanuel Vadot clock-output-names = "timer3_fck"; 459*f126890aSEmmanuel Vadot clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>; 460*f126890aSEmmanuel Vadot reg = <0x4208>; 461*f126890aSEmmanuel Vadot }; 462*f126890aSEmmanuel Vadot 463*f126890aSEmmanuel Vadot timer4_fck: clock-timer4-fck@420c { 464*f126890aSEmmanuel Vadot #clock-cells = <0>; 465*f126890aSEmmanuel Vadot compatible = "ti,mux-clock"; 466*f126890aSEmmanuel Vadot clock-output-names = "timer4_fck"; 467*f126890aSEmmanuel Vadot clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>; 468*f126890aSEmmanuel Vadot reg = <0x420c>; 469*f126890aSEmmanuel Vadot }; 470*f126890aSEmmanuel Vadot 471*f126890aSEmmanuel Vadot timer5_fck: clock-timer5-fck@4210 { 472*f126890aSEmmanuel Vadot #clock-cells = <0>; 473*f126890aSEmmanuel Vadot compatible = "ti,mux-clock"; 474*f126890aSEmmanuel Vadot clock-output-names = "timer5_fck"; 475*f126890aSEmmanuel Vadot clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>; 476*f126890aSEmmanuel Vadot reg = <0x4210>; 477*f126890aSEmmanuel Vadot }; 478*f126890aSEmmanuel Vadot 479*f126890aSEmmanuel Vadot timer6_fck: clock-timer6-fck@4214 { 480*f126890aSEmmanuel Vadot #clock-cells = <0>; 481*f126890aSEmmanuel Vadot compatible = "ti,mux-clock"; 482*f126890aSEmmanuel Vadot clock-output-names = "timer6_fck"; 483*f126890aSEmmanuel Vadot clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>; 484*f126890aSEmmanuel Vadot reg = <0x4214>; 485*f126890aSEmmanuel Vadot }; 486*f126890aSEmmanuel Vadot 487*f126890aSEmmanuel Vadot timer7_fck: clock-timer7-fck@4218 { 488*f126890aSEmmanuel Vadot #clock-cells = <0>; 489*f126890aSEmmanuel Vadot compatible = "ti,mux-clock"; 490*f126890aSEmmanuel Vadot clock-output-names = "timer7_fck"; 491*f126890aSEmmanuel Vadot clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>; 492*f126890aSEmmanuel Vadot reg = <0x4218>; 493*f126890aSEmmanuel Vadot }; 494*f126890aSEmmanuel Vadot 495*f126890aSEmmanuel Vadot wdt1_fck: clock-wdt1-fck@422c { 496*f126890aSEmmanuel Vadot #clock-cells = <0>; 497*f126890aSEmmanuel Vadot compatible = "ti,mux-clock"; 498*f126890aSEmmanuel Vadot clock-output-names = "wdt1_fck"; 499*f126890aSEmmanuel Vadot clocks = <&clk_rc32k_ck>, <&clkdiv32k_ick>; 500*f126890aSEmmanuel Vadot reg = <0x422c>; 501*f126890aSEmmanuel Vadot }; 502*f126890aSEmmanuel Vadot 503*f126890aSEmmanuel Vadot adc_mag_fck: adc_mag_fck@424c { 504*f126890aSEmmanuel Vadot #clock-cells = <0>; 505*f126890aSEmmanuel Vadot compatible = "ti,mux-clock"; 506*f126890aSEmmanuel Vadot clocks = <&sys_clkin_ck>, <&dpll_per_m2_ck>; 507*f126890aSEmmanuel Vadot reg = <0x424c>; 508*f126890aSEmmanuel Vadot }; 509*f126890aSEmmanuel Vadot 510*f126890aSEmmanuel Vadot l3_gclk: clock-l3-gclk { 511*f126890aSEmmanuel Vadot #clock-cells = <0>; 512*f126890aSEmmanuel Vadot compatible = "fixed-factor-clock"; 513*f126890aSEmmanuel Vadot clock-output-names = "l3_gclk"; 514*f126890aSEmmanuel Vadot clocks = <&dpll_core_m4_ck>; 515*f126890aSEmmanuel Vadot clock-mult = <1>; 516*f126890aSEmmanuel Vadot clock-div = <1>; 517*f126890aSEmmanuel Vadot }; 518*f126890aSEmmanuel Vadot 519*f126890aSEmmanuel Vadot dpll_core_m4_div2_ck: clock-dpll-core-m4-div2 { 520*f126890aSEmmanuel Vadot #clock-cells = <0>; 521*f126890aSEmmanuel Vadot compatible = "fixed-factor-clock"; 522*f126890aSEmmanuel Vadot clock-output-names = "dpll_core_m4_div2_ck"; 523*f126890aSEmmanuel Vadot clocks = <&sysclk_div>; 524*f126890aSEmmanuel Vadot clock-mult = <1>; 525*f126890aSEmmanuel Vadot clock-div = <2>; 526*f126890aSEmmanuel Vadot }; 527*f126890aSEmmanuel Vadot 528*f126890aSEmmanuel Vadot l4hs_gclk: clock-l4hs-gclk { 529*f126890aSEmmanuel Vadot #clock-cells = <0>; 530*f126890aSEmmanuel Vadot compatible = "fixed-factor-clock"; 531*f126890aSEmmanuel Vadot clock-output-names = "l4hs_gclk"; 532*f126890aSEmmanuel Vadot clocks = <&dpll_core_m4_ck>; 533*f126890aSEmmanuel Vadot clock-mult = <1>; 534*f126890aSEmmanuel Vadot clock-div = <1>; 535*f126890aSEmmanuel Vadot }; 536*f126890aSEmmanuel Vadot 537*f126890aSEmmanuel Vadot l3s_gclk: clock-l3s-gclk { 538*f126890aSEmmanuel Vadot #clock-cells = <0>; 539*f126890aSEmmanuel Vadot compatible = "fixed-factor-clock"; 540*f126890aSEmmanuel Vadot clock-output-names = "l3s_gclk"; 541*f126890aSEmmanuel Vadot clocks = <&dpll_core_m4_div2_ck>; 542*f126890aSEmmanuel Vadot clock-mult = <1>; 543*f126890aSEmmanuel Vadot clock-div = <1>; 544*f126890aSEmmanuel Vadot }; 545*f126890aSEmmanuel Vadot 546*f126890aSEmmanuel Vadot l4ls_gclk: clock-l4ls-gclk { 547*f126890aSEmmanuel Vadot #clock-cells = <0>; 548*f126890aSEmmanuel Vadot compatible = "fixed-factor-clock"; 549*f126890aSEmmanuel Vadot clock-output-names = "l4ls_gclk"; 550*f126890aSEmmanuel Vadot clocks = <&dpll_core_m4_div2_ck>; 551*f126890aSEmmanuel Vadot clock-mult = <1>; 552*f126890aSEmmanuel Vadot clock-div = <1>; 553*f126890aSEmmanuel Vadot }; 554*f126890aSEmmanuel Vadot 555*f126890aSEmmanuel Vadot cpsw_125mhz_gclk: clock-cpsw-125mhz-gclk { 556*f126890aSEmmanuel Vadot #clock-cells = <0>; 557*f126890aSEmmanuel Vadot compatible = "fixed-factor-clock"; 558*f126890aSEmmanuel Vadot clock-output-names = "cpsw_125mhz_gclk"; 559*f126890aSEmmanuel Vadot clocks = <&dpll_core_m5_ck>; 560*f126890aSEmmanuel Vadot clock-mult = <1>; 561*f126890aSEmmanuel Vadot clock-div = <2>; 562*f126890aSEmmanuel Vadot }; 563*f126890aSEmmanuel Vadot 564*f126890aSEmmanuel Vadot cpsw_cpts_rft_clk: clock-cpsw-cpts-rft@4238 { 565*f126890aSEmmanuel Vadot #clock-cells = <0>; 566*f126890aSEmmanuel Vadot compatible = "ti,mux-clock"; 567*f126890aSEmmanuel Vadot clock-output-names = "cpsw_cpts_rft_clk"; 568*f126890aSEmmanuel Vadot clocks = <&sysclk_div>, <&dpll_core_m5_ck>, <&dpll_disp_m2_ck>; 569*f126890aSEmmanuel Vadot reg = <0x4238>; 570*f126890aSEmmanuel Vadot }; 571*f126890aSEmmanuel Vadot 572*f126890aSEmmanuel Vadot dpll_clksel_mac_clk: clock-dpll-clksel-mac-2@4234 { 573*f126890aSEmmanuel Vadot #clock-cells = <0>; 574*f126890aSEmmanuel Vadot compatible = "ti,divider-clock"; 575*f126890aSEmmanuel Vadot clock-output-names = "dpll_clksel_mac_clk"; 576*f126890aSEmmanuel Vadot clocks = <&dpll_core_m5_ck>; 577*f126890aSEmmanuel Vadot reg = <0x4234>; 578*f126890aSEmmanuel Vadot ti,bit-shift = <2>; 579*f126890aSEmmanuel Vadot ti,dividers = <2>, <5>; 580*f126890aSEmmanuel Vadot }; 581*f126890aSEmmanuel Vadot 582*f126890aSEmmanuel Vadot clk_32k_mosc_ck: clock-clk-32k-mosc { 583*f126890aSEmmanuel Vadot #clock-cells = <0>; 584*f126890aSEmmanuel Vadot compatible = "fixed-clock"; 585*f126890aSEmmanuel Vadot clock-output-names = "clk_32k_mosc_ck"; 586*f126890aSEmmanuel Vadot clock-frequency = <32768>; 587*f126890aSEmmanuel Vadot }; 588*f126890aSEmmanuel Vadot 589*f126890aSEmmanuel Vadot gpio0_dbclk_mux_ck: clock-gpio0-dbclk-mux@4240 { 590*f126890aSEmmanuel Vadot #clock-cells = <0>; 591*f126890aSEmmanuel Vadot compatible = "ti,mux-clock"; 592*f126890aSEmmanuel Vadot clock-output-names = "gpio0_dbclk_mux_ck"; 593*f126890aSEmmanuel Vadot clocks = <&clk_rc32k_ck>, <&clk_32768_ck>, <&clkdiv32k_ick>, <&clk_32k_mosc_ck>, <&clk_32k_tpm_ck>; 594*f126890aSEmmanuel Vadot reg = <0x4240>; 595*f126890aSEmmanuel Vadot }; 596*f126890aSEmmanuel Vadot 597*f126890aSEmmanuel Vadot mmc_clk: clock-mmc { 598*f126890aSEmmanuel Vadot #clock-cells = <0>; 599*f126890aSEmmanuel Vadot compatible = "fixed-factor-clock"; 600*f126890aSEmmanuel Vadot clock-output-names = "mmc_clk"; 601*f126890aSEmmanuel Vadot clocks = <&dpll_per_m2_ck>; 602*f126890aSEmmanuel Vadot clock-mult = <1>; 603*f126890aSEmmanuel Vadot clock-div = <2>; 604*f126890aSEmmanuel Vadot }; 605*f126890aSEmmanuel Vadot 606*f126890aSEmmanuel Vadot gfx_fclk_clksel_ck: clock-gfx-fclk-clksel-1@423c { 607*f126890aSEmmanuel Vadot #clock-cells = <0>; 608*f126890aSEmmanuel Vadot compatible = "ti,mux-clock"; 609*f126890aSEmmanuel Vadot clock-output-names = "gfx_fclk_clksel_ck"; 610*f126890aSEmmanuel Vadot clocks = <&sysclk_div>, <&dpll_per_m2_ck>; 611*f126890aSEmmanuel Vadot ti,bit-shift = <1>; 612*f126890aSEmmanuel Vadot reg = <0x423c>; 613*f126890aSEmmanuel Vadot }; 614*f126890aSEmmanuel Vadot 615*f126890aSEmmanuel Vadot gfx_fck_div_ck: clock-gfx-fck-div@423c { 616*f126890aSEmmanuel Vadot #clock-cells = <0>; 617*f126890aSEmmanuel Vadot compatible = "ti,divider-clock"; 618*f126890aSEmmanuel Vadot clock-output-names = "gfx_fck_div_ck"; 619*f126890aSEmmanuel Vadot clocks = <&gfx_fclk_clksel_ck>; 620*f126890aSEmmanuel Vadot reg = <0x423c>; 621*f126890aSEmmanuel Vadot ti,max-div = <2>; 622*f126890aSEmmanuel Vadot }; 623*f126890aSEmmanuel Vadot 624*f126890aSEmmanuel Vadot disp_clk: clock-disp@4244 { 625*f126890aSEmmanuel Vadot #clock-cells = <0>; 626*f126890aSEmmanuel Vadot compatible = "ti,mux-clock"; 627*f126890aSEmmanuel Vadot clock-output-names = "disp_clk"; 628*f126890aSEmmanuel Vadot clocks = <&dpll_disp_m2_ck>, <&dpll_core_m5_ck>, <&dpll_per_m2_ck>; 629*f126890aSEmmanuel Vadot reg = <0x4244>; 630*f126890aSEmmanuel Vadot ti,set-rate-parent; 631*f126890aSEmmanuel Vadot }; 632*f126890aSEmmanuel Vadot 633*f126890aSEmmanuel Vadot dpll_extdev_ck: clock@2e60 { 634*f126890aSEmmanuel Vadot #clock-cells = <0>; 635*f126890aSEmmanuel Vadot compatible = "ti,am3-dpll-clock"; 636*f126890aSEmmanuel Vadot clock-output-names = "dpll_extdev_ck"; 637*f126890aSEmmanuel Vadot clocks = <&sys_clkin_ck>, <&sys_clkin_ck>; 638*f126890aSEmmanuel Vadot reg = <0x2e60>, <0x2e64>, <0x2e6c>, <0x2e88>, <0x2e8c>; 639*f126890aSEmmanuel Vadot }; 640*f126890aSEmmanuel Vadot 641*f126890aSEmmanuel Vadot dpll_extdev_m2_ck: clock-dpll-extdev-m2-8@2e70 { 642*f126890aSEmmanuel Vadot #clock-cells = <0>; 643*f126890aSEmmanuel Vadot compatible = "ti,divider-clock"; 644*f126890aSEmmanuel Vadot clock-output-names = "dpll_extdev_m2_ck"; 645*f126890aSEmmanuel Vadot clocks = <&dpll_extdev_ck>; 646*f126890aSEmmanuel Vadot ti,max-div = <127>; 647*f126890aSEmmanuel Vadot ti,autoidle-shift = <8>; 648*f126890aSEmmanuel Vadot reg = <0x2e70>; 649*f126890aSEmmanuel Vadot ti,index-starts-at-one; 650*f126890aSEmmanuel Vadot ti,invert-autoidle-bit; 651*f126890aSEmmanuel Vadot }; 652*f126890aSEmmanuel Vadot 653*f126890aSEmmanuel Vadot mux_synctimer32k_ck: clock-mux-synctimer32k@4230 { 654*f126890aSEmmanuel Vadot #clock-cells = <0>; 655*f126890aSEmmanuel Vadot compatible = "ti,mux-clock"; 656*f126890aSEmmanuel Vadot clock-output-names = "mux_synctimer32k_ck"; 657*f126890aSEmmanuel Vadot clocks = <&clk_32768_ck>, <&clk_32k_tpm_ck>, <&clkdiv32k_ick>; 658*f126890aSEmmanuel Vadot reg = <0x4230>; 659*f126890aSEmmanuel Vadot }; 660*f126890aSEmmanuel Vadot 661*f126890aSEmmanuel Vadot timer8_fck: clock-timer8-fck@421c { 662*f126890aSEmmanuel Vadot #clock-cells = <0>; 663*f126890aSEmmanuel Vadot compatible = "ti,mux-clock"; 664*f126890aSEmmanuel Vadot clock-output-names = "timer8_fck"; 665*f126890aSEmmanuel Vadot clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>, <&clk_32k_tpm_ck>; 666*f126890aSEmmanuel Vadot reg = <0x421c>; 667*f126890aSEmmanuel Vadot }; 668*f126890aSEmmanuel Vadot 669*f126890aSEmmanuel Vadot timer9_fck: clock-timer9-fck@4220 { 670*f126890aSEmmanuel Vadot #clock-cells = <0>; 671*f126890aSEmmanuel Vadot compatible = "ti,mux-clock"; 672*f126890aSEmmanuel Vadot clock-output-names = "timer9_fck"; 673*f126890aSEmmanuel Vadot clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>, <&clk_32k_tpm_ck>; 674*f126890aSEmmanuel Vadot reg = <0x4220>; 675*f126890aSEmmanuel Vadot }; 676*f126890aSEmmanuel Vadot 677*f126890aSEmmanuel Vadot timer10_fck: clock-timer10-fck@4224 { 678*f126890aSEmmanuel Vadot #clock-cells = <0>; 679*f126890aSEmmanuel Vadot compatible = "ti,mux-clock"; 680*f126890aSEmmanuel Vadot clock-output-names = "timer10_fck"; 681*f126890aSEmmanuel Vadot clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>, <&clk_32k_tpm_ck>; 682*f126890aSEmmanuel Vadot reg = <0x4224>; 683*f126890aSEmmanuel Vadot }; 684*f126890aSEmmanuel Vadot 685*f126890aSEmmanuel Vadot timer11_fck: clock-timer11-fck@4228 { 686*f126890aSEmmanuel Vadot #clock-cells = <0>; 687*f126890aSEmmanuel Vadot compatible = "ti,mux-clock"; 688*f126890aSEmmanuel Vadot clock-output-names = "timer11_fck"; 689*f126890aSEmmanuel Vadot clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>, <&clk_32k_tpm_ck>; 690*f126890aSEmmanuel Vadot reg = <0x4228>; 691*f126890aSEmmanuel Vadot }; 692*f126890aSEmmanuel Vadot 693*f126890aSEmmanuel Vadot cpsw_50m_clkdiv: clock-cpsw-50m-clkdiv { 694*f126890aSEmmanuel Vadot #clock-cells = <0>; 695*f126890aSEmmanuel Vadot compatible = "fixed-factor-clock"; 696*f126890aSEmmanuel Vadot clock-output-names = "cpsw_50m_clkdiv"; 697*f126890aSEmmanuel Vadot clocks = <&dpll_core_m5_ck>; 698*f126890aSEmmanuel Vadot clock-mult = <1>; 699*f126890aSEmmanuel Vadot clock-div = <1>; 700*f126890aSEmmanuel Vadot }; 701*f126890aSEmmanuel Vadot 702*f126890aSEmmanuel Vadot cpsw_5m_clkdiv: clock-cpsw-5m-clkdiv { 703*f126890aSEmmanuel Vadot #clock-cells = <0>; 704*f126890aSEmmanuel Vadot compatible = "fixed-factor-clock"; 705*f126890aSEmmanuel Vadot clock-output-names = "cpsw_5m_clkdiv"; 706*f126890aSEmmanuel Vadot clocks = <&cpsw_50m_clkdiv>; 707*f126890aSEmmanuel Vadot clock-mult = <1>; 708*f126890aSEmmanuel Vadot clock-div = <10>; 709*f126890aSEmmanuel Vadot }; 710*f126890aSEmmanuel Vadot 711*f126890aSEmmanuel Vadot dpll_ddr_x2_ck: clock-dpll-ddr-x2 { 712*f126890aSEmmanuel Vadot #clock-cells = <0>; 713*f126890aSEmmanuel Vadot compatible = "ti,am3-dpll-x2-clock"; 714*f126890aSEmmanuel Vadot clock-output-names = "dpll_ddr_x2_ck"; 715*f126890aSEmmanuel Vadot clocks = <&dpll_ddr_ck>; 716*f126890aSEmmanuel Vadot }; 717*f126890aSEmmanuel Vadot 718*f126890aSEmmanuel Vadot dpll_ddr_m4_ck: clock-dpll-ddr-m4-8@2db8 { 719*f126890aSEmmanuel Vadot #clock-cells = <0>; 720*f126890aSEmmanuel Vadot compatible = "ti,divider-clock"; 721*f126890aSEmmanuel Vadot clock-output-names = "dpll_ddr_m4_ck"; 722*f126890aSEmmanuel Vadot clocks = <&dpll_ddr_x2_ck>; 723*f126890aSEmmanuel Vadot ti,max-div = <31>; 724*f126890aSEmmanuel Vadot ti,autoidle-shift = <8>; 725*f126890aSEmmanuel Vadot reg = <0x2db8>; 726*f126890aSEmmanuel Vadot ti,index-starts-at-one; 727*f126890aSEmmanuel Vadot ti,invert-autoidle-bit; 728*f126890aSEmmanuel Vadot }; 729*f126890aSEmmanuel Vadot 730*f126890aSEmmanuel Vadot dpll_per_clkdcoldo: clock-dpll-per-clkdcoldo-8@2e14 { 731*f126890aSEmmanuel Vadot #clock-cells = <0>; 732*f126890aSEmmanuel Vadot compatible = "ti,fixed-factor-clock"; 733*f126890aSEmmanuel Vadot clock-output-names = "dpll_per_clkdcoldo"; 734*f126890aSEmmanuel Vadot clocks = <&dpll_per_ck>; 735*f126890aSEmmanuel Vadot ti,clock-mult = <1>; 736*f126890aSEmmanuel Vadot ti,clock-div = <1>; 737*f126890aSEmmanuel Vadot ti,autoidle-shift = <8>; 738*f126890aSEmmanuel Vadot reg = <0x2e14>; 739*f126890aSEmmanuel Vadot ti,invert-autoidle-bit; 740*f126890aSEmmanuel Vadot }; 741*f126890aSEmmanuel Vadot 742*f126890aSEmmanuel Vadot dll_aging_clk_div: clock-dll-aging-clk-div@4250 { 743*f126890aSEmmanuel Vadot #clock-cells = <0>; 744*f126890aSEmmanuel Vadot compatible = "ti,divider-clock"; 745*f126890aSEmmanuel Vadot clock-output-names = "dll_aging_clk_div"; 746*f126890aSEmmanuel Vadot clocks = <&sys_clkin_ck>; 747*f126890aSEmmanuel Vadot reg = <0x4250>; 748*f126890aSEmmanuel Vadot ti,dividers = <8>, <16>, <32>; 749*f126890aSEmmanuel Vadot }; 750*f126890aSEmmanuel Vadot 751*f126890aSEmmanuel Vadot div_core_25m_ck: clock-div-core-25m { 752*f126890aSEmmanuel Vadot #clock-cells = <0>; 753*f126890aSEmmanuel Vadot compatible = "fixed-factor-clock"; 754*f126890aSEmmanuel Vadot clock-output-names = "div_core_25m_ck"; 755*f126890aSEmmanuel Vadot clocks = <&sysclk_div>; 756*f126890aSEmmanuel Vadot clock-mult = <1>; 757*f126890aSEmmanuel Vadot clock-div = <8>; 758*f126890aSEmmanuel Vadot }; 759*f126890aSEmmanuel Vadot 760*f126890aSEmmanuel Vadot func_12m_clk: clock-func-12m { 761*f126890aSEmmanuel Vadot #clock-cells = <0>; 762*f126890aSEmmanuel Vadot compatible = "fixed-factor-clock"; 763*f126890aSEmmanuel Vadot clock-output-names = "func_12m_clk"; 764*f126890aSEmmanuel Vadot clocks = <&dpll_per_m2_ck>; 765*f126890aSEmmanuel Vadot clock-mult = <1>; 766*f126890aSEmmanuel Vadot clock-div = <16>; 767*f126890aSEmmanuel Vadot }; 768*f126890aSEmmanuel Vadot 769*f126890aSEmmanuel Vadot vtp_clk_div: clock-vtp-clk-div { 770*f126890aSEmmanuel Vadot #clock-cells = <0>; 771*f126890aSEmmanuel Vadot compatible = "fixed-factor-clock"; 772*f126890aSEmmanuel Vadot clock-output-names = "vtp_clk_div"; 773*f126890aSEmmanuel Vadot clocks = <&sys_clkin_ck>; 774*f126890aSEmmanuel Vadot clock-mult = <1>; 775*f126890aSEmmanuel Vadot clock-div = <2>; 776*f126890aSEmmanuel Vadot }; 777*f126890aSEmmanuel Vadot 778*f126890aSEmmanuel Vadot usbphy_32khz_clkmux: clock-usbphy-32khz-clkmux@4260 { 779*f126890aSEmmanuel Vadot #clock-cells = <0>; 780*f126890aSEmmanuel Vadot compatible = "ti,mux-clock"; 781*f126890aSEmmanuel Vadot clock-output-names = "usbphy_32khz_clkmux"; 782*f126890aSEmmanuel Vadot clocks = <&clk_32768_ck>, <&clk_32k_tpm_ck>; 783*f126890aSEmmanuel Vadot reg = <0x4260>; 784*f126890aSEmmanuel Vadot }; 785*f126890aSEmmanuel Vadot 786*f126890aSEmmanuel Vadot usb_phy0_always_on_clk32k: clock-usb-phy0-always-on-clk32k-8@2a40 { 787*f126890aSEmmanuel Vadot #clock-cells = <0>; 788*f126890aSEmmanuel Vadot compatible = "ti,gate-clock"; 789*f126890aSEmmanuel Vadot clock-output-names = "usb_phy0_always_on_clk32k"; 790*f126890aSEmmanuel Vadot clocks = <&usbphy_32khz_clkmux>; 791*f126890aSEmmanuel Vadot ti,bit-shift = <8>; 792*f126890aSEmmanuel Vadot reg = <0x2a40>; 793*f126890aSEmmanuel Vadot }; 794*f126890aSEmmanuel Vadot 795*f126890aSEmmanuel Vadot usb_phy1_always_on_clk32k: clock-usb-phy1-always-on-clk32k-8@2a48 { 796*f126890aSEmmanuel Vadot #clock-cells = <0>; 797*f126890aSEmmanuel Vadot compatible = "ti,gate-clock"; 798*f126890aSEmmanuel Vadot clock-output-names = "usb_phy1_always_on_clk32k"; 799*f126890aSEmmanuel Vadot clocks = <&usbphy_32khz_clkmux>; 800*f126890aSEmmanuel Vadot ti,bit-shift = <8>; 801*f126890aSEmmanuel Vadot reg = <0x2a48>; 802*f126890aSEmmanuel Vadot }; 803*f126890aSEmmanuel Vadot 804*f126890aSEmmanuel Vadot clkout1_osc_div_ck: clock-clkout1-osc-div-ck { 805*f126890aSEmmanuel Vadot #clock-cells = <0>; 806*f126890aSEmmanuel Vadot compatible = "ti,divider-clock"; 807*f126890aSEmmanuel Vadot clock-output-names = "clkout1_osc_div_ck"; 808*f126890aSEmmanuel Vadot clocks = <&sys_clkin_ck>; 809*f126890aSEmmanuel Vadot ti,bit-shift = <20>; 810*f126890aSEmmanuel Vadot ti,max-div = <4>; 811*f126890aSEmmanuel Vadot reg = <0x4100>; 812*f126890aSEmmanuel Vadot }; 813*f126890aSEmmanuel Vadot 814*f126890aSEmmanuel Vadot clkout1_src2_mux_ck: clock-clkout1-src2-mux-ck { 815*f126890aSEmmanuel Vadot #clock-cells = <0>; 816*f126890aSEmmanuel Vadot compatible = "ti,mux-clock"; 817*f126890aSEmmanuel Vadot clock-output-names = "clkout1_src2_mux_ck"; 818*f126890aSEmmanuel Vadot clocks = <&clk_rc32k_ck>, <&sysclk_div>, <&dpll_ddr_m2_ck>, 819*f126890aSEmmanuel Vadot <&dpll_per_m2_ck>, <&dpll_disp_m2_ck>, 820*f126890aSEmmanuel Vadot <&dpll_mpu_m2_ck>; 821*f126890aSEmmanuel Vadot reg = <0x4100>; 822*f126890aSEmmanuel Vadot }; 823*f126890aSEmmanuel Vadot 824*f126890aSEmmanuel Vadot clkout1_src2_pre_div_ck: clock-clkout1-src2-pre-div-ck { 825*f126890aSEmmanuel Vadot #clock-cells = <0>; 826*f126890aSEmmanuel Vadot compatible = "ti,divider-clock"; 827*f126890aSEmmanuel Vadot clock-output-names = "clkout1_src2_pre_div_ck"; 828*f126890aSEmmanuel Vadot clocks = <&clkout1_src2_mux_ck>; 829*f126890aSEmmanuel Vadot ti,bit-shift = <4>; 830*f126890aSEmmanuel Vadot ti,max-div = <8>; 831*f126890aSEmmanuel Vadot reg = <0x4100>; 832*f126890aSEmmanuel Vadot }; 833*f126890aSEmmanuel Vadot 834*f126890aSEmmanuel Vadot clkout1_src2_post_div_ck: clock-clkout1-src2-post-div-ck { 835*f126890aSEmmanuel Vadot #clock-cells = <0>; 836*f126890aSEmmanuel Vadot compatible = "ti,divider-clock"; 837*f126890aSEmmanuel Vadot clock-output-names = "clkout1_src2_post_div_ck"; 838*f126890aSEmmanuel Vadot clocks = <&clkout1_src2_pre_div_ck>; 839*f126890aSEmmanuel Vadot ti,bit-shift = <8>; 840*f126890aSEmmanuel Vadot ti,max-div = <32>; 841*f126890aSEmmanuel Vadot ti,index-power-of-two; 842*f126890aSEmmanuel Vadot reg = <0x4100>; 843*f126890aSEmmanuel Vadot }; 844*f126890aSEmmanuel Vadot 845*f126890aSEmmanuel Vadot clkout1_mux_ck: clock-clkout1-mux-ck { 846*f126890aSEmmanuel Vadot #clock-cells = <0>; 847*f126890aSEmmanuel Vadot compatible = "ti,mux-clock"; 848*f126890aSEmmanuel Vadot clock-output-names = "clkout1_mux_ck"; 849*f126890aSEmmanuel Vadot clocks = <&clkout1_osc_div_ck>, <&clk_rc32k_ck>, 850*f126890aSEmmanuel Vadot <&clkout1_src2_post_div_ck>, <&dpll_extdev_m2_ck>; 851*f126890aSEmmanuel Vadot ti,bit-shift = <16>; 852*f126890aSEmmanuel Vadot reg = <0x4100>; 853*f126890aSEmmanuel Vadot }; 854*f126890aSEmmanuel Vadot 855*f126890aSEmmanuel Vadot clkout1_ck: clock-clkout1-ck { 856*f126890aSEmmanuel Vadot #clock-cells = <0>; 857*f126890aSEmmanuel Vadot compatible = "ti,gate-clock"; 858*f126890aSEmmanuel Vadot clock-output-names = "clkout1_ck"; 859*f126890aSEmmanuel Vadot clocks = <&clkout1_mux_ck>; 860*f126890aSEmmanuel Vadot ti,bit-shift = <23>; 861*f126890aSEmmanuel Vadot reg = <0x4100>; 862*f126890aSEmmanuel Vadot }; 863*f126890aSEmmanuel Vadot}; 864*f126890aSEmmanuel Vadot 865*f126890aSEmmanuel Vadot&prcm { 866*f126890aSEmmanuel Vadot wkup_cm: clock@2800 { 867*f126890aSEmmanuel Vadot compatible = "ti,omap4-cm"; 868*f126890aSEmmanuel Vadot clock-output-names = "wkup_cm"; 869*f126890aSEmmanuel Vadot reg = <0x2800 0x400>; 870*f126890aSEmmanuel Vadot #address-cells = <1>; 871*f126890aSEmmanuel Vadot #size-cells = <1>; 872*f126890aSEmmanuel Vadot ranges = <0 0x2800 0x400>; 873*f126890aSEmmanuel Vadot 874*f126890aSEmmanuel Vadot l3s_tsc_clkctrl: clock@120 { 875*f126890aSEmmanuel Vadot compatible = "ti,clkctrl"; 876*f126890aSEmmanuel Vadot clock-output-names = "l3s_tsc_clkctrl"; 877*f126890aSEmmanuel Vadot reg = <0x120 0x4>; 878*f126890aSEmmanuel Vadot #clock-cells = <2>; 879*f126890aSEmmanuel Vadot }; 880*f126890aSEmmanuel Vadot 881*f126890aSEmmanuel Vadot l4_wkup_aon_clkctrl: clock@228 { 882*f126890aSEmmanuel Vadot compatible = "ti,clkctrl"; 883*f126890aSEmmanuel Vadot clock-output-names = "l4_wkup_aon_clkctrl"; 884*f126890aSEmmanuel Vadot reg = <0x228 0xc>; 885*f126890aSEmmanuel Vadot #clock-cells = <2>; 886*f126890aSEmmanuel Vadot }; 887*f126890aSEmmanuel Vadot 888*f126890aSEmmanuel Vadot l4_wkup_clkctrl: clock@220 { 889*f126890aSEmmanuel Vadot compatible = "ti,clkctrl"; 890*f126890aSEmmanuel Vadot clock-output-names = "l4_wkup_clkctrl"; 891*f126890aSEmmanuel Vadot reg = <0x220 0x4>, <0x328 0x44>; 892*f126890aSEmmanuel Vadot #clock-cells = <2>; 893*f126890aSEmmanuel Vadot }; 894*f126890aSEmmanuel Vadot 895*f126890aSEmmanuel Vadot }; 896*f126890aSEmmanuel Vadot 897*f126890aSEmmanuel Vadot mpu_cm: clock@8300 { 898*f126890aSEmmanuel Vadot compatible = "ti,omap4-cm"; 899*f126890aSEmmanuel Vadot clock-output-names = "mpu_cm"; 900*f126890aSEmmanuel Vadot reg = <0x8300 0x100>; 901*f126890aSEmmanuel Vadot #address-cells = <1>; 902*f126890aSEmmanuel Vadot #size-cells = <1>; 903*f126890aSEmmanuel Vadot ranges = <0 0x8300 0x100>; 904*f126890aSEmmanuel Vadot 905*f126890aSEmmanuel Vadot mpu_clkctrl: clock@20 { 906*f126890aSEmmanuel Vadot compatible = "ti,clkctrl"; 907*f126890aSEmmanuel Vadot clock-output-names = "mpu_clkctrl"; 908*f126890aSEmmanuel Vadot reg = <0x20 0x4>; 909*f126890aSEmmanuel Vadot #clock-cells = <2>; 910*f126890aSEmmanuel Vadot }; 911*f126890aSEmmanuel Vadot }; 912*f126890aSEmmanuel Vadot 913*f126890aSEmmanuel Vadot gfx_l3_cm: clock@8400 { 914*f126890aSEmmanuel Vadot compatible = "ti,omap4-cm"; 915*f126890aSEmmanuel Vadot clock-output-names = "gfx_l3_cm"; 916*f126890aSEmmanuel Vadot reg = <0x8400 0x100>; 917*f126890aSEmmanuel Vadot #address-cells = <1>; 918*f126890aSEmmanuel Vadot #size-cells = <1>; 919*f126890aSEmmanuel Vadot ranges = <0 0x8400 0x100>; 920*f126890aSEmmanuel Vadot 921*f126890aSEmmanuel Vadot gfx_l3_clkctrl: clock@20 { 922*f126890aSEmmanuel Vadot compatible = "ti,clkctrl"; 923*f126890aSEmmanuel Vadot clock-output-names = "gfx_l3_clkctrl"; 924*f126890aSEmmanuel Vadot reg = <0x20 0x4>; 925*f126890aSEmmanuel Vadot #clock-cells = <2>; 926*f126890aSEmmanuel Vadot }; 927*f126890aSEmmanuel Vadot }; 928*f126890aSEmmanuel Vadot 929*f126890aSEmmanuel Vadot l4_rtc_cm: clock@8500 { 930*f126890aSEmmanuel Vadot compatible = "ti,omap4-cm"; 931*f126890aSEmmanuel Vadot clock-output-names = "l4_rtc_cm"; 932*f126890aSEmmanuel Vadot reg = <0x8500 0x100>; 933*f126890aSEmmanuel Vadot #address-cells = <1>; 934*f126890aSEmmanuel Vadot #size-cells = <1>; 935*f126890aSEmmanuel Vadot ranges = <0 0x8500 0x100>; 936*f126890aSEmmanuel Vadot 937*f126890aSEmmanuel Vadot l4_rtc_clkctrl: clock@20 { 938*f126890aSEmmanuel Vadot compatible = "ti,clkctrl"; 939*f126890aSEmmanuel Vadot clock-output-names = "l4_rtc_clkctrl"; 940*f126890aSEmmanuel Vadot reg = <0x20 0x4>; 941*f126890aSEmmanuel Vadot #clock-cells = <2>; 942*f126890aSEmmanuel Vadot }; 943*f126890aSEmmanuel Vadot }; 944*f126890aSEmmanuel Vadot 945*f126890aSEmmanuel Vadot per_cm: clock@8800 { 946*f126890aSEmmanuel Vadot compatible = "ti,omap4-cm"; 947*f126890aSEmmanuel Vadot clock-output-names = "per_cm"; 948*f126890aSEmmanuel Vadot reg = <0x8800 0xc00>; 949*f126890aSEmmanuel Vadot #address-cells = <1>; 950*f126890aSEmmanuel Vadot #size-cells = <1>; 951*f126890aSEmmanuel Vadot ranges = <0 0x8800 0xc00>; 952*f126890aSEmmanuel Vadot 953*f126890aSEmmanuel Vadot l3_clkctrl: clock@20 { 954*f126890aSEmmanuel Vadot compatible = "ti,clkctrl"; 955*f126890aSEmmanuel Vadot clock-output-names = "l3_clkctrl"; 956*f126890aSEmmanuel Vadot reg = <0x20 0x3c>, <0x78 0x2c>; 957*f126890aSEmmanuel Vadot #clock-cells = <2>; 958*f126890aSEmmanuel Vadot }; 959*f126890aSEmmanuel Vadot 960*f126890aSEmmanuel Vadot l3s_clkctrl: clock@68 { 961*f126890aSEmmanuel Vadot compatible = "ti,clkctrl"; 962*f126890aSEmmanuel Vadot clock-output-names = "l3s_clkctrl"; 963*f126890aSEmmanuel Vadot reg = <0x68 0xc>, <0x220 0x4c>; 964*f126890aSEmmanuel Vadot #clock-cells = <2>; 965*f126890aSEmmanuel Vadot }; 966*f126890aSEmmanuel Vadot 967*f126890aSEmmanuel Vadot pruss_ocp_clkctrl: clock@320 { 968*f126890aSEmmanuel Vadot compatible = "ti,clkctrl"; 969*f126890aSEmmanuel Vadot clock-output-names = "pruss_ocp_clkctrl"; 970*f126890aSEmmanuel Vadot reg = <0x320 0x4>; 971*f126890aSEmmanuel Vadot #clock-cells = <2>; 972*f126890aSEmmanuel Vadot }; 973*f126890aSEmmanuel Vadot 974*f126890aSEmmanuel Vadot l4ls_clkctrl: clock@420 { 975*f126890aSEmmanuel Vadot compatible = "ti,clkctrl"; 976*f126890aSEmmanuel Vadot clock-output-names = "l4ls_clkctrl"; 977*f126890aSEmmanuel Vadot reg = <0x420 0x1a4>; 978*f126890aSEmmanuel Vadot #clock-cells = <2>; 979*f126890aSEmmanuel Vadot }; 980*f126890aSEmmanuel Vadot 981*f126890aSEmmanuel Vadot emif_clkctrl: clock@720 { 982*f126890aSEmmanuel Vadot compatible = "ti,clkctrl"; 983*f126890aSEmmanuel Vadot clock-output-names = "emif_clkctrl"; 984*f126890aSEmmanuel Vadot reg = <0x720 0x4>; 985*f126890aSEmmanuel Vadot #clock-cells = <2>; 986*f126890aSEmmanuel Vadot }; 987*f126890aSEmmanuel Vadot 988*f126890aSEmmanuel Vadot dss_clkctrl: clock@a20 { 989*f126890aSEmmanuel Vadot compatible = "ti,clkctrl"; 990*f126890aSEmmanuel Vadot clock-output-names = "dss_clkctrl"; 991*f126890aSEmmanuel Vadot reg = <0xa20 0x4>; 992*f126890aSEmmanuel Vadot #clock-cells = <2>; 993*f126890aSEmmanuel Vadot }; 994*f126890aSEmmanuel Vadot 995*f126890aSEmmanuel Vadot cpsw_125mhz_clkctrl: clock@b20 { 996*f126890aSEmmanuel Vadot compatible = "ti,clkctrl"; 997*f126890aSEmmanuel Vadot clock-output-names = "cpsw_125mhz_clkctrl"; 998*f126890aSEmmanuel Vadot reg = <0xb20 0x4>; 999*f126890aSEmmanuel Vadot #clock-cells = <2>; 1000*f126890aSEmmanuel Vadot }; 1001*f126890aSEmmanuel Vadot 1002*f126890aSEmmanuel Vadot }; 1003*f126890aSEmmanuel Vadot}; 1004