1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2017 Carlo Caione
4 * Copyright (c) 2016 BayLibre, Inc.
5 * Author: Neil Armstrong <narmstrong@kernel.org>
6 */
7
8/dts-v1/;
9
10#include "meson-gxl-s905x.dtsi"
11
12/ {
13	compatible = "hwacom,amazetv", "amlogic,s905x", "amlogic,meson-gxl";
14	model = "Hwacom AmazeTV (S905X)";
15
16	aliases {
17		serial0 = &uart_AO;
18		ethernet0 = &ethmac;
19	};
20
21	chosen {
22		stdout-path = "serial0:115200n8";
23	};
24
25	memory@0 {
26		device_type = "memory";
27		reg = <0x0 0x0 0x0 0x80000000>;
28	};
29
30	vddio_card: gpio-regulator {
31		compatible = "regulator-gpio";
32
33		regulator-name = "VDDIO_CARD";
34		regulator-min-microvolt = <1800000>;
35		regulator-max-microvolt = <3300000>;
36
37		gpios = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>;
38		gpios-states = <1>;
39
40		/* Based on P200 schematics, signal CARD_1.8V/3.3V_CTR */
41		states = <1800000 0>,
42			 <3300000 1>;
43	};
44
45	vddio_boot: regulator-vddio_boot {
46		compatible = "regulator-fixed";
47		regulator-name = "VDDIO_BOOT";
48		regulator-min-microvolt = <1800000>;
49		regulator-max-microvolt = <1800000>;
50	};
51
52	vddao_3v3: regulator-vddao_3v3 {
53		compatible = "regulator-fixed";
54		regulator-name = "VDDAO_3V3";
55		regulator-min-microvolt = <3300000>;
56		regulator-max-microvolt = <3300000>;
57	};
58
59	vcc_3v3: regulator-vcc_3v3 {
60		compatible = "regulator-fixed";
61		regulator-name = "VCC_3V3";
62		regulator-min-microvolt = <3300000>;
63		regulator-max-microvolt = <3300000>;
64	};
65
66	emmc_pwrseq: emmc-pwrseq {
67		compatible = "mmc-pwrseq-emmc";
68		reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
69	};
70
71	wifi32k: wifi32k {
72		compatible = "pwm-clock";
73		#clock-cells = <0>;
74		clock-frequency = <32768>;
75		pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
76	};
77
78	sdio_pwrseq: sdio-pwrseq {
79		compatible = "mmc-pwrseq-simple";
80		reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
81		clocks = <&wifi32k>;
82		clock-names = "ext_clock";
83	};
84
85	cvbs-connector {
86		compatible = "composite-video-connector";
87
88		port {
89			cvbs_connector_in: endpoint {
90				remote-endpoint = <&cvbs_vdac_out>;
91			};
92		};
93	};
94};
95
96&cvbs_vdac_port {
97	cvbs_vdac_out: endpoint {
98		remote-endpoint = <&cvbs_connector_in>;
99	};
100};
101
102&ethmac {
103	status = "okay";
104	phy-mode = "rmii";
105	phy-handle = <&internal_phy>;
106};
107
108&ir {
109	status = "okay";
110	pinctrl-0 = <&remote_input_ao_pins>;
111	pinctrl-names = "default";
112};
113
114&pwm_ef {
115	status = "okay";
116	pinctrl-0 = <&pwm_e_pins>;
117	pinctrl-names = "default";
118	clocks = <&clkc CLKID_FCLK_DIV4>;
119	clock-names = "clkin0";
120};
121
122/* SD card */
123&sd_emmc_b {
124	status = "okay";
125	pinctrl-0 = <&sdcard_pins>;
126	pinctrl-1 = <&sdcard_clk_gate_pins>;
127	pinctrl-names = "default", "clk-gate";
128
129	bus-width = <4>;
130	cap-sd-highspeed;
131	max-frequency = <100000000>;
132	disable-wp;
133
134	cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
135
136	vmmc-supply = <&vddao_3v3>;
137	vqmmc-supply = <&vddio_card>;
138};
139
140/* eMMC */
141&sd_emmc_c {
142	status = "okay";
143	pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
144	pinctrl-1 = <&emmc_clk_gate_pins>;
145	pinctrl-names = "default", "clk-gate";
146
147	bus-width = <8>;
148	cap-mmc-highspeed;
149	max-frequency = <100000000>;
150	non-removable;
151	disable-wp;
152	mmc-ddr-1_8v;
153	mmc-hs200-1_8v;
154
155	mmc-pwrseq = <&emmc_pwrseq>;
156	vmmc-supply = <&vcc_3v3>;
157	vqmmc-supply = <&vddio_boot>;
158};
159
160&uart_AO {
161	status = "okay";
162	pinctrl-0 = <&uart_ao_a_pins>;
163	pinctrl-names = "default";
164};
165