1// SPDX-License-Identifier: (GPL-2.0 or MIT)
2/*
3 * Device Tree Source for the Spider CPU board
4 *
5 * Copyright (C) 2021 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/gpio/gpio.h>
9#include "r8a779f0.dtsi"
10
11/ {
12	model = "Renesas Spider CPU board";
13	compatible = "renesas,spider-cpu", "renesas,r8a779f0";
14
15	aliases {
16		serial0 = &hscif0;
17		serial1 = &scif0;
18	};
19
20	chosen {
21		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
22		stdout-path = "serial0:1843200n8";
23	};
24
25	memory@48000000 {
26		device_type = "memory";
27		/* first 128MB is reserved for secure area. */
28		reg = <0x0 0x48000000 0x0 0x78000000>;
29	};
30
31	memory@480000000 {
32		device_type = "memory";
33		reg = <0x4 0x80000000 0x0 0x80000000>;
34	};
35
36	rc21012_ufs: clk-rc21012-ufs {
37		compatible = "fixed-clock";
38		clock-frequency = <38400000>;
39		#clock-cells = <0>;
40	};
41
42	reg_1p8v: regulator-1p8v {
43		compatible = "regulator-fixed";
44		regulator-name = "fixed-1.8V";
45		regulator-min-microvolt = <1800000>;
46		regulator-max-microvolt = <1800000>;
47		regulator-boot-on;
48		regulator-always-on;
49	};
50
51	reg_3p3v: regulator-3p3v {
52		compatible = "regulator-fixed";
53		regulator-name = "fixed-3.3V";
54		regulator-min-microvolt = <3300000>;
55		regulator-max-microvolt = <3300000>;
56		regulator-boot-on;
57		regulator-always-on;
58	};
59};
60
61&extal_clk {
62	clock-frequency = <20000000>;
63};
64
65&extalr_clk {
66	clock-frequency = <32768>;
67};
68
69&hscif0 {
70	pinctrl-0 = <&hscif0_pins>;
71	pinctrl-names = "default";
72
73	uart-has-rtscts;
74	status = "okay";
75};
76
77&i2c0 {
78	pinctrl-0 = <&i2c0_pins>;
79	pinctrl-names = "default";
80
81	status = "okay";
82	clock-frequency = <400000>;
83
84	gpio_exp_20: gpio@20 {
85		compatible = "ti,tca9554";
86		reg = <0x20>;
87		gpio-controller;
88		#gpio-cells = <2>;
89	};
90};
91
92&i2c4 {
93	pinctrl-0 = <&i2c4_pins>;
94	pinctrl-names = "default";
95
96	status = "okay";
97	clock-frequency = <400000>;
98
99	eeprom@50 {
100		compatible = "rohm,br24g01", "atmel,24c01";
101		label = "cpu-board";
102		reg = <0x50>;
103		pagesize = <8>;
104	};
105};
106
107/*
108 * This board also has a microSD slot which we will not support upstream
109 * because we cannot directly switch voltages in software.
110 */
111&mmc0 {
112	pinctrl-0 = <&mmc_pins>;
113	pinctrl-1 = <&mmc_pins>;
114	pinctrl-names = "default", "state_uhs";
115
116	vmmc-supply = <&reg_3p3v>;
117	vqmmc-supply = <&reg_1p8v>;
118	mmc-hs200-1_8v;
119	mmc-hs400-1_8v;
120	bus-width = <8>;
121	no-sd;
122	no-sdio;
123	non-removable;
124	full-pwr-cycle-in-suspend;
125	status = "okay";
126};
127
128&pfc {
129	pinctrl-0 = <&scif_clk_pins>;
130	pinctrl-names = "default";
131
132	hscif0_pins: hscif0 {
133		groups = "hscif0_data", "hscif0_ctrl";
134		function = "hscif0";
135	};
136
137	i2c0_pins: i2c0 {
138		groups = "i2c0";
139		function = "i2c0";
140	};
141
142	i2c4_pins: i2c4 {
143		groups = "i2c4";
144		function = "i2c4";
145	};
146
147	mmc_pins: mmc {
148		groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
149		function = "mmc";
150		power-source = <1800>;
151	};
152
153	scif0_pins: scif0 {
154		groups = "scif0_data", "scif0_ctrl";
155		function = "scif0";
156	};
157
158	scif_clk_pins: scif_clk {
159		groups = "scif_clk";
160		function = "scif_clk";
161	};
162};
163
164&rwdt {
165	timeout-sec = <60>;
166	status = "okay";
167};
168
169&scif0 {
170	pinctrl-0 = <&scif0_pins>;
171	pinctrl-names = "default";
172
173	uart-has-rtscts;
174	status = "okay";
175};
176
177&scif_clk {
178	clock-frequency = <24000000>;
179};
180
181&ufs {
182	status = "okay";
183};
184
185&ufs30_clk {
186	compatible = "gpio-gate-clock";
187	clocks = <&rc21012_ufs>;
188	enable-gpios = <&gpio_exp_20 4 GPIO_ACTIVE_LOW>;
189	/delete-property/ clock-frequency;
190};
191