1/*
2 * Device Tree Source for AMCC Rainier
3 *
4 * Based on Sequoia code
5 * Copyright (c) 2007 MontaVista Software, Inc.
6 *
7 * FIXME: Draft only!
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2.  This program is licensed "as is" without
11 * any warranty of any kind, whether express or implied.
12 *
13 */
14
15/dts-v1/;
16
17/ {
18	#address-cells = <2>;
19	#size-cells = <1>;
20	model = "amcc,rainier";
21	compatible = "amcc,rainier";
22	dcr-parent = <&{/cpus/cpu@0}>;
23
24	aliases {
25		ethernet0 = &EMAC0;
26		ethernet1 = &EMAC1;
27		serial0 = &UART0;
28		serial1 = &UART1;
29		serial2 = &UART2;
30		serial3 = &UART3;
31	};
32
33	cpus {
34		#address-cells = <1>;
35		#size-cells = <0>;
36
37		cpu@0 {
38			device_type = "cpu";
39			model = "PowerPC,440GRx";
40			reg = <0x00000000>;
41			clock-frequency = <0>; /* Filled in by zImage */
42			timebase-frequency = <0>; /* Filled in by zImage */
43			i-cache-line-size = <32>;
44			d-cache-line-size = <32>;
45			i-cache-size = <32768>;
46			d-cache-size = <32768>;
47			dcr-controller;
48			dcr-access-method = "native";
49		};
50	};
51
52	memory {
53		device_type = "memory";
54		reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */
55	};
56
57	UIC0: interrupt-controller0 {
58		compatible = "ibm,uic-440grx","ibm,uic";
59		interrupt-controller;
60		cell-index = <0>;
61		dcr-reg = <0x0c0 0x009>;
62		#address-cells = <0>;
63		#size-cells = <0>;
64		#interrupt-cells = <2>;
65	};
66
67	UIC1: interrupt-controller1 {
68		compatible = "ibm,uic-440grx","ibm,uic";
69		interrupt-controller;
70		cell-index = <1>;
71		dcr-reg = <0x0d0 0x009>;
72		#address-cells = <0>;
73		#size-cells = <0>;
74		#interrupt-cells = <2>;
75		interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
76		interrupt-parent = <&UIC0>;
77	};
78
79	UIC2: interrupt-controller2 {
80		compatible = "ibm,uic-440grx","ibm,uic";
81		interrupt-controller;
82		cell-index = <2>;
83		dcr-reg = <0x0e0 0x009>;
84		#address-cells = <0>;
85		#size-cells = <0>;
86		#interrupt-cells = <2>;
87		interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
88		interrupt-parent = <&UIC0>;
89	};
90
91	SDR0: sdr {
92		compatible = "ibm,sdr-440grx", "ibm,sdr-440ep";
93		dcr-reg = <0x00e 0x002>;
94	};
95
96	CPR0: cpr {
97		compatible = "ibm,cpr-440grx", "ibm,cpr-440ep";
98		dcr-reg = <0x00c 0x002>;
99	};
100
101	plb {
102		compatible = "ibm,plb-440grx", "ibm,plb4";
103		#address-cells = <2>;
104		#size-cells = <1>;
105		ranges;
106		clock-frequency = <0>; /* Filled in by zImage */
107
108		SDRAM0: sdram {
109			compatible = "ibm,sdram-440grx", "ibm,sdram-44x-ddr2denali";
110			dcr-reg = <0x010 0x002>;
111		};
112
113		DMA0: dma {
114			compatible = "ibm,dma-440grx", "ibm,dma-4xx";
115			dcr-reg = <0x100 0x027>;
116		};
117
118		MAL0: mcmal {
119			compatible = "ibm,mcmal-440grx", "ibm,mcmal2";
120			dcr-reg = <0x180 0x062>;
121			num-tx-chans = <2>;
122			num-rx-chans = <2>;
123			interrupt-parent = <&MAL0>;
124			interrupts = <0x0 0x1 0x2 0x3 0x4>;
125			#interrupt-cells = <1>;
126			#address-cells = <0>;
127			#size-cells = <0>;
128			interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
129					/*RXEOB*/ 0x1 &UIC0 0xb 0x4
130					/*SERR*/  0x2 &UIC1 0x0 0x4
131					/*TXDE*/  0x3 &UIC1 0x1 0x4
132					/*RXDE*/  0x4 &UIC1 0x2 0x4>;
133			interrupt-map-mask = <0xffffffff>;
134		};
135
136		POB0: opb {
137		  	compatible = "ibm,opb-440grx", "ibm,opb";
138			#address-cells = <1>;
139			#size-cells = <1>;
140		  	ranges = <0x00000000 0x00000001 0x00000000 0x80000000
141			          0x80000000 0x00000001 0x80000000 0x80000000>;
142		  	interrupt-parent = <&UIC1>;
143		  	interrupts = <0x7 0x4>;
144		  	clock-frequency = <0>; /* Filled in by zImage */
145
146			EBC0: ebc {
147				compatible = "ibm,ebc-440grx", "ibm,ebc";
148				dcr-reg = <0x012 0x002>;
149				#address-cells = <2>;
150				#size-cells = <1>;
151				clock-frequency = <0>; /* Filled in by zImage */
152				interrupts = <0x5 0x1>;
153				interrupt-parent = <&UIC1>;
154
155				nor_flash@0,0 {
156					compatible = "amd,s29gl256n", "cfi-flash";
157					bank-width = <2>;
158					reg = <0x00000000 0x00000000 0x04000000>;
159					#address-cells = <1>;
160					#size-cells = <1>;
161					partition@0 {
162						label = "Kernel";
163						reg = <0x00000000 0x00180000>;
164					};
165					partition@180000 {
166						label = "ramdisk";
167						reg = <0x00180000 0x00200000>;
168					};
169					partition@380000 {
170						label = "file system";
171						reg = <0x00380000 0x03aa0000>;
172					};
173					partition@3e20000 {
174						label = "kozio";
175						reg = <0x03e20000 0x00140000>;
176					};
177					partition@3f60000 {
178						label = "env";
179						reg = <0x03f60000 0x00040000>;
180					};
181					partition@3fa0000 {
182						label = "u-boot";
183						reg = <0x03fa0000 0x00060000>;
184					};
185				};
186
187			};
188
189			UART0: serial@ef600300 {
190		   		device_type = "serial";
191		   		compatible = "ns16550";
192		   		reg = <0xef600300 0x00000008>;
193		   		virtual-reg = <0xef600300>;
194		   		clock-frequency = <0>; /* Filled in by zImage */
195		   		current-speed = <115200>;
196		   		interrupt-parent = <&UIC0>;
197		   		interrupts = <0x0 0x4>;
198	   		};
199
200			UART1: serial@ef600400 {
201		   		device_type = "serial";
202		   		compatible = "ns16550";
203		   		reg = <0xef600400 0x00000008>;
204		   		virtual-reg = <0xef600400>;
205		   		clock-frequency = <0>;
206		   		current-speed = <0>;
207		   		interrupt-parent = <&UIC0>;
208		   		interrupts = <0x1 0x4>;
209	   		};
210
211			UART2: serial@ef600500 {
212		   		device_type = "serial";
213		   		compatible = "ns16550";
214		   		reg = <0xef600500 0x00000008>;
215		   		virtual-reg = <0xef600500>;
216		   		clock-frequency = <0>;
217		   		current-speed = <0>;
218		   		interrupt-parent = <&UIC1>;
219		   		interrupts = <0x3 0x4>;
220	   		};
221
222			UART3: serial@ef600600 {
223		   		device_type = "serial";
224		   		compatible = "ns16550";
225		   		reg = <0xef600600 0x00000008>;
226		   		virtual-reg = <0xef600600>;
227		   		clock-frequency = <0>;
228		   		current-speed = <0>;
229		   		interrupt-parent = <&UIC1>;
230		   		interrupts = <0x4 0x4>;
231	   		};
232
233			IIC0: i2c@ef600700 {
234				compatible = "ibm,iic-440grx", "ibm,iic";
235				reg = <0xef600700 0x00000014>;
236				interrupt-parent = <&UIC0>;
237				interrupts = <0x2 0x4>;
238			};
239
240			IIC1: i2c@ef600800 {
241				compatible = "ibm,iic-440grx", "ibm,iic";
242				reg = <0xef600800 0x00000014>;
243				interrupt-parent = <&UIC0>;
244				interrupts = <0x7 0x4>;
245			};
246
247			ZMII0: emac-zmii@ef600d00 {
248				compatible = "ibm,zmii-440grx", "ibm,zmii";
249				reg = <0xef600d00 0x0000000c>;
250			};
251
252			RGMII0: emac-rgmii@ef601000 {
253				compatible = "ibm,rgmii-440grx", "ibm,rgmii";
254				reg = <0xef601000 0x00000008>;
255				has-mdio;
256			};
257
258			EMAC0: ethernet@ef600e00 {
259				device_type = "network";
260				compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4";
261				interrupt-parent = <&EMAC0>;
262				interrupts = <0x0 0x1>;
263				#interrupt-cells = <1>;
264				#address-cells = <0>;
265				#size-cells = <0>;
266				interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4
267						/*Wake*/  0x1 &UIC1 0x1d 0x4>;
268				reg = <0xef600e00 0x00000074>;
269				local-mac-address = [000000000000];
270				mal-device = <&MAL0>;
271				mal-tx-channel = <0>;
272				mal-rx-channel = <0>;
273				cell-index = <0>;
274				max-frame-size = <9000>;
275				rx-fifo-size = <4096>;
276				tx-fifo-size = <2048>;
277				phy-mode = "rgmii";
278				phy-map = <0x00000000>;
279				zmii-device = <&ZMII0>;
280				zmii-channel = <0>;
281				rgmii-device = <&RGMII0>;
282				rgmii-channel = <0>;
283				has-inverted-stacr-oc;
284				has-new-stacr-staopc;
285			};
286
287			EMAC1: ethernet@ef600f00 {
288				device_type = "network";
289				compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4";
290				interrupt-parent = <&EMAC1>;
291				interrupts = <0x0 0x1>;
292				#interrupt-cells = <1>;
293				#address-cells = <0>;
294				#size-cells = <0>;
295				interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4
296						/*Wake*/  0x1 &UIC1 0x1f 0x4>;
297				reg = <0xef600f00 0x00000074>;
298				local-mac-address = [000000000000];
299				mal-device = <&MAL0>;
300				mal-tx-channel = <1>;
301				mal-rx-channel = <1>;
302				cell-index = <1>;
303				max-frame-size = <9000>;
304				rx-fifo-size = <4096>;
305				tx-fifo-size = <2048>;
306				phy-mode = "rgmii";
307				phy-map = <0x00000000>;
308				zmii-device = <&ZMII0>;
309				zmii-channel = <1>;
310				rgmii-device = <&RGMII0>;
311				rgmii-channel = <1>;
312				has-inverted-stacr-oc;
313				has-new-stacr-staopc;
314			};
315		};
316
317		PCI0: pci@1ec000000 {
318			device_type = "pci";
319			#interrupt-cells = <1>;
320			#size-cells = <2>;
321			#address-cells = <3>;
322			compatible = "ibm,plb440grx-pci", "ibm,plb-pci";
323			primary;
324			reg = <0x00000001 0xeec00000 0x00000008	/* Config space access */
325			       0x00000001 0xeed00000 0x00000004	/* IACK */
326			       0x00000001 0xeed00000 0x00000004	/* Special cycle */
327			       0x00000001 0xef400000 0x00000040>;	/* Internal registers */
328
329			/* Outbound ranges, one memory and one IO,
330			 * later cannot be changed. Chip supports a second
331			 * IO range but we don't use it for now
332			 */
333			ranges = <0x02000000 0x0 0x80000000 0x1 0x80000000 0x0 0x40000000
334				0x01000000 0x0 0x00000000 0x1 0xe8000000 0x0 0x00010000
335				0x01000000 0x0 0x00000000 0x1 0xe8800000 0x0 0x03800000>;
336
337			/* Inbound 2GB range starting at 0 */
338			dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
339
340			/* All PCI interrupts are routed to IRQ 67 */
341			interrupt-map-mask = <0x0 0x0 0x0 0x0>;
342			interrupt-map = < 0x0 0x0 0x0 0x0 &UIC2 0x3 0x8 >;
343		};
344	};
345
346	chosen {
347		stdout-path = "/plb/opb/serial@ef600300";
348		bootargs = "console=ttyS0,115200";
349	};
350};
351