xref: /freebsd/sys/crypto/openssl/ossl_x86.c (revision 1323ec57)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2020 Netflix, Inc
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer,
11  *    without modification.
12  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
13  *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
14  *    redistribution must be conditioned upon including a substantially
15  *    similar Disclaimer requirement for further binary redistribution.
16  *
17  * NO WARRANTY
18  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20  * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
21  * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
22  * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
23  * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
26  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
28  * THE POSSIBILITY OF SUCH DAMAGES.
29  *
30  * $FreeBSD$
31  */
32 
33 #include <sys/types.h>
34 #include <sys/systm.h>
35 
36 #include <machine/cpufunc.h>
37 #include <machine/md_var.h>
38 #include <x86/cputypes.h>
39 #include <x86/specialreg.h>
40 
41 #include <crypto/openssl/ossl.h>
42 #include <crypto/openssl/ossl_cipher.h>
43 
44 /*
45  * See OPENSSL_ia32cap(3).
46  *
47  * [0] = cpu_feature but with a few custom bits
48  * [1] = cpu_feature2 but with AMD XOP in bit 11
49  * [2] = cpu_stdext_feature
50  * [3] = 0
51  */
52 unsigned int OPENSSL_ia32cap_P[4];
53 #define AESNI_CAPABLE	(OPENSSL_ia32cap_P[1]&(1<<(57-32)))
54 
55 ossl_cipher_setkey_t aesni_set_encrypt_key;
56 ossl_cipher_setkey_t aesni_set_decrypt_key;
57 
58 void
59 ossl_cpuid(struct ossl_softc *sc)
60 {
61 	uint64_t xcr0;
62 	u_int regs[4];
63 	u_int max_cores;
64 
65 	/* Derived from OpenSSL_ia32_cpuid. */
66 
67 	OPENSSL_ia32cap_P[0] = cpu_feature & ~(CPUID_B20 | CPUID_IA64);
68 	if (cpu_vendor_id == CPU_VENDOR_INTEL) {
69 		OPENSSL_ia32cap_P[0] |= CPUID_IA64;
70 		if ((cpu_id & 0xf00) != 0xf00)
71 			OPENSSL_ia32cap_P[0] |= CPUID_B20;
72 	}
73 
74 	/* Only leave CPUID_HTT on if HTT is present. */
75 	if (cpu_vendor_id == CPU_VENDOR_AMD && cpu_exthigh >= 0x80000008) {
76 		max_cores = (cpu_procinfo2 & AMDID_CMP_CORES) + 1;
77 		if (cpu_feature & CPUID_HTT) {
78 			if ((cpu_procinfo & CPUID_HTT_CORES) >> 16 <= max_cores)
79 				OPENSSL_ia32cap_P[0] &= ~CPUID_HTT;
80 		}
81 	} else {
82 		if (cpu_high >= 4) {
83 			cpuid_count(4, 0, regs);
84 			max_cores = (regs[0] >> 26) & 0xfff;
85 		} else
86 			max_cores = -1;
87 	}
88 	if (max_cores == 0)
89 		OPENSSL_ia32cap_P[0] &= ~CPUID_HTT;
90 	else if ((cpu_procinfo & CPUID_HTT_CORES) >> 16 == 0)
91 		OPENSSL_ia32cap_P[0] &= ~CPUID_HTT;
92 
93 	OPENSSL_ia32cap_P[1] = cpu_feature2 & ~AMDID2_XOP;
94 	if (cpu_vendor_id == CPU_VENDOR_AMD)
95 		OPENSSL_ia32cap_P[1] |= amd_feature2 & AMDID2_XOP;
96 
97 	OPENSSL_ia32cap_P[2] = cpu_stdext_feature;
98 	if ((OPENSSL_ia32cap_P[1] & CPUID2_XSAVE) == 0)
99 		OPENSSL_ia32cap_P[2] &= ~(CPUID_STDEXT_AVX512F |
100 		    CPUID_STDEXT_AVX512DQ);
101 
102 	/* Disable AVX512F on Skylake-X. */
103 	if ((cpu_id & 0x0fff0ff0) == 0x00050650)
104 		OPENSSL_ia32cap_P[2] &= ~(CPUID_STDEXT_AVX512F);
105 
106 	if (cpu_feature2 & CPUID2_OSXSAVE)
107 		xcr0 = rxcr(0);
108 	else
109 		xcr0 = 0;
110 
111 	if ((xcr0 & (XFEATURE_AVX512 | XFEATURE_AVX)) !=
112 	    (XFEATURE_AVX512 | XFEATURE_AVX))
113 		OPENSSL_ia32cap_P[2] &= ~(CPUID_STDEXT_AVX512VL |
114 		    CPUID_STDEXT_AVX512BW | CPUID_STDEXT_AVX512IFMA |
115 		    CPUID_STDEXT_AVX512F);
116 	if ((xcr0 & XFEATURE_AVX) != XFEATURE_AVX) {
117 		OPENSSL_ia32cap_P[1] &= ~(CPUID2_AVX | AMDID2_XOP | CPUID2_FMA);
118 		OPENSSL_ia32cap_P[2] &= ~CPUID_STDEXT_AVX2;
119 	}
120 
121 	if (!AESNI_CAPABLE) {
122 		sc->has_aes = false;
123 		return;
124 	}
125 	sc->has_aes = true;
126 	ossl_cipher_aes_cbc.set_encrypt_key = aesni_set_encrypt_key;
127 	ossl_cipher_aes_cbc.set_decrypt_key = aesni_set_decrypt_key;
128 }
129