xref: /freebsd/sys/dev/acpica/acpi_pcib_acpi.c (revision 069ac184)
1 /*-
2  * Copyright (c) 2000 Michael Smith
3  * Copyright (c) 2000 BSDi
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  */
27 
28 #include <sys/cdefs.h>
29 #include "opt_acpi.h"
30 #include "opt_pci.h"
31 
32 #include <sys/param.h>
33 #include <sys/bus.h>
34 #include <sys/kernel.h>
35 #include <sys/limits.h>
36 #include <sys/malloc.h>
37 #include <sys/module.h>
38 #include <sys/rman.h>
39 #include <sys/sysctl.h>
40 
41 #include <contrib/dev/acpica/include/acpi.h>
42 #include <contrib/dev/acpica/include/accommon.h>
43 
44 #include <dev/acpica/acpivar.h>
45 
46 #include <machine/pci_cfgreg.h>
47 #include <dev/pci/pcireg.h>
48 #include <dev/pci/pcivar.h>
49 #include <dev/pci/pcib_private.h>
50 #include "pcib_if.h"
51 
52 #include <dev/acpica/acpi_pcibvar.h>
53 
54 /* Hooks for the ACPI CA debugging infrastructure. */
55 #define _COMPONENT	ACPI_BUS
56 ACPI_MODULE_NAME("PCI_ACPI")
57 
58 struct acpi_hpcib_softc {
59     device_t		ap_dev;
60     ACPI_HANDLE		ap_handle;
61     bus_dma_tag_t	ap_dma_tag;
62     int			ap_flags;
63     uint32_t		ap_osc_ctl;
64 
65     int			ap_segment;	/* PCI domain */
66     int			ap_bus;		/* bios-assigned bus number */
67     int			ap_addr;	/* device/func of PCI-Host bridge */
68 
69     ACPI_BUFFER		ap_prt;		/* interrupt routing table */
70 #ifdef NEW_PCIB
71     struct pcib_host_resources ap_host_res;
72 #endif
73 };
74 
75 static int		acpi_pcib_acpi_probe(device_t bus);
76 static int		acpi_pcib_acpi_attach(device_t bus);
77 static int		acpi_pcib_read_ivar(device_t dev, device_t child,
78 			    int which, uintptr_t *result);
79 static int		acpi_pcib_write_ivar(device_t dev, device_t child,
80 			    int which, uintptr_t value);
81 static uint32_t		acpi_pcib_read_config(device_t dev, u_int bus,
82 			    u_int slot, u_int func, u_int reg, int bytes);
83 static void		acpi_pcib_write_config(device_t dev, u_int bus,
84 			    u_int slot, u_int func, u_int reg, uint32_t data,
85 			    int bytes);
86 static int		acpi_pcib_acpi_route_interrupt(device_t pcib,
87 			    device_t dev, int pin);
88 static int		acpi_pcib_alloc_msi(device_t pcib, device_t dev,
89 			    int count, int maxcount, int *irqs);
90 static int		acpi_pcib_map_msi(device_t pcib, device_t dev,
91 			    int irq, uint64_t *addr, uint32_t *data);
92 static int		acpi_pcib_alloc_msix(device_t pcib, device_t dev,
93 			    int *irq);
94 static struct resource *acpi_pcib_acpi_alloc_resource(device_t dev,
95 			    device_t child, int type, int *rid,
96 			    rman_res_t start, rman_res_t end, rman_res_t count,
97 			    u_int flags);
98 #ifdef NEW_PCIB
99 static int		acpi_pcib_acpi_adjust_resource(device_t dev,
100 			    device_t child, int type, struct resource *r,
101 			    rman_res_t start, rman_res_t end);
102 #ifdef PCI_RES_BUS
103 static int		acpi_pcib_acpi_release_resource(device_t dev,
104 			    device_t child, int type, int rid,
105 			    struct resource *r);
106 #endif
107 #endif
108 static int		acpi_pcib_request_feature(device_t pcib, device_t dev,
109 			    enum pci_feature feature);
110 static bus_dma_tag_t	acpi_pcib_get_dma_tag(device_t bus, device_t child);
111 
112 static device_method_t acpi_pcib_acpi_methods[] = {
113     /* Device interface */
114     DEVMETHOD(device_probe,		acpi_pcib_acpi_probe),
115     DEVMETHOD(device_attach,		acpi_pcib_acpi_attach),
116     DEVMETHOD(device_shutdown,		bus_generic_shutdown),
117     DEVMETHOD(device_suspend,		bus_generic_suspend),
118     DEVMETHOD(device_resume,		bus_generic_resume),
119 
120     /* Bus interface */
121     DEVMETHOD(bus_read_ivar,		acpi_pcib_read_ivar),
122     DEVMETHOD(bus_write_ivar,		acpi_pcib_write_ivar),
123     DEVMETHOD(bus_alloc_resource,	acpi_pcib_acpi_alloc_resource),
124 #ifdef NEW_PCIB
125     DEVMETHOD(bus_adjust_resource,	acpi_pcib_acpi_adjust_resource),
126 #else
127     DEVMETHOD(bus_adjust_resource,	bus_generic_adjust_resource),
128 #endif
129 #if defined(NEW_PCIB) && defined(PCI_RES_BUS)
130     DEVMETHOD(bus_release_resource,	acpi_pcib_acpi_release_resource),
131 #else
132     DEVMETHOD(bus_release_resource,	bus_generic_release_resource),
133 #endif
134     DEVMETHOD(bus_activate_resource,	bus_generic_activate_resource),
135     DEVMETHOD(bus_deactivate_resource,	bus_generic_deactivate_resource),
136     DEVMETHOD(bus_setup_intr,		bus_generic_setup_intr),
137     DEVMETHOD(bus_teardown_intr,	bus_generic_teardown_intr),
138     DEVMETHOD(bus_get_cpus,		acpi_pcib_get_cpus),
139     DEVMETHOD(bus_get_dma_tag,		acpi_pcib_get_dma_tag),
140 
141     /* pcib interface */
142     DEVMETHOD(pcib_maxslots,		pcib_maxslots),
143     DEVMETHOD(pcib_read_config,		acpi_pcib_read_config),
144     DEVMETHOD(pcib_write_config,	acpi_pcib_write_config),
145     DEVMETHOD(pcib_route_interrupt,	acpi_pcib_acpi_route_interrupt),
146     DEVMETHOD(pcib_alloc_msi,		acpi_pcib_alloc_msi),
147     DEVMETHOD(pcib_release_msi,		pcib_release_msi),
148     DEVMETHOD(pcib_alloc_msix,		acpi_pcib_alloc_msix),
149     DEVMETHOD(pcib_release_msix,	pcib_release_msix),
150     DEVMETHOD(pcib_map_msi,		acpi_pcib_map_msi),
151     DEVMETHOD(pcib_power_for_sleep,	acpi_pcib_power_for_sleep),
152     DEVMETHOD(pcib_request_feature,	acpi_pcib_request_feature),
153 
154     DEVMETHOD_END
155 };
156 
157 DEFINE_CLASS_0(pcib, acpi_pcib_acpi_driver, acpi_pcib_acpi_methods,
158     sizeof(struct acpi_hpcib_softc));
159 DRIVER_MODULE(acpi_pcib, acpi, acpi_pcib_acpi_driver, 0, 0);
160 MODULE_DEPEND(acpi_pcib, acpi, 1, 1, 1);
161 
162 static int
163 acpi_pcib_acpi_probe(device_t dev)
164 {
165     ACPI_DEVICE_INFO	*devinfo;
166     ACPI_HANDLE		h;
167     int			root;
168 
169     if (acpi_disabled("pcib") || (h = acpi_get_handle(dev)) == NULL ||
170 	ACPI_FAILURE(AcpiGetObjectInfo(h, &devinfo)))
171 	return (ENXIO);
172     root = (devinfo->Flags & ACPI_PCI_ROOT_BRIDGE) != 0;
173     AcpiOsFree(devinfo);
174     if (!root || pci_cfgregopen() == 0)
175 	return (ENXIO);
176 
177     device_set_desc(dev, "ACPI Host-PCI bridge");
178     return (0);
179 }
180 
181 #ifdef NEW_PCIB
182 static ACPI_STATUS
183 acpi_pcib_producer_handler(ACPI_RESOURCE *res, void *context)
184 {
185 	struct acpi_hpcib_softc *sc;
186 	UINT64 length, min, max;
187 	u_int flags;
188 	int error, type;
189 
190 	sc = context;
191 	switch (res->Type) {
192 	case ACPI_RESOURCE_TYPE_START_DEPENDENT:
193 	case ACPI_RESOURCE_TYPE_END_DEPENDENT:
194 		panic("host bridge has depenedent resources");
195 	case ACPI_RESOURCE_TYPE_ADDRESS16:
196 	case ACPI_RESOURCE_TYPE_ADDRESS32:
197 	case ACPI_RESOURCE_TYPE_ADDRESS64:
198 	case ACPI_RESOURCE_TYPE_EXTENDED_ADDRESS64:
199 		if (res->Data.Address.ProducerConsumer != ACPI_PRODUCER)
200 			break;
201 		switch (res->Type) {
202 		case ACPI_RESOURCE_TYPE_ADDRESS16:
203 			min = res->Data.Address16.Address.Minimum;
204 			max = res->Data.Address16.Address.Maximum;
205 			length = res->Data.Address16.Address.AddressLength;
206 			break;
207 		case ACPI_RESOURCE_TYPE_ADDRESS32:
208 			min = res->Data.Address32.Address.Minimum;
209 			max = res->Data.Address32.Address.Maximum;
210 			length = res->Data.Address32.Address.AddressLength;
211 			break;
212 		case ACPI_RESOURCE_TYPE_ADDRESS64:
213 			min = res->Data.Address64.Address.Minimum;
214 			max = res->Data.Address64.Address.Maximum;
215 			length = res->Data.Address64.Address.AddressLength;
216 			break;
217 		default:
218 			KASSERT(res->Type ==
219 			    ACPI_RESOURCE_TYPE_EXTENDED_ADDRESS64,
220 			    ("should never happen"));
221 			min = res->Data.ExtAddress64.Address.Minimum;
222 			max = res->Data.ExtAddress64.Address.Maximum;
223 			length = res->Data.ExtAddress64.Address.AddressLength;
224 			break;
225 		}
226 		if (length == 0)
227 			break;
228 		if (min + length - 1 != max &&
229 		    (res->Data.Address.MinAddressFixed != ACPI_ADDRESS_FIXED ||
230 		    res->Data.Address.MaxAddressFixed != ACPI_ADDRESS_FIXED))
231 			break;
232 		flags = 0;
233 		switch (res->Data.Address.ResourceType) {
234 		case ACPI_MEMORY_RANGE:
235 			type = SYS_RES_MEMORY;
236 			if (res->Type != ACPI_RESOURCE_TYPE_EXTENDED_ADDRESS64) {
237 				if (res->Data.Address.Info.Mem.Caching ==
238 				    ACPI_PREFETCHABLE_MEMORY)
239 					flags |= RF_PREFETCHABLE;
240 			} else {
241 				/*
242 				 * XXX: Parse prefetch flag out of
243 				 * TypeSpecific.
244 				 */
245 			}
246 			break;
247 		case ACPI_IO_RANGE:
248 			type = SYS_RES_IOPORT;
249 			break;
250 #ifdef PCI_RES_BUS
251 		case ACPI_BUS_NUMBER_RANGE:
252 			type = PCI_RES_BUS;
253 			break;
254 #endif
255 		default:
256 			return (AE_OK);
257 		}
258 
259 		if (min + length - 1 != max)
260 			device_printf(sc->ap_dev,
261 			    "Length mismatch for %d range: %jx vs %jx\n", type,
262 			    (uintmax_t)(max - min + 1), (uintmax_t)length);
263 #ifdef __i386__
264 		if (min > ULONG_MAX) {
265 			device_printf(sc->ap_dev,
266 			    "Ignoring %d range above 4GB (%#jx-%#jx)\n",
267 			    type, (uintmax_t)min, (uintmax_t)max);
268 			break;
269 		}
270 		if (max > ULONG_MAX) {
271 			device_printf(sc->ap_dev,
272        		    "Truncating end of %d range above 4GB (%#jx-%#jx)\n",
273 			    type, (uintmax_t)min, (uintmax_t)max);
274 			max = ULONG_MAX;
275 		}
276 #endif
277 		error = pcib_host_res_decodes(&sc->ap_host_res, type, min, max,
278 		    flags);
279 		if (error)
280 			panic("Failed to manage %d range (%#jx-%#jx): %d",
281 			    type, (uintmax_t)min, (uintmax_t)max, error);
282 		break;
283 	default:
284 		break;
285 	}
286 	return (AE_OK);
287 }
288 #endif
289 
290 #if defined(NEW_PCIB) && defined(PCI_RES_BUS)
291 static bool
292 get_decoded_bus_range(struct acpi_hpcib_softc *sc, rman_res_t *startp,
293     rman_res_t *endp)
294 {
295 	struct resource_list_entry *rle;
296 
297 	rle = resource_list_find(&sc->ap_host_res.hr_rl, PCI_RES_BUS, 0);
298 	if (rle == NULL)
299 		return (false);
300 	*startp = rle->start;
301 	*endp = rle->end;
302 	return (true);
303 }
304 #endif
305 
306 static int
307 acpi_pcib_osc(struct acpi_hpcib_softc *sc, uint32_t osc_ctl)
308 {
309 	ACPI_STATUS status;
310 	uint32_t cap_set[3];
311 
312 	static uint8_t pci_host_bridge_uuid[ACPI_UUID_LENGTH] = {
313 		0x5b, 0x4d, 0xdb, 0x33, 0xf7, 0x1f, 0x1c, 0x40,
314 		0x96, 0x57, 0x74, 0x41, 0xc0, 0x3d, 0xd7, 0x66
315 	};
316 
317 	/*
318 	 * Don't invoke _OSC if a control is already granted.
319 	 * However, always invoke _OSC during attach when 0 is passed.
320 	 */
321 	if (osc_ctl != 0 && (sc->ap_osc_ctl & osc_ctl) == osc_ctl)
322 		return (0);
323 
324 	/* Support Field: Extended PCI Config Space, PCI Segment Groups, MSI */
325 	cap_set[PCI_OSC_SUPPORT] = PCIM_OSC_SUPPORT_EXT_PCI_CONF |
326 	    PCIM_OSC_SUPPORT_SEG_GROUP | PCIM_OSC_SUPPORT_MSI;
327 	/* Active State Power Management, Clock Power Management Capability */
328 	if (pci_enable_aspm)
329 		cap_set[PCI_OSC_SUPPORT] |= PCIM_OSC_SUPPORT_ASPM |
330 		    PCIM_OSC_SUPPORT_CPMC;
331 
332 	/* Control Field */
333 	cap_set[PCI_OSC_CTL] = sc->ap_osc_ctl | osc_ctl;
334 
335 	status = acpi_EvaluateOSC(sc->ap_handle, pci_host_bridge_uuid, 1,
336 	    nitems(cap_set), cap_set, cap_set, false);
337 	if (ACPI_FAILURE(status)) {
338 		if (status == AE_NOT_FOUND) {
339 			sc->ap_osc_ctl |= osc_ctl;
340 			return (0);
341 		}
342 		device_printf(sc->ap_dev, "_OSC failed: %s\n",
343 		    AcpiFormatException(status));
344 		return (EIO);
345 	}
346 
347 	/*
348 	 * _OSC may return an error in the status word, but will
349 	 * update the control mask always.  _OSC should not revoke
350 	 * previously-granted controls.
351 	 */
352 	if ((cap_set[PCI_OSC_CTL] & sc->ap_osc_ctl) != sc->ap_osc_ctl)
353 		device_printf(sc->ap_dev, "_OSC revoked %#x\n",
354 		    (cap_set[PCI_OSC_CTL] & sc->ap_osc_ctl) ^ sc->ap_osc_ctl);
355 	sc->ap_osc_ctl = cap_set[PCI_OSC_CTL];
356 	if ((sc->ap_osc_ctl & osc_ctl) != osc_ctl)
357 		return (EIO);
358 
359 	return (0);
360 }
361 
362 static int
363 acpi_pcib_acpi_attach(device_t dev)
364 {
365     struct acpi_hpcib_softc	*sc;
366     ACPI_STATUS			status;
367     static int bus0_seen = 0;
368     u_int slot, func, busok;
369 #if defined(NEW_PCIB) && defined(PCI_RES_BUS)
370     struct resource *bus_res;
371     rman_res_t end, start;
372     int rid;
373 #endif
374     int error, domain;
375     uint8_t busno;
376 
377     ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
378 
379     sc = device_get_softc(dev);
380     sc->ap_dev = dev;
381     sc->ap_handle = acpi_get_handle(dev);
382 
383     /*
384      * Don't attach if we're not really there.
385      */
386     if (!acpi_DeviceIsPresent(dev))
387 	return (ENXIO);
388 
389     acpi_pcib_osc(sc, 0);
390 
391     /*
392      * Get our segment number by evaluating _SEG.
393      * It's OK for this to not exist.
394      */
395     status = acpi_GetInteger(sc->ap_handle, "_SEG", &sc->ap_segment);
396     if (ACPI_FAILURE(status)) {
397 	if (status != AE_NOT_FOUND) {
398 	    device_printf(dev, "could not evaluate _SEG - %s\n",
399 		AcpiFormatException(status));
400 	    return_VALUE (ENXIO);
401 	}
402 	/* If it's not found, assume 0. */
403 	sc->ap_segment = 0;
404     }
405 
406     /*
407      * Get the address (device and function) of the associated
408      * PCI-Host bridge device from _ADR.  Assume we don't have one if
409      * it doesn't exist.
410      */
411     status = acpi_GetInteger(sc->ap_handle, "_ADR", &sc->ap_addr);
412     if (ACPI_FAILURE(status)) {
413 	if (status != AE_NOT_FOUND)
414 	    device_printf(dev, "could not evaluate _ADR - %s\n",
415 		AcpiFormatException(status));
416 	sc->ap_addr = -1;
417     }
418 
419 #ifdef NEW_PCIB
420     /*
421      * Determine which address ranges this bridge decodes and setup
422      * resource managers for those ranges.
423      */
424     if (pcib_host_res_init(sc->ap_dev, &sc->ap_host_res) != 0)
425 	    panic("failed to init hostb resources");
426     if (!acpi_disabled("hostres")) {
427 	status = AcpiWalkResources(sc->ap_handle, "_CRS",
428 	    acpi_pcib_producer_handler, sc);
429 	if (ACPI_FAILURE(status) && status != AE_NOT_FOUND)
430 	    device_printf(sc->ap_dev, "failed to parse resources: %s\n",
431 		AcpiFormatException(status));
432     }
433 #endif
434 
435     /*
436      * Get our base bus number by evaluating _BBN.
437      * If this doesn't work, we assume we're bus number 0.
438      *
439      * XXX note that it may also not exist in the case where we are
440      *     meant to use a private configuration space mechanism for this bus,
441      *     so we should dig out our resources and check to see if we have
442      *     anything like that.  How do we do this?
443      * XXX If we have the requisite information, and if we don't think the
444      *     default PCI configuration space handlers can deal with this bus,
445      *     we should attach our own handler.
446      * XXX invoke _REG on this for the PCI config space address space?
447      * XXX It seems many BIOS's with multiple Host-PCI bridges do not set
448      *     _BBN correctly.  They set _BBN to zero for all bridges.  Thus,
449      *     if _BBN is zero and PCI bus 0 already exists, we try to read our
450      *     bus number from the configuration registers at address _ADR.
451      *     We only do this for domain/segment 0 in the hopes that this is
452      *     only needed for old single-domain machines.
453      */
454     status = acpi_GetInteger(sc->ap_handle, "_BBN", &sc->ap_bus);
455     if (ACPI_FAILURE(status)) {
456 	if (status != AE_NOT_FOUND) {
457 	    device_printf(dev, "could not evaluate _BBN - %s\n",
458 		AcpiFormatException(status));
459 	    return (ENXIO);
460 	} else {
461 	    /* If it's not found, assume 0. */
462 	    sc->ap_bus = 0;
463 	}
464     }
465 
466     /*
467      * If this is segment 0, the bus is zero, and PCI bus 0 already
468      * exists, read the bus number via PCI config space.
469      */
470     busok = 1;
471     if (sc->ap_segment == 0 && sc->ap_bus == 0 && bus0_seen) {
472 	busok = 0;
473 	if (sc->ap_addr != -1) {
474 	    /* XXX: We assume bus 0. */
475 	    slot = ACPI_ADR_PCI_SLOT(sc->ap_addr);
476 	    func = ACPI_ADR_PCI_FUNC(sc->ap_addr);
477 	    if (bootverbose)
478 		device_printf(dev, "reading config registers from 0:%d:%d\n",
479 		    slot, func);
480 	    if (host_pcib_get_busno(pci_cfgregread, 0, slot, func, &busno) == 0)
481 		device_printf(dev, "couldn't read bus number from cfg space\n");
482 	    else {
483 		sc->ap_bus = busno;
484 		busok = 1;
485 	    }
486 	}
487     }
488 
489 #if defined(NEW_PCIB) && defined(PCI_RES_BUS)
490     /*
491      * If nothing else worked, hope that ACPI at least lays out the
492      * Host-PCI bridges in order and that as a result the next free
493      * bus number is our bus number.
494      */
495     if (busok == 0) {
496 	    /*
497 	     * If we have a region of bus numbers, use the first
498 	     * number for our bus.
499 	     */
500 	    if (get_decoded_bus_range(sc, &start, &end))
501 		    sc->ap_bus = start;
502 	    else {
503 		    rid = 0;
504 		    bus_res = pci_domain_alloc_bus(sc->ap_segment, dev, &rid, 0,
505 			PCI_BUSMAX, 1, 0);
506 		    if (bus_res == NULL) {
507 			    device_printf(dev,
508 				"could not allocate bus number\n");
509 			    pcib_host_res_free(dev, &sc->ap_host_res);
510 			    return (ENXIO);
511 		    }
512 		    sc->ap_bus = rman_get_start(bus_res);
513 		    pci_domain_release_bus(sc->ap_segment, dev, rid, bus_res);
514 	    }
515     } else {
516 	    /*
517 	     * If there is a decoded bus range, assume the bus number is
518 	     * the first value in the range.  Warn if _BBN doesn't match.
519 	     */
520 	    if (get_decoded_bus_range(sc, &start, &end)) {
521 		    if (sc->ap_bus != start) {
522 			    device_printf(dev,
523 				"WARNING: BIOS configured bus number (%d) is "
524 				"not within decoded bus number range "
525 				"(%ju - %ju).\n",
526 				sc->ap_bus, (uintmax_t)start, (uintmax_t)end);
527 			    device_printf(dev,
528 				"Using range start (%ju) as bus number.\n",
529 				(uintmax_t)start);
530 			    sc->ap_bus = start;
531 		    }
532 	    }
533     }
534 #else
535     /*
536      * If nothing else worked, hope that ACPI at least lays out the
537      * host-PCI bridges in order and that as a result our unit number
538      * is actually our bus number.  There are several reasons this
539      * might not be true.
540      */
541     if (busok == 0) {
542 	sc->ap_bus = device_get_unit(dev);
543 	device_printf(dev, "trying bus number %d\n", sc->ap_bus);
544     }
545 #endif
546 
547     /* If this is bus 0 on segment 0, note that it has been seen already. */
548     if (sc->ap_segment == 0 && sc->ap_bus == 0)
549 	    bus0_seen = 1;
550 
551     acpi_pcib_fetch_prt(dev, &sc->ap_prt);
552 
553     error = bus_dma_tag_create(bus_get_dma_tag(dev), 1,
554 	0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
555 	NULL, NULL, BUS_SPACE_MAXSIZE, BUS_SPACE_UNRESTRICTED,
556 	BUS_SPACE_MAXSIZE, 0, NULL, NULL, &sc->ap_dma_tag);
557     if (error != 0)
558 	goto errout;
559     error = bus_get_domain(dev, &domain);
560     if (error == 0)
561 	error = bus_dma_tag_set_domain(sc->ap_dma_tag, domain);
562     /* Don't fail to attach if the domain can't be queried or set. */
563     error = 0;
564 
565     bus_generic_probe(dev);
566     if (device_add_child(dev, "pci", -1) == NULL) {
567 	bus_dma_tag_destroy(sc->ap_dma_tag);
568 	sc->ap_dma_tag = NULL;
569 	error = ENXIO;
570 	goto errout;
571     }
572     return (bus_generic_attach(dev));
573 
574 errout:
575     device_printf(device_get_parent(dev), "couldn't attach pci bus\n");
576 #if defined(NEW_PCIB) && defined(PCI_RES_BUS)
577     pcib_host_res_free(dev, &sc->ap_host_res);
578 #endif
579     return (error);
580 }
581 
582 /*
583  * Support for standard PCI bridge ivars.
584  */
585 static int
586 acpi_pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
587 {
588     struct acpi_hpcib_softc	*sc = device_get_softc(dev);
589 
590     switch (which) {
591     case PCIB_IVAR_DOMAIN:
592 	*result = sc->ap_segment;
593 	return (0);
594     case PCIB_IVAR_BUS:
595 	*result = sc->ap_bus;
596 	return (0);
597     case ACPI_IVAR_HANDLE:
598 	*result = (uintptr_t)sc->ap_handle;
599 	return (0);
600     case ACPI_IVAR_FLAGS:
601 	*result = (uintptr_t)sc->ap_flags;
602 	return (0);
603     }
604     return (ENOENT);
605 }
606 
607 static int
608 acpi_pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
609 {
610     struct acpi_hpcib_softc	*sc = device_get_softc(dev);
611 
612     switch (which) {
613     case PCIB_IVAR_DOMAIN:
614 	return (EINVAL);
615     case PCIB_IVAR_BUS:
616 	sc->ap_bus = value;
617 	return (0);
618     case ACPI_IVAR_HANDLE:
619 	sc->ap_handle = (ACPI_HANDLE)value;
620 	return (0);
621     case ACPI_IVAR_FLAGS:
622 	sc->ap_flags = (int)value;
623 	return (0);
624     }
625     return (ENOENT);
626 }
627 
628 static uint32_t
629 acpi_pcib_read_config(device_t dev, u_int bus, u_int slot, u_int func,
630     u_int reg, int bytes)
631 {
632     struct acpi_hpcib_softc *sc = device_get_softc(dev);
633 
634     return (pci_cfgregread(sc->ap_segment, bus, slot, func, reg, bytes));
635 }
636 
637 static void
638 acpi_pcib_write_config(device_t dev, u_int bus, u_int slot, u_int func,
639     u_int reg, uint32_t data, int bytes)
640 {
641     struct acpi_hpcib_softc *sc = device_get_softc(dev);
642 
643     pci_cfgregwrite(sc->ap_segment, bus, slot, func, reg, data, bytes);
644 }
645 
646 static int
647 acpi_pcib_acpi_route_interrupt(device_t pcib, device_t dev, int pin)
648 {
649     struct acpi_hpcib_softc *sc = device_get_softc(pcib);
650 
651     return (acpi_pcib_route_interrupt(pcib, dev, pin, &sc->ap_prt));
652 }
653 
654 static int
655 acpi_pcib_alloc_msi(device_t pcib, device_t dev, int count, int maxcount,
656     int *irqs)
657 {
658 	device_t bus;
659 
660 	bus = device_get_parent(pcib);
661 	return (PCIB_ALLOC_MSI(device_get_parent(bus), dev, count, maxcount,
662 	    irqs));
663 }
664 
665 static int
666 acpi_pcib_alloc_msix(device_t pcib, device_t dev, int *irq)
667 {
668 	device_t bus;
669 
670 	bus = device_get_parent(pcib);
671 	return (PCIB_ALLOC_MSIX(device_get_parent(bus), dev, irq));
672 }
673 
674 static int
675 acpi_pcib_map_msi(device_t pcib, device_t dev, int irq, uint64_t *addr,
676     uint32_t *data)
677 {
678 	struct acpi_hpcib_softc *sc;
679 	device_t bus, hostb;
680 	int error;
681 
682 	bus = device_get_parent(pcib);
683 	error = PCIB_MAP_MSI(device_get_parent(bus), dev, irq, addr, data);
684 	if (error)
685 		return (error);
686 
687 	sc = device_get_softc(pcib);
688 	if (sc->ap_addr == -1)
689 		return (0);
690 	/* XXX: Assumes all bridges are on bus 0. */
691 	hostb = pci_find_dbsf(sc->ap_segment, 0, ACPI_ADR_PCI_SLOT(sc->ap_addr),
692 	    ACPI_ADR_PCI_FUNC(sc->ap_addr));
693 	if (hostb != NULL)
694 		pci_ht_map_msi(hostb, *addr);
695 	return (0);
696 }
697 
698 struct resource *
699 acpi_pcib_acpi_alloc_resource(device_t dev, device_t child, int type, int *rid,
700     rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
701 {
702 #ifdef NEW_PCIB
703     struct acpi_hpcib_softc *sc;
704     struct resource *res;
705 #endif
706 
707 #if defined(__i386__) || defined(__amd64__)
708     start = hostb_alloc_start(type, start, end, count);
709 #endif
710 
711 #ifdef NEW_PCIB
712     sc = device_get_softc(dev);
713 #ifdef PCI_RES_BUS
714     if (type == PCI_RES_BUS)
715 	return (pci_domain_alloc_bus(sc->ap_segment, child, rid, start, end,
716 	    count, flags));
717 #endif
718     res = pcib_host_res_alloc(&sc->ap_host_res, child, type, rid, start, end,
719 	count, flags);
720 
721     /*
722      * XXX: If this is a request for a specific range, assume it is
723      * correct and pass it up to the parent.  What we probably want to
724      * do long-term is explicitly trust any firmware-configured
725      * resources during the initial bus scan on boot and then disable
726      * this after that.
727      */
728     if (res == NULL && start + count - 1 == end)
729 	res = bus_generic_alloc_resource(dev, child, type, rid, start, end,
730 	    count, flags);
731     return (res);
732 #else
733     return (bus_generic_alloc_resource(dev, child, type, rid, start, end,
734 	count, flags));
735 #endif
736 }
737 
738 #ifdef NEW_PCIB
739 int
740 acpi_pcib_acpi_adjust_resource(device_t dev, device_t child, int type,
741     struct resource *r, rman_res_t start, rman_res_t end)
742 {
743 	struct acpi_hpcib_softc *sc;
744 
745 	sc = device_get_softc(dev);
746 #ifdef PCI_RES_BUS
747 	if (type == PCI_RES_BUS)
748 		return (pci_domain_adjust_bus(sc->ap_segment, child, r, start,
749 		    end));
750 #endif
751 	return (pcib_host_res_adjust(&sc->ap_host_res, child, type, r, start,
752 	    end));
753 }
754 
755 #ifdef PCI_RES_BUS
756 int
757 acpi_pcib_acpi_release_resource(device_t dev, device_t child, int type, int rid,
758     struct resource *r)
759 {
760 	struct acpi_hpcib_softc *sc;
761 
762 	sc = device_get_softc(dev);
763 	if (type == PCI_RES_BUS)
764 		return (pci_domain_release_bus(sc->ap_segment, child, rid, r));
765 	return (bus_generic_release_resource(dev, child, type, rid, r));
766 }
767 #endif
768 #endif
769 
770 static int
771 acpi_pcib_request_feature(device_t pcib, device_t dev, enum pci_feature feature)
772 {
773 	uint32_t osc_ctl;
774 	struct acpi_hpcib_softc *sc;
775 
776 	sc = device_get_softc(pcib);
777 
778 	switch (feature) {
779 	case PCI_FEATURE_HP:
780 		osc_ctl = PCIM_OSC_CTL_PCIE_HP;
781 		break;
782 	case PCI_FEATURE_AER:
783 		osc_ctl = PCIM_OSC_CTL_PCIE_AER;
784 		break;
785 	default:
786 		return (EINVAL);
787 	}
788 
789 	return (acpi_pcib_osc(sc, osc_ctl));
790 }
791 
792 static bus_dma_tag_t
793 acpi_pcib_get_dma_tag(device_t bus, device_t child)
794 {
795 	struct acpi_hpcib_softc *sc;
796 
797 	sc = device_get_softc(bus);
798 
799 	return (sc->ap_dma_tag);
800 }
801