xref: /freebsd/sys/dev/ath/ath_hal/ar5212/ar2317.c (revision 95ee2897)
16e778a7eSPedro F. Giffuni /*-
26e778a7eSPedro F. Giffuni  * SPDX-License-Identifier: ISC
36e778a7eSPedro F. Giffuni  *
459efa8b5SSam Leffler  * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
514779705SSam Leffler  * Copyright (c) 2002-2008 Atheros Communications, Inc.
614779705SSam Leffler  *
714779705SSam Leffler  * Permission to use, copy, modify, and/or distribute this software for any
814779705SSam Leffler  * purpose with or without fee is hereby granted, provided that the above
914779705SSam Leffler  * copyright notice and this permission notice appear in all copies.
1014779705SSam Leffler  *
1114779705SSam Leffler  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
1214779705SSam Leffler  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
1314779705SSam Leffler  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
1414779705SSam Leffler  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
1514779705SSam Leffler  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
1614779705SSam Leffler  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
1714779705SSam Leffler  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
1814779705SSam Leffler  */
1914779705SSam Leffler #include "opt_ah.h"
2014779705SSam Leffler 
2114779705SSam Leffler #include "ah.h"
2214779705SSam Leffler #include "ah_internal.h"
2314779705SSam Leffler 
2414779705SSam Leffler #include "ar5212/ar5212.h"
2514779705SSam Leffler #include "ar5212/ar5212reg.h"
2614779705SSam Leffler #include "ar5212/ar5212phy.h"
2714779705SSam Leffler 
2814779705SSam Leffler #include "ah_eeprom_v3.h"
2914779705SSam Leffler 
3014779705SSam Leffler #define AH_5212_2317
3114779705SSam Leffler #include "ar5212/ar5212.ini"
3214779705SSam Leffler 
3314779705SSam Leffler #define	N(a)	(sizeof(a)/sizeof(a[0]))
3414779705SSam Leffler 
3514779705SSam Leffler typedef	RAW_DATA_STRUCT_2413 RAW_DATA_STRUCT_2317;
3614779705SSam Leffler typedef RAW_DATA_PER_CHANNEL_2413 RAW_DATA_PER_CHANNEL_2317;
3714779705SSam Leffler #define PWR_TABLE_SIZE_2317 PWR_TABLE_SIZE_2413
3814779705SSam Leffler 
3914779705SSam Leffler struct ar2317State {
4014779705SSam Leffler 	RF_HAL_FUNCS	base;		/* public state, must be first */
4114779705SSam Leffler 	uint16_t	pcdacTable[PWR_TABLE_SIZE_2317];
4214779705SSam Leffler 
4314779705SSam Leffler 	uint32_t	Bank1Data[N(ar5212Bank1_2317)];
4414779705SSam Leffler 	uint32_t	Bank2Data[N(ar5212Bank2_2317)];
4514779705SSam Leffler 	uint32_t	Bank3Data[N(ar5212Bank3_2317)];
4614779705SSam Leffler 	uint32_t	Bank6Data[N(ar5212Bank6_2317)];
4714779705SSam Leffler 	uint32_t	Bank7Data[N(ar5212Bank7_2317)];
4814779705SSam Leffler 
4914779705SSam Leffler 	/*
5014779705SSam Leffler 	 * Private state for reduced stack usage.
5114779705SSam Leffler 	 */
5214779705SSam Leffler 	/* filled out Vpd table for all pdGains (chanL) */
5314779705SSam Leffler 	uint16_t vpdTable_L[MAX_NUM_PDGAINS_PER_CHANNEL]
5414779705SSam Leffler 			    [MAX_PWR_RANGE_IN_HALF_DB];
5514779705SSam Leffler 	/* filled out Vpd table for all pdGains (chanR) */
5614779705SSam Leffler 	uint16_t vpdTable_R[MAX_NUM_PDGAINS_PER_CHANNEL]
5714779705SSam Leffler 			    [MAX_PWR_RANGE_IN_HALF_DB];
5814779705SSam Leffler 	/* filled out Vpd table for all pdGains (interpolated) */
5914779705SSam Leffler 	uint16_t vpdTable_I[MAX_NUM_PDGAINS_PER_CHANNEL]
6014779705SSam Leffler 			    [MAX_PWR_RANGE_IN_HALF_DB];
6114779705SSam Leffler };
6214779705SSam Leffler #define	AR2317(ah)	((struct ar2317State *) AH5212(ah)->ah_rfHal)
6314779705SSam Leffler 
6414779705SSam Leffler extern	void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32,
6514779705SSam Leffler 		uint32_t numBits, uint32_t firstBit, uint32_t column);
6614779705SSam Leffler 
6714779705SSam Leffler static void
ar2317WriteRegs(struct ath_hal * ah,u_int modesIndex,u_int freqIndex,int writes)6814779705SSam Leffler ar2317WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex,
6914779705SSam Leffler 	int writes)
7014779705SSam Leffler {
7114779705SSam Leffler 	HAL_INI_WRITE_ARRAY(ah, ar5212Modes_2317, modesIndex, writes);
7214779705SSam Leffler 	HAL_INI_WRITE_ARRAY(ah, ar5212Common_2317, 1, writes);
7314779705SSam Leffler 	HAL_INI_WRITE_ARRAY(ah, ar5212BB_RfGain_2317, freqIndex, writes);
7414779705SSam Leffler }
7514779705SSam Leffler 
7614779705SSam Leffler /*
7714779705SSam Leffler  * Take the MHz channel value and set the Channel value
7814779705SSam Leffler  *
7914779705SSam Leffler  * ASSUMES: Writes enabled to analog bus
8014779705SSam Leffler  */
8114779705SSam Leffler static HAL_BOOL
ar2317SetChannel(struct ath_hal * ah,const struct ieee80211_channel * chan)8259efa8b5SSam Leffler ar2317SetChannel(struct ath_hal *ah,  const struct ieee80211_channel *chan)
8314779705SSam Leffler {
8459efa8b5SSam Leffler 	uint16_t freq = ath_hal_gethwchannel(ah, chan);
8514779705SSam Leffler 	uint32_t channelSel  = 0;
8614779705SSam Leffler 	uint32_t bModeSynth  = 0;
8714779705SSam Leffler 	uint32_t aModeRefSel = 0;
8814779705SSam Leffler 	uint32_t reg32       = 0;
8914779705SSam Leffler 
9059efa8b5SSam Leffler 	OS_MARK(ah, AH_MARK_SETCHANNEL, freq);
9114779705SSam Leffler 
9259efa8b5SSam Leffler 	if (freq < 4800) {
9314779705SSam Leffler 		uint32_t txctl;
9459efa8b5SSam Leffler 		channelSel = freq - 2272 ;
9514779705SSam Leffler 		channelSel = ath_hal_reverseBits(channelSel, 8);
9614779705SSam Leffler 
9714779705SSam Leffler 		txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL);
9859efa8b5SSam Leffler 		if (freq == 2484) {
9914779705SSam Leffler 			/* Enable channel spreading for channel 14 */
10014779705SSam Leffler 			OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
10114779705SSam Leffler 				txctl | AR_PHY_CCK_TX_CTRL_JAPAN);
10214779705SSam Leffler 		} else {
10314779705SSam Leffler 			OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
10414779705SSam Leffler 				txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN);
10514779705SSam Leffler 		}
10659efa8b5SSam Leffler 	} else if ((freq % 20) == 0 && freq >= 5120) {
10714779705SSam Leffler 		channelSel = ath_hal_reverseBits(
10859efa8b5SSam Leffler 			((freq - 4800) / 20 << 2), 8);
10914779705SSam Leffler 		aModeRefSel = ath_hal_reverseBits(3, 2);
11059efa8b5SSam Leffler 	} else if ((freq % 10) == 0) {
11114779705SSam Leffler 		channelSel = ath_hal_reverseBits(
11259efa8b5SSam Leffler 			((freq - 4800) / 10 << 1), 8);
11314779705SSam Leffler 		aModeRefSel = ath_hal_reverseBits(2, 2);
11459efa8b5SSam Leffler 	} else if ((freq % 5) == 0) {
11514779705SSam Leffler 		channelSel = ath_hal_reverseBits(
11659efa8b5SSam Leffler 			(freq - 4800) / 5, 8);
11714779705SSam Leffler 		aModeRefSel = ath_hal_reverseBits(1, 2);
11814779705SSam Leffler 	} else {
11914779705SSam Leffler 		HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n",
12059efa8b5SSam Leffler 		    __func__, freq);
12114779705SSam Leffler 		return AH_FALSE;
12214779705SSam Leffler 	}
12314779705SSam Leffler 
12414779705SSam Leffler 	reg32 = (channelSel << 4) | (aModeRefSel << 2) | (bModeSynth << 1) |
12514779705SSam Leffler 			(1 << 12) | 0x1;
12614779705SSam Leffler 	OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff);
12714779705SSam Leffler 
12814779705SSam Leffler 	reg32 >>= 8;
12914779705SSam Leffler 	OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f);
13014779705SSam Leffler 
13114779705SSam Leffler 	AH_PRIVATE(ah)->ah_curchan = chan;
13214779705SSam Leffler 	return AH_TRUE;
13314779705SSam Leffler }
13414779705SSam Leffler 
13514779705SSam Leffler /*
13614779705SSam Leffler  * Reads EEPROM header info from device structure and programs
13714779705SSam Leffler  * all rf registers
13814779705SSam Leffler  *
13914779705SSam Leffler  * REQUIRES: Access to the analog rf device
14014779705SSam Leffler  */
14114779705SSam Leffler static HAL_BOOL
ar2317SetRfRegs(struct ath_hal * ah,const struct ieee80211_channel * chan,uint16_t modesIndex,uint16_t * rfXpdGain)14259efa8b5SSam Leffler ar2317SetRfRegs(struct ath_hal *ah,
14359efa8b5SSam Leffler 	const struct ieee80211_channel *chan,
14459efa8b5SSam Leffler 	uint16_t modesIndex, uint16_t *rfXpdGain)
14514779705SSam Leffler {
14614779705SSam Leffler #define	RF_BANK_SETUP(_priv, _ix, _col) do {				    \
14714779705SSam Leffler 	int i;								    \
14814779705SSam Leffler 	for (i = 0; i < N(ar5212Bank##_ix##_2317); i++)			    \
14914779705SSam Leffler 		(_priv)->Bank##_ix##Data[i] = ar5212Bank##_ix##_2317[i][_col];\
15014779705SSam Leffler } while (0)
15114779705SSam Leffler 	struct ath_hal_5212 *ahp = AH5212(ah);
15214779705SSam Leffler 	const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
15314779705SSam Leffler 	uint16_t ob2GHz = 0, db2GHz = 0;
15414779705SSam Leffler 	struct ar2317State *priv = AR2317(ah);
15514779705SSam Leffler 	int regWrites = 0;
15614779705SSam Leffler 
15759efa8b5SSam Leffler 	HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n",
15859efa8b5SSam Leffler 	    __func__, chan->ic_freq, chan->ic_flags, modesIndex);
15914779705SSam Leffler 
16014779705SSam Leffler 	HALASSERT(priv);
16114779705SSam Leffler 
16214779705SSam Leffler 	/* Setup rf parameters */
16359efa8b5SSam Leffler 	if (IEEE80211_IS_CHAN_B(chan)) {
16414779705SSam Leffler 		ob2GHz = ee->ee_obFor24;
16514779705SSam Leffler 		db2GHz = ee->ee_dbFor24;
16659efa8b5SSam Leffler 	} else {
16714779705SSam Leffler 		ob2GHz = ee->ee_obFor24g;
16814779705SSam Leffler 		db2GHz = ee->ee_dbFor24g;
16914779705SSam Leffler 	}
17014779705SSam Leffler 
17114779705SSam Leffler 	/* Bank 1 Write */
17214779705SSam Leffler 	RF_BANK_SETUP(priv, 1, 1);
17314779705SSam Leffler 
17414779705SSam Leffler 	/* Bank 2 Write */
17514779705SSam Leffler 	RF_BANK_SETUP(priv, 2, modesIndex);
17614779705SSam Leffler 
17714779705SSam Leffler 	/* Bank 3 Write */
17814779705SSam Leffler 	RF_BANK_SETUP(priv, 3, modesIndex);
17914779705SSam Leffler 
18014779705SSam Leffler 	/* Bank 6 Write */
18114779705SSam Leffler 	RF_BANK_SETUP(priv, 6, modesIndex);
18214779705SSam Leffler 
18314779705SSam Leffler 	ar5212ModifyRfBuffer(priv->Bank6Data, ob2GHz,   3, 193, 0);
18414779705SSam Leffler 	ar5212ModifyRfBuffer(priv->Bank6Data, db2GHz,   3, 190, 0);
18514779705SSam Leffler 
18614779705SSam Leffler 	/* Bank 7 Setup */
18714779705SSam Leffler 	RF_BANK_SETUP(priv, 7, modesIndex);
18814779705SSam Leffler 
18914779705SSam Leffler 	/* Write Analog registers */
19014779705SSam Leffler 	HAL_INI_WRITE_BANK(ah, ar5212Bank1_2317, priv->Bank1Data, regWrites);
19114779705SSam Leffler 	HAL_INI_WRITE_BANK(ah, ar5212Bank2_2317, priv->Bank2Data, regWrites);
19214779705SSam Leffler 	HAL_INI_WRITE_BANK(ah, ar5212Bank3_2317, priv->Bank3Data, regWrites);
19314779705SSam Leffler 	HAL_INI_WRITE_BANK(ah, ar5212Bank6_2317, priv->Bank6Data, regWrites);
19414779705SSam Leffler 	HAL_INI_WRITE_BANK(ah, ar5212Bank7_2317, priv->Bank7Data, regWrites);
19514779705SSam Leffler 	/* Now that we have reprogrammed rfgain value, clear the flag. */
19614779705SSam Leffler 	ahp->ah_rfgainState = HAL_RFGAIN_INACTIVE;
19714779705SSam Leffler 
19814779705SSam Leffler 	return AH_TRUE;
19914779705SSam Leffler #undef	RF_BANK_SETUP
20014779705SSam Leffler }
20114779705SSam Leffler 
20214779705SSam Leffler /*
20314779705SSam Leffler  * Return a reference to the requested RF Bank.
20414779705SSam Leffler  */
20514779705SSam Leffler static uint32_t *
ar2317GetRfBank(struct ath_hal * ah,int bank)20614779705SSam Leffler ar2317GetRfBank(struct ath_hal *ah, int bank)
20714779705SSam Leffler {
20814779705SSam Leffler 	struct ar2317State *priv = AR2317(ah);
20914779705SSam Leffler 
21014779705SSam Leffler 	HALASSERT(priv != AH_NULL);
21114779705SSam Leffler 	switch (bank) {
21214779705SSam Leffler 	case 1: return priv->Bank1Data;
21314779705SSam Leffler 	case 2: return priv->Bank2Data;
21414779705SSam Leffler 	case 3: return priv->Bank3Data;
21514779705SSam Leffler 	case 6: return priv->Bank6Data;
21614779705SSam Leffler 	case 7: return priv->Bank7Data;
21714779705SSam Leffler 	}
21814779705SSam Leffler 	HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n",
21914779705SSam Leffler 	    __func__, bank);
22014779705SSam Leffler 	return AH_NULL;
22114779705SSam Leffler }
22214779705SSam Leffler 
22314779705SSam Leffler /*
22414779705SSam Leffler  * Return indices surrounding the value in sorted integer lists.
22514779705SSam Leffler  *
22614779705SSam Leffler  * NB: the input list is assumed to be sorted in ascending order
22714779705SSam Leffler  */
22814779705SSam Leffler static void
GetLowerUpperIndex(int16_t v,const uint16_t * lp,uint16_t listSize,uint32_t * vlo,uint32_t * vhi)22914779705SSam Leffler GetLowerUpperIndex(int16_t v, const uint16_t *lp, uint16_t listSize,
23014779705SSam Leffler                           uint32_t *vlo, uint32_t *vhi)
23114779705SSam Leffler {
23214779705SSam Leffler 	int16_t target = v;
23314779705SSam Leffler 	const int16_t *ep = lp+listSize;
23414779705SSam Leffler 	const int16_t *tp;
23514779705SSam Leffler 
23614779705SSam Leffler 	/*
23714779705SSam Leffler 	 * Check first and last elements for out-of-bounds conditions.
23814779705SSam Leffler 	 */
23914779705SSam Leffler 	if (target < lp[0]) {
24014779705SSam Leffler 		*vlo = *vhi = 0;
24114779705SSam Leffler 		return;
24214779705SSam Leffler 	}
24314779705SSam Leffler 	if (target >= ep[-1]) {
24414779705SSam Leffler 		*vlo = *vhi = listSize - 1;
24514779705SSam Leffler 		return;
24614779705SSam Leffler 	}
24714779705SSam Leffler 
24814779705SSam Leffler 	/* look for value being near or between 2 values in list */
24914779705SSam Leffler 	for (tp = lp; tp < ep; tp++) {
25014779705SSam Leffler 		/*
25114779705SSam Leffler 		 * If value is close to the current value of the list
25214779705SSam Leffler 		 * then target is not between values, it is one of the values
25314779705SSam Leffler 		 */
25414779705SSam Leffler 		if (*tp == target) {
25514779705SSam Leffler 			*vlo = *vhi = tp - (const int16_t *) lp;
25614779705SSam Leffler 			return;
25714779705SSam Leffler 		}
25814779705SSam Leffler 		/*
25914779705SSam Leffler 		 * Look for value being between current value and next value
26014779705SSam Leffler 		 * if so return these 2 values
26114779705SSam Leffler 		 */
26214779705SSam Leffler 		if (target < tp[1]) {
26314779705SSam Leffler 			*vlo = tp - (const int16_t *) lp;
26414779705SSam Leffler 			*vhi = *vlo + 1;
26514779705SSam Leffler 			return;
26614779705SSam Leffler 		}
26714779705SSam Leffler 	}
26814779705SSam Leffler }
26914779705SSam Leffler 
27014779705SSam Leffler /*
27114779705SSam Leffler  * Fill the Vpdlist for indices Pmax-Pmin
27214779705SSam Leffler  */
27314779705SSam Leffler static HAL_BOOL
ar2317FillVpdTable(uint32_t pdGainIdx,int16_t Pmin,int16_t Pmax,const int16_t * pwrList,const int16_t * VpdList,uint16_t numIntercepts,uint16_t retVpdList[][64])27414779705SSam Leffler ar2317FillVpdTable(uint32_t pdGainIdx, int16_t Pmin, int16_t  Pmax,
27514779705SSam Leffler 		   const int16_t *pwrList, const int16_t *VpdList,
27614779705SSam Leffler 		   uint16_t numIntercepts, uint16_t retVpdList[][64])
27714779705SSam Leffler {
27814779705SSam Leffler 	uint16_t ii, jj, kk;
27914779705SSam Leffler 	int16_t currPwr = (int16_t)(2*Pmin);
28014779705SSam Leffler 	/* since Pmin is pwr*2 and pwrList is 4*pwr */
28114779705SSam Leffler 	uint32_t  idxL, idxR;
28214779705SSam Leffler 
28314779705SSam Leffler 	ii = 0;
28414779705SSam Leffler 	jj = 0;
28514779705SSam Leffler 
28614779705SSam Leffler 	if (numIntercepts < 2)
28714779705SSam Leffler 		return AH_FALSE;
28814779705SSam Leffler 
28914779705SSam Leffler 	while (ii <= (uint16_t)(Pmax - Pmin)) {
29014779705SSam Leffler 		GetLowerUpperIndex(currPwr, pwrList, numIntercepts,
29114779705SSam Leffler 					 &(idxL), &(idxR));
29214779705SSam Leffler 		if (idxR < 1)
29314779705SSam Leffler 			idxR = 1;			/* extrapolate below */
29414779705SSam Leffler 		if (idxL == (uint32_t)(numIntercepts - 1))
29514779705SSam Leffler 			idxL = numIntercepts - 2;	/* extrapolate above */
29614779705SSam Leffler 		if (pwrList[idxL] == pwrList[idxR])
29714779705SSam Leffler 			kk = VpdList[idxL];
29814779705SSam Leffler 		else
29914779705SSam Leffler 			kk = (uint16_t)
30014779705SSam Leffler 				(((currPwr - pwrList[idxL])*VpdList[idxR]+
30114779705SSam Leffler 				  (pwrList[idxR] - currPwr)*VpdList[idxL])/
30214779705SSam Leffler 				 (pwrList[idxR] - pwrList[idxL]));
30314779705SSam Leffler 		retVpdList[pdGainIdx][ii] = kk;
30414779705SSam Leffler 		ii++;
30514779705SSam Leffler 		currPwr += 2;				/* half dB steps */
30614779705SSam Leffler 	}
30714779705SSam Leffler 
30814779705SSam Leffler 	return AH_TRUE;
30914779705SSam Leffler }
31014779705SSam Leffler 
31114779705SSam Leffler /*
31214779705SSam Leffler  * Returns interpolated or the scaled up interpolated value
31314779705SSam Leffler  */
31414779705SSam Leffler static int16_t
interpolate_signed(uint16_t target,uint16_t srcLeft,uint16_t srcRight,int16_t targetLeft,int16_t targetRight)31514779705SSam Leffler interpolate_signed(uint16_t target, uint16_t srcLeft, uint16_t srcRight,
31614779705SSam Leffler 	int16_t targetLeft, int16_t targetRight)
31714779705SSam Leffler {
31814779705SSam Leffler 	int16_t rv;
31914779705SSam Leffler 
32014779705SSam Leffler 	if (srcRight != srcLeft) {
32114779705SSam Leffler 		rv = ((target - srcLeft)*targetRight +
32214779705SSam Leffler 		      (srcRight - target)*targetLeft) / (srcRight - srcLeft);
32314779705SSam Leffler 	} else {
32414779705SSam Leffler 		rv = targetLeft;
32514779705SSam Leffler 	}
32614779705SSam Leffler 	return rv;
32714779705SSam Leffler }
32814779705SSam Leffler 
32914779705SSam Leffler /*
33014779705SSam Leffler  * Uses the data points read from EEPROM to reconstruct the pdadc power table
33114779705SSam Leffler  * Called by ar2317SetPowerTable()
33214779705SSam Leffler  */
33314779705SSam Leffler static int
ar2317getGainBoundariesAndPdadcsForPowers(struct ath_hal * ah,uint16_t channel,const RAW_DATA_STRUCT_2317 * pRawDataset,uint16_t pdGainOverlap_t2,int16_t * pMinCalPower,uint16_t pPdGainBoundaries[],uint16_t pPdGainValues[],uint16_t pPDADCValues[])33414779705SSam Leffler ar2317getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel,
33514779705SSam Leffler 		const RAW_DATA_STRUCT_2317 *pRawDataset,
33614779705SSam Leffler 		uint16_t pdGainOverlap_t2,
33714779705SSam Leffler 		int16_t  *pMinCalPower, uint16_t pPdGainBoundaries[],
33814779705SSam Leffler 		uint16_t pPdGainValues[], uint16_t pPDADCValues[])
33914779705SSam Leffler {
34014779705SSam Leffler 	struct ar2317State *priv = AR2317(ah);
34114779705SSam Leffler #define	VpdTable_L	priv->vpdTable_L
34214779705SSam Leffler #define	VpdTable_R	priv->vpdTable_R
34314779705SSam Leffler #define	VpdTable_I	priv->vpdTable_I
34414779705SSam Leffler 	/* XXX excessive stack usage? */
34514779705SSam Leffler 	uint32_t ii, jj, kk;
34614779705SSam Leffler 	int32_t ss;/* potentially -ve index for taking care of pdGainOverlap */
34714779705SSam Leffler 	uint32_t idxL, idxR;
34814779705SSam Leffler 	uint32_t numPdGainsUsed = 0;
34914779705SSam Leffler 	/*
35014779705SSam Leffler 	 * If desired to support -ve power levels in future, just
35114779705SSam Leffler 	 * change pwr_I_0 to signed 5-bits.
35214779705SSam Leffler 	 */
35314779705SSam Leffler 	int16_t Pmin_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
354f6b6084bSPedro F. Giffuni 	/* to accommodate -ve power levels later on. */
35514779705SSam Leffler 	int16_t Pmax_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
356f6b6084bSPedro F. Giffuni 	/* to accommodate -ve power levels later on */
35714779705SSam Leffler 	uint16_t numVpd = 0;
35814779705SSam Leffler 	uint16_t Vpd_step;
35914779705SSam Leffler 	int16_t tmpVal ;
36014779705SSam Leffler 	uint32_t sizeCurrVpdTable, maxIndex, tgtIndex;
36114779705SSam Leffler 
36214779705SSam Leffler 	/* Get upper lower index */
36314779705SSam Leffler 	GetLowerUpperIndex(channel, pRawDataset->pChannels,
36414779705SSam Leffler 				 pRawDataset->numChannels, &(idxL), &(idxR));
36514779705SSam Leffler 
36614779705SSam Leffler 	for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
36714779705SSam Leffler 		jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1;
36814779705SSam Leffler 		/* work backwards 'cause highest pdGain for lowest power */
36914779705SSam Leffler 		numVpd = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].numVpd;
37014779705SSam Leffler 		if (numVpd > 0) {
37114779705SSam Leffler 			pPdGainValues[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pd_gain;
37214779705SSam Leffler 			Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0];
37314779705SSam Leffler 			if (Pmin_t2[numPdGainsUsed] >pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]) {
37414779705SSam Leffler 				Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0];
37514779705SSam Leffler 			}
37614779705SSam Leffler 			Pmin_t2[numPdGainsUsed] = (int16_t)
37714779705SSam Leffler 				(Pmin_t2[numPdGainsUsed] / 2);
37814779705SSam Leffler 			Pmax_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[numVpd-1];
37914779705SSam Leffler 			if (Pmax_t2[numPdGainsUsed] > pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1])
38014779705SSam Leffler 				Pmax_t2[numPdGainsUsed] =
38114779705SSam Leffler 					pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1];
38214779705SSam Leffler 			Pmax_t2[numPdGainsUsed] = (int16_t)(Pmax_t2[numPdGainsUsed] / 2);
38314779705SSam Leffler 			ar2317FillVpdTable(
38414779705SSam Leffler 					   numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],
38514779705SSam Leffler 					   &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0]),
38614779705SSam Leffler 					   &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_L
38714779705SSam Leffler 					   );
38814779705SSam Leffler 			ar2317FillVpdTable(
38914779705SSam Leffler 					   numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],
39014779705SSam Leffler 					   &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]),
39114779705SSam Leffler 					   &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_R
39214779705SSam Leffler 					   );
39314779705SSam Leffler 			for (kk = 0; kk < (uint16_t)(Pmax_t2[numPdGainsUsed] - Pmin_t2[numPdGainsUsed]); kk++) {
39414779705SSam Leffler 				VpdTable_I[numPdGainsUsed][kk] =
39514779705SSam Leffler 					interpolate_signed(
39614779705SSam Leffler 							   channel, pRawDataset->pChannels[idxL], pRawDataset->pChannels[idxR],
39714779705SSam Leffler 							   (int16_t)VpdTable_L[numPdGainsUsed][kk], (int16_t)VpdTable_R[numPdGainsUsed][kk]);
39814779705SSam Leffler 			}
39914779705SSam Leffler 			/* fill VpdTable_I for this pdGain */
40014779705SSam Leffler 			numPdGainsUsed++;
40114779705SSam Leffler 		}
40214779705SSam Leffler 		/* if this pdGain is used */
40314779705SSam Leffler 	}
40414779705SSam Leffler 
40514779705SSam Leffler 	*pMinCalPower = Pmin_t2[0];
40614779705SSam Leffler 	kk = 0; /* index for the final table */
40714779705SSam Leffler 	for (ii = 0; ii < numPdGainsUsed; ii++) {
40814779705SSam Leffler 		if (ii == (numPdGainsUsed - 1))
40914779705SSam Leffler 			pPdGainBoundaries[ii] = Pmax_t2[ii] +
41014779705SSam Leffler 				PD_GAIN_BOUNDARY_STRETCH_IN_HALF_DB;
41114779705SSam Leffler 		else
41214779705SSam Leffler 			pPdGainBoundaries[ii] = (uint16_t)
41314779705SSam Leffler 				((Pmax_t2[ii] + Pmin_t2[ii+1]) / 2 );
41414779705SSam Leffler 		if (pPdGainBoundaries[ii] > 63) {
41514779705SSam Leffler 			HALDEBUG(ah, HAL_DEBUG_ANY,
41614779705SSam Leffler 			    "%s: clamp pPdGainBoundaries[%d] %d\n",
41714779705SSam Leffler 			   __func__, ii, pPdGainBoundaries[ii]);/*XXX*/
41814779705SSam Leffler 			pPdGainBoundaries[ii] = 63;
41914779705SSam Leffler 		}
42014779705SSam Leffler 
42114779705SSam Leffler 		/* Find starting index for this pdGain */
42214779705SSam Leffler 		if (ii == 0)
42314779705SSam Leffler 			ss = 0; /* for the first pdGain, start from index 0 */
42414779705SSam Leffler 		else
42514779705SSam Leffler 			ss = (pPdGainBoundaries[ii-1] - Pmin_t2[ii]) -
42614779705SSam Leffler 				pdGainOverlap_t2;
42714779705SSam Leffler 		Vpd_step = (uint16_t)(VpdTable_I[ii][1] - VpdTable_I[ii][0]);
42814779705SSam Leffler 		Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);
42914779705SSam Leffler 		/*
43014779705SSam Leffler 		 *-ve ss indicates need to extrapolate data below for this pdGain
43114779705SSam Leffler 		 */
43214779705SSam Leffler 		while (ss < 0) {
43314779705SSam Leffler 			tmpVal = (int16_t)(VpdTable_I[ii][0] + ss*Vpd_step);
43414779705SSam Leffler 			pPDADCValues[kk++] = (uint16_t)((tmpVal < 0) ? 0 : tmpVal);
43514779705SSam Leffler 			ss++;
43614779705SSam Leffler 		}
43714779705SSam Leffler 
43814779705SSam Leffler 		sizeCurrVpdTable = Pmax_t2[ii] - Pmin_t2[ii];
43914779705SSam Leffler 		tgtIndex = pPdGainBoundaries[ii] + pdGainOverlap_t2 - Pmin_t2[ii];
44014779705SSam Leffler 		maxIndex = (tgtIndex < sizeCurrVpdTable) ? tgtIndex : sizeCurrVpdTable;
44114779705SSam Leffler 
44214779705SSam Leffler 		while (ss < (int16_t)maxIndex)
44314779705SSam Leffler 			pPDADCValues[kk++] = VpdTable_I[ii][ss++];
44414779705SSam Leffler 
44514779705SSam Leffler 		Vpd_step = (uint16_t)(VpdTable_I[ii][sizeCurrVpdTable-1] -
44614779705SSam Leffler 				       VpdTable_I[ii][sizeCurrVpdTable-2]);
44714779705SSam Leffler 		Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);
44814779705SSam Leffler 		/*
44914779705SSam Leffler 		 * for last gain, pdGainBoundary == Pmax_t2, so will
45014779705SSam Leffler 		 * have to extrapolate
45114779705SSam Leffler 		 */
45214779705SSam Leffler 		if (tgtIndex > maxIndex) {	/* need to extrapolate above */
45314779705SSam Leffler 			while(ss < (int16_t)tgtIndex) {
45414779705SSam Leffler 				tmpVal = (uint16_t)
45514779705SSam Leffler 					(VpdTable_I[ii][sizeCurrVpdTable-1] +
45614779705SSam Leffler 					 (ss-maxIndex)*Vpd_step);
45714779705SSam Leffler 				pPDADCValues[kk++] = (tmpVal > 127) ?
45814779705SSam Leffler 					127 : tmpVal;
45914779705SSam Leffler 				ss++;
46014779705SSam Leffler 			}
46114779705SSam Leffler 		}				/* extrapolated above */
46214779705SSam Leffler 	}					/* for all pdGainUsed */
46314779705SSam Leffler 
46414779705SSam Leffler 	while (ii < MAX_NUM_PDGAINS_PER_CHANNEL) {
46514779705SSam Leffler 		pPdGainBoundaries[ii] = pPdGainBoundaries[ii-1];
46614779705SSam Leffler 		ii++;
46714779705SSam Leffler 	}
46814779705SSam Leffler 	while (kk < 128) {
46914779705SSam Leffler 		pPDADCValues[kk] = pPDADCValues[kk-1];
47014779705SSam Leffler 		kk++;
47114779705SSam Leffler 	}
47214779705SSam Leffler 
47314779705SSam Leffler 	return numPdGainsUsed;
47414779705SSam Leffler #undef VpdTable_L
47514779705SSam Leffler #undef VpdTable_R
47614779705SSam Leffler #undef VpdTable_I
47714779705SSam Leffler }
47814779705SSam Leffler 
47914779705SSam Leffler static HAL_BOOL
ar2317SetPowerTable(struct ath_hal * ah,int16_t * minPower,int16_t * maxPower,const struct ieee80211_channel * chan,uint16_t * rfXpdGain)48014779705SSam Leffler ar2317SetPowerTable(struct ath_hal *ah,
48159efa8b5SSam Leffler 	int16_t *minPower, int16_t *maxPower,
48259efa8b5SSam Leffler 	const struct ieee80211_channel *chan,
48314779705SSam Leffler 	uint16_t *rfXpdGain)
48414779705SSam Leffler {
48514779705SSam Leffler 	struct ath_hal_5212 *ahp = AH5212(ah);
48614779705SSam Leffler 	const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
48714779705SSam Leffler 	const RAW_DATA_STRUCT_2317 *pRawDataset = AH_NULL;
48814779705SSam Leffler 	uint16_t pdGainOverlap_t2;
48914779705SSam Leffler 	int16_t minCalPower2317_t2;
49014779705SSam Leffler 	uint16_t *pdadcValues = ahp->ah_pcdacTable;
49114779705SSam Leffler 	uint16_t gainBoundaries[4];
49214779705SSam Leffler 	uint32_t reg32, regoffset;
49314779705SSam Leffler 	int i, numPdGainsUsed;
49414779705SSam Leffler #ifndef AH_USE_INIPDGAIN
49514779705SSam Leffler 	uint32_t tpcrg1;
49614779705SSam Leffler #endif
49714779705SSam Leffler 
49814779705SSam Leffler 	HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan 0x%x flag 0x%x\n",
49959efa8b5SSam Leffler 	    __func__, chan->ic_freq, chan->ic_flags);
50014779705SSam Leffler 
50159efa8b5SSam Leffler 	if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan))
50214779705SSam Leffler 		pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];
50359efa8b5SSam Leffler 	else if (IEEE80211_IS_CHAN_B(chan))
50414779705SSam Leffler 		pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];
50514779705SSam Leffler 	else {
50614779705SSam Leffler 		HALDEBUG(ah, HAL_DEBUG_ANY, "%s: illegal mode\n", __func__);
50714779705SSam Leffler 		return AH_FALSE;
50814779705SSam Leffler 	}
50914779705SSam Leffler 
51014779705SSam Leffler 	pdGainOverlap_t2 = (uint16_t) SM(OS_REG_READ(ah, AR_PHY_TPCRG5),
51114779705SSam Leffler 					  AR_PHY_TPCRG5_PD_GAIN_OVERLAP);
51214779705SSam Leffler 
51314779705SSam Leffler 	numPdGainsUsed = ar2317getGainBoundariesAndPdadcsForPowers(ah,
51414779705SSam Leffler 		chan->channel, pRawDataset, pdGainOverlap_t2,
51514779705SSam Leffler 		&minCalPower2317_t2,gainBoundaries, rfXpdGain, pdadcValues);
51614779705SSam Leffler 	HALASSERT(1 <= numPdGainsUsed && numPdGainsUsed <= 3);
51714779705SSam Leffler 
51814779705SSam Leffler #ifdef AH_USE_INIPDGAIN
51914779705SSam Leffler 	/*
52014779705SSam Leffler 	 * Use pd_gains curve from eeprom; Atheros always uses
52114779705SSam Leffler 	 * the default curve from the ini file but some vendors
52214779705SSam Leffler 	 * (e.g. Zcomax) want to override this curve and not
52314779705SSam Leffler 	 * honoring their settings results in tx power 5dBm low.
52414779705SSam Leffler 	 */
52514779705SSam Leffler 	OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN,
52614779705SSam Leffler 			 (pRawDataset->pDataPerChannel[0].numPdGains - 1));
52714779705SSam Leffler #else
52814779705SSam Leffler 	tpcrg1 = OS_REG_READ(ah, AR_PHY_TPCRG1);
52914779705SSam Leffler 	tpcrg1 = (tpcrg1 &~ AR_PHY_TPCRG1_NUM_PD_GAIN)
53014779705SSam Leffler 		  | SM(numPdGainsUsed-1, AR_PHY_TPCRG1_NUM_PD_GAIN);
53114779705SSam Leffler 	switch (numPdGainsUsed) {
53214779705SSam Leffler 	case 3:
53314779705SSam Leffler 		tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING3;
53414779705SSam Leffler 		tpcrg1 |= SM(rfXpdGain[2], AR_PHY_TPCRG1_PDGAIN_SETTING3);
53514779705SSam Leffler 		/* fall thru... */
53614779705SSam Leffler 	case 2:
53714779705SSam Leffler 		tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING2;
53814779705SSam Leffler 		tpcrg1 |= SM(rfXpdGain[1], AR_PHY_TPCRG1_PDGAIN_SETTING2);
53914779705SSam Leffler 		/* fall thru... */
54014779705SSam Leffler 	case 1:
54114779705SSam Leffler 		tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING1;
54214779705SSam Leffler 		tpcrg1 |= SM(rfXpdGain[0], AR_PHY_TPCRG1_PDGAIN_SETTING1);
54314779705SSam Leffler 		break;
54414779705SSam Leffler 	}
54514779705SSam Leffler #ifdef AH_DEBUG
54614779705SSam Leffler 	if (tpcrg1 != OS_REG_READ(ah, AR_PHY_TPCRG1))
54714779705SSam Leffler 		HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: using non-default "
54814779705SSam Leffler 		    "pd_gains (default 0x%x, calculated 0x%x)\n",
54914779705SSam Leffler 		    __func__, OS_REG_READ(ah, AR_PHY_TPCRG1), tpcrg1);
55014779705SSam Leffler #endif
55114779705SSam Leffler 	OS_REG_WRITE(ah, AR_PHY_TPCRG1, tpcrg1);
55214779705SSam Leffler #endif
55314779705SSam Leffler 
55414779705SSam Leffler 	/*
55514779705SSam Leffler 	 * Note the pdadc table may not start at 0 dBm power, could be
55614779705SSam Leffler 	 * negative or greater than 0.  Need to offset the power
55714779705SSam Leffler 	 * values by the amount of minPower for griffin
55814779705SSam Leffler 	 */
55914779705SSam Leffler 	if (minCalPower2317_t2 != 0)
56014779705SSam Leffler 		ahp->ah_txPowerIndexOffset = (int16_t)(0 - minCalPower2317_t2);
56114779705SSam Leffler 	else
56214779705SSam Leffler 		ahp->ah_txPowerIndexOffset = 0;
56314779705SSam Leffler 
56414779705SSam Leffler 	/* Finally, write the power values into the baseband power table */
56514779705SSam Leffler 	regoffset = 0x9800 + (672 <<2); /* beginning of pdadc table in griffin */
56614779705SSam Leffler 	for (i = 0; i < 32; i++) {
56714779705SSam Leffler 		reg32 = ((pdadcValues[4*i + 0] & 0xFF) << 0)  |
56814779705SSam Leffler 			((pdadcValues[4*i + 1] & 0xFF) << 8)  |
56914779705SSam Leffler 			((pdadcValues[4*i + 2] & 0xFF) << 16) |
57014779705SSam Leffler 			((pdadcValues[4*i + 3] & 0xFF) << 24) ;
57114779705SSam Leffler 		OS_REG_WRITE(ah, regoffset, reg32);
57214779705SSam Leffler 		regoffset += 4;
57314779705SSam Leffler 	}
57414779705SSam Leffler 
57514779705SSam Leffler 	OS_REG_WRITE(ah, AR_PHY_TPCRG5,
57614779705SSam Leffler 		     SM(pdGainOverlap_t2, AR_PHY_TPCRG5_PD_GAIN_OVERLAP) |
57714779705SSam Leffler 		     SM(gainBoundaries[0], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1) |
57814779705SSam Leffler 		     SM(gainBoundaries[1], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2) |
57914779705SSam Leffler 		     SM(gainBoundaries[2], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3) |
58014779705SSam Leffler 		     SM(gainBoundaries[3], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4));
58114779705SSam Leffler 
58214779705SSam Leffler 	return AH_TRUE;
58314779705SSam Leffler }
58414779705SSam Leffler 
58514779705SSam Leffler static int16_t
ar2317GetMinPower(struct ath_hal * ah,const RAW_DATA_PER_CHANNEL_2317 * data)58614779705SSam Leffler ar2317GetMinPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2317 *data)
58714779705SSam Leffler {
58814779705SSam Leffler 	uint32_t ii,jj;
58914779705SSam Leffler 	uint16_t Pmin=0,numVpd;
59014779705SSam Leffler 
59114779705SSam Leffler 	for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
59214779705SSam Leffler 		jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1;
59314779705SSam Leffler 		/* work backwards 'cause highest pdGain for lowest power */
59414779705SSam Leffler 		numVpd = data->pDataPerPDGain[jj].numVpd;
59514779705SSam Leffler 		if (numVpd > 0) {
59614779705SSam Leffler 			Pmin = data->pDataPerPDGain[jj].pwr_t4[0];
59714779705SSam Leffler 			return(Pmin);
59814779705SSam Leffler 		}
59914779705SSam Leffler 	}
60014779705SSam Leffler 	return(Pmin);
60114779705SSam Leffler }
60214779705SSam Leffler 
60314779705SSam Leffler static int16_t
ar2317GetMaxPower(struct ath_hal * ah,const RAW_DATA_PER_CHANNEL_2317 * data)60414779705SSam Leffler ar2317GetMaxPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2317 *data)
60514779705SSam Leffler {
60614779705SSam Leffler 	uint32_t ii;
60714779705SSam Leffler 	uint16_t Pmax=0,numVpd;
60814779705SSam Leffler 	uint16_t vpdmax;
60914779705SSam Leffler 
61014779705SSam Leffler 	for (ii=0; ii< MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
61114779705SSam Leffler 		/* work forwards cuase lowest pdGain for highest power */
61214779705SSam Leffler 		numVpd = data->pDataPerPDGain[ii].numVpd;
61314779705SSam Leffler 		if (numVpd > 0) {
61414779705SSam Leffler 			Pmax = data->pDataPerPDGain[ii].pwr_t4[numVpd-1];
61514779705SSam Leffler 			vpdmax = data->pDataPerPDGain[ii].Vpd[numVpd-1];
61614779705SSam Leffler 			return(Pmax);
61714779705SSam Leffler 		}
61814779705SSam Leffler 	}
61914779705SSam Leffler 	return(Pmax);
62014779705SSam Leffler }
62114779705SSam Leffler 
62214779705SSam Leffler static HAL_BOOL
ar2317GetChannelMaxMinPower(struct ath_hal * ah,const struct ieee80211_channel * chan,int16_t * maxPow,int16_t * minPow)62359efa8b5SSam Leffler ar2317GetChannelMaxMinPower(struct ath_hal *ah,
62459efa8b5SSam Leffler 	const struct ieee80211_channel *chan,
62514779705SSam Leffler 	int16_t *maxPow, int16_t *minPow)
62614779705SSam Leffler {
62759efa8b5SSam Leffler 	uint16_t freq = chan->ic_freq;		/* NB: never mapped */
62814779705SSam Leffler 	const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
62914779705SSam Leffler 	const RAW_DATA_STRUCT_2317 *pRawDataset = AH_NULL;
63014779705SSam Leffler 	const RAW_DATA_PER_CHANNEL_2317 *data=AH_NULL;
63114779705SSam Leffler 	uint16_t numChannels;
63214779705SSam Leffler 	int totalD,totalF, totalMin,last, i;
63314779705SSam Leffler 
63414779705SSam Leffler 	*maxPow = 0;
63514779705SSam Leffler 
63659efa8b5SSam Leffler 	if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan))
63714779705SSam Leffler 		pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];
63859efa8b5SSam Leffler 	else if (IEEE80211_IS_CHAN_B(chan))
63914779705SSam Leffler 		pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];
64014779705SSam Leffler 	else
64114779705SSam Leffler 		return(AH_FALSE);
64214779705SSam Leffler 
64314779705SSam Leffler 	numChannels = pRawDataset->numChannels;
64414779705SSam Leffler 	data = pRawDataset->pDataPerChannel;
64514779705SSam Leffler 
64614779705SSam Leffler 	/* Make sure the channel is in the range of the TP values
64714779705SSam Leffler 	 *  (freq piers)
64814779705SSam Leffler 	 */
64914779705SSam Leffler 	if (numChannels < 1)
65014779705SSam Leffler 		return(AH_FALSE);
65114779705SSam Leffler 
65259efa8b5SSam Leffler 	if ((freq < data[0].channelValue) ||
65359efa8b5SSam Leffler 	    (freq > data[numChannels-1].channelValue)) {
65459efa8b5SSam Leffler 		if (freq < data[0].channelValue) {
65514779705SSam Leffler 			*maxPow = ar2317GetMaxPower(ah, &data[0]);
65614779705SSam Leffler 			*minPow = ar2317GetMinPower(ah, &data[0]);
65714779705SSam Leffler 			return(AH_TRUE);
65814779705SSam Leffler 		} else {
65914779705SSam Leffler 			*maxPow = ar2317GetMaxPower(ah, &data[numChannels - 1]);
66014779705SSam Leffler 			*minPow = ar2317GetMinPower(ah, &data[numChannels - 1]);
66114779705SSam Leffler 			return(AH_TRUE);
66214779705SSam Leffler 		}
66314779705SSam Leffler 	}
66414779705SSam Leffler 
66514779705SSam Leffler 	/* Linearly interpolate the power value now */
66659efa8b5SSam Leffler 	for (last=0,i=0; (i<numChannels) && (freq > data[i].channelValue);
66714779705SSam Leffler 	     last = i++);
66814779705SSam Leffler 	totalD = data[i].channelValue - data[last].channelValue;
66914779705SSam Leffler 	if (totalD > 0) {
67014779705SSam Leffler 		totalF = ar2317GetMaxPower(ah, &data[i]) - ar2317GetMaxPower(ah, &data[last]);
67159efa8b5SSam Leffler 		*maxPow = (int8_t) ((totalF*(freq-data[last].channelValue) +
67214779705SSam Leffler 				     ar2317GetMaxPower(ah, &data[last])*totalD)/totalD);
67314779705SSam Leffler 		totalMin = ar2317GetMinPower(ah, &data[i]) - ar2317GetMinPower(ah, &data[last]);
67459efa8b5SSam Leffler 		*minPow = (int8_t) ((totalMin*(freq-data[last].channelValue) +
67514779705SSam Leffler 				     ar2317GetMinPower(ah, &data[last])*totalD)/totalD);
67614779705SSam Leffler 		return(AH_TRUE);
67714779705SSam Leffler 	} else {
67859efa8b5SSam Leffler 		if (freq == data[i].channelValue) {
67914779705SSam Leffler 			*maxPow = ar2317GetMaxPower(ah, &data[i]);
68014779705SSam Leffler 			*minPow = ar2317GetMinPower(ah, &data[i]);
68114779705SSam Leffler 			return(AH_TRUE);
68214779705SSam Leffler 		} else
68314779705SSam Leffler 			return(AH_FALSE);
68414779705SSam Leffler 	}
68514779705SSam Leffler }
68614779705SSam Leffler 
68714779705SSam Leffler /*
68814779705SSam Leffler  * Free memory for analog bank scratch buffers
68914779705SSam Leffler  */
69014779705SSam Leffler static void
ar2317RfDetach(struct ath_hal * ah)69114779705SSam Leffler ar2317RfDetach(struct ath_hal *ah)
69214779705SSam Leffler {
69314779705SSam Leffler 	struct ath_hal_5212 *ahp = AH5212(ah);
69414779705SSam Leffler 
69514779705SSam Leffler 	HALASSERT(ahp->ah_rfHal != AH_NULL);
69614779705SSam Leffler 	ath_hal_free(ahp->ah_rfHal);
69714779705SSam Leffler 	ahp->ah_rfHal = AH_NULL;
69814779705SSam Leffler }
69914779705SSam Leffler 
70014779705SSam Leffler /*
70114779705SSam Leffler  * Allocate memory for analog bank scratch buffers
70214779705SSam Leffler  * Scratch Buffer will be reinitialized every reset so no need to zero now
70314779705SSam Leffler  */
70414779705SSam Leffler static HAL_BOOL
ar2317RfAttach(struct ath_hal * ah,HAL_STATUS * status)70514779705SSam Leffler ar2317RfAttach(struct ath_hal *ah, HAL_STATUS *status)
70614779705SSam Leffler {
70714779705SSam Leffler 	struct ath_hal_5212 *ahp = AH5212(ah);
70814779705SSam Leffler 	struct ar2317State *priv;
70914779705SSam Leffler 
71014779705SSam Leffler 	HALASSERT(ah->ah_magic == AR5212_MAGIC);
71114779705SSam Leffler 
71214779705SSam Leffler 	HALASSERT(ahp->ah_rfHal == AH_NULL);
71314779705SSam Leffler 	priv = ath_hal_malloc(sizeof(struct ar2317State));
71414779705SSam Leffler 	if (priv == AH_NULL) {
71514779705SSam Leffler 		HALDEBUG(ah, HAL_DEBUG_ANY,
71614779705SSam Leffler 		    "%s: cannot allocate private state\n", __func__);
71714779705SSam Leffler 		*status = HAL_ENOMEM;		/* XXX */
71814779705SSam Leffler 		return AH_FALSE;
71914779705SSam Leffler 	}
72014779705SSam Leffler 	priv->base.rfDetach		= ar2317RfDetach;
72114779705SSam Leffler 	priv->base.writeRegs		= ar2317WriteRegs;
72214779705SSam Leffler 	priv->base.getRfBank		= ar2317GetRfBank;
72314779705SSam Leffler 	priv->base.setChannel		= ar2317SetChannel;
72414779705SSam Leffler 	priv->base.setRfRegs		= ar2317SetRfRegs;
72514779705SSam Leffler 	priv->base.setPowerTable	= ar2317SetPowerTable;
72614779705SSam Leffler 	priv->base.getChannelMaxMinPower = ar2317GetChannelMaxMinPower;
72714779705SSam Leffler 	priv->base.getNfAdjust		= ar5212GetNfAdjust;
72814779705SSam Leffler 
72914779705SSam Leffler 	ahp->ah_pcdacTable = priv->pcdacTable;
73014779705SSam Leffler 	ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable);
73114779705SSam Leffler 	ahp->ah_rfHal = &priv->base;
73214779705SSam Leffler 
73314779705SSam Leffler 	return AH_TRUE;
73414779705SSam Leffler }
73514779705SSam Leffler 
73614779705SSam Leffler static HAL_BOOL
ar2317Probe(struct ath_hal * ah)73714779705SSam Leffler ar2317Probe(struct ath_hal *ah)
73814779705SSam Leffler {
73914779705SSam Leffler 	return IS_2317(ah);
74014779705SSam Leffler }
74114779705SSam Leffler AH_RF(RF2317, ar2317Probe, ar2317RfAttach);
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