xref: /freebsd/sys/dev/ath/if_ath_sysctl.c (revision 19261079)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer,
12  *    without modification.
13  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
14  *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
15  *    redistribution must be conditioned upon including a substantially
16  *    similar Disclaimer requirement for further binary redistribution.
17  *
18  * NO WARRANTY
19  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
21  * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
22  * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
23  * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
24  * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
27  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
29  * THE POSSIBILITY OF SUCH DAMAGES.
30  */
31 
32 #include <sys/cdefs.h>
33 __FBSDID("$FreeBSD$");
34 
35 /*
36  * Driver for the Atheros Wireless LAN controller.
37  *
38  * This software is derived from work of Atsushi Onoe; his contribution
39  * is greatly appreciated.
40  */
41 
42 #include "opt_inet.h"
43 #include "opt_ath.h"
44 #include "opt_wlan.h"
45 
46 #include <sys/param.h>
47 #include <sys/systm.h>
48 #include <sys/sysctl.h>
49 #include <sys/mbuf.h>
50 #include <sys/malloc.h>
51 #include <sys/lock.h>
52 #include <sys/mutex.h>
53 #include <sys/kernel.h>
54 #include <sys/socket.h>
55 #include <sys/sockio.h>
56 #include <sys/errno.h>
57 #include <sys/callout.h>
58 #include <sys/bus.h>
59 #include <sys/endian.h>
60 #include <sys/kthread.h>
61 #include <sys/taskqueue.h>
62 #include <sys/priv.h>
63 
64 #include <machine/bus.h>
65 
66 #include <net/if.h>
67 #include <net/if_var.h>
68 #include <net/if_dl.h>
69 #include <net/if_media.h>
70 #include <net/if_types.h>
71 #include <net/if_arp.h>
72 #include <net/ethernet.h>
73 #include <net/if_llc.h>
74 
75 #include <net80211/ieee80211_var.h>
76 #include <net80211/ieee80211_regdomain.h>
77 #ifdef IEEE80211_SUPPORT_SUPERG
78 #include <net80211/ieee80211_superg.h>
79 #endif
80 #ifdef IEEE80211_SUPPORT_TDMA
81 #include <net80211/ieee80211_tdma.h>
82 #endif
83 
84 #include <net/bpf.h>
85 
86 #ifdef INET
87 #include <netinet/in.h>
88 #include <netinet/if_ether.h>
89 #endif
90 
91 #include <dev/ath/if_athvar.h>
92 #include <dev/ath/ath_hal/ah_devid.h>		/* XXX for softled */
93 #include <dev/ath/ath_hal/ah_diagcodes.h>
94 
95 #include <dev/ath/if_ath_debug.h>
96 #include <dev/ath/if_ath_led.h>
97 #include <dev/ath/if_ath_misc.h>
98 #include <dev/ath/if_ath_tx.h>
99 #include <dev/ath/if_ath_sysctl.h>
100 
101 #ifdef ATH_TX99_DIAG
102 #include <dev/ath/ath_tx99/ath_tx99.h>
103 #endif
104 
105 #ifdef	ATH_DEBUG_ALQ
106 #include <dev/ath/if_ath_alq.h>
107 #endif
108 
109 static int
110 ath_sysctl_slottime(SYSCTL_HANDLER_ARGS)
111 {
112 	struct ath_softc *sc = arg1;
113 	u_int slottime;
114 	int error;
115 
116 	ATH_LOCK(sc);
117 	ath_power_set_power_state(sc, HAL_PM_AWAKE);
118 	slottime = ath_hal_getslottime(sc->sc_ah);
119 	ATH_UNLOCK(sc);
120 
121 	error = sysctl_handle_int(oidp, &slottime, 0, req);
122 	if (error || !req->newptr)
123 		goto finish;
124 
125 	error = !ath_hal_setslottime(sc->sc_ah, slottime) ? EINVAL : 0;
126 
127 finish:
128 	ATH_LOCK(sc);
129 	ath_power_restore_power_state(sc);
130 	ATH_UNLOCK(sc);
131 
132 	return error;
133 }
134 
135 static int
136 ath_sysctl_acktimeout(SYSCTL_HANDLER_ARGS)
137 {
138 	struct ath_softc *sc = arg1;
139 	u_int acktimeout;
140 	int error;
141 
142 	ATH_LOCK(sc);
143 	ath_power_set_power_state(sc, HAL_PM_AWAKE);
144 	acktimeout = ath_hal_getacktimeout(sc->sc_ah);
145 	ATH_UNLOCK(sc);
146 
147 	error = sysctl_handle_int(oidp, &acktimeout, 0, req);
148 	if (error || !req->newptr)
149 		goto finish;
150 
151 	error = !ath_hal_setacktimeout(sc->sc_ah, acktimeout) ? EINVAL : 0;
152 
153 finish:
154 	ATH_LOCK(sc);
155 	ath_power_restore_power_state(sc);
156 	ATH_UNLOCK(sc);
157 
158 	return (error);
159 }
160 
161 static int
162 ath_sysctl_ctstimeout(SYSCTL_HANDLER_ARGS)
163 {
164 	struct ath_softc *sc = arg1;
165 	u_int ctstimeout;
166 	int error;
167 
168 	ATH_LOCK(sc);
169 	ath_power_set_power_state(sc, HAL_PM_AWAKE);
170 	ctstimeout = ath_hal_getctstimeout(sc->sc_ah);
171 	ATH_UNLOCK(sc);
172 
173 	error = sysctl_handle_int(oidp, &ctstimeout, 0, req);
174 	if (error || !req->newptr)
175 		goto finish;
176 
177 	error = !ath_hal_setctstimeout(sc->sc_ah, ctstimeout) ? EINVAL : 0;
178 
179 finish:
180 	ATH_LOCK(sc);
181 	ath_power_restore_power_state(sc);
182 	ATH_UNLOCK(sc);
183 
184 	return (error);
185 }
186 
187 static int
188 ath_sysctl_softled(SYSCTL_HANDLER_ARGS)
189 {
190 	struct ath_softc *sc = arg1;
191 	int softled = sc->sc_softled;
192 	int error;
193 
194 	error = sysctl_handle_int(oidp, &softled, 0, req);
195 	if (error || !req->newptr)
196 		return error;
197 	softled = (softled != 0);
198 	if (softled != sc->sc_softled) {
199 		if (softled) {
200 			/* NB: handle any sc_ledpin change */
201 			ath_led_config(sc);
202 		}
203 		sc->sc_softled = softled;
204 	}
205 	return 0;
206 }
207 
208 static int
209 ath_sysctl_ledpin(SYSCTL_HANDLER_ARGS)
210 {
211 	struct ath_softc *sc = arg1;
212 	int ledpin = sc->sc_ledpin;
213 	int error;
214 
215 	error = sysctl_handle_int(oidp, &ledpin, 0, req);
216 	if (error || !req->newptr)
217 		return error;
218 	if (ledpin != sc->sc_ledpin) {
219 		sc->sc_ledpin = ledpin;
220 		if (sc->sc_softled) {
221 			ath_led_config(sc);
222 		}
223 	}
224 	return 0;
225 }
226 
227 static int
228 ath_sysctl_hardled(SYSCTL_HANDLER_ARGS)
229 {
230 	struct ath_softc *sc = arg1;
231 	int hardled = sc->sc_hardled;
232 	int error;
233 
234 	error = sysctl_handle_int(oidp, &hardled, 0, req);
235 	if (error || !req->newptr)
236 		return error;
237 	hardled = (hardled != 0);
238 	if (hardled != sc->sc_hardled) {
239 		if (hardled) {
240 			/* NB: handle any sc_ledpin change */
241 			ath_led_config(sc);
242 		}
243 		sc->sc_hardled = hardled;
244 	}
245 	return 0;
246 }
247 
248 static int
249 ath_sysctl_txantenna(SYSCTL_HANDLER_ARGS)
250 {
251 	struct ath_softc *sc = arg1;
252 	u_int txantenna;
253 	int error;
254 
255 	ATH_LOCK(sc);
256 	ath_power_set_power_state(sc, HAL_PM_AWAKE);
257 	ATH_UNLOCK(sc);
258 
259 	txantenna = ath_hal_getantennaswitch(sc->sc_ah);
260 
261 	error = sysctl_handle_int(oidp, &txantenna, 0, req);
262 	if (!error && req->newptr) {
263 		/* XXX assumes 2 antenna ports */
264 		if (txantenna < HAL_ANT_VARIABLE || txantenna > HAL_ANT_FIXED_B) {
265 			error = EINVAL;
266 			goto finish;
267 		}
268 		ath_hal_setantennaswitch(sc->sc_ah, txantenna);
269 		/*
270 		 * NB: with the switch locked this isn't meaningful,
271 		 *     but set it anyway so things like radiotap get
272 		 *     consistent info in their data.
273 		 */
274 		sc->sc_txantenna = txantenna;
275 	}
276 
277 finish:
278 	ATH_LOCK(sc);
279 	ath_power_restore_power_state(sc);
280 	ATH_UNLOCK(sc);
281 
282 	return (error);
283 }
284 
285 static int
286 ath_sysctl_rxantenna(SYSCTL_HANDLER_ARGS)
287 {
288 	struct ath_softc *sc = arg1;
289 	u_int defantenna;
290 	int error;
291 
292 	ATH_LOCK(sc);
293 	ath_power_set_power_state(sc, HAL_PM_AWAKE);
294 	defantenna = ath_hal_getdefantenna(sc->sc_ah);
295 	ATH_UNLOCK(sc);
296 
297 	error = sysctl_handle_int(oidp, &defantenna, 0, req);
298 	if (!error && req->newptr)
299 		ath_hal_setdefantenna(sc->sc_ah, defantenna);
300 
301 	ATH_LOCK(sc);
302 	ath_power_restore_power_state(sc);
303 	ATH_UNLOCK(sc);
304 
305 	return (error);
306 }
307 
308 static int
309 ath_sysctl_diversity(SYSCTL_HANDLER_ARGS)
310 {
311 	struct ath_softc *sc = arg1;
312 	u_int diversity;
313 	int error;
314 
315 	ATH_LOCK(sc);
316 	ath_power_set_power_state(sc, HAL_PM_AWAKE);
317 	ATH_UNLOCK(sc);
318 
319 	diversity = ath_hal_getdiversity(sc->sc_ah);
320 
321 	error = sysctl_handle_int(oidp, &diversity, 0, req);
322 	if (error || !req->newptr)
323 		goto finish;
324 	if (!ath_hal_setdiversity(sc->sc_ah, diversity)) {
325 		error = EINVAL;
326 		goto finish;
327 	}
328 	sc->sc_diversity = diversity;
329 	error = 0;
330 
331 finish:
332 	ATH_LOCK(sc);
333 	ath_power_restore_power_state(sc);
334 	ATH_UNLOCK(sc);
335 
336 	return (error);
337 }
338 
339 static int
340 ath_sysctl_diag(SYSCTL_HANDLER_ARGS)
341 {
342 	struct ath_softc *sc = arg1;
343 	u_int32_t diag;
344 	int error;
345 
346 	ATH_LOCK(sc);
347 	ath_power_set_power_state(sc, HAL_PM_AWAKE);
348 	ATH_UNLOCK(sc);
349 
350 	if (!ath_hal_getdiag(sc->sc_ah, &diag)) {
351 		error = EINVAL;
352 		goto finish;
353 	}
354 
355 	error = sysctl_handle_int(oidp, &diag, 0, req);
356 	if (error || !req->newptr)
357 		goto finish;
358 	error = !ath_hal_setdiag(sc->sc_ah, diag) ? EINVAL : 0;
359 
360 finish:
361 	ATH_LOCK(sc);
362 	ath_power_restore_power_state(sc);
363 	ATH_UNLOCK(sc);
364 
365 	return (error);
366 }
367 
368 static int
369 ath_sysctl_tpscale(SYSCTL_HANDLER_ARGS)
370 {
371 	struct ath_softc *sc = arg1;
372 	u_int32_t scale;
373 	int error;
374 
375 	ATH_LOCK(sc);
376 	ath_power_set_power_state(sc, HAL_PM_AWAKE);
377 	ATH_UNLOCK(sc);
378 
379 	(void) ath_hal_gettpscale(sc->sc_ah, &scale);
380 	error = sysctl_handle_int(oidp, &scale, 0, req);
381 	if (error || !req->newptr)
382 		goto finish;
383 
384 	error = !ath_hal_settpscale(sc->sc_ah, scale) ? EINVAL :
385 	    (sc->sc_running) ? ath_reset(sc, ATH_RESET_NOLOSS,
386 	    HAL_RESET_NORMAL) : 0;
387 
388 finish:
389 	ATH_LOCK(sc);
390 	ath_power_restore_power_state(sc);
391 	ATH_UNLOCK(sc);
392 
393 	return (error);
394 }
395 
396 static int
397 ath_sysctl_tpc(SYSCTL_HANDLER_ARGS)
398 {
399 	struct ath_softc *sc = arg1;
400 	u_int tpc;
401 	int error;
402 
403 	ATH_LOCK(sc);
404 	ath_power_set_power_state(sc, HAL_PM_AWAKE);
405 	ATH_UNLOCK(sc);
406 
407 	tpc = ath_hal_gettpc(sc->sc_ah);
408 
409 	error = sysctl_handle_int(oidp, &tpc, 0, req);
410 	if (error || !req->newptr)
411 		goto finish;
412 	error = !ath_hal_settpc(sc->sc_ah, tpc) ? EINVAL : 0;
413 
414 finish:
415 	ATH_LOCK(sc);
416 	ath_power_restore_power_state(sc);
417 	ATH_UNLOCK(sc);
418 
419 	return (error);
420 }
421 
422 static int
423 ath_sysctl_rfkill(SYSCTL_HANDLER_ARGS)
424 {
425 	struct ath_softc *sc = arg1;
426 	struct ath_hal *ah = sc->sc_ah;
427 	u_int rfkill;
428 	int error;
429 
430 	ATH_LOCK(sc);
431 	ath_power_set_power_state(sc, HAL_PM_AWAKE);
432 	ATH_UNLOCK(sc);
433 
434 	rfkill = ath_hal_getrfkill(ah);
435 
436 	error = sysctl_handle_int(oidp, &rfkill, 0, req);
437 	if (error || !req->newptr)
438 		goto finish;
439 	if (rfkill == ath_hal_getrfkill(ah)) {	/* unchanged */
440 		error = 0;
441 		goto finish;
442 	}
443 	if (!ath_hal_setrfkill(ah, rfkill)) {
444 		error = EINVAL;
445 		goto finish;
446 	}
447 	error = sc->sc_running ? ath_reset(sc, ATH_RESET_FULL,
448 	    HAL_RESET_NORMAL) : 0;
449 
450 finish:
451 	ATH_LOCK(sc);
452 	ath_power_restore_power_state(sc);
453 	ATH_UNLOCK(sc);
454 
455 	return (error);
456 }
457 
458 static int
459 ath_sysctl_txagg(SYSCTL_HANDLER_ARGS)
460 {
461 	struct ath_softc *sc = arg1;
462 	int i, t, param = 0;
463 	int error;
464 	struct ath_buf *bf;
465 
466 	error = sysctl_handle_int(oidp, &param, 0, req);
467 	if (error || !req->newptr)
468 		return error;
469 
470 	if (param != 1)
471 		return 0;
472 
473 	printf("no tx bufs (empty list): %d\n", sc->sc_stats.ast_tx_getnobuf);
474 	printf("no tx bufs (was busy): %d\n", sc->sc_stats.ast_tx_getbusybuf);
475 
476 	printf("aggr single packet: %d\n",
477 	    sc->sc_aggr_stats.aggr_single_pkt);
478 	printf("aggr single packet w/ BAW closed: %d\n",
479 	    sc->sc_aggr_stats.aggr_baw_closed_single_pkt);
480 	printf("aggr non-baw packet: %d\n",
481 	    sc->sc_aggr_stats.aggr_nonbaw_pkt);
482 	printf("aggr aggregate packet: %d\n",
483 	    sc->sc_aggr_stats.aggr_aggr_pkt);
484 	printf("aggr single packet low hwq: %d\n",
485 	    sc->sc_aggr_stats.aggr_low_hwq_single_pkt);
486 	printf("aggr single packet RTS aggr limited: %d\n",
487 	    sc->sc_aggr_stats.aggr_rts_aggr_limited);
488 	printf("aggr sched, no work: %d\n",
489 	    sc->sc_aggr_stats.aggr_sched_nopkt);
490 	for (i = 0; i < 64; i++) {
491 		printf("%2d: %10d ", i, sc->sc_aggr_stats.aggr_pkts[i]);
492 		if (i % 4 == 3)
493 			printf("\n");
494 	}
495 	printf("\n");
496 
497 	for (i = 0; i < HAL_NUM_TX_QUEUES; i++) {
498 		if (ATH_TXQ_SETUP(sc, i)) {
499 			printf("HW TXQ %d: axq_depth=%d, axq_aggr_depth=%d, "
500 			    "axq_fifo_depth=%d, holdingbf=%p\n",
501 			    i,
502 			    sc->sc_txq[i].axq_depth,
503 			    sc->sc_txq[i].axq_aggr_depth,
504 			    sc->sc_txq[i].axq_fifo_depth,
505 			    sc->sc_txq[i].axq_holdingbf);
506 		}
507 	}
508 
509 	i = t = 0;
510 	ATH_TXBUF_LOCK(sc);
511 	TAILQ_FOREACH(bf, &sc->sc_txbuf, bf_list) {
512 		if (bf->bf_flags & ATH_BUF_BUSY) {
513 			printf("Busy: %d\n", t);
514 			i++;
515 		}
516 		t++;
517 	}
518 	ATH_TXBUF_UNLOCK(sc);
519 	printf("Total TX buffers: %d; Total TX buffers busy: %d (%d)\n",
520 	    t, i, sc->sc_txbuf_cnt);
521 
522 	i = t = 0;
523 	ATH_TXBUF_LOCK(sc);
524 	TAILQ_FOREACH(bf, &sc->sc_txbuf_mgmt, bf_list) {
525 		if (bf->bf_flags & ATH_BUF_BUSY) {
526 			printf("Busy: %d\n", t);
527 			i++;
528 		}
529 		t++;
530 	}
531 	ATH_TXBUF_UNLOCK(sc);
532 	printf("Total mgmt TX buffers: %d; Total mgmt TX buffers busy: %d\n",
533 	    t, i);
534 
535 	ATH_RX_LOCK(sc);
536 	for (i = 0; i < 2; i++) {
537 		printf("%d: fifolen: %d/%d; head=%d; tail=%d; m_pending=%p, m_holdbf=%p\n",
538 		    i,
539 		    sc->sc_rxedma[i].m_fifo_depth,
540 		    sc->sc_rxedma[i].m_fifolen,
541 		    sc->sc_rxedma[i].m_fifo_head,
542 		    sc->sc_rxedma[i].m_fifo_tail,
543 		    sc->sc_rxedma[i].m_rxpending,
544 		    sc->sc_rxedma[i].m_holdbf);
545 	}
546 	i = 0;
547 	TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
548 		i++;
549 	}
550 	printf("Total RX buffers in free list: %d buffers\n",
551 	    i);
552 	ATH_RX_UNLOCK(sc);
553 
554 	return 0;
555 }
556 
557 static int
558 ath_sysctl_rfsilent(SYSCTL_HANDLER_ARGS)
559 {
560 	struct ath_softc *sc = arg1;
561 	u_int rfsilent;
562 	int error;
563 
564 	ATH_LOCK(sc);
565 	ath_power_set_power_state(sc, HAL_PM_AWAKE);
566 	ATH_UNLOCK(sc);
567 
568 	(void) ath_hal_getrfsilent(sc->sc_ah, &rfsilent);
569 	error = sysctl_handle_int(oidp, &rfsilent, 0, req);
570 	if (error || !req->newptr)
571 		goto finish;
572 	if (!ath_hal_setrfsilent(sc->sc_ah, rfsilent)) {
573 		error = EINVAL;
574 		goto finish;
575 	}
576 	/*
577 	 * Earlier chips (< AR5212) have up to 8 GPIO
578 	 * pins exposed.
579 	 *
580 	 * AR5416 and later chips have many more GPIO
581 	 * pins (up to 16) so the mask is expanded to
582 	 * four bits.
583 	 */
584 	sc->sc_rfsilentpin = rfsilent & 0x3c;
585 	sc->sc_rfsilentpol = (rfsilent & 0x2) != 0;
586 	error = 0;
587 
588 finish:
589 	ATH_LOCK(sc);
590 	ath_power_restore_power_state(sc);
591 	ATH_UNLOCK(sc);
592 
593 	return (error);
594 }
595 
596 static int
597 ath_sysctl_tpack(SYSCTL_HANDLER_ARGS)
598 {
599 	struct ath_softc *sc = arg1;
600 	u_int32_t tpack;
601 	int error;
602 
603 	ATH_LOCK(sc);
604 	ath_power_set_power_state(sc, HAL_PM_AWAKE);
605 	ATH_UNLOCK(sc);
606 
607 	(void) ath_hal_gettpack(sc->sc_ah, &tpack);
608 	error = sysctl_handle_int(oidp, &tpack, 0, req);
609 	if (error || !req->newptr)
610 		goto finish;
611 	error = !ath_hal_settpack(sc->sc_ah, tpack) ? EINVAL : 0;
612 
613 finish:
614 	ATH_LOCK(sc);
615 	ath_power_restore_power_state(sc);
616 	ATH_UNLOCK(sc);
617 
618 	return (error);
619 }
620 
621 static int
622 ath_sysctl_tpcts(SYSCTL_HANDLER_ARGS)
623 {
624 	struct ath_softc *sc = arg1;
625 	u_int32_t tpcts;
626 	int error;
627 
628 	ATH_LOCK(sc);
629 	ath_power_set_power_state(sc, HAL_PM_AWAKE);
630 	ATH_UNLOCK(sc);
631 
632 	(void) ath_hal_gettpcts(sc->sc_ah, &tpcts);
633 	error = sysctl_handle_int(oidp, &tpcts, 0, req);
634 	if (error || !req->newptr)
635 		goto finish;
636 
637 	error = !ath_hal_settpcts(sc->sc_ah, tpcts) ? EINVAL : 0;
638 
639 finish:
640 	ATH_LOCK(sc);
641 	ath_power_restore_power_state(sc);
642 	ATH_UNLOCK(sc);
643 
644 	return (error);
645 }
646 
647 static int
648 ath_sysctl_intmit(SYSCTL_HANDLER_ARGS)
649 {
650 	struct ath_softc *sc = arg1;
651 	int intmit, error;
652 
653 	ATH_LOCK(sc);
654 	ath_power_set_power_state(sc, HAL_PM_AWAKE);
655 	ATH_UNLOCK(sc);
656 
657 	intmit = ath_hal_getintmit(sc->sc_ah);
658 	error = sysctl_handle_int(oidp, &intmit, 0, req);
659 	if (error || !req->newptr)
660 		goto finish;
661 
662 	/* reusing error; 1 here means "good"; 0 means "fail" */
663 	error = ath_hal_setintmit(sc->sc_ah, intmit);
664 	if (! error) {
665 		error = EINVAL;
666 		goto finish;
667 	}
668 
669 	/*
670 	 * Reset the hardware here - disabling ANI in the HAL
671 	 * doesn't reset ANI related registers, so it'll leave
672 	 * things in an inconsistent state.
673 	 */
674 	if (sc->sc_running)
675 		ath_reset(sc, ATH_RESET_NOLOSS, HAL_RESET_NORMAL);
676 
677 	error = 0;
678 
679 finish:
680 	ATH_LOCK(sc);
681 	ath_power_restore_power_state(sc);
682 	ATH_UNLOCK(sc);
683 
684 	return (error);
685 }
686 
687 #ifdef IEEE80211_SUPPORT_TDMA
688 static int
689 ath_sysctl_setcca(SYSCTL_HANDLER_ARGS)
690 {
691 	struct ath_softc *sc = arg1;
692 	int setcca, error;
693 
694 	setcca = sc->sc_setcca;
695 	error = sysctl_handle_int(oidp, &setcca, 0, req);
696 	if (error || !req->newptr)
697 		return error;
698 	sc->sc_setcca = (setcca != 0);
699 	return 0;
700 }
701 #endif /* IEEE80211_SUPPORT_TDMA */
702 
703 static int
704 ath_sysctl_forcebstuck(SYSCTL_HANDLER_ARGS)
705 {
706 	struct ath_softc *sc = arg1;
707 	int val = 0;
708 	int error;
709 
710 	error = sysctl_handle_int(oidp, &val, 0, req);
711 	if (error || !req->newptr)
712 		return error;
713 	if (val == 0)
714 		return 0;
715 
716 	taskqueue_enqueue(sc->sc_tq, &sc->sc_bstucktask);
717 	val = 0;
718 	return 0;
719 }
720 
721 static int
722 ath_sysctl_hangcheck(SYSCTL_HANDLER_ARGS)
723 {
724 	struct ath_softc *sc = arg1;
725 	int val = 0;
726 	int error;
727 	uint32_t mask = 0xffffffff;
728 	uint32_t *sp;
729 	uint32_t rsize;
730 	struct ath_hal *ah = sc->sc_ah;
731 
732 	error = sysctl_handle_int(oidp, &val, 0, req);
733 	if (error || !req->newptr)
734 		return error;
735 	if (val == 0)
736 		return 0;
737 
738 	ATH_LOCK(sc);
739 	ath_power_set_power_state(sc, HAL_PM_AWAKE);
740 	ATH_UNLOCK(sc);
741 
742 	/* Do a hang check */
743 	if (!ath_hal_getdiagstate(ah, HAL_DIAG_CHECK_HANGS,
744 	    &mask, sizeof(mask),
745 	    (void *) &sp, &rsize)) {
746 		error = 0;
747 		goto finish;
748 	}
749 
750 	device_printf(sc->sc_dev, "%s: sp=0x%08x\n", __func__, *sp);
751 
752 	val = 0;
753 	error = 0;
754 finish:
755 	ATH_LOCK(sc);
756 	ath_power_restore_power_state(sc);
757 	ATH_UNLOCK(sc);
758 
759 	return (error);
760 }
761 
762 #ifdef ATH_DEBUG_ALQ
763 static int
764 ath_sysctl_alq_log(SYSCTL_HANDLER_ARGS)
765 {
766 	struct ath_softc *sc = arg1;
767 	int error, enable;
768 
769 	enable = (sc->sc_alq.sc_alq_isactive);
770 
771 	error = sysctl_handle_int(oidp, &enable, 0, req);
772 	if (error || !req->newptr)
773 		return (error);
774 	else if (enable)
775 		error = if_ath_alq_start(&sc->sc_alq);
776 	else
777 		error = if_ath_alq_stop(&sc->sc_alq);
778 	return (error);
779 }
780 
781 /*
782  * Attach the ALQ debugging if required.
783  */
784 static void
785 ath_sysctl_alq_attach(struct ath_softc *sc)
786 {
787 	struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev);
788 	struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev);
789 	struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree);
790 
791 	tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "alq",
792 	    CTLFLAG_RD | CTLFLAG_MPSAFE, NULL,
793 	    "Atheros ALQ logging parameters");
794 	child = SYSCTL_CHILDREN(tree);
795 
796 	SYSCTL_ADD_STRING(ctx, child, OID_AUTO, "filename",
797 	    CTLFLAG_RW, sc->sc_alq.sc_alq_filename, 0, "ALQ filename");
798 
799 	SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
800 	    "enable", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
801 	    ath_sysctl_alq_log, "I", "");
802 
803 	SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
804 		"debugmask", CTLFLAG_RW, &sc->sc_alq.sc_alq_debug, 0,
805 		"ALQ debug mask");
806 
807 	SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
808 		"numlost", CTLFLAG_RW, &sc->sc_alq.sc_alq_numlost, 0,
809 		"number lost");
810 }
811 #endif /* ATH_DEBUG_ALQ */
812 
813 void
814 ath_sysctlattach(struct ath_softc *sc)
815 {
816 	struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev);
817 	struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev);
818 	struct ath_hal *ah = sc->sc_ah;
819 
820 	SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
821 		"countrycode", CTLFLAG_RD, &sc->sc_eecc, 0,
822 		"EEPROM country code");
823 	SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
824 		"regdomain", CTLFLAG_RD, &sc->sc_eerd, 0,
825 		"EEPROM regdomain code");
826 #ifdef	ATH_DEBUG
827 	SYSCTL_ADD_QUAD(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
828 		"debug", CTLFLAG_RW, &sc->sc_debug,
829 		"control debugging printfs");
830 #endif
831 #ifdef	ATH_DEBUG_ALQ
832 	SYSCTL_ADD_QUAD(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
833 		"ktrdebug", CTLFLAG_RW, &sc->sc_ktrdebug,
834 		"control debugging KTR");
835 #endif /* ATH_DEBUG_ALQ */
836 	SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
837 	    "slottime", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
838 	    ath_sysctl_slottime, "I", "802.11 slot time (us)");
839 	SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
840 	    "acktimeout", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
841 	    ath_sysctl_acktimeout, "I", "802.11 ACK timeout (us)");
842 	SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
843 	    "ctstimeout", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
844 	    ath_sysctl_ctstimeout, "I", "802.11 CTS timeout (us)");
845 
846 	SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
847 	    "softled", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
848 	    ath_sysctl_softled, "I", "enable/disable software LED support");
849 	SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
850 	    "ledpin", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
851 	    ath_sysctl_ledpin, "I", "GPIO pin connected to LED");
852 	SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
853 		"ledon", CTLFLAG_RW, &sc->sc_ledon, 0,
854 		"setting to turn LED on");
855 	SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
856 		"ledidle", CTLFLAG_RW, &sc->sc_ledidle, 0,
857 		"idle time for inactivity LED (ticks)");
858 
859 	SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
860 	    "hardled", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
861 	    ath_sysctl_hardled, "I", "enable/disable hardware LED support");
862 	/* XXX Laziness - configure pins, then flip hardled off/on */
863 	SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
864 		"led_net_pin", CTLFLAG_RW, &sc->sc_led_net_pin, 0,
865 		"MAC Network LED pin, or -1 to disable");
866 	SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
867 		"led_pwr_pin", CTLFLAG_RW, &sc->sc_led_pwr_pin, 0,
868 		"MAC Power LED pin, or -1 to disable");
869 
870 	SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
871 	    "txantenna", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
872 	    ath_sysctl_txantenna, "I", "antenna switch");
873 	SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
874 	    "rxantenna", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
875 	    ath_sysctl_rxantenna, "I", "default/rx antenna");
876 	if (ath_hal_hasdiversity(ah))
877 		SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
878 		    "diversity", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT,
879 		    sc, 0, ath_sysctl_diversity, "I", "antenna diversity");
880 	sc->sc_txintrperiod = ATH_TXINTR_PERIOD;
881 	SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
882 		"txintrperiod", CTLFLAG_RW, &sc->sc_txintrperiod, 0,
883 		"tx descriptor batching");
884 	SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
885 	    "diag", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
886 	    ath_sysctl_diag, "I", "h/w diagnostic control");
887 	SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
888 	    "tpscale", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
889 	    ath_sysctl_tpscale, "I", "tx power scaling");
890 	if (ath_hal_hastpc(ah)) {
891 		SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
892 		    "tpc", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
893 		    ath_sysctl_tpc, "I", "enable/disable per-packet TPC");
894 		SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
895 		    "tpack", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc,
896 		    0, ath_sysctl_tpack, "I", "tx power for ack frames");
897 		SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
898 		    "tpcts", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc,
899 		    0, ath_sysctl_tpcts, "I", "tx power for cts frames");
900 	}
901 	if (ath_hal_hasrfsilent(ah)) {
902 		SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
903 		    "rfsilent", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT,
904 		    sc, 0, ath_sysctl_rfsilent, "I", "h/w RF silent config");
905 		SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
906 		    "rfkill", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc,
907 		    0, ath_sysctl_rfkill, "I", "enable/disable RF kill switch");
908 	}
909 
910 	SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
911 	    "txagg", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
912 	    ath_sysctl_txagg, "I", "");
913 
914 	SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
915 	    "forcebstuck", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc,
916 	    0, ath_sysctl_forcebstuck, "I", "");
917 
918 	SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
919 	    "hangcheck", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
920 	    ath_sysctl_hangcheck, "I", "");
921 
922 	if (ath_hal_hasintmit(ah)) {
923 		SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
924 		    "intmit", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc,
925 		    0, ath_sysctl_intmit, "I", "interference mitigation");
926 	}
927 	sc->sc_monpass = HAL_RXERR_DECRYPT | HAL_RXERR_MIC;
928 	SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
929 		"monpass", CTLFLAG_RW, &sc->sc_monpass, 0,
930 		"mask of error frames to pass when monitoring");
931 
932 	SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
933 		"hwq_limit_nonaggr", CTLFLAG_RW, &sc->sc_hwq_limit_nonaggr, 0,
934 		"Hardware non-AMPDU queue depth before software-queuing TX frames");
935 	SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
936 		"hwq_limit_aggr", CTLFLAG_RW, &sc->sc_hwq_limit_aggr, 0,
937 		"Hardware AMPDU queue depth before software-queuing TX frames");
938 	SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
939 		"tid_hwq_lo", CTLFLAG_RW, &sc->sc_tid_hwq_lo, 0,
940 		"");
941 	SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
942 		"tid_hwq_hi", CTLFLAG_RW, &sc->sc_tid_hwq_hi, 0,
943 		"");
944 
945 	/* Aggregate length twiddles */
946 	SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
947 		"aggr_limit", CTLFLAG_RW, &sc->sc_aggr_limit, 0,
948 		"Maximum A-MPDU size, or 0 for 'default'");
949 	SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
950 		"rts_aggr_limit", CTLFLAG_RW, &sc->sc_rts_aggr_limit, 0,
951 		"Maximum A-MPDU size for RTS-protected frames, or '0' "
952 		"for default");
953 	SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
954 		"delim_min_pad", CTLFLAG_RW, &sc->sc_delim_min_pad, 0,
955 		"Enforce a minimum number of delimiters per A-MPDU "
956 		" sub-frame");
957 
958 	SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
959 		"txq_data_minfree", CTLFLAG_RW, &sc->sc_txq_data_minfree,
960 		0, "Minimum free buffers before adding a data frame"
961 		" to the TX queue");
962 	SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
963 		"txq_mcastq_maxdepth", CTLFLAG_RW,
964 		&sc->sc_txq_mcastq_maxdepth, 0,
965 		"Maximum buffer depth for multicast/broadcast frames");
966 	SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
967 		"txq_node_maxdepth", CTLFLAG_RW,
968 		&sc->sc_txq_node_maxdepth, 0,
969 		"Maximum buffer depth for a single node");
970 
971 #if 0
972 	SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
973 		"cabq_enable", CTLFLAG_RW,
974 		&sc->sc_cabq_enable, 0,
975 		"Whether to transmit on the CABQ or not");
976 #endif
977 
978 #ifdef IEEE80211_SUPPORT_TDMA
979 	if (ath_hal_macversion(ah) > 0x78) {
980 		sc->sc_tdmadbaprep = 2;
981 		SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
982 			"dbaprep", CTLFLAG_RW, &sc->sc_tdmadbaprep, 0,
983 			"TDMA DBA preparation time");
984 		sc->sc_tdmaswbaprep = 10;
985 		SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
986 			"swbaprep", CTLFLAG_RW, &sc->sc_tdmaswbaprep, 0,
987 			"TDMA SWBA preparation time");
988 		SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
989 			"guardtime", CTLFLAG_RW, &sc->sc_tdmaguard, 0,
990 			"TDMA slot guard time");
991 		SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
992 			"superframe", CTLFLAG_RD, &sc->sc_tdmabintval, 0,
993 			"TDMA calculated super frame");
994 		SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
995 		    "setcca", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT,
996 		    sc, 0, ath_sysctl_setcca, "I", "enable CCA control");
997 	}
998 #endif
999 
1000 #ifdef	ATH_DEBUG_ALQ
1001 	ath_sysctl_alq_attach(sc);
1002 #endif
1003 }
1004 
1005 static int
1006 ath_sysctl_clearstats(SYSCTL_HANDLER_ARGS)
1007 {
1008 	struct ath_softc *sc = arg1;
1009 	int val = 0;
1010 	int error;
1011 
1012 	error = sysctl_handle_int(oidp, &val, 0, req);
1013 	if (error || !req->newptr)
1014 		return error;
1015 	if (val == 0)
1016 		return 0;       /* Not clearing the stats is still valid */
1017 	memset(&sc->sc_stats, 0, sizeof(sc->sc_stats));
1018 	memset(&sc->sc_aggr_stats, 0, sizeof(sc->sc_aggr_stats));
1019 	memset(&sc->sc_intr_stats, 0, sizeof(sc->sc_intr_stats));
1020 
1021 	val = 0;
1022 	return 0;
1023 }
1024 
1025 static void
1026 ath_sysctl_stats_attach_rxphyerr(struct ath_softc *sc, struct sysctl_oid_list *parent)
1027 {
1028 	struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev);
1029 	struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev);
1030 	struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree);
1031 	int i;
1032 	char sn[8];
1033 
1034 	tree = SYSCTL_ADD_NODE(ctx, parent, OID_AUTO, "rx_phy_err",
1035 	    CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "Per-code RX PHY Errors");
1036 	child = SYSCTL_CHILDREN(tree);
1037 	for (i = 0; i < 64; i++) {
1038 		snprintf(sn, sizeof(sn), "%d", i);
1039 		SYSCTL_ADD_UINT(ctx, child, OID_AUTO, sn, CTLFLAG_RD, &sc->sc_stats.ast_rx_phy[i], 0, "");
1040 	}
1041 }
1042 
1043 static void
1044 ath_sysctl_stats_attach_intr(struct ath_softc *sc,
1045     struct sysctl_oid_list *parent)
1046 {
1047 	struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev);
1048 	struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev);
1049 	struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree);
1050 	int i;
1051 	char sn[8];
1052 
1053 	tree = SYSCTL_ADD_NODE(ctx, parent, OID_AUTO, "sync_intr",
1054 	    CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "Sync interrupt statistics");
1055 	child = SYSCTL_CHILDREN(tree);
1056 	for (i = 0; i < 32; i++) {
1057 		snprintf(sn, sizeof(sn), "%d", i);
1058 		SYSCTL_ADD_UINT(ctx, child, OID_AUTO, sn, CTLFLAG_RD,
1059 		    &sc->sc_intr_stats.sync_intr[i], 0, "");
1060 	}
1061 }
1062 
1063 void
1064 ath_sysctl_stats_attach(struct ath_softc *sc)
1065 {
1066 	struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev);
1067 	struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev);
1068 	struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree);
1069 
1070 	/* Create "clear" node */
1071 	SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
1072 	    "clear_stats", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc,
1073 	    0, ath_sysctl_clearstats, "I", "clear stats");
1074 
1075 	/* Create stats node */
1076 	tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "stats",
1077 	    CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "Statistics");
1078 	child = SYSCTL_CHILDREN(tree);
1079 
1080 	/* This was generated from if_athioctl.h */
1081 
1082 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_watchdog", CTLFLAG_RD,
1083 	    &sc->sc_stats.ast_watchdog, 0, "device reset by watchdog");
1084 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_hardware", CTLFLAG_RD,
1085 	    &sc->sc_stats.ast_hardware, 0, "fatal hardware error interrupts");
1086 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_bmiss", CTLFLAG_RD,
1087 	    &sc->sc_stats.ast_bmiss, 0, "beacon miss interrupts");
1088 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_bmiss_phantom", CTLFLAG_RD,
1089 	    &sc->sc_stats.ast_bmiss_phantom, 0, "beacon miss interrupts");
1090 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_bstuck", CTLFLAG_RD,
1091 	    &sc->sc_stats.ast_bstuck, 0, "beacon stuck interrupts");
1092 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rxorn", CTLFLAG_RD,
1093 	    &sc->sc_stats.ast_rxorn, 0, "rx overrun interrupts");
1094 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rxeol", CTLFLAG_RD,
1095 	    &sc->sc_stats.ast_rxeol, 0, "rx eol interrupts");
1096 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_txurn", CTLFLAG_RD,
1097 	    &sc->sc_stats.ast_txurn, 0, "tx underrun interrupts");
1098 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_mib", CTLFLAG_RD,
1099 	    &sc->sc_stats.ast_mib, 0, "mib interrupts");
1100 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_intrcoal", CTLFLAG_RD,
1101 	    &sc->sc_stats.ast_intrcoal, 0, "interrupts coalesced");
1102 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_packets", CTLFLAG_RD,
1103 	    &sc->sc_stats.ast_tx_packets, 0, "packet sent on the interface");
1104 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_mgmt", CTLFLAG_RD,
1105 	    &sc->sc_stats.ast_tx_mgmt, 0, "management frames transmitted");
1106 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_discard", CTLFLAG_RD,
1107 	    &sc->sc_stats.ast_tx_discard, 0, "frames discarded prior to assoc");
1108 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_qstop", CTLFLAG_RD,
1109 	    &sc->sc_stats.ast_tx_qstop, 0, "output stopped 'cuz no buffer");
1110 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_encap", CTLFLAG_RD,
1111 	    &sc->sc_stats.ast_tx_encap, 0, "tx encapsulation failed");
1112 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nonode", CTLFLAG_RD,
1113 	    &sc->sc_stats.ast_tx_nonode, 0, "tx failed 'cuz no node");
1114 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nombuf", CTLFLAG_RD,
1115 	    &sc->sc_stats.ast_tx_nombuf, 0, "tx failed 'cuz no mbuf");
1116 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nomcl", CTLFLAG_RD,
1117 	    &sc->sc_stats.ast_tx_nomcl, 0, "tx failed 'cuz no cluster");
1118 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_linear", CTLFLAG_RD,
1119 	    &sc->sc_stats.ast_tx_linear, 0, "tx linearized to cluster");
1120 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nodata", CTLFLAG_RD,
1121 	    &sc->sc_stats.ast_tx_nodata, 0, "tx discarded empty frame");
1122 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_busdma", CTLFLAG_RD,
1123 	    &sc->sc_stats.ast_tx_busdma, 0, "tx failed for dma resrcs");
1124 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_xretries", CTLFLAG_RD,
1125 	    &sc->sc_stats.ast_tx_xretries, 0, "tx failed 'cuz too many retries");
1126 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_fifoerr", CTLFLAG_RD,
1127 	    &sc->sc_stats.ast_tx_fifoerr, 0, "tx failed 'cuz FIFO underrun");
1128 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_filtered", CTLFLAG_RD,
1129 	    &sc->sc_stats.ast_tx_filtered, 0, "tx failed 'cuz xmit filtered");
1130 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_shortretry", CTLFLAG_RD,
1131 	    &sc->sc_stats.ast_tx_shortretry, 0, "tx on-chip retries (short)");
1132 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_longretry", CTLFLAG_RD,
1133 	    &sc->sc_stats.ast_tx_longretry, 0, "tx on-chip retries (long)");
1134 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_badrate", CTLFLAG_RD,
1135 	    &sc->sc_stats.ast_tx_badrate, 0, "tx failed 'cuz bogus xmit rate");
1136 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_noack", CTLFLAG_RD,
1137 	    &sc->sc_stats.ast_tx_noack, 0, "tx frames with no ack marked");
1138 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_rts", CTLFLAG_RD,
1139 	    &sc->sc_stats.ast_tx_rts, 0, "tx frames with rts enabled");
1140 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_cts", CTLFLAG_RD,
1141 	    &sc->sc_stats.ast_tx_cts, 0, "tx frames with cts enabled");
1142 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_shortpre", CTLFLAG_RD,
1143 	    &sc->sc_stats.ast_tx_shortpre, 0, "tx frames with short preamble");
1144 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_altrate", CTLFLAG_RD,
1145 	    &sc->sc_stats.ast_tx_altrate, 0, "tx frames with alternate rate");
1146 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_protect", CTLFLAG_RD,
1147 	    &sc->sc_stats.ast_tx_protect, 0, "tx frames with protection");
1148 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_ctsburst", CTLFLAG_RD,
1149 	    &sc->sc_stats.ast_tx_ctsburst, 0, "tx frames with cts and bursting");
1150 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_ctsext", CTLFLAG_RD,
1151 	    &sc->sc_stats.ast_tx_ctsext, 0, "tx frames with cts extension");
1152 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_nombuf", CTLFLAG_RD,
1153 	    &sc->sc_stats.ast_rx_nombuf, 0, "rx setup failed 'cuz no mbuf");
1154 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_busdma", CTLFLAG_RD,
1155 	    &sc->sc_stats.ast_rx_busdma, 0, "rx setup failed for dma resrcs");
1156 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_orn", CTLFLAG_RD,
1157 	    &sc->sc_stats.ast_rx_orn, 0, "rx failed 'cuz of desc overrun");
1158 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_crcerr", CTLFLAG_RD,
1159 	    &sc->sc_stats.ast_rx_crcerr, 0, "rx failed 'cuz of bad CRC");
1160 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_fifoerr", CTLFLAG_RD,
1161 	    &sc->sc_stats.ast_rx_fifoerr, 0, "rx failed 'cuz of FIFO overrun");
1162 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_badcrypt", CTLFLAG_RD,
1163 	    &sc->sc_stats.ast_rx_badcrypt, 0, "rx failed 'cuz decryption");
1164 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_badmic", CTLFLAG_RD,
1165 	    &sc->sc_stats.ast_rx_badmic, 0, "rx failed 'cuz MIC failure");
1166 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_phyerr", CTLFLAG_RD,
1167 	    &sc->sc_stats.ast_rx_phyerr, 0, "rx failed 'cuz of PHY err");
1168 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_tooshort", CTLFLAG_RD,
1169 	    &sc->sc_stats.ast_rx_tooshort, 0, "rx discarded 'cuz frame too short");
1170 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_toobig", CTLFLAG_RD,
1171 	    &sc->sc_stats.ast_rx_toobig, 0, "rx discarded 'cuz frame too large");
1172 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_packets", CTLFLAG_RD,
1173 	    &sc->sc_stats.ast_rx_packets, 0, "packet recv on the interface");
1174 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_mgt", CTLFLAG_RD,
1175 	    &sc->sc_stats.ast_rx_mgt, 0, "management frames received");
1176 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_ctl", CTLFLAG_RD,
1177 	    &sc->sc_stats.ast_rx_ctl, 0, "rx discarded 'cuz ctl frame");
1178 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_be_xmit", CTLFLAG_RD,
1179 	    &sc->sc_stats.ast_be_xmit, 0, "beacons transmitted");
1180 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_be_nombuf", CTLFLAG_RD,
1181 	    &sc->sc_stats.ast_be_nombuf, 0, "beacon setup failed 'cuz no mbuf");
1182 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_per_cal", CTLFLAG_RD,
1183 	    &sc->sc_stats.ast_per_cal, 0, "periodic calibration calls");
1184 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_per_calfail", CTLFLAG_RD,
1185 	    &sc->sc_stats.ast_per_calfail, 0, "periodic calibration failed");
1186 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_per_rfgain", CTLFLAG_RD,
1187 	    &sc->sc_stats.ast_per_rfgain, 0, "periodic calibration rfgain reset");
1188 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rate_calls", CTLFLAG_RD,
1189 	    &sc->sc_stats.ast_rate_calls, 0, "rate control checks");
1190 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rate_raise", CTLFLAG_RD,
1191 	    &sc->sc_stats.ast_rate_raise, 0, "rate control raised xmit rate");
1192 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rate_drop", CTLFLAG_RD,
1193 	    &sc->sc_stats.ast_rate_drop, 0, "rate control dropped xmit rate");
1194 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ant_defswitch", CTLFLAG_RD,
1195 	    &sc->sc_stats.ast_ant_defswitch, 0, "rx/default antenna switches");
1196 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ant_txswitch", CTLFLAG_RD,
1197 	    &sc->sc_stats.ast_ant_txswitch, 0, "tx antenna switches");
1198 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_cabq_xmit", CTLFLAG_RD,
1199 	    &sc->sc_stats.ast_cabq_xmit, 0, "cabq frames transmitted");
1200 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_cabq_busy", CTLFLAG_RD,
1201 	    &sc->sc_stats.ast_cabq_busy, 0, "cabq found busy");
1202 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_raw", CTLFLAG_RD,
1203 	    &sc->sc_stats.ast_tx_raw, 0, "tx frames through raw api");
1204 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ff_txok", CTLFLAG_RD,
1205 	    &sc->sc_stats.ast_ff_txok, 0, "fast frames tx'd successfully");
1206 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ff_txerr", CTLFLAG_RD,
1207 	    &sc->sc_stats.ast_ff_txerr, 0, "fast frames tx'd w/ error");
1208 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ff_rx", CTLFLAG_RD,
1209 	    &sc->sc_stats.ast_ff_rx, 0, "fast frames rx'd");
1210 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ff_flush", CTLFLAG_RD,
1211 	    &sc->sc_stats.ast_ff_flush, 0, "fast frames flushed from staging q");
1212 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_qfull", CTLFLAG_RD,
1213 	    &sc->sc_stats.ast_tx_qfull, 0, "tx dropped 'cuz of queue limit");
1214 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nobuf", CTLFLAG_RD,
1215 	    &sc->sc_stats.ast_tx_nobuf, 0, "tx dropped 'cuz no ath buffer");
1216 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tdma_update", CTLFLAG_RD,
1217 	    &sc->sc_stats.ast_tdma_update, 0, "TDMA slot timing updates");
1218 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tdma_timers", CTLFLAG_RD,
1219 	    &sc->sc_stats.ast_tdma_timers, 0, "TDMA slot update set beacon timers");
1220 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tdma_tsf", CTLFLAG_RD,
1221 	    &sc->sc_stats.ast_tdma_tsf, 0, "TDMA slot update set TSF");
1222 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tdma_ack", CTLFLAG_RD,
1223 	    &sc->sc_stats.ast_tdma_ack, 0, "TDMA tx failed 'cuz ACK required");
1224 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_raw_fail", CTLFLAG_RD,
1225 	    &sc->sc_stats.ast_tx_raw_fail, 0, "raw tx failed 'cuz h/w down");
1226 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nofrag", CTLFLAG_RD,
1227 	    &sc->sc_stats.ast_tx_nofrag, 0, "tx dropped 'cuz no ath frag buffer");
1228 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_be_missed", CTLFLAG_RD,
1229 	    &sc->sc_stats.ast_be_missed, 0, "number of -missed- beacons");
1230 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ani_cal", CTLFLAG_RD,
1231 	    &sc->sc_stats.ast_ani_cal, 0, "number of ANI polls");
1232 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_agg", CTLFLAG_RD,
1233 	    &sc->sc_stats.ast_rx_agg, 0, "number of aggregate frames received");
1234 
1235 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_halfgi", CTLFLAG_RD,
1236 	    &sc->sc_stats.ast_rx_halfgi, 0, "number of frames received with half-GI");
1237 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_2040", CTLFLAG_RD,
1238 	    &sc->sc_stats.ast_rx_2040, 0, "number of HT/40 frames received");
1239 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_pre_crc_err", CTLFLAG_RD,
1240 	    &sc->sc_stats.ast_rx_pre_crc_err, 0, "number of delimeter-CRC errors detected");
1241 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_post_crc_err", CTLFLAG_RD,
1242 	    &sc->sc_stats.ast_rx_post_crc_err, 0, "number of post-delimiter CRC errors detected");
1243 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_decrypt_busy_err", CTLFLAG_RD,
1244 	    &sc->sc_stats.ast_rx_decrypt_busy_err, 0, "number of frames received w/ busy decrypt engine");
1245 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_hi_rx_chain", CTLFLAG_RD,
1246 	    &sc->sc_stats.ast_rx_hi_rx_chain, 0, "");
1247 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_htprotect", CTLFLAG_RD,
1248 	    &sc->sc_stats.ast_tx_htprotect, 0, "HT tx frames with protection");
1249 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_hitqueueend", CTLFLAG_RD,
1250 	    &sc->sc_stats.ast_rx_hitqueueend, 0, "RX hit queue end");
1251 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_timeout", CTLFLAG_RD,
1252 	    &sc->sc_stats.ast_tx_timeout, 0, "TX Global Timeout");
1253 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_cst", CTLFLAG_RD,
1254 	    &sc->sc_stats.ast_tx_cst, 0, "TX Carrier Sense Timeout");
1255 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_xtxop", CTLFLAG_RD,
1256 	    &sc->sc_stats.ast_tx_xtxop, 0, "TX exceeded TXOP");
1257 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_timerexpired", CTLFLAG_RD,
1258 	    &sc->sc_stats.ast_tx_timerexpired, 0, "TX exceeded TX_TIMER register");
1259 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_desccfgerr", CTLFLAG_RD,
1260 	    &sc->sc_stats.ast_tx_desccfgerr, 0, "TX Descriptor Cfg Error");
1261 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_swretries", CTLFLAG_RD,
1262 	    &sc->sc_stats.ast_tx_swretries, 0, "TX software retry count");
1263 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_swretrymax", CTLFLAG_RD,
1264 	    &sc->sc_stats.ast_tx_swretrymax, 0, "TX software retry max reached");
1265 
1266 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_data_underrun", CTLFLAG_RD,
1267 	    &sc->sc_stats.ast_tx_data_underrun, 0, "");
1268 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_delim_underrun", CTLFLAG_RD,
1269 	    &sc->sc_stats.ast_tx_delim_underrun, 0, "");
1270 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_aggr_failall", CTLFLAG_RD,
1271 	    &sc->sc_stats.ast_tx_aggr_failall, 0,
1272 	    "Number of aggregate TX failures (whole frame)");
1273 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_aggr_ok", CTLFLAG_RD,
1274 	    &sc->sc_stats.ast_tx_aggr_ok, 0,
1275 	    "Number of aggregate TX OK completions (subframe)");
1276 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_aggr_fail", CTLFLAG_RD,
1277 	    &sc->sc_stats.ast_tx_aggr_fail, 0,
1278 	    "Number of aggregate TX failures (subframe)");
1279 
1280 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_intr", CTLFLAG_RD,
1281 	    &sc->sc_stats.ast_rx_intr, 0, "RX interrupts");
1282 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_intr", CTLFLAG_RD,
1283 	    &sc->sc_stats.ast_tx_intr, 0, "TX interrupts");
1284 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_mcastq_overflow",
1285 	    CTLFLAG_RD, &sc->sc_stats.ast_tx_mcastq_overflow, 0,
1286 	    "Number of multicast frames exceeding maximum mcast queue depth");
1287 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_keymiss", CTLFLAG_RD,
1288 	    &sc->sc_stats.ast_rx_keymiss, 0, "");
1289 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_swfiltered", CTLFLAG_RD,
1290 	    &sc->sc_stats.ast_tx_swfiltered, 0, "");
1291 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nodeq_overflow",
1292 	    CTLFLAG_RD, &sc->sc_stats.ast_tx_nodeq_overflow, 0,
1293 	    "tx dropped 'cuz nodeq overflow");
1294 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_stbc",
1295 	    CTLFLAG_RD, &sc->sc_stats.ast_rx_stbc, 0,
1296 	    "Number of STBC frames received");
1297 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_stbc",
1298 	    CTLFLAG_RD, &sc->sc_stats.ast_tx_stbc, 0,
1299 	    "Number of STBC frames transmitted");
1300 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_ldpc",
1301 	    CTLFLAG_RD, &sc->sc_stats.ast_tx_ldpc, 0,
1302 	    "Number of LDPC frames transmitted");
1303 
1304 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tsfoor",
1305 	    CTLFLAG_RD, &sc->sc_stats.ast_tsfoor, 0,
1306 	    "Number of TSF out of range interrupts/resets");
1307 
1308 	/* Attach the RX phy error array */
1309 	ath_sysctl_stats_attach_rxphyerr(sc, child);
1310 
1311 	/* Attach the interrupt statistics array */
1312 	ath_sysctl_stats_attach_intr(sc, child);
1313 }
1314 
1315 /*
1316  * This doesn't necessarily belong here (because it's HAL related, not
1317  * driver related).
1318  */
1319 void
1320 ath_sysctl_hal_attach(struct ath_softc *sc)
1321 {
1322 	struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev);
1323 	struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev);
1324 	struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree);
1325 
1326 	tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "hal",
1327 	    CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "Atheros HAL parameters");
1328 	child = SYSCTL_CHILDREN(tree);
1329 
1330 	sc->sc_ah->ah_config.ah_debug = 0;
1331 	SYSCTL_ADD_INT(ctx, child, OID_AUTO, "debug", CTLFLAG_RW,
1332 	    &sc->sc_ah->ah_config.ah_debug, 0, "Atheros HAL debugging printfs");
1333 
1334 	sc->sc_ah->ah_config.ah_ar5416_biasadj = 0;
1335 	SYSCTL_ADD_INT(ctx, child, OID_AUTO, "ar5416_biasadj", CTLFLAG_RW,
1336 	    &sc->sc_ah->ah_config.ah_ar5416_biasadj, 0,
1337 	    "Enable 2GHz AR5416 direction sensitivity bias adjust");
1338 
1339 	sc->sc_ah->ah_config.ah_dma_beacon_response_time = 2;
1340 	SYSCTL_ADD_INT(ctx, child, OID_AUTO, "dma_brt", CTLFLAG_RW,
1341 	    &sc->sc_ah->ah_config.ah_dma_beacon_response_time, 0,
1342 	    "Atheros HAL DMA beacon response time");
1343 
1344 	sc->sc_ah->ah_config.ah_sw_beacon_response_time = 10;
1345 	SYSCTL_ADD_INT(ctx, child, OID_AUTO, "sw_brt", CTLFLAG_RW,
1346 	    &sc->sc_ah->ah_config.ah_sw_beacon_response_time, 0,
1347 	    "Atheros HAL software beacon response time");
1348 
1349 	sc->sc_ah->ah_config.ah_additional_swba_backoff = 0;
1350 	SYSCTL_ADD_INT(ctx, child, OID_AUTO, "swba_backoff", CTLFLAG_RW,
1351 	    &sc->sc_ah->ah_config.ah_additional_swba_backoff, 0,
1352 	    "Atheros HAL additional SWBA backoff time");
1353 
1354 	sc->sc_ah->ah_config.ah_force_full_reset = 0;
1355 	SYSCTL_ADD_INT(ctx, child, OID_AUTO, "force_full_reset", CTLFLAG_RW,
1356 	    &sc->sc_ah->ah_config.ah_force_full_reset, 0,
1357 	    "Force full chip reset rather than a warm reset");
1358 
1359 	/*
1360 	 * This is initialised by the driver.
1361 	 */
1362 	SYSCTL_ADD_INT(ctx, child, OID_AUTO, "serialise_reg_war", CTLFLAG_RW,
1363 	    &sc->sc_ah->ah_config.ah_serialise_reg_war, 0,
1364 	    "Force register access serialisation");
1365 }
1366