xref: /freebsd/sys/dev/ath/if_ath_tx.c (revision 4f52dfbb)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5  * Copyright (c) 2010-2012 Adrian Chadd, Xenion Pty Ltd
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer,
13  *    without modification.
14  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
15  *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
16  *    redistribution must be conditioned upon including a substantially
17  *    similar Disclaimer requirement for further binary redistribution.
18  *
19  * NO WARRANTY
20  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22  * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
23  * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
24  * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
25  * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
28  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30  * THE POSSIBILITY OF SUCH DAMAGES.
31  */
32 
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD$");
35 
36 /*
37  * Driver for the Atheros Wireless LAN controller.
38  *
39  * This software is derived from work of Atsushi Onoe; his contribution
40  * is greatly appreciated.
41  */
42 
43 #include "opt_inet.h"
44 #include "opt_ath.h"
45 #include "opt_wlan.h"
46 
47 #include <sys/param.h>
48 #include <sys/systm.h>
49 #include <sys/sysctl.h>
50 #include <sys/mbuf.h>
51 #include <sys/malloc.h>
52 #include <sys/lock.h>
53 #include <sys/mutex.h>
54 #include <sys/kernel.h>
55 #include <sys/socket.h>
56 #include <sys/sockio.h>
57 #include <sys/errno.h>
58 #include <sys/callout.h>
59 #include <sys/bus.h>
60 #include <sys/endian.h>
61 #include <sys/kthread.h>
62 #include <sys/taskqueue.h>
63 #include <sys/priv.h>
64 #include <sys/ktr.h>
65 
66 #include <machine/bus.h>
67 
68 #include <net/if.h>
69 #include <net/if_var.h>
70 #include <net/if_dl.h>
71 #include <net/if_media.h>
72 #include <net/if_types.h>
73 #include <net/if_arp.h>
74 #include <net/ethernet.h>
75 #include <net/if_llc.h>
76 
77 #include <net80211/ieee80211_var.h>
78 #include <net80211/ieee80211_regdomain.h>
79 #ifdef IEEE80211_SUPPORT_SUPERG
80 #include <net80211/ieee80211_superg.h>
81 #endif
82 #ifdef IEEE80211_SUPPORT_TDMA
83 #include <net80211/ieee80211_tdma.h>
84 #endif
85 #include <net80211/ieee80211_ht.h>
86 
87 #include <net/bpf.h>
88 
89 #ifdef INET
90 #include <netinet/in.h>
91 #include <netinet/if_ether.h>
92 #endif
93 
94 #include <dev/ath/if_athvar.h>
95 #include <dev/ath/ath_hal/ah_devid.h>		/* XXX for softled */
96 #include <dev/ath/ath_hal/ah_diagcodes.h>
97 
98 #include <dev/ath/if_ath_debug.h>
99 
100 #ifdef ATH_TX99_DIAG
101 #include <dev/ath/ath_tx99/ath_tx99.h>
102 #endif
103 
104 #include <dev/ath/if_ath_misc.h>
105 #include <dev/ath/if_ath_tx.h>
106 #include <dev/ath/if_ath_tx_ht.h>
107 
108 #ifdef	ATH_DEBUG_ALQ
109 #include <dev/ath/if_ath_alq.h>
110 #endif
111 
112 /*
113  * How many retries to perform in software
114  */
115 #define	SWMAX_RETRIES		10
116 
117 /*
118  * What queue to throw the non-QoS TID traffic into
119  */
120 #define	ATH_NONQOS_TID_AC	WME_AC_VO
121 
122 #if 0
123 static int ath_tx_node_is_asleep(struct ath_softc *sc, struct ath_node *an);
124 #endif
125 static int ath_tx_ampdu_pending(struct ath_softc *sc, struct ath_node *an,
126     int tid);
127 static int ath_tx_ampdu_running(struct ath_softc *sc, struct ath_node *an,
128     int tid);
129 static ieee80211_seq ath_tx_tid_seqno_assign(struct ath_softc *sc,
130     struct ieee80211_node *ni, struct ath_buf *bf, struct mbuf *m0);
131 static int ath_tx_action_frame_override_queue(struct ath_softc *sc,
132     struct ieee80211_node *ni, struct mbuf *m0, int *tid);
133 static struct ath_buf *
134 ath_tx_retry_clone(struct ath_softc *sc, struct ath_node *an,
135     struct ath_tid *tid, struct ath_buf *bf);
136 
137 #ifdef	ATH_DEBUG_ALQ
138 void
139 ath_tx_alq_post(struct ath_softc *sc, struct ath_buf *bf_first)
140 {
141 	struct ath_buf *bf;
142 	int i, n;
143 	const char *ds;
144 
145 	/* XXX we should skip out early if debugging isn't enabled! */
146 	bf = bf_first;
147 
148 	while (bf != NULL) {
149 		/* XXX should ensure bf_nseg > 0! */
150 		if (bf->bf_nseg == 0)
151 			break;
152 		n = ((bf->bf_nseg - 1) / sc->sc_tx_nmaps) + 1;
153 		for (i = 0, ds = (const char *) bf->bf_desc;
154 		    i < n;
155 		    i++, ds += sc->sc_tx_desclen) {
156 			if_ath_alq_post(&sc->sc_alq,
157 			    ATH_ALQ_EDMA_TXDESC,
158 			    sc->sc_tx_desclen,
159 			    ds);
160 		}
161 		bf = bf->bf_next;
162 	}
163 }
164 #endif /* ATH_DEBUG_ALQ */
165 
166 /*
167  * Whether to use the 11n rate scenario functions or not
168  */
169 static inline int
170 ath_tx_is_11n(struct ath_softc *sc)
171 {
172 	return ((sc->sc_ah->ah_magic == 0x20065416) ||
173 		    (sc->sc_ah->ah_magic == 0x19741014));
174 }
175 
176 /*
177  * Obtain the current TID from the given frame.
178  *
179  * Non-QoS frames get mapped to a TID so frames consistently
180  * go on a sensible queue.
181  */
182 static int
183 ath_tx_gettid(struct ath_softc *sc, const struct mbuf *m0)
184 {
185 	const struct ieee80211_frame *wh;
186 
187 	wh = mtod(m0, const struct ieee80211_frame *);
188 
189 	/* Non-QoS: map frame to a TID queue for software queueing */
190 	if (! IEEE80211_QOS_HAS_SEQ(wh))
191 		return (WME_AC_TO_TID(M_WME_GETAC(m0)));
192 
193 	/* QoS - fetch the TID from the header, ignore mbuf WME */
194 	return (ieee80211_gettid(wh));
195 }
196 
197 static void
198 ath_tx_set_retry(struct ath_softc *sc, struct ath_buf *bf)
199 {
200 	struct ieee80211_frame *wh;
201 
202 	wh = mtod(bf->bf_m, struct ieee80211_frame *);
203 	/* Only update/resync if needed */
204 	if (bf->bf_state.bfs_isretried == 0) {
205 		wh->i_fc[1] |= IEEE80211_FC1_RETRY;
206 		bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap,
207 		    BUS_DMASYNC_PREWRITE);
208 	}
209 	bf->bf_state.bfs_isretried = 1;
210 	bf->bf_state.bfs_retries ++;
211 }
212 
213 /*
214  * Determine what the correct AC queue for the given frame
215  * should be.
216  *
217  * For QoS frames, obey the TID.  That way things like
218  * management frames that are related to a given TID
219  * are thus serialised with the rest of the TID traffic,
220  * regardless of net80211 overriding priority.
221  *
222  * For non-QoS frames, return the mbuf WMI priority.
223  *
224  * This has implications that higher priority non-QoS traffic
225  * may end up being scheduled before other non-QoS traffic,
226  * leading to out-of-sequence packets being emitted.
227  *
228  * (It'd be nice to log/count this so we can see if it
229  * really is a problem.)
230  *
231  * TODO: maybe we should throw multicast traffic, QoS or
232  * otherwise, into a separate TX queue?
233  */
234 static int
235 ath_tx_getac(struct ath_softc *sc, const struct mbuf *m0)
236 {
237 	const struct ieee80211_frame *wh;
238 
239 	wh = mtod(m0, const struct ieee80211_frame *);
240 
241 	/*
242 	 * QoS data frame (sequence number or otherwise) -
243 	 * return hardware queue mapping for the underlying
244 	 * TID.
245 	 */
246 	if (IEEE80211_QOS_HAS_SEQ(wh))
247 		return TID_TO_WME_AC(ieee80211_gettid(wh));
248 
249 	/*
250 	 * Otherwise - return mbuf QoS pri.
251 	 */
252 	return (M_WME_GETAC(m0));
253 }
254 
255 void
256 ath_txfrag_cleanup(struct ath_softc *sc,
257 	ath_bufhead *frags, struct ieee80211_node *ni)
258 {
259 	struct ath_buf *bf, *next;
260 
261 	ATH_TXBUF_LOCK_ASSERT(sc);
262 
263 	TAILQ_FOREACH_SAFE(bf, frags, bf_list, next) {
264 		/* NB: bf assumed clean */
265 		TAILQ_REMOVE(frags, bf, bf_list);
266 		ath_returnbuf_head(sc, bf);
267 		ieee80211_node_decref(ni);
268 	}
269 }
270 
271 /*
272  * Setup xmit of a fragmented frame.  Allocate a buffer
273  * for each frag and bump the node reference count to
274  * reflect the held reference to be setup by ath_tx_start.
275  */
276 int
277 ath_txfrag_setup(struct ath_softc *sc, ath_bufhead *frags,
278 	struct mbuf *m0, struct ieee80211_node *ni)
279 {
280 	struct mbuf *m;
281 	struct ath_buf *bf;
282 
283 	ATH_TXBUF_LOCK(sc);
284 	for (m = m0->m_nextpkt; m != NULL; m = m->m_nextpkt) {
285 		/* XXX non-management? */
286 		bf = _ath_getbuf_locked(sc, ATH_BUFTYPE_NORMAL);
287 		if (bf == NULL) {	/* out of buffers, cleanup */
288 			DPRINTF(sc, ATH_DEBUG_XMIT, "%s: no buffer?\n",
289 			    __func__);
290 			ath_txfrag_cleanup(sc, frags, ni);
291 			break;
292 		}
293 		ieee80211_node_incref(ni);
294 		TAILQ_INSERT_TAIL(frags, bf, bf_list);
295 	}
296 	ATH_TXBUF_UNLOCK(sc);
297 
298 	return !TAILQ_EMPTY(frags);
299 }
300 
301 static int
302 ath_tx_dmasetup(struct ath_softc *sc, struct ath_buf *bf, struct mbuf *m0)
303 {
304 	struct mbuf *m;
305 	int error;
306 
307 	/*
308 	 * Load the DMA map so any coalescing is done.  This
309 	 * also calculates the number of descriptors we need.
310 	 */
311 	error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0,
312 				     bf->bf_segs, &bf->bf_nseg,
313 				     BUS_DMA_NOWAIT);
314 	if (error == EFBIG) {
315 		/* XXX packet requires too many descriptors */
316 		bf->bf_nseg = ATH_MAX_SCATTER + 1;
317 	} else if (error != 0) {
318 		sc->sc_stats.ast_tx_busdma++;
319 		ieee80211_free_mbuf(m0);
320 		return error;
321 	}
322 	/*
323 	 * Discard null packets and check for packets that
324 	 * require too many TX descriptors.  We try to convert
325 	 * the latter to a cluster.
326 	 */
327 	if (bf->bf_nseg > ATH_MAX_SCATTER) {		/* too many desc's, linearize */
328 		sc->sc_stats.ast_tx_linear++;
329 		m = m_collapse(m0, M_NOWAIT, ATH_MAX_SCATTER);
330 		if (m == NULL) {
331 			ieee80211_free_mbuf(m0);
332 			sc->sc_stats.ast_tx_nombuf++;
333 			return ENOMEM;
334 		}
335 		m0 = m;
336 		error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0,
337 					     bf->bf_segs, &bf->bf_nseg,
338 					     BUS_DMA_NOWAIT);
339 		if (error != 0) {
340 			sc->sc_stats.ast_tx_busdma++;
341 			ieee80211_free_mbuf(m0);
342 			return error;
343 		}
344 		KASSERT(bf->bf_nseg <= ATH_MAX_SCATTER,
345 		    ("too many segments after defrag; nseg %u", bf->bf_nseg));
346 	} else if (bf->bf_nseg == 0) {		/* null packet, discard */
347 		sc->sc_stats.ast_tx_nodata++;
348 		ieee80211_free_mbuf(m0);
349 		return EIO;
350 	}
351 	DPRINTF(sc, ATH_DEBUG_XMIT, "%s: m %p len %u\n",
352 		__func__, m0, m0->m_pkthdr.len);
353 	bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
354 	bf->bf_m = m0;
355 
356 	return 0;
357 }
358 
359 /*
360  * Chain together segments+descriptors for a frame - 11n or otherwise.
361  *
362  * For aggregates, this is called on each frame in the aggregate.
363  */
364 static void
365 ath_tx_chaindesclist(struct ath_softc *sc, struct ath_desc *ds0,
366     struct ath_buf *bf, int is_aggr, int is_first_subframe,
367     int is_last_subframe)
368 {
369 	struct ath_hal *ah = sc->sc_ah;
370 	char *ds;
371 	int i, bp, dsp;
372 	HAL_DMA_ADDR bufAddrList[4];
373 	uint32_t segLenList[4];
374 	int numTxMaps = 1;
375 	int isFirstDesc = 1;
376 
377 	/*
378 	 * XXX There's txdma and txdma_mgmt; the descriptor
379 	 * sizes must match.
380 	 */
381 	struct ath_descdma *dd = &sc->sc_txdma;
382 
383 	/*
384 	 * Fillin the remainder of the descriptor info.
385 	 */
386 
387 	/*
388 	 * We need the number of TX data pointers in each descriptor.
389 	 * EDMA and later chips support 4 TX buffers per descriptor;
390 	 * previous chips just support one.
391 	 */
392 	numTxMaps = sc->sc_tx_nmaps;
393 
394 	/*
395 	 * For EDMA and later chips ensure the TX map is fully populated
396 	 * before advancing to the next descriptor.
397 	 */
398 	ds = (char *) bf->bf_desc;
399 	bp = dsp = 0;
400 	bzero(bufAddrList, sizeof(bufAddrList));
401 	bzero(segLenList, sizeof(segLenList));
402 	for (i = 0; i < bf->bf_nseg; i++) {
403 		bufAddrList[bp] = bf->bf_segs[i].ds_addr;
404 		segLenList[bp] = bf->bf_segs[i].ds_len;
405 		bp++;
406 
407 		/*
408 		 * Go to the next segment if this isn't the last segment
409 		 * and there's space in the current TX map.
410 		 */
411 		if ((i != bf->bf_nseg - 1) && (bp < numTxMaps))
412 			continue;
413 
414 		/*
415 		 * Last segment or we're out of buffer pointers.
416 		 */
417 		bp = 0;
418 
419 		if (i == bf->bf_nseg - 1)
420 			ath_hal_settxdesclink(ah, (struct ath_desc *) ds, 0);
421 		else
422 			ath_hal_settxdesclink(ah, (struct ath_desc *) ds,
423 			    bf->bf_daddr + dd->dd_descsize * (dsp + 1));
424 
425 		/*
426 		 * XXX This assumes that bfs_txq is the actual destination
427 		 * hardware queue at this point.  It may not have been
428 		 * assigned, it may actually be pointing to the multicast
429 		 * software TXQ id.  These must be fixed!
430 		 */
431 		ath_hal_filltxdesc(ah, (struct ath_desc *) ds
432 			, bufAddrList
433 			, segLenList
434 			, bf->bf_descid		/* XXX desc id */
435 			, bf->bf_state.bfs_tx_queue
436 			, isFirstDesc		/* first segment */
437 			, i == bf->bf_nseg - 1	/* last segment */
438 			, (struct ath_desc *) ds0	/* first descriptor */
439 		);
440 
441 		/*
442 		 * Make sure the 11n aggregate fields are cleared.
443 		 *
444 		 * XXX TODO: this doesn't need to be called for
445 		 * aggregate frames; as it'll be called on all
446 		 * sub-frames.  Since the descriptors are in
447 		 * non-cacheable memory, this leads to some
448 		 * rather slow writes on MIPS/ARM platforms.
449 		 */
450 		if (ath_tx_is_11n(sc))
451 			ath_hal_clr11n_aggr(sc->sc_ah, (struct ath_desc *) ds);
452 
453 		/*
454 		 * If 11n is enabled, set it up as if it's an aggregate
455 		 * frame.
456 		 */
457 		if (is_last_subframe) {
458 			ath_hal_set11n_aggr_last(sc->sc_ah,
459 			    (struct ath_desc *) ds);
460 		} else if (is_aggr) {
461 			/*
462 			 * This clears the aggrlen field; so
463 			 * the caller needs to call set_aggr_first()!
464 			 *
465 			 * XXX TODO: don't call this for the first
466 			 * descriptor in the first frame in an
467 			 * aggregate!
468 			 */
469 			ath_hal_set11n_aggr_middle(sc->sc_ah,
470 			    (struct ath_desc *) ds,
471 			    bf->bf_state.bfs_ndelim);
472 		}
473 		isFirstDesc = 0;
474 		bf->bf_lastds = (struct ath_desc *) ds;
475 
476 		/*
477 		 * Don't forget to skip to the next descriptor.
478 		 */
479 		ds += sc->sc_tx_desclen;
480 		dsp++;
481 
482 		/*
483 		 * .. and don't forget to blank these out!
484 		 */
485 		bzero(bufAddrList, sizeof(bufAddrList));
486 		bzero(segLenList, sizeof(segLenList));
487 	}
488 	bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
489 }
490 
491 /*
492  * Set the rate control fields in the given descriptor based on
493  * the bf_state fields and node state.
494  *
495  * The bfs fields should already be set with the relevant rate
496  * control information, including whether MRR is to be enabled.
497  *
498  * Since the FreeBSD HAL currently sets up the first TX rate
499  * in ath_hal_setuptxdesc(), this will setup the MRR
500  * conditionally for the pre-11n chips, and call ath_buf_set_rate
501  * unconditionally for 11n chips. These require the 11n rate
502  * scenario to be set if MCS rates are enabled, so it's easier
503  * to just always call it. The caller can then only set rates 2, 3
504  * and 4 if multi-rate retry is needed.
505  */
506 static void
507 ath_tx_set_ratectrl(struct ath_softc *sc, struct ieee80211_node *ni,
508     struct ath_buf *bf)
509 {
510 	struct ath_rc_series *rc = bf->bf_state.bfs_rc;
511 
512 	/* If mrr is disabled, blank tries 1, 2, 3 */
513 	if (! bf->bf_state.bfs_ismrr)
514 		rc[1].tries = rc[2].tries = rc[3].tries = 0;
515 
516 #if 0
517 	/*
518 	 * If NOACK is set, just set ntries=1.
519 	 */
520 	else if (bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) {
521 		rc[1].tries = rc[2].tries = rc[3].tries = 0;
522 		rc[0].tries = 1;
523 	}
524 #endif
525 
526 	/*
527 	 * Always call - that way a retried descriptor will
528 	 * have the MRR fields overwritten.
529 	 *
530 	 * XXX TODO: see if this is really needed - setting up
531 	 * the first descriptor should set the MRR fields to 0
532 	 * for us anyway.
533 	 */
534 	if (ath_tx_is_11n(sc)) {
535 		ath_buf_set_rate(sc, ni, bf);
536 	} else {
537 		ath_hal_setupxtxdesc(sc->sc_ah, bf->bf_desc
538 			, rc[1].ratecode, rc[1].tries
539 			, rc[2].ratecode, rc[2].tries
540 			, rc[3].ratecode, rc[3].tries
541 		);
542 	}
543 }
544 
545 /*
546  * Setup segments+descriptors for an 11n aggregate.
547  * bf_first is the first buffer in the aggregate.
548  * The descriptor list must already been linked together using
549  * bf->bf_next.
550  */
551 static void
552 ath_tx_setds_11n(struct ath_softc *sc, struct ath_buf *bf_first)
553 {
554 	struct ath_buf *bf, *bf_prev = NULL;
555 	struct ath_desc *ds0 = bf_first->bf_desc;
556 
557 	DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: nframes=%d, al=%d\n",
558 	    __func__, bf_first->bf_state.bfs_nframes,
559 	    bf_first->bf_state.bfs_al);
560 
561 	bf = bf_first;
562 
563 	if (bf->bf_state.bfs_txrate0 == 0)
564 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: bf=%p, txrate0=%d\n",
565 		    __func__, bf, 0);
566 	if (bf->bf_state.bfs_rc[0].ratecode == 0)
567 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: bf=%p, rix0=%d\n",
568 		    __func__, bf, 0);
569 
570 	/*
571 	 * Setup all descriptors of all subframes - this will
572 	 * call ath_hal_set11naggrmiddle() on every frame.
573 	 */
574 	while (bf != NULL) {
575 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
576 		    "%s: bf=%p, nseg=%d, pktlen=%d, seqno=%d\n",
577 		    __func__, bf, bf->bf_nseg, bf->bf_state.bfs_pktlen,
578 		    SEQNO(bf->bf_state.bfs_seqno));
579 
580 		/*
581 		 * Setup the initial fields for the first descriptor - all
582 		 * the non-11n specific stuff.
583 		 */
584 		ath_hal_setuptxdesc(sc->sc_ah, bf->bf_desc
585 			, bf->bf_state.bfs_pktlen	/* packet length */
586 			, bf->bf_state.bfs_hdrlen	/* header length */
587 			, bf->bf_state.bfs_atype	/* Atheros packet type */
588 			, bf->bf_state.bfs_txpower	/* txpower */
589 			, bf->bf_state.bfs_txrate0
590 			, bf->bf_state.bfs_try0		/* series 0 rate/tries */
591 			, bf->bf_state.bfs_keyix	/* key cache index */
592 			, bf->bf_state.bfs_txantenna	/* antenna mode */
593 			, bf->bf_state.bfs_txflags | HAL_TXDESC_INTREQ	/* flags */
594 			, bf->bf_state.bfs_ctsrate	/* rts/cts rate */
595 			, bf->bf_state.bfs_ctsduration	/* rts/cts duration */
596 		);
597 
598 		/*
599 		 * First descriptor? Setup the rate control and initial
600 		 * aggregate header information.
601 		 */
602 		if (bf == bf_first) {
603 			/*
604 			 * setup first desc with rate and aggr info
605 			 */
606 			ath_tx_set_ratectrl(sc, bf->bf_node, bf);
607 		}
608 
609 		/*
610 		 * Setup the descriptors for a multi-descriptor frame.
611 		 * This is both aggregate and non-aggregate aware.
612 		 */
613 		ath_tx_chaindesclist(sc, ds0, bf,
614 		    1, /* is_aggr */
615 		    !! (bf == bf_first), /* is_first_subframe */
616 		    !! (bf->bf_next == NULL) /* is_last_subframe */
617 		    );
618 
619 		if (bf == bf_first) {
620 			/*
621 			 * Initialise the first 11n aggregate with the
622 			 * aggregate length and aggregate enable bits.
623 			 */
624 			ath_hal_set11n_aggr_first(sc->sc_ah,
625 			    ds0,
626 			    bf->bf_state.bfs_al,
627 			    bf->bf_state.bfs_ndelim);
628 		}
629 
630 		/*
631 		 * Link the last descriptor of the previous frame
632 		 * to the beginning descriptor of this frame.
633 		 */
634 		if (bf_prev != NULL)
635 			ath_hal_settxdesclink(sc->sc_ah, bf_prev->bf_lastds,
636 			    bf->bf_daddr);
637 
638 		/* Save a copy so we can link the next descriptor in */
639 		bf_prev = bf;
640 		bf = bf->bf_next;
641 	}
642 
643 	/*
644 	 * Set the first descriptor bf_lastds field to point to
645 	 * the last descriptor in the last subframe, that's where
646 	 * the status update will occur.
647 	 */
648 	bf_first->bf_lastds = bf_prev->bf_lastds;
649 
650 	/*
651 	 * And bf_last in the first descriptor points to the end of
652 	 * the aggregate list.
653 	 */
654 	bf_first->bf_last = bf_prev;
655 
656 	/*
657 	 * For non-AR9300 NICs, which require the rate control
658 	 * in the final descriptor - let's set that up now.
659 	 *
660 	 * This is because the filltxdesc() HAL call doesn't
661 	 * populate the last segment with rate control information
662 	 * if firstSeg is also true.  For non-aggregate frames
663 	 * that is fine, as the first frame already has rate control
664 	 * info.  But if the last frame in an aggregate has one
665 	 * descriptor, both firstseg and lastseg will be true and
666 	 * the rate info isn't copied.
667 	 *
668 	 * This is inefficient on MIPS/ARM platforms that have
669 	 * non-cachable memory for TX descriptors, but we'll just
670 	 * make do for now.
671 	 *
672 	 * As to why the rate table is stashed in the last descriptor
673 	 * rather than the first descriptor?  Because proctxdesc()
674 	 * is called on the final descriptor in an MPDU or A-MPDU -
675 	 * ie, the one that gets updated by the hardware upon
676 	 * completion.  That way proctxdesc() doesn't need to know
677 	 * about the first _and_ last TX descriptor.
678 	 */
679 	ath_hal_setuplasttxdesc(sc->sc_ah, bf_prev->bf_lastds, ds0);
680 
681 	DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: end\n", __func__);
682 }
683 
684 /*
685  * Hand-off a frame to the multicast TX queue.
686  *
687  * This is a software TXQ which will be appended to the CAB queue
688  * during the beacon setup code.
689  *
690  * XXX TODO: since the AR9300 EDMA TX queue support wants the QCU ID
691  * as part of the TX descriptor, bf_state.bfs_tx_queue must be updated
692  * with the actual hardware txq, or all of this will fall apart.
693  *
694  * XXX It may not be a bad idea to just stuff the QCU ID into bf_state
695  * and retire bfs_tx_queue; then make sure the CABQ QCU ID is populated
696  * correctly.
697  */
698 static void
699 ath_tx_handoff_mcast(struct ath_softc *sc, struct ath_txq *txq,
700     struct ath_buf *bf)
701 {
702 	ATH_TX_LOCK_ASSERT(sc);
703 
704 	KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0,
705 	     ("%s: busy status 0x%x", __func__, bf->bf_flags));
706 
707 	/*
708 	 * Ensure that the tx queue is the cabq, so things get
709 	 * mapped correctly.
710 	 */
711 	if (bf->bf_state.bfs_tx_queue != sc->sc_cabq->axq_qnum) {
712 		DPRINTF(sc, ATH_DEBUG_XMIT,
713 		    "%s: bf=%p, bfs_tx_queue=%d, axq_qnum=%d\n",
714 		    __func__, bf, bf->bf_state.bfs_tx_queue,
715 		    txq->axq_qnum);
716 	}
717 
718 	ATH_TXQ_LOCK(txq);
719 	if (ATH_TXQ_LAST(txq, axq_q_s) != NULL) {
720 		struct ath_buf *bf_last = ATH_TXQ_LAST(txq, axq_q_s);
721 		struct ieee80211_frame *wh;
722 
723 		/* mark previous frame */
724 		wh = mtod(bf_last->bf_m, struct ieee80211_frame *);
725 		wh->i_fc[1] |= IEEE80211_FC1_MORE_DATA;
726 		bus_dmamap_sync(sc->sc_dmat, bf_last->bf_dmamap,
727 		    BUS_DMASYNC_PREWRITE);
728 
729 		/* link descriptor */
730 		ath_hal_settxdesclink(sc->sc_ah,
731 		    bf_last->bf_lastds,
732 		    bf->bf_daddr);
733 	}
734 	ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
735 	ATH_TXQ_UNLOCK(txq);
736 }
737 
738 /*
739  * Hand-off packet to a hardware queue.
740  */
741 static void
742 ath_tx_handoff_hw(struct ath_softc *sc, struct ath_txq *txq,
743     struct ath_buf *bf)
744 {
745 	struct ath_hal *ah = sc->sc_ah;
746 	struct ath_buf *bf_first;
747 
748 	/*
749 	 * Insert the frame on the outbound list and pass it on
750 	 * to the hardware.  Multicast frames buffered for power
751 	 * save stations and transmit from the CAB queue are stored
752 	 * on a s/w only queue and loaded on to the CAB queue in
753 	 * the SWBA handler since frames only go out on DTIM and
754 	 * to avoid possible races.
755 	 */
756 	ATH_TX_LOCK_ASSERT(sc);
757 	KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0,
758 	     ("%s: busy status 0x%x", __func__, bf->bf_flags));
759 	KASSERT(txq->axq_qnum != ATH_TXQ_SWQ,
760 	     ("ath_tx_handoff_hw called for mcast queue"));
761 
762 	/*
763 	 * XXX We should instead just verify that sc_txstart_cnt
764 	 * or ath_txproc_cnt > 0.  That would mean that
765 	 * the reset is going to be waiting for us to complete.
766 	 */
767 	if (sc->sc_txproc_cnt == 0 && sc->sc_txstart_cnt == 0) {
768 		device_printf(sc->sc_dev,
769 		    "%s: TX dispatch without holding txcount/txstart refcnt!\n",
770 		    __func__);
771 	}
772 
773 	/*
774 	 * XXX .. this is going to cause the hardware to get upset;
775 	 * so we really should find some way to drop or queue
776 	 * things.
777 	 */
778 
779 	ATH_TXQ_LOCK(txq);
780 
781 	/*
782 	 * XXX TODO: if there's a holdingbf, then
783 	 * ATH_TXQ_PUTRUNNING should be clear.
784 	 *
785 	 * If there is a holdingbf and the list is empty,
786 	 * then axq_link should be pointing to the holdingbf.
787 	 *
788 	 * Otherwise it should point to the last descriptor
789 	 * in the last ath_buf.
790 	 *
791 	 * In any case, we should really ensure that we
792 	 * update the previous descriptor link pointer to
793 	 * this descriptor, regardless of all of the above state.
794 	 *
795 	 * For now this is captured by having axq_link point
796 	 * to either the holdingbf (if the TXQ list is empty)
797 	 * or the end of the list (if the TXQ list isn't empty.)
798 	 * I'd rather just kill axq_link here and do it as above.
799 	 */
800 
801 	/*
802 	 * Append the frame to the TX queue.
803 	 */
804 	ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
805 	ATH_KTR(sc, ATH_KTR_TX, 3,
806 	    "ath_tx_handoff: non-tdma: txq=%u, add bf=%p "
807 	    "depth=%d",
808 	    txq->axq_qnum,
809 	    bf,
810 	    txq->axq_depth);
811 
812 	/*
813 	 * If there's a link pointer, update it.
814 	 *
815 	 * XXX we should replace this with the above logic, just
816 	 * to kill axq_link with fire.
817 	 */
818 	if (txq->axq_link != NULL) {
819 		*txq->axq_link = bf->bf_daddr;
820 		DPRINTF(sc, ATH_DEBUG_XMIT,
821 		    "%s: link[%u](%p)=%p (%p) depth %d\n", __func__,
822 		    txq->axq_qnum, txq->axq_link,
823 		    (caddr_t)bf->bf_daddr, bf->bf_desc,
824 		    txq->axq_depth);
825 		ATH_KTR(sc, ATH_KTR_TX, 5,
826 		    "ath_tx_handoff: non-tdma: link[%u](%p)=%p (%p) "
827 		    "lastds=%d",
828 		    txq->axq_qnum, txq->axq_link,
829 		    (caddr_t)bf->bf_daddr, bf->bf_desc,
830 		    bf->bf_lastds);
831 	}
832 
833 	/*
834 	 * If we've not pushed anything into the hardware yet,
835 	 * push the head of the queue into the TxDP.
836 	 *
837 	 * Once we've started DMA, there's no guarantee that
838 	 * updating the TxDP with a new value will actually work.
839 	 * So we just don't do that - if we hit the end of the list,
840 	 * we keep that buffer around (the "holding buffer") and
841 	 * re-start DMA by updating the link pointer of _that_
842 	 * descriptor and then restart DMA.
843 	 */
844 	if (! (txq->axq_flags & ATH_TXQ_PUTRUNNING)) {
845 		bf_first = TAILQ_FIRST(&txq->axq_q);
846 		txq->axq_flags |= ATH_TXQ_PUTRUNNING;
847 		ath_hal_puttxbuf(ah, txq->axq_qnum, bf_first->bf_daddr);
848 		DPRINTF(sc, ATH_DEBUG_XMIT,
849 		    "%s: TXDP[%u] = %p (%p) depth %d\n",
850 		    __func__, txq->axq_qnum,
851 		    (caddr_t)bf_first->bf_daddr, bf_first->bf_desc,
852 		    txq->axq_depth);
853 		ATH_KTR(sc, ATH_KTR_TX, 5,
854 		    "ath_tx_handoff: TXDP[%u] = %p (%p) "
855 		    "lastds=%p depth %d",
856 		    txq->axq_qnum,
857 		    (caddr_t)bf_first->bf_daddr, bf_first->bf_desc,
858 		    bf_first->bf_lastds,
859 		    txq->axq_depth);
860 	}
861 
862 	/*
863 	 * Ensure that the bf TXQ matches this TXQ, so later
864 	 * checking and holding buffer manipulation is sane.
865 	 */
866 	if (bf->bf_state.bfs_tx_queue != txq->axq_qnum) {
867 		DPRINTF(sc, ATH_DEBUG_XMIT,
868 		    "%s: bf=%p, bfs_tx_queue=%d, axq_qnum=%d\n",
869 		    __func__, bf, bf->bf_state.bfs_tx_queue,
870 		    txq->axq_qnum);
871 	}
872 
873 	/*
874 	 * Track aggregate queue depth.
875 	 */
876 	if (bf->bf_state.bfs_aggr)
877 		txq->axq_aggr_depth++;
878 
879 	/*
880 	 * Update the link pointer.
881 	 */
882 	ath_hal_gettxdesclinkptr(ah, bf->bf_lastds, &txq->axq_link);
883 
884 	/*
885 	 * Start DMA.
886 	 *
887 	 * If we wrote a TxDP above, DMA will start from here.
888 	 *
889 	 * If DMA is running, it'll do nothing.
890 	 *
891 	 * If the DMA engine hit the end of the QCU list (ie LINK=NULL,
892 	 * or VEOL) then it stops at the last transmitted write.
893 	 * We then append a new frame by updating the link pointer
894 	 * in that descriptor and then kick TxE here; it will re-read
895 	 * that last descriptor and find the new descriptor to transmit.
896 	 *
897 	 * This is why we keep the holding descriptor around.
898 	 */
899 	ath_hal_txstart(ah, txq->axq_qnum);
900 	ATH_TXQ_UNLOCK(txq);
901 	ATH_KTR(sc, ATH_KTR_TX, 1,
902 	    "ath_tx_handoff: txq=%u, txstart", txq->axq_qnum);
903 }
904 
905 /*
906  * Restart TX DMA for the given TXQ.
907  *
908  * This must be called whether the queue is empty or not.
909  */
910 static void
911 ath_legacy_tx_dma_restart(struct ath_softc *sc, struct ath_txq *txq)
912 {
913 	struct ath_buf *bf, *bf_last;
914 
915 	ATH_TXQ_LOCK_ASSERT(txq);
916 
917 	/* XXX make this ATH_TXQ_FIRST */
918 	bf = TAILQ_FIRST(&txq->axq_q);
919 	bf_last = ATH_TXQ_LAST(txq, axq_q_s);
920 
921 	if (bf == NULL)
922 		return;
923 
924 	DPRINTF(sc, ATH_DEBUG_RESET,
925 	    "%s: Q%d: bf=%p, bf_last=%p, daddr=0x%08x\n",
926 	    __func__,
927 	    txq->axq_qnum,
928 	    bf,
929 	    bf_last,
930 	    (uint32_t) bf->bf_daddr);
931 
932 #ifdef	ATH_DEBUG
933 	if (sc->sc_debug & ATH_DEBUG_RESET)
934 		ath_tx_dump(sc, txq);
935 #endif
936 
937 	/*
938 	 * This is called from a restart, so DMA is known to be
939 	 * completely stopped.
940 	 */
941 	KASSERT((!(txq->axq_flags & ATH_TXQ_PUTRUNNING)),
942 	    ("%s: Q%d: called with PUTRUNNING=1\n",
943 	    __func__,
944 	    txq->axq_qnum));
945 
946 	ath_hal_puttxbuf(sc->sc_ah, txq->axq_qnum, bf->bf_daddr);
947 	txq->axq_flags |= ATH_TXQ_PUTRUNNING;
948 
949 	ath_hal_gettxdesclinkptr(sc->sc_ah, bf_last->bf_lastds,
950 	    &txq->axq_link);
951 	ath_hal_txstart(sc->sc_ah, txq->axq_qnum);
952 }
953 
954 /*
955  * Hand off a packet to the hardware (or mcast queue.)
956  *
957  * The relevant hardware txq should be locked.
958  */
959 static void
960 ath_legacy_xmit_handoff(struct ath_softc *sc, struct ath_txq *txq,
961     struct ath_buf *bf)
962 {
963 	ATH_TX_LOCK_ASSERT(sc);
964 
965 #ifdef	ATH_DEBUG_ALQ
966 	if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_EDMA_TXDESC))
967 		ath_tx_alq_post(sc, bf);
968 #endif
969 
970 	if (txq->axq_qnum == ATH_TXQ_SWQ)
971 		ath_tx_handoff_mcast(sc, txq, bf);
972 	else
973 		ath_tx_handoff_hw(sc, txq, bf);
974 }
975 
976 static int
977 ath_tx_tag_crypto(struct ath_softc *sc, struct ieee80211_node *ni,
978     struct mbuf *m0, int iswep, int isfrag, int *hdrlen, int *pktlen,
979     int *keyix)
980 {
981 	DPRINTF(sc, ATH_DEBUG_XMIT,
982 	    "%s: hdrlen=%d, pktlen=%d, isfrag=%d, iswep=%d, m0=%p\n",
983 	    __func__,
984 	    *hdrlen,
985 	    *pktlen,
986 	    isfrag,
987 	    iswep,
988 	    m0);
989 
990 	if (iswep) {
991 		const struct ieee80211_cipher *cip;
992 		struct ieee80211_key *k;
993 
994 		/*
995 		 * Construct the 802.11 header+trailer for an encrypted
996 		 * frame. The only reason this can fail is because of an
997 		 * unknown or unsupported cipher/key type.
998 		 */
999 		k = ieee80211_crypto_encap(ni, m0);
1000 		if (k == NULL) {
1001 			/*
1002 			 * This can happen when the key is yanked after the
1003 			 * frame was queued.  Just discard the frame; the
1004 			 * 802.11 layer counts failures and provides
1005 			 * debugging/diagnostics.
1006 			 */
1007 			return (0);
1008 		}
1009 		/*
1010 		 * Adjust the packet + header lengths for the crypto
1011 		 * additions and calculate the h/w key index.  When
1012 		 * a s/w mic is done the frame will have had any mic
1013 		 * added to it prior to entry so m0->m_pkthdr.len will
1014 		 * account for it. Otherwise we need to add it to the
1015 		 * packet length.
1016 		 */
1017 		cip = k->wk_cipher;
1018 		(*hdrlen) += cip->ic_header;
1019 		(*pktlen) += cip->ic_header + cip->ic_trailer;
1020 		/* NB: frags always have any TKIP MIC done in s/w */
1021 		if ((k->wk_flags & IEEE80211_KEY_SWMIC) == 0 && !isfrag)
1022 			(*pktlen) += cip->ic_miclen;
1023 		(*keyix) = k->wk_keyix;
1024 	} else if (ni->ni_ucastkey.wk_cipher == &ieee80211_cipher_none) {
1025 		/*
1026 		 * Use station key cache slot, if assigned.
1027 		 */
1028 		(*keyix) = ni->ni_ucastkey.wk_keyix;
1029 		if ((*keyix) == IEEE80211_KEYIX_NONE)
1030 			(*keyix) = HAL_TXKEYIX_INVALID;
1031 	} else
1032 		(*keyix) = HAL_TXKEYIX_INVALID;
1033 
1034 	return (1);
1035 }
1036 
1037 /*
1038  * Calculate whether interoperability protection is required for
1039  * this frame.
1040  *
1041  * This requires the rate control information be filled in,
1042  * as the protection requirement depends upon the current
1043  * operating mode / PHY.
1044  */
1045 static void
1046 ath_tx_calc_protection(struct ath_softc *sc, struct ath_buf *bf)
1047 {
1048 	struct ieee80211_frame *wh;
1049 	uint8_t rix;
1050 	uint16_t flags;
1051 	int shortPreamble;
1052 	const HAL_RATE_TABLE *rt = sc->sc_currates;
1053 	struct ieee80211com *ic = &sc->sc_ic;
1054 
1055 	flags = bf->bf_state.bfs_txflags;
1056 	rix = bf->bf_state.bfs_rc[0].rix;
1057 	shortPreamble = bf->bf_state.bfs_shpream;
1058 	wh = mtod(bf->bf_m, struct ieee80211_frame *);
1059 
1060 	/* Disable frame protection for TOA probe frames */
1061 	if (bf->bf_flags & ATH_BUF_TOA_PROBE) {
1062 		/* XXX count */
1063 		flags &= ~(HAL_TXDESC_CTSENA | HAL_TXDESC_RTSENA);
1064 		bf->bf_state.bfs_doprot = 0;
1065 		goto finish;
1066 	}
1067 
1068 	/*
1069 	 * If 802.11g protection is enabled, determine whether
1070 	 * to use RTS/CTS or just CTS.  Note that this is only
1071 	 * done for OFDM unicast frames.
1072 	 */
1073 	if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
1074 	    rt->info[rix].phy == IEEE80211_T_OFDM &&
1075 	    (flags & HAL_TXDESC_NOACK) == 0) {
1076 		bf->bf_state.bfs_doprot = 1;
1077 		/* XXX fragments must use CCK rates w/ protection */
1078 		if (ic->ic_protmode == IEEE80211_PROT_RTSCTS) {
1079 			flags |= HAL_TXDESC_RTSENA;
1080 		} else if (ic->ic_protmode == IEEE80211_PROT_CTSONLY) {
1081 			flags |= HAL_TXDESC_CTSENA;
1082 		}
1083 		/*
1084 		 * For frags it would be desirable to use the
1085 		 * highest CCK rate for RTS/CTS.  But stations
1086 		 * farther away may detect it at a lower CCK rate
1087 		 * so use the configured protection rate instead
1088 		 * (for now).
1089 		 */
1090 		sc->sc_stats.ast_tx_protect++;
1091 	}
1092 
1093 	/*
1094 	 * If 11n protection is enabled and it's a HT frame,
1095 	 * enable RTS.
1096 	 *
1097 	 * XXX ic_htprotmode or ic_curhtprotmode?
1098 	 * XXX should it_htprotmode only matter if ic_curhtprotmode
1099 	 * XXX indicates it's not a HT pure environment?
1100 	 */
1101 	if ((ic->ic_htprotmode == IEEE80211_PROT_RTSCTS) &&
1102 	    rt->info[rix].phy == IEEE80211_T_HT &&
1103 	    (flags & HAL_TXDESC_NOACK) == 0) {
1104 		flags |= HAL_TXDESC_RTSENA;
1105 		sc->sc_stats.ast_tx_htprotect++;
1106 	}
1107 
1108 finish:
1109 	bf->bf_state.bfs_txflags = flags;
1110 }
1111 
1112 /*
1113  * Update the frame duration given the currently selected rate.
1114  *
1115  * This also updates the frame duration value, so it will require
1116  * a DMA flush.
1117  */
1118 static void
1119 ath_tx_calc_duration(struct ath_softc *sc, struct ath_buf *bf)
1120 {
1121 	struct ieee80211_frame *wh;
1122 	uint8_t rix;
1123 	uint16_t flags;
1124 	int shortPreamble;
1125 	struct ath_hal *ah = sc->sc_ah;
1126 	const HAL_RATE_TABLE *rt = sc->sc_currates;
1127 	int isfrag = bf->bf_m->m_flags & M_FRAG;
1128 
1129 	flags = bf->bf_state.bfs_txflags;
1130 	rix = bf->bf_state.bfs_rc[0].rix;
1131 	shortPreamble = bf->bf_state.bfs_shpream;
1132 	wh = mtod(bf->bf_m, struct ieee80211_frame *);
1133 
1134 	/*
1135 	 * Calculate duration.  This logically belongs in the 802.11
1136 	 * layer but it lacks sufficient information to calculate it.
1137 	 */
1138 	if ((flags & HAL_TXDESC_NOACK) == 0 &&
1139 	    (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_CTL) {
1140 		u_int16_t dur;
1141 		if (shortPreamble)
1142 			dur = rt->info[rix].spAckDuration;
1143 		else
1144 			dur = rt->info[rix].lpAckDuration;
1145 		if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) {
1146 			dur += dur;		/* additional SIFS+ACK */
1147 			/*
1148 			 * Include the size of next fragment so NAV is
1149 			 * updated properly.  The last fragment uses only
1150 			 * the ACK duration
1151 			 *
1152 			 * XXX TODO: ensure that the rate lookup for each
1153 			 * fragment is the same as the rate used by the
1154 			 * first fragment!
1155 			 */
1156 			dur += ath_hal_computetxtime(ah,
1157 			    rt,
1158 			    bf->bf_nextfraglen,
1159 			    rix, shortPreamble,
1160 			    AH_TRUE);
1161 		}
1162 		if (isfrag) {
1163 			/*
1164 			 * Force hardware to use computed duration for next
1165 			 * fragment by disabling multi-rate retry which updates
1166 			 * duration based on the multi-rate duration table.
1167 			 */
1168 			bf->bf_state.bfs_ismrr = 0;
1169 			bf->bf_state.bfs_try0 = ATH_TXMGTTRY;
1170 			/* XXX update bfs_rc[0].try? */
1171 		}
1172 
1173 		/* Update the duration field itself */
1174 		*(u_int16_t *)wh->i_dur = htole16(dur);
1175 	}
1176 }
1177 
1178 static uint8_t
1179 ath_tx_get_rtscts_rate(struct ath_hal *ah, const HAL_RATE_TABLE *rt,
1180     int cix, int shortPreamble)
1181 {
1182 	uint8_t ctsrate;
1183 
1184 	/*
1185 	 * CTS transmit rate is derived from the transmit rate
1186 	 * by looking in the h/w rate table.  We must also factor
1187 	 * in whether or not a short preamble is to be used.
1188 	 */
1189 	/* NB: cix is set above where RTS/CTS is enabled */
1190 	KASSERT(cix != 0xff, ("cix not setup"));
1191 	ctsrate = rt->info[cix].rateCode;
1192 
1193 	/* XXX this should only matter for legacy rates */
1194 	if (shortPreamble)
1195 		ctsrate |= rt->info[cix].shortPreamble;
1196 
1197 	return (ctsrate);
1198 }
1199 
1200 /*
1201  * Calculate the RTS/CTS duration for legacy frames.
1202  */
1203 static int
1204 ath_tx_calc_ctsduration(struct ath_hal *ah, int rix, int cix,
1205     int shortPreamble, int pktlen, const HAL_RATE_TABLE *rt,
1206     int flags)
1207 {
1208 	int ctsduration = 0;
1209 
1210 	/* This mustn't be called for HT modes */
1211 	if (rt->info[cix].phy == IEEE80211_T_HT) {
1212 		printf("%s: HT rate where it shouldn't be (0x%x)\n",
1213 		    __func__, rt->info[cix].rateCode);
1214 		return (-1);
1215 	}
1216 
1217 	/*
1218 	 * Compute the transmit duration based on the frame
1219 	 * size and the size of an ACK frame.  We call into the
1220 	 * HAL to do the computation since it depends on the
1221 	 * characteristics of the actual PHY being used.
1222 	 *
1223 	 * NB: CTS is assumed the same size as an ACK so we can
1224 	 *     use the precalculated ACK durations.
1225 	 */
1226 	if (shortPreamble) {
1227 		if (flags & HAL_TXDESC_RTSENA)		/* SIFS + CTS */
1228 			ctsduration += rt->info[cix].spAckDuration;
1229 		ctsduration += ath_hal_computetxtime(ah,
1230 			rt, pktlen, rix, AH_TRUE, AH_TRUE);
1231 		if ((flags & HAL_TXDESC_NOACK) == 0)	/* SIFS + ACK */
1232 			ctsduration += rt->info[rix].spAckDuration;
1233 	} else {
1234 		if (flags & HAL_TXDESC_RTSENA)		/* SIFS + CTS */
1235 			ctsduration += rt->info[cix].lpAckDuration;
1236 		ctsduration += ath_hal_computetxtime(ah,
1237 			rt, pktlen, rix, AH_FALSE, AH_TRUE);
1238 		if ((flags & HAL_TXDESC_NOACK) == 0)	/* SIFS + ACK */
1239 			ctsduration += rt->info[rix].lpAckDuration;
1240 	}
1241 
1242 	return (ctsduration);
1243 }
1244 
1245 /*
1246  * Update the given ath_buf with updated rts/cts setup and duration
1247  * values.
1248  *
1249  * To support rate lookups for each software retry, the rts/cts rate
1250  * and cts duration must be re-calculated.
1251  *
1252  * This function assumes the RTS/CTS flags have been set as needed;
1253  * mrr has been disabled; and the rate control lookup has been done.
1254  *
1255  * XXX TODO: MRR need only be disabled for the pre-11n NICs.
1256  * XXX The 11n NICs support per-rate RTS/CTS configuration.
1257  */
1258 static void
1259 ath_tx_set_rtscts(struct ath_softc *sc, struct ath_buf *bf)
1260 {
1261 	uint16_t ctsduration = 0;
1262 	uint8_t ctsrate = 0;
1263 	uint8_t rix = bf->bf_state.bfs_rc[0].rix;
1264 	uint8_t cix = 0;
1265 	const HAL_RATE_TABLE *rt = sc->sc_currates;
1266 
1267 	/*
1268 	 * No RTS/CTS enabled? Don't bother.
1269 	 */
1270 	if ((bf->bf_state.bfs_txflags &
1271 	    (HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA)) == 0) {
1272 		/* XXX is this really needed? */
1273 		bf->bf_state.bfs_ctsrate = 0;
1274 		bf->bf_state.bfs_ctsduration = 0;
1275 		return;
1276 	}
1277 
1278 	/*
1279 	 * If protection is enabled, use the protection rix control
1280 	 * rate. Otherwise use the rate0 control rate.
1281 	 */
1282 	if (bf->bf_state.bfs_doprot)
1283 		rix = sc->sc_protrix;
1284 	else
1285 		rix = bf->bf_state.bfs_rc[0].rix;
1286 
1287 	/*
1288 	 * If the raw path has hard-coded ctsrate0 to something,
1289 	 * use it.
1290 	 */
1291 	if (bf->bf_state.bfs_ctsrate0 != 0)
1292 		cix = ath_tx_findrix(sc, bf->bf_state.bfs_ctsrate0);
1293 	else
1294 		/* Control rate from above */
1295 		cix = rt->info[rix].controlRate;
1296 
1297 	/* Calculate the rtscts rate for the given cix */
1298 	ctsrate = ath_tx_get_rtscts_rate(sc->sc_ah, rt, cix,
1299 	    bf->bf_state.bfs_shpream);
1300 
1301 	/* The 11n chipsets do ctsduration calculations for you */
1302 	if (! ath_tx_is_11n(sc))
1303 		ctsduration = ath_tx_calc_ctsduration(sc->sc_ah, rix, cix,
1304 		    bf->bf_state.bfs_shpream, bf->bf_state.bfs_pktlen,
1305 		    rt, bf->bf_state.bfs_txflags);
1306 
1307 	/* Squirrel away in ath_buf */
1308 	bf->bf_state.bfs_ctsrate = ctsrate;
1309 	bf->bf_state.bfs_ctsduration = ctsduration;
1310 
1311 	/*
1312 	 * Must disable multi-rate retry when using RTS/CTS.
1313 	 */
1314 	if (!sc->sc_mrrprot) {
1315 		bf->bf_state.bfs_ismrr = 0;
1316 		bf->bf_state.bfs_try0 =
1317 		    bf->bf_state.bfs_rc[0].tries = ATH_TXMGTTRY; /* XXX ew */
1318 	}
1319 }
1320 
1321 /*
1322  * Setup the descriptor chain for a normal or fast-frame
1323  * frame.
1324  *
1325  * XXX TODO: extend to include the destination hardware QCU ID.
1326  * Make sure that is correct.  Make sure that when being added
1327  * to the mcastq, the CABQ QCUID is set or things will get a bit
1328  * odd.
1329  */
1330 static void
1331 ath_tx_setds(struct ath_softc *sc, struct ath_buf *bf)
1332 {
1333 	struct ath_desc *ds = bf->bf_desc;
1334 	struct ath_hal *ah = sc->sc_ah;
1335 
1336 	if (bf->bf_state.bfs_txrate0 == 0)
1337 		DPRINTF(sc, ATH_DEBUG_XMIT,
1338 		    "%s: bf=%p, txrate0=%d\n", __func__, bf, 0);
1339 
1340 	ath_hal_setuptxdesc(ah, ds
1341 		, bf->bf_state.bfs_pktlen	/* packet length */
1342 		, bf->bf_state.bfs_hdrlen	/* header length */
1343 		, bf->bf_state.bfs_atype	/* Atheros packet type */
1344 		, bf->bf_state.bfs_txpower	/* txpower */
1345 		, bf->bf_state.bfs_txrate0
1346 		, bf->bf_state.bfs_try0		/* series 0 rate/tries */
1347 		, bf->bf_state.bfs_keyix	/* key cache index */
1348 		, bf->bf_state.bfs_txantenna	/* antenna mode */
1349 		, bf->bf_state.bfs_txflags	/* flags */
1350 		, bf->bf_state.bfs_ctsrate	/* rts/cts rate */
1351 		, bf->bf_state.bfs_ctsduration	/* rts/cts duration */
1352 	);
1353 
1354 	/*
1355 	 * This will be overriden when the descriptor chain is written.
1356 	 */
1357 	bf->bf_lastds = ds;
1358 	bf->bf_last = bf;
1359 
1360 	/* Set rate control and descriptor chain for this frame */
1361 	ath_tx_set_ratectrl(sc, bf->bf_node, bf);
1362 	ath_tx_chaindesclist(sc, ds, bf, 0, 0, 0);
1363 }
1364 
1365 /*
1366  * Do a rate lookup.
1367  *
1368  * This performs a rate lookup for the given ath_buf only if it's required.
1369  * Non-data frames and raw frames don't require it.
1370  *
1371  * This populates the primary and MRR entries; MRR values are
1372  * then disabled later on if something requires it (eg RTS/CTS on
1373  * pre-11n chipsets.
1374  *
1375  * This needs to be done before the RTS/CTS fields are calculated
1376  * as they may depend upon the rate chosen.
1377  */
1378 static void
1379 ath_tx_do_ratelookup(struct ath_softc *sc, struct ath_buf *bf)
1380 {
1381 	uint8_t rate, rix;
1382 	int try0;
1383 
1384 	if (! bf->bf_state.bfs_doratelookup)
1385 		return;
1386 
1387 	/* Get rid of any previous state */
1388 	bzero(bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc));
1389 
1390 	ATH_NODE_LOCK(ATH_NODE(bf->bf_node));
1391 	ath_rate_findrate(sc, ATH_NODE(bf->bf_node), bf->bf_state.bfs_shpream,
1392 	    bf->bf_state.bfs_pktlen, &rix, &try0, &rate);
1393 
1394 	/* In case MRR is disabled, make sure rc[0] is setup correctly */
1395 	bf->bf_state.bfs_rc[0].rix = rix;
1396 	bf->bf_state.bfs_rc[0].ratecode = rate;
1397 	bf->bf_state.bfs_rc[0].tries = try0;
1398 
1399 	if (bf->bf_state.bfs_ismrr && try0 != ATH_TXMAXTRY)
1400 		ath_rate_getxtxrates(sc, ATH_NODE(bf->bf_node), rix,
1401 		    bf->bf_state.bfs_rc);
1402 	ATH_NODE_UNLOCK(ATH_NODE(bf->bf_node));
1403 
1404 	sc->sc_txrix = rix;	/* for LED blinking */
1405 	sc->sc_lastdatarix = rix;	/* for fast frames */
1406 	bf->bf_state.bfs_try0 = try0;
1407 	bf->bf_state.bfs_txrate0 = rate;
1408 }
1409 
1410 /*
1411  * Update the CLRDMASK bit in the ath_buf if it needs to be set.
1412  */
1413 static void
1414 ath_tx_update_clrdmask(struct ath_softc *sc, struct ath_tid *tid,
1415     struct ath_buf *bf)
1416 {
1417 	struct ath_node *an = ATH_NODE(bf->bf_node);
1418 
1419 	ATH_TX_LOCK_ASSERT(sc);
1420 
1421 	if (an->clrdmask == 1) {
1422 		bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
1423 		an->clrdmask = 0;
1424 	}
1425 }
1426 
1427 /*
1428  * Return whether this frame should be software queued or
1429  * direct dispatched.
1430  *
1431  * When doing powersave, BAR frames should be queued but other management
1432  * frames should be directly sent.
1433  *
1434  * When not doing powersave, stick BAR frames into the hardware queue
1435  * so it goes out even though the queue is paused.
1436  *
1437  * For now, management frames are also software queued by default.
1438  */
1439 static int
1440 ath_tx_should_swq_frame(struct ath_softc *sc, struct ath_node *an,
1441     struct mbuf *m0, int *queue_to_head)
1442 {
1443 	struct ieee80211_node *ni = &an->an_node;
1444 	struct ieee80211_frame *wh;
1445 	uint8_t type, subtype;
1446 
1447 	wh = mtod(m0, struct ieee80211_frame *);
1448 	type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
1449 	subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
1450 
1451 	(*queue_to_head) = 0;
1452 
1453 	/* If it's not in powersave - direct-dispatch BAR */
1454 	if ((ATH_NODE(ni)->an_is_powersave == 0)
1455 	    && type == IEEE80211_FC0_TYPE_CTL &&
1456 	    subtype == IEEE80211_FC0_SUBTYPE_BAR) {
1457 		DPRINTF(sc, ATH_DEBUG_SW_TX,
1458 		    "%s: BAR: TX'ing direct\n", __func__);
1459 		return (0);
1460 	} else if ((ATH_NODE(ni)->an_is_powersave == 1)
1461 	    && type == IEEE80211_FC0_TYPE_CTL &&
1462 	    subtype == IEEE80211_FC0_SUBTYPE_BAR) {
1463 		/* BAR TX whilst asleep; queue */
1464 		DPRINTF(sc, ATH_DEBUG_SW_TX,
1465 		    "%s: swq: TX'ing\n", __func__);
1466 		(*queue_to_head) = 1;
1467 		return (1);
1468 	} else if ((ATH_NODE(ni)->an_is_powersave == 1)
1469 	    && (type == IEEE80211_FC0_TYPE_MGT ||
1470 	        type == IEEE80211_FC0_TYPE_CTL)) {
1471 		/*
1472 		 * Other control/mgmt frame; bypass software queuing
1473 		 * for now!
1474 		 */
1475 		DPRINTF(sc, ATH_DEBUG_XMIT,
1476 		    "%s: %6D: Node is asleep; sending mgmt "
1477 		    "(type=%d, subtype=%d)\n",
1478 		    __func__, ni->ni_macaddr, ":", type, subtype);
1479 		return (0);
1480 	} else {
1481 		return (1);
1482 	}
1483 }
1484 
1485 
1486 /*
1487  * Transmit the given frame to the hardware.
1488  *
1489  * The frame must already be setup; rate control must already have
1490  * been done.
1491  *
1492  * XXX since the TXQ lock is being held here (and I dislike holding
1493  * it for this long when not doing software aggregation), later on
1494  * break this function into "setup_normal" and "xmit_normal". The
1495  * lock only needs to be held for the ath_tx_handoff call.
1496  *
1497  * XXX we don't update the leak count here - if we're doing
1498  * direct frame dispatch, we need to be able to do it without
1499  * decrementing the leak count (eg multicast queue frames.)
1500  */
1501 static void
1502 ath_tx_xmit_normal(struct ath_softc *sc, struct ath_txq *txq,
1503     struct ath_buf *bf)
1504 {
1505 	struct ath_node *an = ATH_NODE(bf->bf_node);
1506 	struct ath_tid *tid = &an->an_tid[bf->bf_state.bfs_tid];
1507 
1508 	ATH_TX_LOCK_ASSERT(sc);
1509 
1510 	/*
1511 	 * For now, just enable CLRDMASK. ath_tx_xmit_normal() does
1512 	 * set a completion handler however it doesn't (yet) properly
1513 	 * handle the strict ordering requirements needed for normal,
1514 	 * non-aggregate session frames.
1515 	 *
1516 	 * Once this is implemented, only set CLRDMASK like this for
1517 	 * frames that must go out - eg management/raw frames.
1518 	 */
1519 	bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
1520 
1521 	/* Setup the descriptor before handoff */
1522 	ath_tx_do_ratelookup(sc, bf);
1523 	ath_tx_calc_duration(sc, bf);
1524 	ath_tx_calc_protection(sc, bf);
1525 	ath_tx_set_rtscts(sc, bf);
1526 	ath_tx_rate_fill_rcflags(sc, bf);
1527 	ath_tx_setds(sc, bf);
1528 
1529 	/* Track per-TID hardware queue depth correctly */
1530 	tid->hwq_depth++;
1531 
1532 	/* Assign the completion handler */
1533 	bf->bf_comp = ath_tx_normal_comp;
1534 
1535 	/* Hand off to hardware */
1536 	ath_tx_handoff(sc, txq, bf);
1537 }
1538 
1539 /*
1540  * Do the basic frame setup stuff that's required before the frame
1541  * is added to a software queue.
1542  *
1543  * All frames get mostly the same treatment and it's done once.
1544  * Retransmits fiddle with things like the rate control setup,
1545  * setting the retransmit bit in the packet; doing relevant DMA/bus
1546  * syncing and relinking it (back) into the hardware TX queue.
1547  *
1548  * Note that this may cause the mbuf to be reallocated, so
1549  * m0 may not be valid.
1550  */
1551 static int
1552 ath_tx_normal_setup(struct ath_softc *sc, struct ieee80211_node *ni,
1553     struct ath_buf *bf, struct mbuf *m0, struct ath_txq *txq)
1554 {
1555 	struct ieee80211vap *vap = ni->ni_vap;
1556 	struct ieee80211com *ic = &sc->sc_ic;
1557 	int error, iswep, ismcast, isfrag, ismrr;
1558 	int keyix, hdrlen, pktlen, try0 = 0;
1559 	u_int8_t rix = 0, txrate = 0;
1560 	struct ath_desc *ds;
1561 	struct ieee80211_frame *wh;
1562 	u_int subtype, flags;
1563 	HAL_PKT_TYPE atype;
1564 	const HAL_RATE_TABLE *rt;
1565 	HAL_BOOL shortPreamble;
1566 	struct ath_node *an;
1567 
1568 	/* XXX TODO: this pri is only used for non-QoS check, right? */
1569 	u_int pri;
1570 
1571 	/*
1572 	 * To ensure that both sequence numbers and the CCMP PN handling
1573 	 * is "correct", make sure that the relevant TID queue is locked.
1574 	 * Otherwise the CCMP PN and seqno may appear out of order, causing
1575 	 * re-ordered frames to have out of order CCMP PN's, resulting
1576 	 * in many, many frame drops.
1577 	 */
1578 	ATH_TX_LOCK_ASSERT(sc);
1579 
1580 	wh = mtod(m0, struct ieee80211_frame *);
1581 	iswep = wh->i_fc[1] & IEEE80211_FC1_PROTECTED;
1582 	ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
1583 	isfrag = m0->m_flags & M_FRAG;
1584 	hdrlen = ieee80211_anyhdrsize(wh);
1585 	/*
1586 	 * Packet length must not include any
1587 	 * pad bytes; deduct them here.
1588 	 */
1589 	pktlen = m0->m_pkthdr.len - (hdrlen & 3);
1590 
1591 	/* Handle encryption twiddling if needed */
1592 	if (! ath_tx_tag_crypto(sc, ni, m0, iswep, isfrag, &hdrlen,
1593 	    &pktlen, &keyix)) {
1594 		ieee80211_free_mbuf(m0);
1595 		return EIO;
1596 	}
1597 
1598 	/* packet header may have moved, reset our local pointer */
1599 	wh = mtod(m0, struct ieee80211_frame *);
1600 
1601 	pktlen += IEEE80211_CRC_LEN;
1602 
1603 	/*
1604 	 * Load the DMA map so any coalescing is done.  This
1605 	 * also calculates the number of descriptors we need.
1606 	 */
1607 	error = ath_tx_dmasetup(sc, bf, m0);
1608 	if (error != 0)
1609 		return error;
1610 	KASSERT((ni != NULL), ("%s: ni=NULL!", __func__));
1611 	bf->bf_node = ni;			/* NB: held reference */
1612 	m0 = bf->bf_m;				/* NB: may have changed */
1613 	wh = mtod(m0, struct ieee80211_frame *);
1614 
1615 	/* setup descriptors */
1616 	ds = bf->bf_desc;
1617 	rt = sc->sc_currates;
1618 	KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
1619 
1620 	/*
1621 	 * NB: the 802.11 layer marks whether or not we should
1622 	 * use short preamble based on the current mode and
1623 	 * negotiated parameters.
1624 	 */
1625 	if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) &&
1626 	    (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE)) {
1627 		shortPreamble = AH_TRUE;
1628 		sc->sc_stats.ast_tx_shortpre++;
1629 	} else {
1630 		shortPreamble = AH_FALSE;
1631 	}
1632 
1633 	an = ATH_NODE(ni);
1634 	//flags = HAL_TXDESC_CLRDMASK;		/* XXX needed for crypto errs */
1635 	flags = 0;
1636 	ismrr = 0;				/* default no multi-rate retry*/
1637 
1638 	pri = ath_tx_getac(sc, m0);			/* honor classification */
1639 	/* XXX use txparams instead of fixed values */
1640 	/*
1641 	 * Calculate Atheros packet type from IEEE80211 packet header,
1642 	 * setup for rate calculations, and select h/w transmit queue.
1643 	 */
1644 	switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) {
1645 	case IEEE80211_FC0_TYPE_MGT:
1646 		subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
1647 		if (subtype == IEEE80211_FC0_SUBTYPE_BEACON)
1648 			atype = HAL_PKT_TYPE_BEACON;
1649 		else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
1650 			atype = HAL_PKT_TYPE_PROBE_RESP;
1651 		else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM)
1652 			atype = HAL_PKT_TYPE_ATIM;
1653 		else
1654 			atype = HAL_PKT_TYPE_NORMAL;	/* XXX */
1655 		rix = an->an_mgmtrix;
1656 		txrate = rt->info[rix].rateCode;
1657 		if (shortPreamble)
1658 			txrate |= rt->info[rix].shortPreamble;
1659 		try0 = ATH_TXMGTTRY;
1660 		flags |= HAL_TXDESC_INTREQ;	/* force interrupt */
1661 		break;
1662 	case IEEE80211_FC0_TYPE_CTL:
1663 		atype = HAL_PKT_TYPE_PSPOLL;	/* stop setting of duration */
1664 		rix = an->an_mgmtrix;
1665 		txrate = rt->info[rix].rateCode;
1666 		if (shortPreamble)
1667 			txrate |= rt->info[rix].shortPreamble;
1668 		try0 = ATH_TXMGTTRY;
1669 		flags |= HAL_TXDESC_INTREQ;	/* force interrupt */
1670 		break;
1671 	case IEEE80211_FC0_TYPE_DATA:
1672 		atype = HAL_PKT_TYPE_NORMAL;		/* default */
1673 		/*
1674 		 * Data frames: multicast frames go out at a fixed rate,
1675 		 * EAPOL frames use the mgmt frame rate; otherwise consult
1676 		 * the rate control module for the rate to use.
1677 		 */
1678 		if (ismcast) {
1679 			rix = an->an_mcastrix;
1680 			txrate = rt->info[rix].rateCode;
1681 			if (shortPreamble)
1682 				txrate |= rt->info[rix].shortPreamble;
1683 			try0 = 1;
1684 		} else if (m0->m_flags & M_EAPOL) {
1685 			/* XXX? maybe always use long preamble? */
1686 			rix = an->an_mgmtrix;
1687 			txrate = rt->info[rix].rateCode;
1688 			if (shortPreamble)
1689 				txrate |= rt->info[rix].shortPreamble;
1690 			try0 = ATH_TXMAXTRY;	/* XXX?too many? */
1691 		} else {
1692 			/*
1693 			 * Do rate lookup on each TX, rather than using
1694 			 * the hard-coded TX information decided here.
1695 			 */
1696 			ismrr = 1;
1697 			bf->bf_state.bfs_doratelookup = 1;
1698 		}
1699 
1700 		/*
1701 		 * Check whether to set NOACK for this WME category or not.
1702 		 */
1703 		if (ieee80211_wme_vap_ac_is_noack(vap, pri))
1704 			flags |= HAL_TXDESC_NOACK;
1705 		break;
1706 	default:
1707 		device_printf(sc->sc_dev, "bogus frame type 0x%x (%s)\n",
1708 		    wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__);
1709 		/* XXX statistic */
1710 		/* XXX free tx dmamap */
1711 		ieee80211_free_mbuf(m0);
1712 		return EIO;
1713 	}
1714 
1715 	/*
1716 	 * There are two known scenarios where the frame AC doesn't match
1717 	 * what the destination TXQ is.
1718 	 *
1719 	 * + non-QoS frames (eg management?) that the net80211 stack has
1720 	 *   assigned a higher AC to, but since it's a non-QoS TID, it's
1721 	 *   being thrown into TID 16.  TID 16 gets the AC_BE queue.
1722 	 *   It's quite possible that management frames should just be
1723 	 *   direct dispatched to hardware rather than go via the software
1724 	 *   queue; that should be investigated in the future.  There are
1725 	 *   some specific scenarios where this doesn't make sense, mostly
1726 	 *   surrounding ADDBA request/response - hence why that is special
1727 	 *   cased.
1728 	 *
1729 	 * + Multicast frames going into the VAP mcast queue.  That shows up
1730 	 *   as "TXQ 11".
1731 	 *
1732 	 * This driver should eventually support separate TID and TXQ locking,
1733 	 * allowing for arbitrary AC frames to appear on arbitrary software
1734 	 * queues, being queued to the "correct" hardware queue when needed.
1735 	 */
1736 #if 0
1737 	if (txq != sc->sc_ac2q[pri]) {
1738 		DPRINTF(sc, ATH_DEBUG_XMIT,
1739 		    "%s: txq=%p (%d), pri=%d, pri txq=%p (%d)\n",
1740 		    __func__,
1741 		    txq,
1742 		    txq->axq_qnum,
1743 		    pri,
1744 		    sc->sc_ac2q[pri],
1745 		    sc->sc_ac2q[pri]->axq_qnum);
1746 	}
1747 #endif
1748 
1749 	/*
1750 	 * Calculate miscellaneous flags.
1751 	 */
1752 	if (ismcast) {
1753 		flags |= HAL_TXDESC_NOACK;	/* no ack on broad/multicast */
1754 	} else if (pktlen > vap->iv_rtsthreshold &&
1755 	    (ni->ni_ath_flags & IEEE80211_NODE_FF) == 0) {
1756 		flags |= HAL_TXDESC_RTSENA;	/* RTS based on frame length */
1757 		sc->sc_stats.ast_tx_rts++;
1758 	}
1759 	if (flags & HAL_TXDESC_NOACK)		/* NB: avoid double counting */
1760 		sc->sc_stats.ast_tx_noack++;
1761 #ifdef IEEE80211_SUPPORT_TDMA
1762 	if (sc->sc_tdma && (flags & HAL_TXDESC_NOACK) == 0) {
1763 		DPRINTF(sc, ATH_DEBUG_TDMA,
1764 		    "%s: discard frame, ACK required w/ TDMA\n", __func__);
1765 		sc->sc_stats.ast_tdma_ack++;
1766 		/* XXX free tx dmamap */
1767 		ieee80211_free_mbuf(m0);
1768 		return EIO;
1769 	}
1770 #endif
1771 
1772 	/*
1773 	 * If it's a frame to do location reporting on,
1774 	 * communicate it to the HAL.
1775 	 */
1776 	if (ieee80211_get_toa_params(m0, NULL)) {
1777 		device_printf(sc->sc_dev,
1778 		    "%s: setting TX positioning bit\n", __func__);
1779 		flags |= HAL_TXDESC_POS;
1780 
1781 		/*
1782 		 * Note: The hardware reports timestamps for
1783 		 * each of the RX'ed packets as part of the packet
1784 		 * exchange.  So this means things like RTS/CTS
1785 		 * exchanges, as well as the final ACK.
1786 		 *
1787 		 * So, if you send a RTS-protected NULL data frame,
1788 		 * you'll get an RX report for the RTS response, then
1789 		 * an RX report for the NULL frame, and then the TX
1790 		 * completion at the end.
1791 		 *
1792 		 * NOTE: it doesn't work right for CCK frames;
1793 		 * there's no channel info data provided unless
1794 		 * it's OFDM or HT.  Will have to dig into it.
1795 		 */
1796 		flags &= ~(HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA);
1797 		bf->bf_flags |= ATH_BUF_TOA_PROBE;
1798 	}
1799 
1800 #if 0
1801 	/*
1802 	 * Placeholder: if you want to transmit with the azimuth
1803 	 * timestamp in the end of the payload, here's where you
1804 	 * should set the TXDESC field.
1805 	 */
1806 	flags |= HAL_TXDESC_HWTS;
1807 #endif
1808 
1809 	/*
1810 	 * Determine if a tx interrupt should be generated for
1811 	 * this descriptor.  We take a tx interrupt to reap
1812 	 * descriptors when the h/w hits an EOL condition or
1813 	 * when the descriptor is specifically marked to generate
1814 	 * an interrupt.  We periodically mark descriptors in this
1815 	 * way to insure timely replenishing of the supply needed
1816 	 * for sending frames.  Defering interrupts reduces system
1817 	 * load and potentially allows more concurrent work to be
1818 	 * done but if done to aggressively can cause senders to
1819 	 * backup.
1820 	 *
1821 	 * NB: use >= to deal with sc_txintrperiod changing
1822 	 *     dynamically through sysctl.
1823 	 */
1824 	if (flags & HAL_TXDESC_INTREQ) {
1825 		txq->axq_intrcnt = 0;
1826 	} else if (++txq->axq_intrcnt >= sc->sc_txintrperiod) {
1827 		flags |= HAL_TXDESC_INTREQ;
1828 		txq->axq_intrcnt = 0;
1829 	}
1830 
1831 	/* This point forward is actual TX bits */
1832 
1833 	/*
1834 	 * At this point we are committed to sending the frame
1835 	 * and we don't need to look at m_nextpkt; clear it in
1836 	 * case this frame is part of frag chain.
1837 	 */
1838 	m0->m_nextpkt = NULL;
1839 
1840 	if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT))
1841 		ieee80211_dump_pkt(ic, mtod(m0, const uint8_t *), m0->m_len,
1842 		    sc->sc_hwmap[rix].ieeerate, -1);
1843 
1844 	if (ieee80211_radiotap_active_vap(vap)) {
1845 		sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags;
1846 		if (iswep)
1847 			sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
1848 		if (isfrag)
1849 			sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG;
1850 		sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate;
1851 		sc->sc_tx_th.wt_txpower = ieee80211_get_node_txpower(ni);
1852 		sc->sc_tx_th.wt_antenna = sc->sc_txantenna;
1853 
1854 		ieee80211_radiotap_tx(vap, m0);
1855 	}
1856 
1857 	/* Blank the legacy rate array */
1858 	bzero(&bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc));
1859 
1860 	/*
1861 	 * ath_buf_set_rate needs at least one rate/try to setup
1862 	 * the rate scenario.
1863 	 */
1864 	bf->bf_state.bfs_rc[0].rix = rix;
1865 	bf->bf_state.bfs_rc[0].tries = try0;
1866 	bf->bf_state.bfs_rc[0].ratecode = txrate;
1867 
1868 	/* Store the decided rate index values away */
1869 	bf->bf_state.bfs_pktlen = pktlen;
1870 	bf->bf_state.bfs_hdrlen = hdrlen;
1871 	bf->bf_state.bfs_atype = atype;
1872 	bf->bf_state.bfs_txpower = ieee80211_get_node_txpower(ni);
1873 	bf->bf_state.bfs_txrate0 = txrate;
1874 	bf->bf_state.bfs_try0 = try0;
1875 	bf->bf_state.bfs_keyix = keyix;
1876 	bf->bf_state.bfs_txantenna = sc->sc_txantenna;
1877 	bf->bf_state.bfs_txflags = flags;
1878 	bf->bf_state.bfs_shpream = shortPreamble;
1879 
1880 	/* XXX this should be done in ath_tx_setrate() */
1881 	bf->bf_state.bfs_ctsrate0 = 0;	/* ie, no hard-coded ctsrate */
1882 	bf->bf_state.bfs_ctsrate = 0;	/* calculated later */
1883 	bf->bf_state.bfs_ctsduration = 0;
1884 	bf->bf_state.bfs_ismrr = ismrr;
1885 
1886 	return 0;
1887 }
1888 
1889 /*
1890  * Queue a frame to the hardware or software queue.
1891  *
1892  * This can be called by the net80211 code.
1893  *
1894  * XXX what about locking? Or, push the seqno assign into the
1895  * XXX aggregate scheduler so its serialised?
1896  *
1897  * XXX When sending management frames via ath_raw_xmit(),
1898  *     should CLRDMASK be set unconditionally?
1899  */
1900 int
1901 ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni,
1902     struct ath_buf *bf, struct mbuf *m0)
1903 {
1904 	struct ieee80211vap *vap = ni->ni_vap;
1905 	struct ath_vap *avp = ATH_VAP(vap);
1906 	int r = 0;
1907 	u_int pri;
1908 	int tid;
1909 	struct ath_txq *txq;
1910 	int ismcast;
1911 	const struct ieee80211_frame *wh;
1912 	int is_ampdu, is_ampdu_tx, is_ampdu_pending;
1913 	ieee80211_seq seqno;
1914 	uint8_t type, subtype;
1915 	int queue_to_head;
1916 
1917 	ATH_TX_LOCK_ASSERT(sc);
1918 
1919 	/*
1920 	 * Determine the target hardware queue.
1921 	 *
1922 	 * For multicast frames, the txq gets overridden appropriately
1923 	 * depending upon the state of PS.  If powersave is enabled
1924 	 * then they get added to the cabq for later transmit.
1925 	 *
1926 	 * The "fun" issue here is that group addressed frames should
1927 	 * have the sequence number from a different pool, rather than
1928 	 * the per-TID pool.  That means that even QoS group addressed
1929 	 * frames will have a sequence number from that global value,
1930 	 * which means if we transmit different group addressed frames
1931 	 * at different traffic priorities, the sequence numbers will
1932 	 * all be out of whack.  So - chances are, the right thing
1933 	 * to do here is to always put group addressed frames into the BE
1934 	 * queue, and ignore the TID for queue selection.
1935 	 *
1936 	 * For any other frame, we do a TID/QoS lookup inside the frame
1937 	 * to see what the TID should be. If it's a non-QoS frame, the
1938 	 * AC and TID are overridden. The TID/TXQ code assumes the
1939 	 * TID is on a predictable hardware TXQ, so we don't support
1940 	 * having a node TID queued to multiple hardware TXQs.
1941 	 * This may change in the future but would require some locking
1942 	 * fudgery.
1943 	 */
1944 	pri = ath_tx_getac(sc, m0);
1945 	tid = ath_tx_gettid(sc, m0);
1946 
1947 	txq = sc->sc_ac2q[pri];
1948 	wh = mtod(m0, struct ieee80211_frame *);
1949 	ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
1950 	type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
1951 	subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
1952 
1953 	/*
1954 	 * Enforce how deep the multicast queue can grow.
1955 	 *
1956 	 * XXX duplicated in ath_raw_xmit().
1957 	 */
1958 	if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1959 		if (sc->sc_cabq->axq_depth + sc->sc_cabq->fifo.axq_depth
1960 		    > sc->sc_txq_mcastq_maxdepth) {
1961 			sc->sc_stats.ast_tx_mcastq_overflow++;
1962 			m_freem(m0);
1963 			return (ENOBUFS);
1964 		}
1965 	}
1966 
1967 	/*
1968 	 * Enforce how deep the unicast queue can grow.
1969 	 *
1970 	 * If the node is in power save then we don't want
1971 	 * the software queue to grow too deep, or a node may
1972 	 * end up consuming all of the ath_buf entries.
1973 	 *
1974 	 * For now, only do this for DATA frames.
1975 	 *
1976 	 * We will want to cap how many management/control
1977 	 * frames get punted to the software queue so it doesn't
1978 	 * fill up.  But the correct solution isn't yet obvious.
1979 	 * In any case, this check should at least let frames pass
1980 	 * that we are direct-dispatching.
1981 	 *
1982 	 * XXX TODO: duplicate this to the raw xmit path!
1983 	 */
1984 	if (type == IEEE80211_FC0_TYPE_DATA &&
1985 	    ATH_NODE(ni)->an_is_powersave &&
1986 	    ATH_NODE(ni)->an_swq_depth >
1987 	     sc->sc_txq_node_psq_maxdepth) {
1988 		sc->sc_stats.ast_tx_node_psq_overflow++;
1989 		m_freem(m0);
1990 		return (ENOBUFS);
1991 	}
1992 
1993 	/* A-MPDU TX */
1994 	is_ampdu_tx = ath_tx_ampdu_running(sc, ATH_NODE(ni), tid);
1995 	is_ampdu_pending = ath_tx_ampdu_pending(sc, ATH_NODE(ni), tid);
1996 	is_ampdu = is_ampdu_tx | is_ampdu_pending;
1997 
1998 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ac=%d, is_ampdu=%d\n",
1999 	    __func__, tid, pri, is_ampdu);
2000 
2001 	/* Set local packet state, used to queue packets to hardware */
2002 	bf->bf_state.bfs_tid = tid;
2003 	bf->bf_state.bfs_tx_queue = txq->axq_qnum;
2004 	bf->bf_state.bfs_pri = pri;
2005 
2006 #if 1
2007 	/*
2008 	 * When servicing one or more stations in power-save mode
2009 	 * (or) if there is some mcast data waiting on the mcast
2010 	 * queue (to prevent out of order delivery) multicast frames
2011 	 * must be bufferd until after the beacon.
2012 	 *
2013 	 * TODO: we should lock the mcastq before we check the length.
2014 	 */
2015 	if (sc->sc_cabq_enable && ismcast && (vap->iv_ps_sta || avp->av_mcastq.axq_depth)) {
2016 		txq = &avp->av_mcastq;
2017 		/*
2018 		 * Mark the frame as eventually belonging on the CAB
2019 		 * queue, so the descriptor setup functions will
2020 		 * correctly initialise the descriptor 'qcuId' field.
2021 		 */
2022 		bf->bf_state.bfs_tx_queue = sc->sc_cabq->axq_qnum;
2023 	}
2024 #endif
2025 
2026 	/* Do the generic frame setup */
2027 	/* XXX should just bzero the bf_state? */
2028 	bf->bf_state.bfs_dobaw = 0;
2029 
2030 	/* A-MPDU TX? Manually set sequence number */
2031 	/*
2032 	 * Don't do it whilst pending; the net80211 layer still
2033 	 * assigns them.
2034 	 *
2035 	 * Don't assign A-MPDU sequence numbers to group address
2036 	 * frames; they come from a different sequence number space.
2037 	 */
2038 	if (is_ampdu_tx && (! IEEE80211_IS_MULTICAST(wh->i_addr1))) {
2039 		/*
2040 		 * Always call; this function will
2041 		 * handle making sure that null data frames
2042 		 * and group-addressed frames don't get a sequence number
2043 		 * from the current TID and thus mess with the BAW.
2044 		 */
2045 		seqno = ath_tx_tid_seqno_assign(sc, ni, bf, m0);
2046 
2047 		/*
2048 		 * Don't add QoS NULL frames and group-addressed frames
2049 		 * to the BAW.
2050 		 */
2051 		if (IEEE80211_QOS_HAS_SEQ(wh) &&
2052 		    (! IEEE80211_IS_MULTICAST(wh->i_addr1)) &&
2053 		    (subtype != IEEE80211_FC0_SUBTYPE_QOS_NULL)) {
2054 			bf->bf_state.bfs_dobaw = 1;
2055 		}
2056 	}
2057 
2058 	/*
2059 	 * If needed, the sequence number has been assigned.
2060 	 * Squirrel it away somewhere easy to get to.
2061 	 */
2062 	bf->bf_state.bfs_seqno = M_SEQNO_GET(m0) << IEEE80211_SEQ_SEQ_SHIFT;
2063 
2064 	/* Is ampdu pending? fetch the seqno and print it out */
2065 	if (is_ampdu_pending)
2066 		DPRINTF(sc, ATH_DEBUG_SW_TX,
2067 		    "%s: tid %d: ampdu pending, seqno %d\n",
2068 		    __func__, tid, M_SEQNO_GET(m0));
2069 
2070 	/* This also sets up the DMA map; crypto; frame parameters, etc */
2071 	r = ath_tx_normal_setup(sc, ni, bf, m0, txq);
2072 
2073 	if (r != 0)
2074 		goto done;
2075 
2076 	/* At this point m0 could have changed! */
2077 	m0 = bf->bf_m;
2078 
2079 #if 1
2080 	/*
2081 	 * If it's a multicast frame, do a direct-dispatch to the
2082 	 * destination hardware queue. Don't bother software
2083 	 * queuing it.
2084 	 */
2085 	/*
2086 	 * If it's a BAR frame, do a direct dispatch to the
2087 	 * destination hardware queue. Don't bother software
2088 	 * queuing it, as the TID will now be paused.
2089 	 * Sending a BAR frame can occur from the net80211 txa timer
2090 	 * (ie, retries) or from the ath txtask (completion call.)
2091 	 * It queues directly to hardware because the TID is paused
2092 	 * at this point (and won't be unpaused until the BAR has
2093 	 * either been TXed successfully or max retries has been
2094 	 * reached.)
2095 	 */
2096 	/*
2097 	 * Until things are better debugged - if this node is asleep
2098 	 * and we're sending it a non-BAR frame, direct dispatch it.
2099 	 * Why? Because we need to figure out what's actually being
2100 	 * sent - eg, during reassociation/reauthentication after
2101 	 * the node (last) disappeared whilst asleep, the driver should
2102 	 * have unpaused/unsleep'ed the node.  So until that is
2103 	 * sorted out, use this workaround.
2104 	 */
2105 	if (txq == &avp->av_mcastq) {
2106 		DPRINTF(sc, ATH_DEBUG_SW_TX,
2107 		    "%s: bf=%p: mcastq: TX'ing\n", __func__, bf);
2108 		bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
2109 		ath_tx_xmit_normal(sc, txq, bf);
2110 	} else if (ath_tx_should_swq_frame(sc, ATH_NODE(ni), m0,
2111 	    &queue_to_head)) {
2112 		ath_tx_swq(sc, ni, txq, queue_to_head, bf);
2113 	} else {
2114 		bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
2115 		ath_tx_xmit_normal(sc, txq, bf);
2116 	}
2117 #else
2118 	/*
2119 	 * For now, since there's no software queue,
2120 	 * direct-dispatch to the hardware.
2121 	 */
2122 	bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
2123 	/*
2124 	 * Update the current leak count if
2125 	 * we're leaking frames; and set the
2126 	 * MORE flag as appropriate.
2127 	 */
2128 	ath_tx_leak_count_update(sc, tid, bf);
2129 	ath_tx_xmit_normal(sc, txq, bf);
2130 #endif
2131 done:
2132 	return 0;
2133 }
2134 
2135 static int
2136 ath_tx_raw_start(struct ath_softc *sc, struct ieee80211_node *ni,
2137 	struct ath_buf *bf, struct mbuf *m0,
2138 	const struct ieee80211_bpf_params *params)
2139 {
2140 	struct ieee80211com *ic = &sc->sc_ic;
2141 	struct ieee80211vap *vap = ni->ni_vap;
2142 	int error, ismcast, ismrr;
2143 	int keyix, hdrlen, pktlen, try0, txantenna;
2144 	u_int8_t rix, txrate;
2145 	struct ieee80211_frame *wh;
2146 	u_int flags;
2147 	HAL_PKT_TYPE atype;
2148 	const HAL_RATE_TABLE *rt;
2149 	struct ath_desc *ds;
2150 	u_int pri;
2151 	int o_tid = -1;
2152 	int do_override;
2153 	uint8_t type, subtype;
2154 	int queue_to_head;
2155 	struct ath_node *an = ATH_NODE(ni);
2156 
2157 	ATH_TX_LOCK_ASSERT(sc);
2158 
2159 	wh = mtod(m0, struct ieee80211_frame *);
2160 	ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
2161 	hdrlen = ieee80211_anyhdrsize(wh);
2162 	/*
2163 	 * Packet length must not include any
2164 	 * pad bytes; deduct them here.
2165 	 */
2166 	/* XXX honor IEEE80211_BPF_DATAPAD */
2167 	pktlen = m0->m_pkthdr.len - (hdrlen & 3) + IEEE80211_CRC_LEN;
2168 
2169 	type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
2170 	subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
2171 
2172 	ATH_KTR(sc, ATH_KTR_TX, 2,
2173 	     "ath_tx_raw_start: ni=%p, bf=%p, raw", ni, bf);
2174 
2175 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: ismcast=%d\n",
2176 	    __func__, ismcast);
2177 
2178 	pri = params->ibp_pri & 3;
2179 	/* Override pri if the frame isn't a QoS one */
2180 	if (! IEEE80211_QOS_HAS_SEQ(wh))
2181 		pri = ath_tx_getac(sc, m0);
2182 
2183 	/* XXX If it's an ADDBA, override the correct queue */
2184 	do_override = ath_tx_action_frame_override_queue(sc, ni, m0, &o_tid);
2185 
2186 	/* Map ADDBA to the correct priority */
2187 	if (do_override) {
2188 #if 1
2189 		DPRINTF(sc, ATH_DEBUG_XMIT,
2190 		    "%s: overriding tid %d pri %d -> %d\n",
2191 		    __func__, o_tid, pri, TID_TO_WME_AC(o_tid));
2192 #endif
2193 		pri = TID_TO_WME_AC(o_tid);
2194 	}
2195 
2196 	/*
2197 	 * "pri" is the hardware queue to transmit on.
2198 	 *
2199 	 * Look at the description in ath_tx_start() to understand
2200 	 * what needs to be "fixed" here so we just use the TID
2201 	 * for QoS frames.
2202 	 */
2203 
2204 	/* Handle encryption twiddling if needed */
2205 	if (! ath_tx_tag_crypto(sc, ni,
2206 	    m0, params->ibp_flags & IEEE80211_BPF_CRYPTO, 0,
2207 	    &hdrlen, &pktlen, &keyix)) {
2208 		ieee80211_free_mbuf(m0);
2209 		return EIO;
2210 	}
2211 	/* packet header may have moved, reset our local pointer */
2212 	wh = mtod(m0, struct ieee80211_frame *);
2213 
2214 	/* Do the generic frame setup */
2215 	/* XXX should just bzero the bf_state? */
2216 	bf->bf_state.bfs_dobaw = 0;
2217 
2218 	error = ath_tx_dmasetup(sc, bf, m0);
2219 	if (error != 0)
2220 		return error;
2221 	m0 = bf->bf_m;				/* NB: may have changed */
2222 	wh = mtod(m0, struct ieee80211_frame *);
2223 	KASSERT((ni != NULL), ("%s: ni=NULL!", __func__));
2224 	bf->bf_node = ni;			/* NB: held reference */
2225 
2226 	/* Always enable CLRDMASK for raw frames for now.. */
2227 	flags = HAL_TXDESC_CLRDMASK;		/* XXX needed for crypto errs */
2228 	flags |= HAL_TXDESC_INTREQ;		/* force interrupt */
2229 	if (params->ibp_flags & IEEE80211_BPF_RTS)
2230 		flags |= HAL_TXDESC_RTSENA;
2231 	else if (params->ibp_flags & IEEE80211_BPF_CTS) {
2232 		/* XXX assume 11g/11n protection? */
2233 		bf->bf_state.bfs_doprot = 1;
2234 		flags |= HAL_TXDESC_CTSENA;
2235 	}
2236 	/* XXX leave ismcast to injector? */
2237 	if ((params->ibp_flags & IEEE80211_BPF_NOACK) || ismcast)
2238 		flags |= HAL_TXDESC_NOACK;
2239 
2240 	rt = sc->sc_currates;
2241 	KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
2242 
2243 	/* Fetch first rate information */
2244 	rix = ath_tx_findrix(sc, params->ibp_rate0);
2245 	try0 = params->ibp_try0;
2246 
2247 	/*
2248 	 * Override EAPOL rate as appropriate.
2249 	 */
2250 	if (m0->m_flags & M_EAPOL) {
2251 		/* XXX? maybe always use long preamble? */
2252 		rix = an->an_mgmtrix;
2253 		try0 = ATH_TXMAXTRY;	/* XXX?too many? */
2254 	}
2255 
2256 	/*
2257 	 * If it's a frame to do location reporting on,
2258 	 * communicate it to the HAL.
2259 	 */
2260 	if (ieee80211_get_toa_params(m0, NULL)) {
2261 		device_printf(sc->sc_dev,
2262 		    "%s: setting TX positioning bit\n", __func__);
2263 		flags |= HAL_TXDESC_POS;
2264 		flags &= ~(HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA);
2265 		bf->bf_flags |= ATH_BUF_TOA_PROBE;
2266 	}
2267 
2268 	txrate = rt->info[rix].rateCode;
2269 	if (params->ibp_flags & IEEE80211_BPF_SHORTPRE)
2270 		txrate |= rt->info[rix].shortPreamble;
2271 	sc->sc_txrix = rix;
2272 	ismrr = (params->ibp_try1 != 0);
2273 	txantenna = params->ibp_pri >> 2;
2274 	if (txantenna == 0)			/* XXX? */
2275 		txantenna = sc->sc_txantenna;
2276 
2277 	/*
2278 	 * Since ctsrate is fixed, store it away for later
2279 	 * use when the descriptor fields are being set.
2280 	 */
2281 	if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA))
2282 		bf->bf_state.bfs_ctsrate0 = params->ibp_ctsrate;
2283 
2284 	/*
2285 	 * NB: we mark all packets as type PSPOLL so the h/w won't
2286 	 * set the sequence number, duration, etc.
2287 	 */
2288 	atype = HAL_PKT_TYPE_PSPOLL;
2289 
2290 	if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT))
2291 		ieee80211_dump_pkt(ic, mtod(m0, caddr_t), m0->m_len,
2292 		    sc->sc_hwmap[rix].ieeerate, -1);
2293 
2294 	if (ieee80211_radiotap_active_vap(vap)) {
2295 		sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags;
2296 		if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED)
2297 			sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
2298 		if (m0->m_flags & M_FRAG)
2299 			sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG;
2300 		sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate;
2301 		sc->sc_tx_th.wt_txpower = MIN(params->ibp_power,
2302 		    ieee80211_get_node_txpower(ni));
2303 		sc->sc_tx_th.wt_antenna = sc->sc_txantenna;
2304 
2305 		ieee80211_radiotap_tx(vap, m0);
2306 	}
2307 
2308 	/*
2309 	 * Formulate first tx descriptor with tx controls.
2310 	 */
2311 	ds = bf->bf_desc;
2312 	/* XXX check return value? */
2313 
2314 	/* Store the decided rate index values away */
2315 	bf->bf_state.bfs_pktlen = pktlen;
2316 	bf->bf_state.bfs_hdrlen = hdrlen;
2317 	bf->bf_state.bfs_atype = atype;
2318 	bf->bf_state.bfs_txpower = MIN(params->ibp_power,
2319 	    ieee80211_get_node_txpower(ni));
2320 	bf->bf_state.bfs_txrate0 = txrate;
2321 	bf->bf_state.bfs_try0 = try0;
2322 	bf->bf_state.bfs_keyix = keyix;
2323 	bf->bf_state.bfs_txantenna = txantenna;
2324 	bf->bf_state.bfs_txflags = flags;
2325 	bf->bf_state.bfs_shpream =
2326 	    !! (params->ibp_flags & IEEE80211_BPF_SHORTPRE);
2327 
2328 	/* Set local packet state, used to queue packets to hardware */
2329 	bf->bf_state.bfs_tid = WME_AC_TO_TID(pri);
2330 	bf->bf_state.bfs_tx_queue = sc->sc_ac2q[pri]->axq_qnum;
2331 	bf->bf_state.bfs_pri = pri;
2332 
2333 	/* XXX this should be done in ath_tx_setrate() */
2334 	bf->bf_state.bfs_ctsrate = 0;
2335 	bf->bf_state.bfs_ctsduration = 0;
2336 	bf->bf_state.bfs_ismrr = ismrr;
2337 
2338 	/* Blank the legacy rate array */
2339 	bzero(&bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc));
2340 
2341 	bf->bf_state.bfs_rc[0].rix = rix;
2342 	bf->bf_state.bfs_rc[0].tries = try0;
2343 	bf->bf_state.bfs_rc[0].ratecode = txrate;
2344 
2345 	if (ismrr) {
2346 		int rix;
2347 
2348 		rix = ath_tx_findrix(sc, params->ibp_rate1);
2349 		bf->bf_state.bfs_rc[1].rix = rix;
2350 		bf->bf_state.bfs_rc[1].tries = params->ibp_try1;
2351 
2352 		rix = ath_tx_findrix(sc, params->ibp_rate2);
2353 		bf->bf_state.bfs_rc[2].rix = rix;
2354 		bf->bf_state.bfs_rc[2].tries = params->ibp_try2;
2355 
2356 		rix = ath_tx_findrix(sc, params->ibp_rate3);
2357 		bf->bf_state.bfs_rc[3].rix = rix;
2358 		bf->bf_state.bfs_rc[3].tries = params->ibp_try3;
2359 	}
2360 	/*
2361 	 * All the required rate control decisions have been made;
2362 	 * fill in the rc flags.
2363 	 */
2364 	ath_tx_rate_fill_rcflags(sc, bf);
2365 
2366 	/* NB: no buffered multicast in power save support */
2367 
2368 	/*
2369 	 * If we're overiding the ADDBA destination, dump directly
2370 	 * into the hardware queue, right after any pending
2371 	 * frames to that node are.
2372 	 */
2373 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: dooverride=%d\n",
2374 	    __func__, do_override);
2375 
2376 #if 1
2377 	/*
2378 	 * Put addba frames in the right place in the right TID/HWQ.
2379 	 */
2380 	if (do_override) {
2381 		bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
2382 		/*
2383 		 * XXX if it's addba frames, should we be leaking
2384 		 * them out via the frame leak method?
2385 		 * XXX for now let's not risk it; but we may wish
2386 		 * to investigate this later.
2387 		 */
2388 		ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf);
2389 	} else if (ath_tx_should_swq_frame(sc, ATH_NODE(ni), m0,
2390 	    &queue_to_head)) {
2391 		/* Queue to software queue */
2392 		ath_tx_swq(sc, ni, sc->sc_ac2q[pri], queue_to_head, bf);
2393 	} else {
2394 		bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
2395 		ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf);
2396 	}
2397 #else
2398 	/* Direct-dispatch to the hardware */
2399 	bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
2400 	/*
2401 	 * Update the current leak count if
2402 	 * we're leaking frames; and set the
2403 	 * MORE flag as appropriate.
2404 	 */
2405 	ath_tx_leak_count_update(sc, tid, bf);
2406 	ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf);
2407 #endif
2408 	return 0;
2409 }
2410 
2411 /*
2412  * Send a raw frame.
2413  *
2414  * This can be called by net80211.
2415  */
2416 int
2417 ath_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
2418 	const struct ieee80211_bpf_params *params)
2419 {
2420 	struct ieee80211com *ic = ni->ni_ic;
2421 	struct ath_softc *sc = ic->ic_softc;
2422 	struct ath_buf *bf;
2423 	struct ieee80211_frame *wh = mtod(m, struct ieee80211_frame *);
2424 	int error = 0;
2425 
2426 	ATH_PCU_LOCK(sc);
2427 	if (sc->sc_inreset_cnt > 0) {
2428 		DPRINTF(sc, ATH_DEBUG_XMIT,
2429 		    "%s: sc_inreset_cnt > 0; bailing\n", __func__);
2430 		error = EIO;
2431 		ATH_PCU_UNLOCK(sc);
2432 		goto badbad;
2433 	}
2434 	sc->sc_txstart_cnt++;
2435 	ATH_PCU_UNLOCK(sc);
2436 
2437 	/* Wake the hardware up already */
2438 	ATH_LOCK(sc);
2439 	ath_power_set_power_state(sc, HAL_PM_AWAKE);
2440 	ATH_UNLOCK(sc);
2441 
2442 	ATH_TX_LOCK(sc);
2443 
2444 	if (!sc->sc_running || sc->sc_invalid) {
2445 		DPRINTF(sc, ATH_DEBUG_XMIT, "%s: discard frame, r/i: %d/%d",
2446 		    __func__, sc->sc_running, sc->sc_invalid);
2447 		m_freem(m);
2448 		error = ENETDOWN;
2449 		goto bad;
2450 	}
2451 
2452 	/*
2453 	 * Enforce how deep the multicast queue can grow.
2454 	 *
2455 	 * XXX duplicated in ath_tx_start().
2456 	 */
2457 	if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
2458 		if (sc->sc_cabq->axq_depth + sc->sc_cabq->fifo.axq_depth
2459 		    > sc->sc_txq_mcastq_maxdepth) {
2460 			sc->sc_stats.ast_tx_mcastq_overflow++;
2461 			error = ENOBUFS;
2462 		}
2463 
2464 		if (error != 0) {
2465 			m_freem(m);
2466 			goto bad;
2467 		}
2468 	}
2469 
2470 	/*
2471 	 * Grab a TX buffer and associated resources.
2472 	 */
2473 	bf = ath_getbuf(sc, ATH_BUFTYPE_MGMT);
2474 	if (bf == NULL) {
2475 		sc->sc_stats.ast_tx_nobuf++;
2476 		m_freem(m);
2477 		error = ENOBUFS;
2478 		goto bad;
2479 	}
2480 	ATH_KTR(sc, ATH_KTR_TX, 3, "ath_raw_xmit: m=%p, params=%p, bf=%p\n",
2481 	    m, params,  bf);
2482 
2483 	if (params == NULL) {
2484 		/*
2485 		 * Legacy path; interpret frame contents to decide
2486 		 * precisely how to send the frame.
2487 		 */
2488 		if (ath_tx_start(sc, ni, bf, m)) {
2489 			error = EIO;		/* XXX */
2490 			goto bad2;
2491 		}
2492 	} else {
2493 		/*
2494 		 * Caller supplied explicit parameters to use in
2495 		 * sending the frame.
2496 		 */
2497 		if (ath_tx_raw_start(sc, ni, bf, m, params)) {
2498 			error = EIO;		/* XXX */
2499 			goto bad2;
2500 		}
2501 	}
2502 	sc->sc_wd_timer = 5;
2503 	sc->sc_stats.ast_tx_raw++;
2504 
2505 	/*
2506 	 * Update the TIM - if there's anything queued to the
2507 	 * software queue and power save is enabled, we should
2508 	 * set the TIM.
2509 	 */
2510 	ath_tx_update_tim(sc, ni, 1);
2511 
2512 	ATH_TX_UNLOCK(sc);
2513 
2514 	ATH_PCU_LOCK(sc);
2515 	sc->sc_txstart_cnt--;
2516 	ATH_PCU_UNLOCK(sc);
2517 
2518 
2519 	/* Put the hardware back to sleep if required */
2520 	ATH_LOCK(sc);
2521 	ath_power_restore_power_state(sc);
2522 	ATH_UNLOCK(sc);
2523 
2524 	return 0;
2525 
2526 bad2:
2527 	ATH_KTR(sc, ATH_KTR_TX, 3, "ath_raw_xmit: bad2: m=%p, params=%p, "
2528 	    "bf=%p",
2529 	    m,
2530 	    params,
2531 	    bf);
2532 	ATH_TXBUF_LOCK(sc);
2533 	ath_returnbuf_head(sc, bf);
2534 	ATH_TXBUF_UNLOCK(sc);
2535 
2536 bad:
2537 	ATH_TX_UNLOCK(sc);
2538 
2539 	ATH_PCU_LOCK(sc);
2540 	sc->sc_txstart_cnt--;
2541 	ATH_PCU_UNLOCK(sc);
2542 
2543 	/* Put the hardware back to sleep if required */
2544 	ATH_LOCK(sc);
2545 	ath_power_restore_power_state(sc);
2546 	ATH_UNLOCK(sc);
2547 
2548 badbad:
2549 	ATH_KTR(sc, ATH_KTR_TX, 2, "ath_raw_xmit: bad0: m=%p, params=%p",
2550 	    m, params);
2551 	sc->sc_stats.ast_tx_raw_fail++;
2552 
2553 	return error;
2554 }
2555 
2556 /* Some helper functions */
2557 
2558 /*
2559  * ADDBA (and potentially others) need to be placed in the same
2560  * hardware queue as the TID/node it's relating to. This is so
2561  * it goes out after any pending non-aggregate frames to the
2562  * same node/TID.
2563  *
2564  * If this isn't done, the ADDBA can go out before the frames
2565  * queued in hardware. Even though these frames have a sequence
2566  * number -earlier- than the ADDBA can be transmitted (but
2567  * no frames whose sequence numbers are after the ADDBA should
2568  * be!) they'll arrive after the ADDBA - and the receiving end
2569  * will simply drop them as being out of the BAW.
2570  *
2571  * The frames can't be appended to the TID software queue - it'll
2572  * never be sent out. So these frames have to be directly
2573  * dispatched to the hardware, rather than queued in software.
2574  * So if this function returns true, the TXQ has to be
2575  * overridden and it has to be directly dispatched.
2576  *
2577  * It's a dirty hack, but someone's gotta do it.
2578  */
2579 
2580 /*
2581  * XXX doesn't belong here!
2582  */
2583 static int
2584 ieee80211_is_action(struct ieee80211_frame *wh)
2585 {
2586 	/* Type: Management frame? */
2587 	if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) !=
2588 	    IEEE80211_FC0_TYPE_MGT)
2589 		return 0;
2590 
2591 	/* Subtype: Action frame? */
2592 	if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) !=
2593 	    IEEE80211_FC0_SUBTYPE_ACTION)
2594 		return 0;
2595 
2596 	return 1;
2597 }
2598 
2599 #define	MS(_v, _f)	(((_v) & _f) >> _f##_S)
2600 /*
2601  * Return an alternate TID for ADDBA request frames.
2602  *
2603  * Yes, this likely should be done in the net80211 layer.
2604  */
2605 static int
2606 ath_tx_action_frame_override_queue(struct ath_softc *sc,
2607     struct ieee80211_node *ni,
2608     struct mbuf *m0, int *tid)
2609 {
2610 	struct ieee80211_frame *wh = mtod(m0, struct ieee80211_frame *);
2611 	struct ieee80211_action_ba_addbarequest *ia;
2612 	uint8_t *frm;
2613 	uint16_t baparamset;
2614 
2615 	/* Not action frame? Bail */
2616 	if (! ieee80211_is_action(wh))
2617 		return 0;
2618 
2619 	/* XXX Not needed for frames we send? */
2620 #if 0
2621 	/* Correct length? */
2622 	if (! ieee80211_parse_action(ni, m))
2623 		return 0;
2624 #endif
2625 
2626 	/* Extract out action frame */
2627 	frm = (u_int8_t *)&wh[1];
2628 	ia = (struct ieee80211_action_ba_addbarequest *) frm;
2629 
2630 	/* Not ADDBA? Bail */
2631 	if (ia->rq_header.ia_category != IEEE80211_ACTION_CAT_BA)
2632 		return 0;
2633 	if (ia->rq_header.ia_action != IEEE80211_ACTION_BA_ADDBA_REQUEST)
2634 		return 0;
2635 
2636 	/* Extract TID, return it */
2637 	baparamset = le16toh(ia->rq_baparamset);
2638 	*tid = (int) MS(baparamset, IEEE80211_BAPS_TID);
2639 
2640 	return 1;
2641 }
2642 #undef	MS
2643 
2644 /* Per-node software queue operations */
2645 
2646 /*
2647  * Add the current packet to the given BAW.
2648  * It is assumed that the current packet
2649  *
2650  * + fits inside the BAW;
2651  * + already has had a sequence number allocated.
2652  *
2653  * Since the BAW status may be modified by both the ath task and
2654  * the net80211/ifnet contexts, the TID must be locked.
2655  */
2656 void
2657 ath_tx_addto_baw(struct ath_softc *sc, struct ath_node *an,
2658     struct ath_tid *tid, struct ath_buf *bf)
2659 {
2660 	int index, cindex;
2661 	struct ieee80211_tx_ampdu *tap;
2662 
2663 	ATH_TX_LOCK_ASSERT(sc);
2664 
2665 	if (bf->bf_state.bfs_isretried)
2666 		return;
2667 
2668 	tap = ath_tx_get_tx_tid(an, tid->tid);
2669 
2670 	if (! bf->bf_state.bfs_dobaw) {
2671 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2672 		    "%s: dobaw=0, seqno=%d, window %d:%d\n",
2673 		    __func__, SEQNO(bf->bf_state.bfs_seqno),
2674 		    tap->txa_start, tap->txa_wnd);
2675 	}
2676 
2677 	if (bf->bf_state.bfs_addedbaw)
2678 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2679 		    "%s: re-added? tid=%d, seqno %d; window %d:%d; "
2680 		    "baw head=%d tail=%d\n",
2681 		    __func__, tid->tid, SEQNO(bf->bf_state.bfs_seqno),
2682 		    tap->txa_start, tap->txa_wnd, tid->baw_head,
2683 		    tid->baw_tail);
2684 
2685 	/*
2686 	 * Verify that the given sequence number is not outside of the
2687 	 * BAW.  Complain loudly if that's the case.
2688 	 */
2689 	if (! BAW_WITHIN(tap->txa_start, tap->txa_wnd,
2690 	    SEQNO(bf->bf_state.bfs_seqno))) {
2691 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2692 		    "%s: bf=%p: outside of BAW?? tid=%d, seqno %d; window %d:%d; "
2693 		    "baw head=%d tail=%d\n",
2694 		    __func__, bf, tid->tid, SEQNO(bf->bf_state.bfs_seqno),
2695 		    tap->txa_start, tap->txa_wnd, tid->baw_head,
2696 		    tid->baw_tail);
2697 	}
2698 
2699 	/*
2700 	 * ni->ni_txseqs[] is the currently allocated seqno.
2701 	 * the txa state contains the current baw start.
2702 	 */
2703 	index  = ATH_BA_INDEX(tap->txa_start, SEQNO(bf->bf_state.bfs_seqno));
2704 	cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
2705 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2706 	    "%s: tid=%d, seqno %d; window %d:%d; index=%d cindex=%d "
2707 	    "baw head=%d tail=%d\n",
2708 	    __func__, tid->tid, SEQNO(bf->bf_state.bfs_seqno),
2709 	    tap->txa_start, tap->txa_wnd, index, cindex, tid->baw_head,
2710 	    tid->baw_tail);
2711 
2712 
2713 #if 0
2714 	assert(tid->tx_buf[cindex] == NULL);
2715 #endif
2716 	if (tid->tx_buf[cindex] != NULL) {
2717 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2718 		    "%s: ba packet dup (index=%d, cindex=%d, "
2719 		    "head=%d, tail=%d)\n",
2720 		    __func__, index, cindex, tid->baw_head, tid->baw_tail);
2721 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2722 		    "%s: BA bf: %p; seqno=%d ; new bf: %p; seqno=%d\n",
2723 		    __func__,
2724 		    tid->tx_buf[cindex],
2725 		    SEQNO(tid->tx_buf[cindex]->bf_state.bfs_seqno),
2726 		    bf,
2727 		    SEQNO(bf->bf_state.bfs_seqno)
2728 		);
2729 	}
2730 	tid->tx_buf[cindex] = bf;
2731 
2732 	if (index >= ((tid->baw_tail - tid->baw_head) &
2733 	    (ATH_TID_MAX_BUFS - 1))) {
2734 		tid->baw_tail = cindex;
2735 		INCR(tid->baw_tail, ATH_TID_MAX_BUFS);
2736 	}
2737 }
2738 
2739 /*
2740  * Flip the BAW buffer entry over from the existing one to the new one.
2741  *
2742  * When software retransmitting a (sub-)frame, it is entirely possible that
2743  * the frame ath_buf is marked as BUSY and can't be immediately reused.
2744  * In that instance the buffer is cloned and the new buffer is used for
2745  * retransmit. We thus need to update the ath_buf slot in the BAW buf
2746  * tracking array to maintain consistency.
2747  */
2748 static void
2749 ath_tx_switch_baw_buf(struct ath_softc *sc, struct ath_node *an,
2750     struct ath_tid *tid, struct ath_buf *old_bf, struct ath_buf *new_bf)
2751 {
2752 	int index, cindex;
2753 	struct ieee80211_tx_ampdu *tap;
2754 	int seqno = SEQNO(old_bf->bf_state.bfs_seqno);
2755 
2756 	ATH_TX_LOCK_ASSERT(sc);
2757 
2758 	tap = ath_tx_get_tx_tid(an, tid->tid);
2759 	index  = ATH_BA_INDEX(tap->txa_start, seqno);
2760 	cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
2761 
2762 	/*
2763 	 * Just warn for now; if it happens then we should find out
2764 	 * about it. It's highly likely the aggregation session will
2765 	 * soon hang.
2766 	 */
2767 	if (old_bf->bf_state.bfs_seqno != new_bf->bf_state.bfs_seqno) {
2768 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2769 		    "%s: retransmitted buffer"
2770 		    " has mismatching seqno's, BA session may hang.\n",
2771 		    __func__);
2772 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2773 		    "%s: old seqno=%d, new_seqno=%d\n", __func__,
2774 		    old_bf->bf_state.bfs_seqno, new_bf->bf_state.bfs_seqno);
2775 	}
2776 
2777 	if (tid->tx_buf[cindex] != old_bf) {
2778 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2779 		    "%s: ath_buf pointer incorrect; "
2780 		    " has m BA session may hang.\n", __func__);
2781 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2782 		    "%s: old bf=%p, new bf=%p\n", __func__, old_bf, new_bf);
2783 	}
2784 
2785 	tid->tx_buf[cindex] = new_bf;
2786 }
2787 
2788 /*
2789  * seq_start - left edge of BAW
2790  * seq_next - current/next sequence number to allocate
2791  *
2792  * Since the BAW status may be modified by both the ath task and
2793  * the net80211/ifnet contexts, the TID must be locked.
2794  */
2795 static void
2796 ath_tx_update_baw(struct ath_softc *sc, struct ath_node *an,
2797     struct ath_tid *tid, const struct ath_buf *bf)
2798 {
2799 	int index, cindex;
2800 	struct ieee80211_tx_ampdu *tap;
2801 	int seqno = SEQNO(bf->bf_state.bfs_seqno);
2802 
2803 	ATH_TX_LOCK_ASSERT(sc);
2804 
2805 	tap = ath_tx_get_tx_tid(an, tid->tid);
2806 	index  = ATH_BA_INDEX(tap->txa_start, seqno);
2807 	cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
2808 
2809 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2810 	    "%s: tid=%d, baw=%d:%d, seqno=%d, index=%d, cindex=%d, "
2811 	    "baw head=%d, tail=%d\n",
2812 	    __func__, tid->tid, tap->txa_start, tap->txa_wnd, seqno, index,
2813 	    cindex, tid->baw_head, tid->baw_tail);
2814 
2815 	/*
2816 	 * If this occurs then we have a big problem - something else
2817 	 * has slid tap->txa_start along without updating the BAW
2818 	 * tracking start/end pointers. Thus the TX BAW state is now
2819 	 * completely busted.
2820 	 *
2821 	 * But for now, since I haven't yet fixed TDMA and buffer cloning,
2822 	 * it's quite possible that a cloned buffer is making its way
2823 	 * here and causing it to fire off. Disable TDMA for now.
2824 	 */
2825 	if (tid->tx_buf[cindex] != bf) {
2826 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2827 		    "%s: comp bf=%p, seq=%d; slot bf=%p, seqno=%d\n",
2828 		    __func__, bf, SEQNO(bf->bf_state.bfs_seqno),
2829 		    tid->tx_buf[cindex],
2830 		    (tid->tx_buf[cindex] != NULL) ?
2831 		      SEQNO(tid->tx_buf[cindex]->bf_state.bfs_seqno) : -1);
2832 	}
2833 
2834 	tid->tx_buf[cindex] = NULL;
2835 
2836 	while (tid->baw_head != tid->baw_tail &&
2837 	    !tid->tx_buf[tid->baw_head]) {
2838 		INCR(tap->txa_start, IEEE80211_SEQ_RANGE);
2839 		INCR(tid->baw_head, ATH_TID_MAX_BUFS);
2840 	}
2841 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2842 	    "%s: tid=%d: baw is now %d:%d, baw head=%d\n",
2843 	    __func__, tid->tid, tap->txa_start, tap->txa_wnd, tid->baw_head);
2844 }
2845 
2846 static void
2847 ath_tx_leak_count_update(struct ath_softc *sc, struct ath_tid *tid,
2848     struct ath_buf *bf)
2849 {
2850 	struct ieee80211_frame *wh;
2851 
2852 	ATH_TX_LOCK_ASSERT(sc);
2853 
2854 	if (tid->an->an_leak_count > 0) {
2855 		wh = mtod(bf->bf_m, struct ieee80211_frame *);
2856 
2857 		/*
2858 		 * Update MORE based on the software/net80211 queue states.
2859 		 */
2860 		if ((tid->an->an_stack_psq > 0)
2861 		    || (tid->an->an_swq_depth > 0))
2862 			wh->i_fc[1] |= IEEE80211_FC1_MORE_DATA;
2863 		else
2864 			wh->i_fc[1] &= ~IEEE80211_FC1_MORE_DATA;
2865 
2866 		DPRINTF(sc, ATH_DEBUG_NODE_PWRSAVE,
2867 		    "%s: %6D: leak count = %d, psq=%d, swq=%d, MORE=%d\n",
2868 		    __func__,
2869 		    tid->an->an_node.ni_macaddr,
2870 		    ":",
2871 		    tid->an->an_leak_count,
2872 		    tid->an->an_stack_psq,
2873 		    tid->an->an_swq_depth,
2874 		    !! (wh->i_fc[1] & IEEE80211_FC1_MORE_DATA));
2875 
2876 		/*
2877 		 * Re-sync the underlying buffer.
2878 		 */
2879 		bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap,
2880 		    BUS_DMASYNC_PREWRITE);
2881 
2882 		tid->an->an_leak_count --;
2883 	}
2884 }
2885 
2886 static int
2887 ath_tx_tid_can_tx_or_sched(struct ath_softc *sc, struct ath_tid *tid)
2888 {
2889 
2890 	ATH_TX_LOCK_ASSERT(sc);
2891 
2892 	if (tid->an->an_leak_count > 0) {
2893 		return (1);
2894 	}
2895 	if (tid->paused)
2896 		return (0);
2897 	return (1);
2898 }
2899 
2900 /*
2901  * Mark the current node/TID as ready to TX.
2902  *
2903  * This is done to make it easy for the software scheduler to
2904  * find which nodes have data to send.
2905  *
2906  * The TXQ lock must be held.
2907  */
2908 void
2909 ath_tx_tid_sched(struct ath_softc *sc, struct ath_tid *tid)
2910 {
2911 	struct ath_txq *txq = sc->sc_ac2q[tid->ac];
2912 
2913 	ATH_TX_LOCK_ASSERT(sc);
2914 
2915 	/*
2916 	 * If we are leaking out a frame to this destination
2917 	 * for PS-POLL, ensure that we allow scheduling to
2918 	 * occur.
2919 	 */
2920 	if (! ath_tx_tid_can_tx_or_sched(sc, tid))
2921 		return;		/* paused, can't schedule yet */
2922 
2923 	if (tid->sched)
2924 		return;		/* already scheduled */
2925 
2926 	tid->sched = 1;
2927 
2928 #if 0
2929 	/*
2930 	 * If this is a sleeping node we're leaking to, given
2931 	 * it a higher priority.  This is so bad for QoS it hurts.
2932 	 */
2933 	if (tid->an->an_leak_count) {
2934 		TAILQ_INSERT_HEAD(&txq->axq_tidq, tid, axq_qelem);
2935 	} else {
2936 		TAILQ_INSERT_TAIL(&txq->axq_tidq, tid, axq_qelem);
2937 	}
2938 #endif
2939 
2940 	/*
2941 	 * We can't do the above - it'll confuse the TXQ software
2942 	 * scheduler which will keep checking the _head_ TID
2943 	 * in the list to see if it has traffic.  If we queue
2944 	 * a TID to the head of the list and it doesn't transmit,
2945 	 * we'll check it again.
2946 	 *
2947 	 * So, get the rest of this leaking frames support working
2948 	 * and reliable first and _then_ optimise it so they're
2949 	 * pushed out in front of any other pending software
2950 	 * queued nodes.
2951 	 */
2952 	TAILQ_INSERT_TAIL(&txq->axq_tidq, tid, axq_qelem);
2953 }
2954 
2955 /*
2956  * Mark the current node as no longer needing to be polled for
2957  * TX packets.
2958  *
2959  * The TXQ lock must be held.
2960  */
2961 static void
2962 ath_tx_tid_unsched(struct ath_softc *sc, struct ath_tid *tid)
2963 {
2964 	struct ath_txq *txq = sc->sc_ac2q[tid->ac];
2965 
2966 	ATH_TX_LOCK_ASSERT(sc);
2967 
2968 	if (tid->sched == 0)
2969 		return;
2970 
2971 	tid->sched = 0;
2972 	TAILQ_REMOVE(&txq->axq_tidq, tid, axq_qelem);
2973 }
2974 
2975 /*
2976  * Assign a sequence number manually to the given frame.
2977  *
2978  * This should only be called for A-MPDU TX frames.
2979  *
2980  * Note: for group addressed frames, the sequence number
2981  * should be from NONQOS_TID, and net80211 should have
2982  * already assigned it for us.
2983  */
2984 static ieee80211_seq
2985 ath_tx_tid_seqno_assign(struct ath_softc *sc, struct ieee80211_node *ni,
2986     struct ath_buf *bf, struct mbuf *m0)
2987 {
2988 	struct ieee80211_frame *wh;
2989 	int tid;
2990 	ieee80211_seq seqno;
2991 	uint8_t subtype;
2992 
2993 	wh = mtod(m0, struct ieee80211_frame *);
2994 	tid = ieee80211_gettid(wh);
2995 
2996 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, qos has seq=%d\n",
2997 	    __func__, tid, IEEE80211_QOS_HAS_SEQ(wh));
2998 
2999 	/* XXX Is it a control frame? Ignore */
3000 
3001 	/* Does the packet require a sequence number? */
3002 	if (! IEEE80211_QOS_HAS_SEQ(wh))
3003 		return -1;
3004 
3005 	ATH_TX_LOCK_ASSERT(sc);
3006 
3007 	/*
3008 	 * Is it a QOS NULL Data frame? Give it a sequence number from
3009 	 * the default TID (IEEE80211_NONQOS_TID.)
3010 	 *
3011 	 * The RX path of everything I've looked at doesn't include the NULL
3012 	 * data frame sequence number in the aggregation state updates, so
3013 	 * assigning it a sequence number there will cause a BAW hole on the
3014 	 * RX side.
3015 	 */
3016 	subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
3017 	if (subtype == IEEE80211_FC0_SUBTYPE_QOS_NULL) {
3018 		/* XXX no locking for this TID? This is a bit of a problem. */
3019 		seqno = ni->ni_txseqs[IEEE80211_NONQOS_TID];
3020 		INCR(ni->ni_txseqs[IEEE80211_NONQOS_TID], IEEE80211_SEQ_RANGE);
3021 	} else if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
3022 		/*
3023 		 * group addressed frames get a sequence number from
3024 		 * a different sequence number space.
3025 		 */
3026 		seqno = ni->ni_txseqs[IEEE80211_NONQOS_TID];
3027 		INCR(ni->ni_txseqs[IEEE80211_NONQOS_TID], IEEE80211_SEQ_RANGE);
3028 	} else {
3029 		/* Manually assign sequence number */
3030 		seqno = ni->ni_txseqs[tid];
3031 		INCR(ni->ni_txseqs[tid], IEEE80211_SEQ_RANGE);
3032 	}
3033 	*(uint16_t *)&wh->i_seq[0] = htole16(seqno << IEEE80211_SEQ_SEQ_SHIFT);
3034 	M_SEQNO_SET(m0, seqno);
3035 
3036 	/* Return so caller can do something with it if needed */
3037 	DPRINTF(sc, ATH_DEBUG_SW_TX,
3038 	    "%s:  -> subtype=0x%x, tid=%d, seqno=%d\n",
3039 	    __func__, subtype, tid, seqno);
3040 	return seqno;
3041 }
3042 
3043 /*
3044  * Attempt to direct dispatch an aggregate frame to hardware.
3045  * If the frame is out of BAW, queue.
3046  * Otherwise, schedule it as a single frame.
3047  */
3048 static void
3049 ath_tx_xmit_aggr(struct ath_softc *sc, struct ath_node *an,
3050     struct ath_txq *txq, struct ath_buf *bf)
3051 {
3052 	struct ath_tid *tid = &an->an_tid[bf->bf_state.bfs_tid];
3053 	struct ieee80211_tx_ampdu *tap;
3054 
3055 	ATH_TX_LOCK_ASSERT(sc);
3056 
3057 	tap = ath_tx_get_tx_tid(an, tid->tid);
3058 
3059 	/* paused? queue */
3060 	if (! ath_tx_tid_can_tx_or_sched(sc, tid)) {
3061 		ATH_TID_INSERT_HEAD(tid, bf, bf_list);
3062 		/* XXX don't sched - we're paused! */
3063 		return;
3064 	}
3065 
3066 	/* outside baw? queue */
3067 	if (bf->bf_state.bfs_dobaw &&
3068 	    (! BAW_WITHIN(tap->txa_start, tap->txa_wnd,
3069 	    SEQNO(bf->bf_state.bfs_seqno)))) {
3070 		ATH_TID_INSERT_HEAD(tid, bf, bf_list);
3071 		ath_tx_tid_sched(sc, tid);
3072 		return;
3073 	}
3074 
3075 	/*
3076 	 * This is a temporary check and should be removed once
3077 	 * all the relevant code paths have been fixed.
3078 	 *
3079 	 * During aggregate retries, it's possible that the head
3080 	 * frame will fail (which has the bfs_aggr and bfs_nframes
3081 	 * fields set for said aggregate) and will be retried as
3082 	 * a single frame.  In this instance, the values should
3083 	 * be reset or the completion code will get upset with you.
3084 	 */
3085 	if (bf->bf_state.bfs_aggr != 0 || bf->bf_state.bfs_nframes > 1) {
3086 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
3087 		    "%s: bfs_aggr=%d, bfs_nframes=%d\n", __func__,
3088 		    bf->bf_state.bfs_aggr, bf->bf_state.bfs_nframes);
3089 		bf->bf_state.bfs_aggr = 0;
3090 		bf->bf_state.bfs_nframes = 1;
3091 	}
3092 
3093 	/* Update CLRDMASK just before this frame is queued */
3094 	ath_tx_update_clrdmask(sc, tid, bf);
3095 
3096 	/* Direct dispatch to hardware */
3097 	ath_tx_do_ratelookup(sc, bf);
3098 	ath_tx_calc_duration(sc, bf);
3099 	ath_tx_calc_protection(sc, bf);
3100 	ath_tx_set_rtscts(sc, bf);
3101 	ath_tx_rate_fill_rcflags(sc, bf);
3102 	ath_tx_setds(sc, bf);
3103 
3104 	/* Statistics */
3105 	sc->sc_aggr_stats.aggr_low_hwq_single_pkt++;
3106 
3107 	/* Track per-TID hardware queue depth correctly */
3108 	tid->hwq_depth++;
3109 
3110 	/* Add to BAW */
3111 	if (bf->bf_state.bfs_dobaw) {
3112 		ath_tx_addto_baw(sc, an, tid, bf);
3113 		bf->bf_state.bfs_addedbaw = 1;
3114 	}
3115 
3116 	/* Set completion handler, multi-frame aggregate or not */
3117 	bf->bf_comp = ath_tx_aggr_comp;
3118 
3119 	/*
3120 	 * Update the current leak count if
3121 	 * we're leaking frames; and set the
3122 	 * MORE flag as appropriate.
3123 	 */
3124 	ath_tx_leak_count_update(sc, tid, bf);
3125 
3126 	/* Hand off to hardware */
3127 	ath_tx_handoff(sc, txq, bf);
3128 }
3129 
3130 /*
3131  * Attempt to send the packet.
3132  * If the queue isn't busy, direct-dispatch.
3133  * If the queue is busy enough, queue the given packet on the
3134  *  relevant software queue.
3135  */
3136 void
3137 ath_tx_swq(struct ath_softc *sc, struct ieee80211_node *ni,
3138     struct ath_txq *txq, int queue_to_head, struct ath_buf *bf)
3139 {
3140 	struct ath_node *an = ATH_NODE(ni);
3141 	struct ieee80211_frame *wh;
3142 	struct ath_tid *atid;
3143 	int pri, tid;
3144 	struct mbuf *m0 = bf->bf_m;
3145 
3146 	ATH_TX_LOCK_ASSERT(sc);
3147 
3148 	/* Fetch the TID - non-QoS frames get assigned to TID 16 */
3149 	wh = mtod(m0, struct ieee80211_frame *);
3150 	pri = ath_tx_getac(sc, m0);
3151 	tid = ath_tx_gettid(sc, m0);
3152 	atid = &an->an_tid[tid];
3153 
3154 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bf=%p, pri=%d, tid=%d, qos=%d\n",
3155 	    __func__, bf, pri, tid, IEEE80211_QOS_HAS_SEQ(wh));
3156 
3157 	/* Set local packet state, used to queue packets to hardware */
3158 	/* XXX potentially duplicate info, re-check */
3159 	bf->bf_state.bfs_tid = tid;
3160 	bf->bf_state.bfs_tx_queue = txq->axq_qnum;
3161 	bf->bf_state.bfs_pri = pri;
3162 
3163 	/*
3164 	 * If the hardware queue isn't busy, queue it directly.
3165 	 * If the hardware queue is busy, queue it.
3166 	 * If the TID is paused or the traffic it outside BAW, software
3167 	 * queue it.
3168 	 *
3169 	 * If the node is in power-save and we're leaking a frame,
3170 	 * leak a single frame.
3171 	 */
3172 	if (! ath_tx_tid_can_tx_or_sched(sc, atid)) {
3173 		/* TID is paused, queue */
3174 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: paused\n", __func__);
3175 		/*
3176 		 * If the caller requested that it be sent at a high
3177 		 * priority, queue it at the head of the list.
3178 		 */
3179 		if (queue_to_head)
3180 			ATH_TID_INSERT_HEAD(atid, bf, bf_list);
3181 		else
3182 			ATH_TID_INSERT_TAIL(atid, bf, bf_list);
3183 	} else if (ath_tx_ampdu_pending(sc, an, tid)) {
3184 		/* AMPDU pending; queue */
3185 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: pending\n", __func__);
3186 		ATH_TID_INSERT_TAIL(atid, bf, bf_list);
3187 		/* XXX sched? */
3188 	} else if (ath_tx_ampdu_running(sc, an, tid)) {
3189 		/*
3190 		 * AMPDU running, queue single-frame if the hardware queue
3191 		 * isn't busy.
3192 		 *
3193 		 * If the hardware queue is busy, sending an aggregate frame
3194 		 * then just hold off so we can queue more aggregate frames.
3195 		 *
3196 		 * Otherwise we may end up with single frames leaking through
3197 		 * because we are dispatching them too quickly.
3198 		 *
3199 		 * TODO: maybe we should treat this as two policies - minimise
3200 		 * latency, or maximise throughput.  Then for BE/BK we can
3201 		 * maximise throughput, and VO/VI (if AMPDU is enabled!)
3202 		 * minimise latency.
3203 		 */
3204 
3205 		/*
3206 		 * Always queue the frame to the tail of the list.
3207 		 */
3208 		ATH_TID_INSERT_TAIL(atid, bf, bf_list);
3209 
3210 		/*
3211 		 * If the hardware queue isn't busy, direct dispatch
3212 		 * the head frame in the list.
3213 		 *
3214 		 * Note: if we're say, configured to do ADDBA but not A-MPDU
3215 		 * then maybe we want to still queue two non-aggregate frames
3216 		 * to the hardware.  Again with the per-TID policy
3217 		 * configuration..)
3218 		 *
3219 		 * Otherwise, schedule the TID.
3220 		 */
3221 		/* XXX TXQ locking */
3222 		if (txq->axq_depth + txq->fifo.axq_depth == 0) {
3223 
3224 			bf = ATH_TID_FIRST(atid);
3225 			ATH_TID_REMOVE(atid, bf, bf_list);
3226 
3227 			/*
3228 			 * Ensure it's definitely treated as a non-AMPDU
3229 			 * frame - this information may have been left
3230 			 * over from a previous attempt.
3231 			 */
3232 			bf->bf_state.bfs_aggr = 0;
3233 			bf->bf_state.bfs_nframes = 1;
3234 
3235 			/* Queue to the hardware */
3236 			ath_tx_xmit_aggr(sc, an, txq, bf);
3237 			DPRINTF(sc, ATH_DEBUG_SW_TX,
3238 			    "%s: xmit_aggr\n",
3239 			    __func__);
3240 		} else {
3241 			DPRINTF(sc, ATH_DEBUG_SW_TX,
3242 			    "%s: ampdu; swq'ing\n",
3243 			    __func__);
3244 
3245 			ath_tx_tid_sched(sc, atid);
3246 		}
3247 	/*
3248 	 * If we're not doing A-MPDU, be prepared to direct dispatch
3249 	 * up to both limits if possible.  This particular corner
3250 	 * case may end up with packet starvation between aggregate
3251 	 * traffic and non-aggregate traffic: we want to ensure
3252 	 * that non-aggregate stations get a few frames queued to the
3253 	 * hardware before the aggregate station(s) get their chance.
3254 	 *
3255 	 * So if you only ever see a couple of frames direct dispatched
3256 	 * to the hardware from a non-AMPDU client, check both here
3257 	 * and in the software queue dispatcher to ensure that those
3258 	 * non-AMPDU stations get a fair chance to transmit.
3259 	 */
3260 	/* XXX TXQ locking */
3261 	} else if ((txq->axq_depth + txq->fifo.axq_depth < sc->sc_hwq_limit_nonaggr) &&
3262 		    (txq->axq_aggr_depth < sc->sc_hwq_limit_aggr)) {
3263 		/* AMPDU not running, attempt direct dispatch */
3264 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: xmit_normal\n", __func__);
3265 		/* See if clrdmask needs to be set */
3266 		ath_tx_update_clrdmask(sc, atid, bf);
3267 
3268 		/*
3269 		 * Update the current leak count if
3270 		 * we're leaking frames; and set the
3271 		 * MORE flag as appropriate.
3272 		 */
3273 		ath_tx_leak_count_update(sc, atid, bf);
3274 
3275 		/*
3276 		 * Dispatch the frame.
3277 		 */
3278 		ath_tx_xmit_normal(sc, txq, bf);
3279 	} else {
3280 		/* Busy; queue */
3281 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: swq'ing\n", __func__);
3282 		ATH_TID_INSERT_TAIL(atid, bf, bf_list);
3283 		ath_tx_tid_sched(sc, atid);
3284 	}
3285 }
3286 
3287 /*
3288  * Only set the clrdmask bit if none of the nodes are currently
3289  * filtered.
3290  *
3291  * XXX TODO: go through all the callers and check to see
3292  * which are being called in the context of looping over all
3293  * TIDs (eg, if all tids are being paused, resumed, etc.)
3294  * That'll avoid O(n^2) complexity here.
3295  */
3296 static void
3297 ath_tx_set_clrdmask(struct ath_softc *sc, struct ath_node *an)
3298 {
3299 	int i;
3300 
3301 	ATH_TX_LOCK_ASSERT(sc);
3302 
3303 	for (i = 0; i < IEEE80211_TID_SIZE; i++) {
3304 		if (an->an_tid[i].isfiltered == 1)
3305 			return;
3306 	}
3307 	an->clrdmask = 1;
3308 }
3309 
3310 /*
3311  * Configure the per-TID node state.
3312  *
3313  * This likely belongs in if_ath_node.c but I can't think of anywhere
3314  * else to put it just yet.
3315  *
3316  * This sets up the SLISTs and the mutex as appropriate.
3317  */
3318 void
3319 ath_tx_tid_init(struct ath_softc *sc, struct ath_node *an)
3320 {
3321 	int i, j;
3322 	struct ath_tid *atid;
3323 
3324 	for (i = 0; i < IEEE80211_TID_SIZE; i++) {
3325 		atid = &an->an_tid[i];
3326 
3327 		/* XXX now with this bzer(), is the field 0'ing needed? */
3328 		bzero(atid, sizeof(*atid));
3329 
3330 		TAILQ_INIT(&atid->tid_q);
3331 		TAILQ_INIT(&atid->filtq.tid_q);
3332 		atid->tid = i;
3333 		atid->an = an;
3334 		for (j = 0; j < ATH_TID_MAX_BUFS; j++)
3335 			atid->tx_buf[j] = NULL;
3336 		atid->baw_head = atid->baw_tail = 0;
3337 		atid->paused = 0;
3338 		atid->sched = 0;
3339 		atid->hwq_depth = 0;
3340 		atid->cleanup_inprogress = 0;
3341 		if (i == IEEE80211_NONQOS_TID)
3342 			atid->ac = ATH_NONQOS_TID_AC;
3343 		else
3344 			atid->ac = TID_TO_WME_AC(i);
3345 	}
3346 	an->clrdmask = 1;	/* Always start by setting this bit */
3347 }
3348 
3349 /*
3350  * Pause the current TID. This stops packets from being transmitted
3351  * on it.
3352  *
3353  * Since this is also called from upper layers as well as the driver,
3354  * it will get the TID lock.
3355  */
3356 static void
3357 ath_tx_tid_pause(struct ath_softc *sc, struct ath_tid *tid)
3358 {
3359 
3360 	ATH_TX_LOCK_ASSERT(sc);
3361 	tid->paused++;
3362 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: [%6D]: tid=%d, paused = %d\n",
3363 	    __func__,
3364 	    tid->an->an_node.ni_macaddr, ":",
3365 	    tid->tid,
3366 	    tid->paused);
3367 }
3368 
3369 /*
3370  * Unpause the current TID, and schedule it if needed.
3371  */
3372 static void
3373 ath_tx_tid_resume(struct ath_softc *sc, struct ath_tid *tid)
3374 {
3375 	ATH_TX_LOCK_ASSERT(sc);
3376 
3377 	/*
3378 	 * There's some odd places where ath_tx_tid_resume() is called
3379 	 * when it shouldn't be; this works around that particular issue
3380 	 * until it's actually resolved.
3381 	 */
3382 	if (tid->paused == 0) {
3383 		device_printf(sc->sc_dev,
3384 		    "%s: [%6D]: tid=%d, paused=0?\n",
3385 		    __func__,
3386 		    tid->an->an_node.ni_macaddr, ":",
3387 		    tid->tid);
3388 	} else {
3389 		tid->paused--;
3390 	}
3391 
3392 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
3393 	    "%s: [%6D]: tid=%d, unpaused = %d\n",
3394 	    __func__,
3395 	    tid->an->an_node.ni_macaddr, ":",
3396 	    tid->tid,
3397 	    tid->paused);
3398 
3399 	if (tid->paused)
3400 		return;
3401 
3402 	/*
3403 	 * Override the clrdmask configuration for the next frame
3404 	 * from this TID, just to get the ball rolling.
3405 	 */
3406 	ath_tx_set_clrdmask(sc, tid->an);
3407 
3408 	if (tid->axq_depth == 0)
3409 		return;
3410 
3411 	/* XXX isfiltered shouldn't ever be 0 at this point */
3412 	if (tid->isfiltered == 1) {
3413 		DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: filtered?!\n",
3414 		    __func__);
3415 		return;
3416 	}
3417 
3418 	ath_tx_tid_sched(sc, tid);
3419 
3420 	/*
3421 	 * Queue the software TX scheduler.
3422 	 */
3423 	ath_tx_swq_kick(sc);
3424 }
3425 
3426 /*
3427  * Add the given ath_buf to the TID filtered frame list.
3428  * This requires the TID be filtered.
3429  */
3430 static void
3431 ath_tx_tid_filt_addbuf(struct ath_softc *sc, struct ath_tid *tid,
3432     struct ath_buf *bf)
3433 {
3434 
3435 	ATH_TX_LOCK_ASSERT(sc);
3436 
3437 	if (!tid->isfiltered)
3438 		DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: not filtered?!\n",
3439 		    __func__);
3440 
3441 	DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: bf=%p\n", __func__, bf);
3442 
3443 	/* Set the retry bit and bump the retry counter */
3444 	ath_tx_set_retry(sc, bf);
3445 	sc->sc_stats.ast_tx_swfiltered++;
3446 
3447 	ATH_TID_FILT_INSERT_TAIL(tid, bf, bf_list);
3448 }
3449 
3450 /*
3451  * Handle a completed filtered frame from the given TID.
3452  * This just enables/pauses the filtered frame state if required
3453  * and appends the filtered frame to the filtered queue.
3454  */
3455 static void
3456 ath_tx_tid_filt_comp_buf(struct ath_softc *sc, struct ath_tid *tid,
3457     struct ath_buf *bf)
3458 {
3459 
3460 	ATH_TX_LOCK_ASSERT(sc);
3461 
3462 	if (! tid->isfiltered) {
3463 		DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: tid=%d; filter transition\n",
3464 		    __func__, tid->tid);
3465 		tid->isfiltered = 1;
3466 		ath_tx_tid_pause(sc, tid);
3467 	}
3468 
3469 	/* Add the frame to the filter queue */
3470 	ath_tx_tid_filt_addbuf(sc, tid, bf);
3471 }
3472 
3473 /*
3474  * Complete the filtered frame TX completion.
3475  *
3476  * If there are no more frames in the hardware queue, unpause/unfilter
3477  * the TID if applicable.  Otherwise we will wait for a node PS transition
3478  * to unfilter.
3479  */
3480 static void
3481 ath_tx_tid_filt_comp_complete(struct ath_softc *sc, struct ath_tid *tid)
3482 {
3483 	struct ath_buf *bf;
3484 	int do_resume = 0;
3485 
3486 	ATH_TX_LOCK_ASSERT(sc);
3487 
3488 	if (tid->hwq_depth != 0)
3489 		return;
3490 
3491 	DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: tid=%d, hwq=0, transition back\n",
3492 	    __func__, tid->tid);
3493 	if (tid->isfiltered == 1) {
3494 		tid->isfiltered = 0;
3495 		do_resume = 1;
3496 	}
3497 
3498 	/* XXX ath_tx_tid_resume() also calls ath_tx_set_clrdmask()! */
3499 	ath_tx_set_clrdmask(sc, tid->an);
3500 
3501 	/* XXX this is really quite inefficient */
3502 	while ((bf = ATH_TID_FILT_LAST(tid, ath_bufhead_s)) != NULL) {
3503 		ATH_TID_FILT_REMOVE(tid, bf, bf_list);
3504 		ATH_TID_INSERT_HEAD(tid, bf, bf_list);
3505 	}
3506 
3507 	/* And only resume if we had paused before */
3508 	if (do_resume)
3509 		ath_tx_tid_resume(sc, tid);
3510 }
3511 
3512 /*
3513  * Called when a single (aggregate or otherwise) frame is completed.
3514  *
3515  * Returns 0 if the buffer could be added to the filtered list
3516  * (cloned or otherwise), 1 if the buffer couldn't be added to the
3517  * filtered list (failed clone; expired retry) and the caller should
3518  * free it and handle it like a failure (eg by sending a BAR.)
3519  *
3520  * since the buffer may be cloned, bf must be not touched after this
3521  * if the return value is 0.
3522  */
3523 static int
3524 ath_tx_tid_filt_comp_single(struct ath_softc *sc, struct ath_tid *tid,
3525     struct ath_buf *bf)
3526 {
3527 	struct ath_buf *nbf;
3528 	int retval;
3529 
3530 	ATH_TX_LOCK_ASSERT(sc);
3531 
3532 	/*
3533 	 * Don't allow a filtered frame to live forever.
3534 	 */
3535 	if (bf->bf_state.bfs_retries > SWMAX_RETRIES) {
3536 		sc->sc_stats.ast_tx_swretrymax++;
3537 		DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3538 		    "%s: bf=%p, seqno=%d, exceeded retries\n",
3539 		    __func__,
3540 		    bf,
3541 		    SEQNO(bf->bf_state.bfs_seqno));
3542 		retval = 1; /* error */
3543 		goto finish;
3544 	}
3545 
3546 	/*
3547 	 * A busy buffer can't be added to the retry list.
3548 	 * It needs to be cloned.
3549 	 */
3550 	if (bf->bf_flags & ATH_BUF_BUSY) {
3551 		nbf = ath_tx_retry_clone(sc, tid->an, tid, bf);
3552 		DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3553 		    "%s: busy buffer clone: %p -> %p\n",
3554 		    __func__, bf, nbf);
3555 	} else {
3556 		nbf = bf;
3557 	}
3558 
3559 	if (nbf == NULL) {
3560 		DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3561 		    "%s: busy buffer couldn't be cloned (%p)!\n",
3562 		    __func__, bf);
3563 		retval = 1; /* error */
3564 	} else {
3565 		ath_tx_tid_filt_comp_buf(sc, tid, nbf);
3566 		retval = 0; /* ok */
3567 	}
3568 finish:
3569 	ath_tx_tid_filt_comp_complete(sc, tid);
3570 
3571 	return (retval);
3572 }
3573 
3574 static void
3575 ath_tx_tid_filt_comp_aggr(struct ath_softc *sc, struct ath_tid *tid,
3576     struct ath_buf *bf_first, ath_bufhead *bf_q)
3577 {
3578 	struct ath_buf *bf, *bf_next, *nbf;
3579 
3580 	ATH_TX_LOCK_ASSERT(sc);
3581 
3582 	bf = bf_first;
3583 	while (bf) {
3584 		bf_next = bf->bf_next;
3585 		bf->bf_next = NULL;	/* Remove it from the aggr list */
3586 
3587 		/*
3588 		 * Don't allow a filtered frame to live forever.
3589 		 */
3590 		if (bf->bf_state.bfs_retries > SWMAX_RETRIES) {
3591 			sc->sc_stats.ast_tx_swretrymax++;
3592 			DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3593 			    "%s: tid=%d, bf=%p, seqno=%d, exceeded retries\n",
3594 			    __func__,
3595 			    tid->tid,
3596 			    bf,
3597 			    SEQNO(bf->bf_state.bfs_seqno));
3598 			TAILQ_INSERT_TAIL(bf_q, bf, bf_list);
3599 			goto next;
3600 		}
3601 
3602 		if (bf->bf_flags & ATH_BUF_BUSY) {
3603 			nbf = ath_tx_retry_clone(sc, tid->an, tid, bf);
3604 			DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3605 			    "%s: tid=%d, busy buffer cloned: %p -> %p, seqno=%d\n",
3606 			    __func__, tid->tid, bf, nbf, SEQNO(bf->bf_state.bfs_seqno));
3607 		} else {
3608 			nbf = bf;
3609 		}
3610 
3611 		/*
3612 		 * If the buffer couldn't be cloned, add it to bf_q;
3613 		 * the caller will free the buffer(s) as required.
3614 		 */
3615 		if (nbf == NULL) {
3616 			DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3617 			    "%s: tid=%d, buffer couldn't be cloned! (%p) seqno=%d\n",
3618 			    __func__, tid->tid, bf, SEQNO(bf->bf_state.bfs_seqno));
3619 			TAILQ_INSERT_TAIL(bf_q, bf, bf_list);
3620 		} else {
3621 			ath_tx_tid_filt_comp_buf(sc, tid, nbf);
3622 		}
3623 next:
3624 		bf = bf_next;
3625 	}
3626 
3627 	ath_tx_tid_filt_comp_complete(sc, tid);
3628 }
3629 
3630 /*
3631  * Suspend the queue because we need to TX a BAR.
3632  */
3633 static void
3634 ath_tx_tid_bar_suspend(struct ath_softc *sc, struct ath_tid *tid)
3635 {
3636 
3637 	ATH_TX_LOCK_ASSERT(sc);
3638 
3639 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3640 	    "%s: tid=%d, bar_wait=%d, bar_tx=%d, called\n",
3641 	    __func__,
3642 	    tid->tid,
3643 	    tid->bar_wait,
3644 	    tid->bar_tx);
3645 
3646 	/* We shouldn't be called when bar_tx is 1 */
3647 	if (tid->bar_tx) {
3648 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3649 		    "%s: bar_tx is 1?!\n", __func__);
3650 	}
3651 
3652 	/* If we've already been called, just be patient. */
3653 	if (tid->bar_wait)
3654 		return;
3655 
3656 	/* Wait! */
3657 	tid->bar_wait = 1;
3658 
3659 	/* Only one pause, no matter how many frames fail */
3660 	ath_tx_tid_pause(sc, tid);
3661 }
3662 
3663 /*
3664  * We've finished with BAR handling - either we succeeded or
3665  * failed. Either way, unsuspend TX.
3666  */
3667 static void
3668 ath_tx_tid_bar_unsuspend(struct ath_softc *sc, struct ath_tid *tid)
3669 {
3670 
3671 	ATH_TX_LOCK_ASSERT(sc);
3672 
3673 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3674 	    "%s: %6D: TID=%d, called\n",
3675 	    __func__,
3676 	    tid->an->an_node.ni_macaddr,
3677 	    ":",
3678 	    tid->tid);
3679 
3680 	if (tid->bar_tx == 0 || tid->bar_wait == 0) {
3681 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3682 		    "%s: %6D: TID=%d, bar_tx=%d, bar_wait=%d: ?\n",
3683 		    __func__, tid->an->an_node.ni_macaddr, ":",
3684 		    tid->tid, tid->bar_tx, tid->bar_wait);
3685 	}
3686 
3687 	tid->bar_tx = tid->bar_wait = 0;
3688 	ath_tx_tid_resume(sc, tid);
3689 }
3690 
3691 /*
3692  * Return whether we're ready to TX a BAR frame.
3693  *
3694  * Requires the TID lock be held.
3695  */
3696 static int
3697 ath_tx_tid_bar_tx_ready(struct ath_softc *sc, struct ath_tid *tid)
3698 {
3699 
3700 	ATH_TX_LOCK_ASSERT(sc);
3701 
3702 	if (tid->bar_wait == 0 || tid->hwq_depth > 0)
3703 		return (0);
3704 
3705 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3706 	    "%s: %6D: TID=%d, bar ready\n",
3707 	    __func__,
3708 	    tid->an->an_node.ni_macaddr,
3709 	    ":",
3710 	    tid->tid);
3711 
3712 	return (1);
3713 }
3714 
3715 /*
3716  * Check whether the current TID is ready to have a BAR
3717  * TXed and if so, do the TX.
3718  *
3719  * Since the TID/TXQ lock can't be held during a call to
3720  * ieee80211_send_bar(), we have to do the dirty thing of unlocking it,
3721  * sending the BAR and locking it again.
3722  *
3723  * Eventually, the code to send the BAR should be broken out
3724  * from this routine so the lock doesn't have to be reacquired
3725  * just to be immediately dropped by the caller.
3726  */
3727 static void
3728 ath_tx_tid_bar_tx(struct ath_softc *sc, struct ath_tid *tid)
3729 {
3730 	struct ieee80211_tx_ampdu *tap;
3731 
3732 	ATH_TX_LOCK_ASSERT(sc);
3733 
3734 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3735 	    "%s: %6D: TID=%d, called\n",
3736 	    __func__,
3737 	    tid->an->an_node.ni_macaddr,
3738 	    ":",
3739 	    tid->tid);
3740 
3741 	tap = ath_tx_get_tx_tid(tid->an, tid->tid);
3742 
3743 	/*
3744 	 * This is an error condition!
3745 	 */
3746 	if (tid->bar_wait == 0 || tid->bar_tx == 1) {
3747 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3748 		    "%s: %6D: TID=%d, bar_tx=%d, bar_wait=%d: ?\n",
3749 		    __func__, tid->an->an_node.ni_macaddr, ":",
3750 		    tid->tid, tid->bar_tx, tid->bar_wait);
3751 		return;
3752 	}
3753 
3754 	/* Don't do anything if we still have pending frames */
3755 	if (tid->hwq_depth > 0) {
3756 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3757 		    "%s: %6D: TID=%d, hwq_depth=%d, waiting\n",
3758 		    __func__,
3759 		    tid->an->an_node.ni_macaddr,
3760 		    ":",
3761 		    tid->tid,
3762 		    tid->hwq_depth);
3763 		return;
3764 	}
3765 
3766 	/* We're now about to TX */
3767 	tid->bar_tx = 1;
3768 
3769 	/*
3770 	 * Override the clrdmask configuration for the next frame,
3771 	 * just to get the ball rolling.
3772 	 */
3773 	ath_tx_set_clrdmask(sc, tid->an);
3774 
3775 	/*
3776 	 * Calculate new BAW left edge, now that all frames have either
3777 	 * succeeded or failed.
3778 	 *
3779 	 * XXX verify this is _actually_ the valid value to begin at!
3780 	 */
3781 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3782 	    "%s: %6D: TID=%d, new BAW left edge=%d\n",
3783 	    __func__,
3784 	    tid->an->an_node.ni_macaddr,
3785 	    ":",
3786 	    tid->tid,
3787 	    tap->txa_start);
3788 
3789 	/* Try sending the BAR frame */
3790 	/* We can't hold the lock here! */
3791 
3792 	ATH_TX_UNLOCK(sc);
3793 	if (ieee80211_send_bar(&tid->an->an_node, tap, tap->txa_start) == 0) {
3794 		/* Success? Now we wait for notification that it's done */
3795 		ATH_TX_LOCK(sc);
3796 		return;
3797 	}
3798 
3799 	/* Failure? For now, warn loudly and continue */
3800 	ATH_TX_LOCK(sc);
3801 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3802 	    "%s: %6D: TID=%d, failed to TX BAR, continue!\n",
3803 	    __func__, tid->an->an_node.ni_macaddr, ":",
3804 	    tid->tid);
3805 	ath_tx_tid_bar_unsuspend(sc, tid);
3806 }
3807 
3808 static void
3809 ath_tx_tid_drain_pkt(struct ath_softc *sc, struct ath_node *an,
3810     struct ath_tid *tid, ath_bufhead *bf_cq, struct ath_buf *bf)
3811 {
3812 
3813 	ATH_TX_LOCK_ASSERT(sc);
3814 
3815 	/*
3816 	 * If the current TID is running AMPDU, update
3817 	 * the BAW.
3818 	 */
3819 	if (ath_tx_ampdu_running(sc, an, tid->tid) &&
3820 	    bf->bf_state.bfs_dobaw) {
3821 		/*
3822 		 * Only remove the frame from the BAW if it's
3823 		 * been transmitted at least once; this means
3824 		 * the frame was in the BAW to begin with.
3825 		 */
3826 		if (bf->bf_state.bfs_retries > 0) {
3827 			ath_tx_update_baw(sc, an, tid, bf);
3828 			bf->bf_state.bfs_dobaw = 0;
3829 		}
3830 #if 0
3831 		/*
3832 		 * This has become a non-fatal error now
3833 		 */
3834 		if (! bf->bf_state.bfs_addedbaw)
3835 			DPRINTF(sc, ATH_DEBUG_SW_TX_BAW
3836 			    "%s: wasn't added: seqno %d\n",
3837 			    __func__, SEQNO(bf->bf_state.bfs_seqno));
3838 #endif
3839 	}
3840 
3841 	/* Strip it out of an aggregate list if it was in one */
3842 	bf->bf_next = NULL;
3843 
3844 	/* Insert on the free queue to be freed by the caller */
3845 	TAILQ_INSERT_TAIL(bf_cq, bf, bf_list);
3846 }
3847 
3848 static void
3849 ath_tx_tid_drain_print(struct ath_softc *sc, struct ath_node *an,
3850     const char *pfx, struct ath_tid *tid, struct ath_buf *bf)
3851 {
3852 	struct ieee80211_node *ni = &an->an_node;
3853 	struct ath_txq *txq;
3854 	struct ieee80211_tx_ampdu *tap;
3855 
3856 	txq = sc->sc_ac2q[tid->ac];
3857 	tap = ath_tx_get_tx_tid(an, tid->tid);
3858 
3859 	DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET,
3860 	    "%s: %s: %6D: bf=%p: addbaw=%d, dobaw=%d, "
3861 	    "seqno=%d, retry=%d\n",
3862 	    __func__,
3863 	    pfx,
3864 	    ni->ni_macaddr,
3865 	    ":",
3866 	    bf,
3867 	    bf->bf_state.bfs_addedbaw,
3868 	    bf->bf_state.bfs_dobaw,
3869 	    SEQNO(bf->bf_state.bfs_seqno),
3870 	    bf->bf_state.bfs_retries);
3871 	DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET,
3872 	    "%s: %s: %6D: bf=%p: txq[%d] axq_depth=%d, axq_aggr_depth=%d\n",
3873 	    __func__,
3874 	    pfx,
3875 	    ni->ni_macaddr,
3876 	    ":",
3877 	    bf,
3878 	    txq->axq_qnum,
3879 	    txq->axq_depth,
3880 	    txq->axq_aggr_depth);
3881 	DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET,
3882 	    "%s: %s: %6D: bf=%p: tid txq_depth=%d hwq_depth=%d, bar_wait=%d, "
3883 	      "isfiltered=%d\n",
3884 	    __func__,
3885 	    pfx,
3886 	    ni->ni_macaddr,
3887 	    ":",
3888 	    bf,
3889 	    tid->axq_depth,
3890 	    tid->hwq_depth,
3891 	    tid->bar_wait,
3892 	    tid->isfiltered);
3893 	DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET,
3894 	    "%s: %s: %6D: tid %d: "
3895 	    "sched=%d, paused=%d, "
3896 	    "incomp=%d, baw_head=%d, "
3897 	    "baw_tail=%d txa_start=%d, ni_txseqs=%d\n",
3898 	     __func__,
3899 	     pfx,
3900 	     ni->ni_macaddr,
3901 	     ":",
3902 	     tid->tid,
3903 	     tid->sched, tid->paused,
3904 	     tid->incomp, tid->baw_head,
3905 	     tid->baw_tail, tap == NULL ? -1 : tap->txa_start,
3906 	     ni->ni_txseqs[tid->tid]);
3907 
3908 	/* XXX Dump the frame, see what it is? */
3909 	if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT))
3910 		ieee80211_dump_pkt(ni->ni_ic,
3911 		    mtod(bf->bf_m, const uint8_t *),
3912 		    bf->bf_m->m_len, 0, -1);
3913 }
3914 
3915 /*
3916  * Free any packets currently pending in the software TX queue.
3917  *
3918  * This will be called when a node is being deleted.
3919  *
3920  * It can also be called on an active node during an interface
3921  * reset or state transition.
3922  *
3923  * (From Linux/reference):
3924  *
3925  * TODO: For frame(s) that are in the retry state, we will reuse the
3926  * sequence number(s) without setting the retry bit. The
3927  * alternative is to give up on these and BAR the receiver's window
3928  * forward.
3929  */
3930 static void
3931 ath_tx_tid_drain(struct ath_softc *sc, struct ath_node *an,
3932     struct ath_tid *tid, ath_bufhead *bf_cq)
3933 {
3934 	struct ath_buf *bf;
3935 	struct ieee80211_tx_ampdu *tap;
3936 	struct ieee80211_node *ni = &an->an_node;
3937 	int t;
3938 
3939 	tap = ath_tx_get_tx_tid(an, tid->tid);
3940 
3941 	ATH_TX_LOCK_ASSERT(sc);
3942 
3943 	/* Walk the queue, free frames */
3944 	t = 0;
3945 	for (;;) {
3946 		bf = ATH_TID_FIRST(tid);
3947 		if (bf == NULL) {
3948 			break;
3949 		}
3950 
3951 		if (t == 0) {
3952 			ath_tx_tid_drain_print(sc, an, "norm", tid, bf);
3953 //			t = 1;
3954 		}
3955 
3956 		ATH_TID_REMOVE(tid, bf, bf_list);
3957 		ath_tx_tid_drain_pkt(sc, an, tid, bf_cq, bf);
3958 	}
3959 
3960 	/* And now, drain the filtered frame queue */
3961 	t = 0;
3962 	for (;;) {
3963 		bf = ATH_TID_FILT_FIRST(tid);
3964 		if (bf == NULL)
3965 			break;
3966 
3967 		if (t == 0) {
3968 			ath_tx_tid_drain_print(sc, an, "filt", tid, bf);
3969 //			t = 1;
3970 		}
3971 
3972 		ATH_TID_FILT_REMOVE(tid, bf, bf_list);
3973 		ath_tx_tid_drain_pkt(sc, an, tid, bf_cq, bf);
3974 	}
3975 
3976 	/*
3977 	 * Override the clrdmask configuration for the next frame
3978 	 * in case there is some future transmission, just to get
3979 	 * the ball rolling.
3980 	 *
3981 	 * This won't hurt things if the TID is about to be freed.
3982 	 */
3983 	ath_tx_set_clrdmask(sc, tid->an);
3984 
3985 	/*
3986 	 * Now that it's completed, grab the TID lock and update
3987 	 * the sequence number and BAW window.
3988 	 * Because sequence numbers have been assigned to frames
3989 	 * that haven't been sent yet, it's entirely possible
3990 	 * we'll be called with some pending frames that have not
3991 	 * been transmitted.
3992 	 *
3993 	 * The cleaner solution is to do the sequence number allocation
3994 	 * when the packet is first transmitted - and thus the "retries"
3995 	 * check above would be enough to update the BAW/seqno.
3996 	 */
3997 
3998 	/* But don't do it for non-QoS TIDs */
3999 	if (tap) {
4000 #if 1
4001 		DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
4002 		    "%s: %6D: node %p: TID %d: sliding BAW left edge to %d\n",
4003 		    __func__,
4004 		    ni->ni_macaddr,
4005 		    ":",
4006 		    an,
4007 		    tid->tid,
4008 		    tap->txa_start);
4009 #endif
4010 		ni->ni_txseqs[tid->tid] = tap->txa_start;
4011 		tid->baw_tail = tid->baw_head;
4012 	}
4013 }
4014 
4015 /*
4016  * Reset the TID state.  This must be only called once the node has
4017  * had its frames flushed from this TID, to ensure that no other
4018  * pause / unpause logic can kick in.
4019  */
4020 static void
4021 ath_tx_tid_reset(struct ath_softc *sc, struct ath_tid *tid)
4022 {
4023 
4024 #if 0
4025 	tid->bar_wait = tid->bar_tx = tid->isfiltered = 0;
4026 	tid->paused = tid->sched = tid->addba_tx_pending = 0;
4027 	tid->incomp = tid->cleanup_inprogress = 0;
4028 #endif
4029 
4030 	/*
4031 	 * If we have a bar_wait set, we need to unpause the TID
4032 	 * here.  Otherwise once cleanup has finished, the TID won't
4033 	 * have the right paused counter.
4034 	 *
4035 	 * XXX I'm not going through resume here - I don't want the
4036 	 * node to be rescheuled just yet.  This however should be
4037 	 * methodized!
4038 	 */
4039 	if (tid->bar_wait) {
4040 		if (tid->paused > 0) {
4041 			tid->paused --;
4042 		}
4043 	}
4044 
4045 	/*
4046 	 * XXX same with a currently filtered TID.
4047 	 *
4048 	 * Since this is being called during a flush, we assume that
4049 	 * the filtered frame list is actually empty.
4050 	 *
4051 	 * XXX TODO: add in a check to ensure that the filtered queue
4052 	 * depth is actually 0!
4053 	 */
4054 	if (tid->isfiltered) {
4055 		if (tid->paused > 0) {
4056 			tid->paused --;
4057 		}
4058 	}
4059 
4060 	/*
4061 	 * Clear BAR, filtered frames, scheduled and ADDBA pending.
4062 	 * The TID may be going through cleanup from the last association
4063 	 * where things in the BAW are still in the hardware queue.
4064 	 */
4065 	tid->bar_wait = 0;
4066 	tid->bar_tx = 0;
4067 	tid->isfiltered = 0;
4068 	tid->sched = 0;
4069 	tid->addba_tx_pending = 0;
4070 
4071 	/*
4072 	 * XXX TODO: it may just be enough to walk the HWQs and mark
4073 	 * frames for that node as non-aggregate; or mark the ath_node
4074 	 * with something that indicates that aggregation is no longer
4075 	 * occurring.  Then we can just toss the BAW complaints and
4076 	 * do a complete hard reset of state here - no pause, no
4077 	 * complete counter, etc.
4078 	 */
4079 
4080 }
4081 
4082 /*
4083  * Flush all software queued packets for the given node.
4084  *
4085  * This occurs when a completion handler frees the last buffer
4086  * for a node, and the node is thus freed. This causes the node
4087  * to be cleaned up, which ends up calling ath_tx_node_flush.
4088  */
4089 void
4090 ath_tx_node_flush(struct ath_softc *sc, struct ath_node *an)
4091 {
4092 	int tid;
4093 	ath_bufhead bf_cq;
4094 	struct ath_buf *bf;
4095 
4096 	TAILQ_INIT(&bf_cq);
4097 
4098 	ATH_KTR(sc, ATH_KTR_NODE, 1, "ath_tx_node_flush: flush node; ni=%p",
4099 	    &an->an_node);
4100 
4101 	ATH_TX_LOCK(sc);
4102 	DPRINTF(sc, ATH_DEBUG_NODE,
4103 	    "%s: %6D: flush; is_powersave=%d, stack_psq=%d, tim=%d, "
4104 	    "swq_depth=%d, clrdmask=%d, leak_count=%d\n",
4105 	    __func__,
4106 	    an->an_node.ni_macaddr,
4107 	    ":",
4108 	    an->an_is_powersave,
4109 	    an->an_stack_psq,
4110 	    an->an_tim_set,
4111 	    an->an_swq_depth,
4112 	    an->clrdmask,
4113 	    an->an_leak_count);
4114 
4115 	for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) {
4116 		struct ath_tid *atid = &an->an_tid[tid];
4117 
4118 		/* Free packets */
4119 		ath_tx_tid_drain(sc, an, atid, &bf_cq);
4120 
4121 		/* Remove this tid from the list of active tids */
4122 		ath_tx_tid_unsched(sc, atid);
4123 
4124 		/* Reset the per-TID pause, BAR, etc state */
4125 		ath_tx_tid_reset(sc, atid);
4126 	}
4127 
4128 	/*
4129 	 * Clear global leak count
4130 	 */
4131 	an->an_leak_count = 0;
4132 	ATH_TX_UNLOCK(sc);
4133 
4134 	/* Handle completed frames */
4135 	while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
4136 		TAILQ_REMOVE(&bf_cq, bf, bf_list);
4137 		ath_tx_default_comp(sc, bf, 0);
4138 	}
4139 }
4140 
4141 /*
4142  * Drain all the software TXQs currently with traffic queued.
4143  */
4144 void
4145 ath_tx_txq_drain(struct ath_softc *sc, struct ath_txq *txq)
4146 {
4147 	struct ath_tid *tid;
4148 	ath_bufhead bf_cq;
4149 	struct ath_buf *bf;
4150 
4151 	TAILQ_INIT(&bf_cq);
4152 	ATH_TX_LOCK(sc);
4153 
4154 	/*
4155 	 * Iterate over all active tids for the given txq,
4156 	 * flushing and unsched'ing them
4157 	 */
4158 	while (! TAILQ_EMPTY(&txq->axq_tidq)) {
4159 		tid = TAILQ_FIRST(&txq->axq_tidq);
4160 		ath_tx_tid_drain(sc, tid->an, tid, &bf_cq);
4161 		ath_tx_tid_unsched(sc, tid);
4162 	}
4163 
4164 	ATH_TX_UNLOCK(sc);
4165 
4166 	while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
4167 		TAILQ_REMOVE(&bf_cq, bf, bf_list);
4168 		ath_tx_default_comp(sc, bf, 0);
4169 	}
4170 }
4171 
4172 /*
4173  * Handle completion of non-aggregate session frames.
4174  *
4175  * This (currently) doesn't implement software retransmission of
4176  * non-aggregate frames!
4177  *
4178  * Software retransmission of non-aggregate frames needs to obey
4179  * the strict sequence number ordering, and drop any frames that
4180  * will fail this.
4181  *
4182  * For now, filtered frames and frame transmission will cause
4183  * all kinds of issues.  So we don't support them.
4184  *
4185  * So anyone queuing frames via ath_tx_normal_xmit() or
4186  * ath_tx_hw_queue_norm() must override and set CLRDMASK.
4187  */
4188 void
4189 ath_tx_normal_comp(struct ath_softc *sc, struct ath_buf *bf, int fail)
4190 {
4191 	struct ieee80211_node *ni = bf->bf_node;
4192 	struct ath_node *an = ATH_NODE(ni);
4193 	int tid = bf->bf_state.bfs_tid;
4194 	struct ath_tid *atid = &an->an_tid[tid];
4195 	struct ath_tx_status *ts = &bf->bf_status.ds_txstat;
4196 
4197 	/* The TID state is protected behind the TXQ lock */
4198 	ATH_TX_LOCK(sc);
4199 
4200 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bf=%p: fail=%d, hwq_depth now %d\n",
4201 	    __func__, bf, fail, atid->hwq_depth - 1);
4202 
4203 	atid->hwq_depth--;
4204 
4205 #if 0
4206 	/*
4207 	 * If the frame was filtered, stick it on the filter frame
4208 	 * queue and complain about it.  It shouldn't happen!
4209 	 */
4210 	if ((ts->ts_status & HAL_TXERR_FILT) ||
4211 	    (ts->ts_status != 0 && atid->isfiltered)) {
4212 		DPRINTF(sc, ATH_DEBUG_SW_TX,
4213 		    "%s: isfiltered=%d, ts_status=%d: huh?\n",
4214 		    __func__,
4215 		    atid->isfiltered,
4216 		    ts->ts_status);
4217 		ath_tx_tid_filt_comp_buf(sc, atid, bf);
4218 	}
4219 #endif
4220 	if (atid->isfiltered)
4221 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: filtered?!\n", __func__);
4222 	if (atid->hwq_depth < 0)
4223 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: hwq_depth < 0: %d\n",
4224 		    __func__, atid->hwq_depth);
4225 
4226 	/* If the TID is being cleaned up, track things */
4227 	/* XXX refactor! */
4228 	if (atid->cleanup_inprogress) {
4229 		atid->incomp--;
4230 		if (atid->incomp == 0) {
4231 			DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
4232 			    "%s: TID %d: cleaned up! resume!\n",
4233 			    __func__, tid);
4234 			atid->cleanup_inprogress = 0;
4235 			ath_tx_tid_resume(sc, atid);
4236 		}
4237 	}
4238 
4239 	/*
4240 	 * If the queue is filtered, potentially mark it as complete
4241 	 * and reschedule it as needed.
4242 	 *
4243 	 * This is required as there may be a subsequent TX descriptor
4244 	 * for this end-node that has CLRDMASK set, so it's quite possible
4245 	 * that a filtered frame will be followed by a non-filtered
4246 	 * (complete or otherwise) frame.
4247 	 *
4248 	 * XXX should we do this before we complete the frame?
4249 	 */
4250 	if (atid->isfiltered)
4251 		ath_tx_tid_filt_comp_complete(sc, atid);
4252 	ATH_TX_UNLOCK(sc);
4253 
4254 	/*
4255 	 * punt to rate control if we're not being cleaned up
4256 	 * during a hw queue drain and the frame wanted an ACK.
4257 	 */
4258 	if (fail == 0 && ((bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) == 0))
4259 		ath_tx_update_ratectrl(sc, ni, bf->bf_state.bfs_rc,
4260 		    ts, bf->bf_state.bfs_pktlen,
4261 		    1, (ts->ts_status == 0) ? 0 : 1);
4262 
4263 	ath_tx_default_comp(sc, bf, fail);
4264 }
4265 
4266 /*
4267  * Handle cleanup of aggregate session packets that aren't
4268  * an A-MPDU.
4269  *
4270  * There's no need to update the BAW here - the session is being
4271  * torn down.
4272  */
4273 static void
4274 ath_tx_comp_cleanup_unaggr(struct ath_softc *sc, struct ath_buf *bf)
4275 {
4276 	struct ieee80211_node *ni = bf->bf_node;
4277 	struct ath_node *an = ATH_NODE(ni);
4278 	int tid = bf->bf_state.bfs_tid;
4279 	struct ath_tid *atid = &an->an_tid[tid];
4280 
4281 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: TID %d: incomp=%d\n",
4282 	    __func__, tid, atid->incomp);
4283 
4284 	ATH_TX_LOCK(sc);
4285 	atid->incomp--;
4286 
4287 	/* XXX refactor! */
4288 	if (bf->bf_state.bfs_dobaw) {
4289 		ath_tx_update_baw(sc, an, atid, bf);
4290 		if (!bf->bf_state.bfs_addedbaw)
4291 			DPRINTF(sc, ATH_DEBUG_SW_TX,
4292 			    "%s: wasn't added: seqno %d\n",
4293 			    __func__, SEQNO(bf->bf_state.bfs_seqno));
4294 	}
4295 
4296 	if (atid->incomp == 0) {
4297 		DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
4298 		    "%s: TID %d: cleaned up! resume!\n",
4299 		    __func__, tid);
4300 		atid->cleanup_inprogress = 0;
4301 		ath_tx_tid_resume(sc, atid);
4302 	}
4303 	ATH_TX_UNLOCK(sc);
4304 
4305 	ath_tx_default_comp(sc, bf, 0);
4306 }
4307 
4308 
4309 /*
4310  * This as it currently stands is a bit dumb.  Ideally we'd just
4311  * fail the frame the normal way and have it permanently fail
4312  * via the normal aggregate completion path.
4313  */
4314 static void
4315 ath_tx_tid_cleanup_frame(struct ath_softc *sc, struct ath_node *an,
4316     int tid, struct ath_buf *bf_head, ath_bufhead *bf_cq)
4317 {
4318 	struct ath_tid *atid = &an->an_tid[tid];
4319 	struct ath_buf *bf, *bf_next;
4320 
4321 	ATH_TX_LOCK_ASSERT(sc);
4322 
4323 	/*
4324 	 * Remove this frame from the queue.
4325 	 */
4326 	ATH_TID_REMOVE(atid, bf_head, bf_list);
4327 
4328 	/*
4329 	 * Loop over all the frames in the aggregate.
4330 	 */
4331 	bf = bf_head;
4332 	while (bf != NULL) {
4333 		bf_next = bf->bf_next;	/* next aggregate frame, or NULL */
4334 
4335 		/*
4336 		 * If it's been added to the BAW we need to kick
4337 		 * it out of the BAW before we continue.
4338 		 *
4339 		 * XXX if it's an aggregate, assert that it's in the
4340 		 * BAW - we shouldn't have it be in an aggregate
4341 		 * otherwise!
4342 		 */
4343 		if (bf->bf_state.bfs_addedbaw) {
4344 			ath_tx_update_baw(sc, an, atid, bf);
4345 			bf->bf_state.bfs_dobaw = 0;
4346 		}
4347 
4348 		/*
4349 		 * Give it the default completion handler.
4350 		 */
4351 		bf->bf_comp = ath_tx_normal_comp;
4352 		bf->bf_next = NULL;
4353 
4354 		/*
4355 		 * Add it to the list to free.
4356 		 */
4357 		TAILQ_INSERT_TAIL(bf_cq, bf, bf_list);
4358 
4359 		/*
4360 		 * Now advance to the next frame in the aggregate.
4361 		 */
4362 		bf = bf_next;
4363 	}
4364 }
4365 
4366 /*
4367  * Performs transmit side cleanup when TID changes from aggregated to
4368  * unaggregated and during reassociation.
4369  *
4370  * For now, this just tosses everything from the TID software queue
4371  * whether or not it has been retried and marks the TID as
4372  * pending completion if there's anything for this TID queued to
4373  * the hardware.
4374  *
4375  * The caller is responsible for pausing the TID and unpausing the
4376  * TID if no cleanup was required. Otherwise the cleanup path will
4377  * unpause the TID once the last hardware queued frame is completed.
4378  */
4379 static void
4380 ath_tx_tid_cleanup(struct ath_softc *sc, struct ath_node *an, int tid,
4381     ath_bufhead *bf_cq)
4382 {
4383 	struct ath_tid *atid = &an->an_tid[tid];
4384 	struct ath_buf *bf, *bf_next;
4385 
4386 	ATH_TX_LOCK_ASSERT(sc);
4387 
4388 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
4389 	    "%s: TID %d: called; inprogress=%d\n", __func__, tid,
4390 	    atid->cleanup_inprogress);
4391 
4392 	/*
4393 	 * Move the filtered frames to the TX queue, before
4394 	 * we run off and discard/process things.
4395 	 */
4396 
4397 	/* XXX this is really quite inefficient */
4398 	while ((bf = ATH_TID_FILT_LAST(atid, ath_bufhead_s)) != NULL) {
4399 		ATH_TID_FILT_REMOVE(atid, bf, bf_list);
4400 		ATH_TID_INSERT_HEAD(atid, bf, bf_list);
4401 	}
4402 
4403 	/*
4404 	 * Update the frames in the software TX queue:
4405 	 *
4406 	 * + Discard retry frames in the queue
4407 	 * + Fix the completion function to be non-aggregate
4408 	 */
4409 	bf = ATH_TID_FIRST(atid);
4410 	while (bf) {
4411 		/*
4412 		 * Grab the next frame in the list, we may
4413 		 * be fiddling with the list.
4414 		 */
4415 		bf_next = TAILQ_NEXT(bf, bf_list);
4416 
4417 		/*
4418 		 * Free the frame and all subframes.
4419 		 */
4420 		ath_tx_tid_cleanup_frame(sc, an, tid, bf, bf_cq);
4421 
4422 		/*
4423 		 * Next frame!
4424 		 */
4425 		bf = bf_next;
4426 	}
4427 
4428 	/*
4429 	 * If there's anything in the hardware queue we wait
4430 	 * for the TID HWQ to empty.
4431 	 */
4432 	if (atid->hwq_depth > 0) {
4433 		/*
4434 		 * XXX how about we kill atid->incomp, and instead
4435 		 * replace it with a macro that checks that atid->hwq_depth
4436 		 * is 0?
4437 		 */
4438 		atid->incomp = atid->hwq_depth;
4439 		atid->cleanup_inprogress = 1;
4440 	}
4441 
4442 	if (atid->cleanup_inprogress)
4443 		DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
4444 		    "%s: TID %d: cleanup needed: %d packets\n",
4445 		    __func__, tid, atid->incomp);
4446 
4447 	/* Owner now must free completed frames */
4448 }
4449 
4450 static struct ath_buf *
4451 ath_tx_retry_clone(struct ath_softc *sc, struct ath_node *an,
4452     struct ath_tid *tid, struct ath_buf *bf)
4453 {
4454 	struct ath_buf *nbf;
4455 	int error;
4456 
4457 	/*
4458 	 * Clone the buffer.  This will handle the dma unmap and
4459 	 * copy the node reference to the new buffer.  If this
4460 	 * works out, 'bf' will have no DMA mapping, no mbuf
4461 	 * pointer and no node reference.
4462 	 */
4463 	nbf = ath_buf_clone(sc, bf);
4464 
4465 #if 0
4466 	DPRINTF(sc, ATH_DEBUG_XMIT, "%s: ATH_BUF_BUSY; cloning\n",
4467 	    __func__);
4468 #endif
4469 
4470 	if (nbf == NULL) {
4471 		/* Failed to clone */
4472 		DPRINTF(sc, ATH_DEBUG_XMIT,
4473 		    "%s: failed to clone a busy buffer\n",
4474 		    __func__);
4475 		return NULL;
4476 	}
4477 
4478 	/* Setup the dma for the new buffer */
4479 	error = ath_tx_dmasetup(sc, nbf, nbf->bf_m);
4480 	if (error != 0) {
4481 		DPRINTF(sc, ATH_DEBUG_XMIT,
4482 		    "%s: failed to setup dma for clone\n",
4483 		    __func__);
4484 		/*
4485 		 * Put this at the head of the list, not tail;
4486 		 * that way it doesn't interfere with the
4487 		 * busy buffer logic (which uses the tail of
4488 		 * the list.)
4489 		 */
4490 		ATH_TXBUF_LOCK(sc);
4491 		ath_returnbuf_head(sc, nbf);
4492 		ATH_TXBUF_UNLOCK(sc);
4493 		return NULL;
4494 	}
4495 
4496 	/* Update BAW if required, before we free the original buf */
4497 	if (bf->bf_state.bfs_dobaw)
4498 		ath_tx_switch_baw_buf(sc, an, tid, bf, nbf);
4499 
4500 	/* Free original buffer; return new buffer */
4501 	ath_freebuf(sc, bf);
4502 
4503 	return nbf;
4504 }
4505 
4506 /*
4507  * Handle retrying an unaggregate frame in an aggregate
4508  * session.
4509  *
4510  * If too many retries occur, pause the TID, wait for
4511  * any further retransmits (as there's no reason why
4512  * non-aggregate frames in an aggregate session are
4513  * transmitted in-order; they just have to be in-BAW)
4514  * and then queue a BAR.
4515  */
4516 static void
4517 ath_tx_aggr_retry_unaggr(struct ath_softc *sc, struct ath_buf *bf)
4518 {
4519 	struct ieee80211_node *ni = bf->bf_node;
4520 	struct ath_node *an = ATH_NODE(ni);
4521 	int tid = bf->bf_state.bfs_tid;
4522 	struct ath_tid *atid = &an->an_tid[tid];
4523 	struct ieee80211_tx_ampdu *tap;
4524 
4525 	ATH_TX_LOCK(sc);
4526 
4527 	tap = ath_tx_get_tx_tid(an, tid);
4528 
4529 	/*
4530 	 * If the buffer is marked as busy, we can't directly
4531 	 * reuse it. Instead, try to clone the buffer.
4532 	 * If the clone is successful, recycle the old buffer.
4533 	 * If the clone is unsuccessful, set bfs_retries to max
4534 	 * to force the next bit of code to free the buffer
4535 	 * for us.
4536 	 */
4537 	if ((bf->bf_state.bfs_retries < SWMAX_RETRIES) &&
4538 	    (bf->bf_flags & ATH_BUF_BUSY)) {
4539 		struct ath_buf *nbf;
4540 		nbf = ath_tx_retry_clone(sc, an, atid, bf);
4541 		if (nbf)
4542 			/* bf has been freed at this point */
4543 			bf = nbf;
4544 		else
4545 			bf->bf_state.bfs_retries = SWMAX_RETRIES + 1;
4546 	}
4547 
4548 	if (bf->bf_state.bfs_retries >= SWMAX_RETRIES) {
4549 		DPRINTF(sc, ATH_DEBUG_SW_TX_RETRIES,
4550 		    "%s: exceeded retries; seqno %d\n",
4551 		    __func__, SEQNO(bf->bf_state.bfs_seqno));
4552 		sc->sc_stats.ast_tx_swretrymax++;
4553 
4554 		/* Update BAW anyway */
4555 		if (bf->bf_state.bfs_dobaw) {
4556 			ath_tx_update_baw(sc, an, atid, bf);
4557 			if (! bf->bf_state.bfs_addedbaw)
4558 				DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
4559 				    "%s: wasn't added: seqno %d\n",
4560 				    __func__, SEQNO(bf->bf_state.bfs_seqno));
4561 		}
4562 		bf->bf_state.bfs_dobaw = 0;
4563 
4564 		/* Suspend the TX queue and get ready to send the BAR */
4565 		ath_tx_tid_bar_suspend(sc, atid);
4566 
4567 		/* Send the BAR if there are no other frames waiting */
4568 		if (ath_tx_tid_bar_tx_ready(sc, atid))
4569 			ath_tx_tid_bar_tx(sc, atid);
4570 
4571 		ATH_TX_UNLOCK(sc);
4572 
4573 		/* Free buffer, bf is free after this call */
4574 		ath_tx_default_comp(sc, bf, 0);
4575 		return;
4576 	}
4577 
4578 	/*
4579 	 * This increments the retry counter as well as
4580 	 * sets the retry flag in the ath_buf and packet
4581 	 * body.
4582 	 */
4583 	ath_tx_set_retry(sc, bf);
4584 	sc->sc_stats.ast_tx_swretries++;
4585 
4586 	/*
4587 	 * Insert this at the head of the queue, so it's
4588 	 * retried before any current/subsequent frames.
4589 	 */
4590 	ATH_TID_INSERT_HEAD(atid, bf, bf_list);
4591 	ath_tx_tid_sched(sc, atid);
4592 	/* Send the BAR if there are no other frames waiting */
4593 	if (ath_tx_tid_bar_tx_ready(sc, atid))
4594 		ath_tx_tid_bar_tx(sc, atid);
4595 
4596 	ATH_TX_UNLOCK(sc);
4597 }
4598 
4599 /*
4600  * Common code for aggregate excessive retry/subframe retry.
4601  * If retrying, queues buffers to bf_q. If not, frees the
4602  * buffers.
4603  *
4604  * XXX should unify this with ath_tx_aggr_retry_unaggr()
4605  */
4606 static int
4607 ath_tx_retry_subframe(struct ath_softc *sc, struct ath_buf *bf,
4608     ath_bufhead *bf_q)
4609 {
4610 	struct ieee80211_node *ni = bf->bf_node;
4611 	struct ath_node *an = ATH_NODE(ni);
4612 	int tid = bf->bf_state.bfs_tid;
4613 	struct ath_tid *atid = &an->an_tid[tid];
4614 
4615 	ATH_TX_LOCK_ASSERT(sc);
4616 
4617 	/* XXX clr11naggr should be done for all subframes */
4618 	ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc);
4619 	ath_hal_set11nburstduration(sc->sc_ah, bf->bf_desc, 0);
4620 
4621 	/* ath_hal_set11n_virtualmorefrag(sc->sc_ah, bf->bf_desc, 0); */
4622 
4623 	/*
4624 	 * If the buffer is marked as busy, we can't directly
4625 	 * reuse it. Instead, try to clone the buffer.
4626 	 * If the clone is successful, recycle the old buffer.
4627 	 * If the clone is unsuccessful, set bfs_retries to max
4628 	 * to force the next bit of code to free the buffer
4629 	 * for us.
4630 	 */
4631 	if ((bf->bf_state.bfs_retries < SWMAX_RETRIES) &&
4632 	    (bf->bf_flags & ATH_BUF_BUSY)) {
4633 		struct ath_buf *nbf;
4634 		nbf = ath_tx_retry_clone(sc, an, atid, bf);
4635 		if (nbf)
4636 			/* bf has been freed at this point */
4637 			bf = nbf;
4638 		else
4639 			bf->bf_state.bfs_retries = SWMAX_RETRIES + 1;
4640 	}
4641 
4642 	if (bf->bf_state.bfs_retries >= SWMAX_RETRIES) {
4643 		sc->sc_stats.ast_tx_swretrymax++;
4644 		DPRINTF(sc, ATH_DEBUG_SW_TX_RETRIES,
4645 		    "%s: max retries: seqno %d\n",
4646 		    __func__, SEQNO(bf->bf_state.bfs_seqno));
4647 		ath_tx_update_baw(sc, an, atid, bf);
4648 		if (!bf->bf_state.bfs_addedbaw)
4649 			DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
4650 			    "%s: wasn't added: seqno %d\n",
4651 			    __func__, SEQNO(bf->bf_state.bfs_seqno));
4652 		bf->bf_state.bfs_dobaw = 0;
4653 		return 1;
4654 	}
4655 
4656 	ath_tx_set_retry(sc, bf);
4657 	sc->sc_stats.ast_tx_swretries++;
4658 	bf->bf_next = NULL;		/* Just to make sure */
4659 
4660 	/* Clear the aggregate state */
4661 	bf->bf_state.bfs_aggr = 0;
4662 	bf->bf_state.bfs_ndelim = 0;	/* ??? needed? */
4663 	bf->bf_state.bfs_nframes = 1;
4664 
4665 	TAILQ_INSERT_TAIL(bf_q, bf, bf_list);
4666 	return 0;
4667 }
4668 
4669 /*
4670  * error pkt completion for an aggregate destination
4671  */
4672 static void
4673 ath_tx_comp_aggr_error(struct ath_softc *sc, struct ath_buf *bf_first,
4674     struct ath_tid *tid)
4675 {
4676 	struct ieee80211_node *ni = bf_first->bf_node;
4677 	struct ath_node *an = ATH_NODE(ni);
4678 	struct ath_buf *bf_next, *bf;
4679 	ath_bufhead bf_q;
4680 	int drops = 0;
4681 	struct ieee80211_tx_ampdu *tap;
4682 	ath_bufhead bf_cq;
4683 
4684 	TAILQ_INIT(&bf_q);
4685 	TAILQ_INIT(&bf_cq);
4686 
4687 	/*
4688 	 * Update rate control - all frames have failed.
4689 	 *
4690 	 * XXX use the length in the first frame in the series;
4691 	 * XXX just so things are consistent for now.
4692 	 */
4693 	ath_tx_update_ratectrl(sc, ni, bf_first->bf_state.bfs_rc,
4694 	    &bf_first->bf_status.ds_txstat,
4695 	    bf_first->bf_state.bfs_pktlen,
4696 	    bf_first->bf_state.bfs_nframes, bf_first->bf_state.bfs_nframes);
4697 
4698 	ATH_TX_LOCK(sc);
4699 	tap = ath_tx_get_tx_tid(an, tid->tid);
4700 	sc->sc_stats.ast_tx_aggr_failall++;
4701 
4702 	/* Retry all subframes */
4703 	bf = bf_first;
4704 	while (bf) {
4705 		bf_next = bf->bf_next;
4706 		bf->bf_next = NULL;	/* Remove it from the aggr list */
4707 		sc->sc_stats.ast_tx_aggr_fail++;
4708 		if (ath_tx_retry_subframe(sc, bf, &bf_q)) {
4709 			drops++;
4710 			bf->bf_next = NULL;
4711 			TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list);
4712 		}
4713 		bf = bf_next;
4714 	}
4715 
4716 	/* Prepend all frames to the beginning of the queue */
4717 	while ((bf = TAILQ_LAST(&bf_q, ath_bufhead_s)) != NULL) {
4718 		TAILQ_REMOVE(&bf_q, bf, bf_list);
4719 		ATH_TID_INSERT_HEAD(tid, bf, bf_list);
4720 	}
4721 
4722 	/*
4723 	 * Schedule the TID to be re-tried.
4724 	 */
4725 	ath_tx_tid_sched(sc, tid);
4726 
4727 	/*
4728 	 * send bar if we dropped any frames
4729 	 *
4730 	 * Keep the txq lock held for now, as we need to ensure
4731 	 * that ni_txseqs[] is consistent (as it's being updated
4732 	 * in the ifnet TX context or raw TX context.)
4733 	 */
4734 	if (drops) {
4735 		/* Suspend the TX queue and get ready to send the BAR */
4736 		ath_tx_tid_bar_suspend(sc, tid);
4737 	}
4738 
4739 	/*
4740 	 * Send BAR if required
4741 	 */
4742 	if (ath_tx_tid_bar_tx_ready(sc, tid))
4743 		ath_tx_tid_bar_tx(sc, tid);
4744 
4745 	ATH_TX_UNLOCK(sc);
4746 
4747 	/* Complete frames which errored out */
4748 	while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
4749 		TAILQ_REMOVE(&bf_cq, bf, bf_list);
4750 		ath_tx_default_comp(sc, bf, 0);
4751 	}
4752 }
4753 
4754 /*
4755  * Handle clean-up of packets from an aggregate list.
4756  *
4757  * There's no need to update the BAW here - the session is being
4758  * torn down.
4759  */
4760 static void
4761 ath_tx_comp_cleanup_aggr(struct ath_softc *sc, struct ath_buf *bf_first)
4762 {
4763 	struct ath_buf *bf, *bf_next;
4764 	struct ieee80211_node *ni = bf_first->bf_node;
4765 	struct ath_node *an = ATH_NODE(ni);
4766 	int tid = bf_first->bf_state.bfs_tid;
4767 	struct ath_tid *atid = &an->an_tid[tid];
4768 
4769 	ATH_TX_LOCK(sc);
4770 
4771 	/* update incomp */
4772 	atid->incomp--;
4773 
4774 	/* Update the BAW */
4775 	bf = bf_first;
4776 	while (bf) {
4777 		/* XXX refactor! */
4778 		if (bf->bf_state.bfs_dobaw) {
4779 			ath_tx_update_baw(sc, an, atid, bf);
4780 			if (!bf->bf_state.bfs_addedbaw)
4781 				DPRINTF(sc, ATH_DEBUG_SW_TX,
4782 				    "%s: wasn't added: seqno %d\n",
4783 				    __func__, SEQNO(bf->bf_state.bfs_seqno));
4784 		}
4785 		bf = bf->bf_next;
4786 	}
4787 
4788 	if (atid->incomp == 0) {
4789 		DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
4790 		    "%s: TID %d: cleaned up! resume!\n",
4791 		    __func__, tid);
4792 		atid->cleanup_inprogress = 0;
4793 		ath_tx_tid_resume(sc, atid);
4794 	}
4795 
4796 	/* Send BAR if required */
4797 	/* XXX why would we send a BAR when transitioning to non-aggregation? */
4798 	/*
4799 	 * XXX TODO: we should likely just tear down the BAR state here,
4800 	 * rather than sending a BAR.
4801 	 */
4802 	if (ath_tx_tid_bar_tx_ready(sc, atid))
4803 		ath_tx_tid_bar_tx(sc, atid);
4804 
4805 	ATH_TX_UNLOCK(sc);
4806 
4807 	/* Handle frame completion as individual frames */
4808 	bf = bf_first;
4809 	while (bf) {
4810 		bf_next = bf->bf_next;
4811 		bf->bf_next = NULL;
4812 		ath_tx_default_comp(sc, bf, 1);
4813 		bf = bf_next;
4814 	}
4815 }
4816 
4817 /*
4818  * Handle completion of an set of aggregate frames.
4819  *
4820  * Note: the completion handler is the last descriptor in the aggregate,
4821  * not the last descriptor in the first frame.
4822  */
4823 static void
4824 ath_tx_aggr_comp_aggr(struct ath_softc *sc, struct ath_buf *bf_first,
4825     int fail)
4826 {
4827 	//struct ath_desc *ds = bf->bf_lastds;
4828 	struct ieee80211_node *ni = bf_first->bf_node;
4829 	struct ath_node *an = ATH_NODE(ni);
4830 	int tid = bf_first->bf_state.bfs_tid;
4831 	struct ath_tid *atid = &an->an_tid[tid];
4832 	struct ath_tx_status ts;
4833 	struct ieee80211_tx_ampdu *tap;
4834 	ath_bufhead bf_q;
4835 	ath_bufhead bf_cq;
4836 	int seq_st, tx_ok;
4837 	int hasba, isaggr;
4838 	uint32_t ba[2];
4839 	struct ath_buf *bf, *bf_next;
4840 	int ba_index;
4841 	int drops = 0;
4842 	int nframes = 0, nbad = 0, nf;
4843 	int pktlen;
4844 	/* XXX there's too much on the stack? */
4845 	struct ath_rc_series rc[ATH_RC_NUM];
4846 	int txseq;
4847 
4848 	DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: called; hwq_depth=%d\n",
4849 	    __func__, atid->hwq_depth);
4850 
4851 	/*
4852 	 * Take a copy; this may be needed -after- bf_first
4853 	 * has been completed and freed.
4854 	 */
4855 	ts = bf_first->bf_status.ds_txstat;
4856 
4857 	TAILQ_INIT(&bf_q);
4858 	TAILQ_INIT(&bf_cq);
4859 
4860 	/* The TID state is kept behind the TXQ lock */
4861 	ATH_TX_LOCK(sc);
4862 
4863 	atid->hwq_depth--;
4864 	if (atid->hwq_depth < 0)
4865 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: hwq_depth < 0: %d\n",
4866 		    __func__, atid->hwq_depth);
4867 
4868 	/*
4869 	 * If the TID is filtered, handle completing the filter
4870 	 * transition before potentially kicking it to the cleanup
4871 	 * function.
4872 	 *
4873 	 * XXX this is duplicate work, ew.
4874 	 */
4875 	if (atid->isfiltered)
4876 		ath_tx_tid_filt_comp_complete(sc, atid);
4877 
4878 	/*
4879 	 * Punt cleanup to the relevant function, not our problem now
4880 	 */
4881 	if (atid->cleanup_inprogress) {
4882 		if (atid->isfiltered)
4883 			DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4884 			    "%s: isfiltered=1, normal_comp?\n",
4885 			    __func__);
4886 		ATH_TX_UNLOCK(sc);
4887 		ath_tx_comp_cleanup_aggr(sc, bf_first);
4888 		return;
4889 	}
4890 
4891 	/*
4892 	 * If the frame is filtered, transition to filtered frame
4893 	 * mode and add this to the filtered frame list.
4894 	 *
4895 	 * XXX TODO: figure out how this interoperates with
4896 	 * BAR, pause and cleanup states.
4897 	 */
4898 	if ((ts.ts_status & HAL_TXERR_FILT) ||
4899 	    (ts.ts_status != 0 && atid->isfiltered)) {
4900 		if (fail != 0)
4901 			DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4902 			    "%s: isfiltered=1, fail=%d\n", __func__, fail);
4903 		ath_tx_tid_filt_comp_aggr(sc, atid, bf_first, &bf_cq);
4904 
4905 		/* Remove from BAW */
4906 		TAILQ_FOREACH_SAFE(bf, &bf_cq, bf_list, bf_next) {
4907 			if (bf->bf_state.bfs_addedbaw)
4908 				drops++;
4909 			if (bf->bf_state.bfs_dobaw) {
4910 				ath_tx_update_baw(sc, an, atid, bf);
4911 				if (!bf->bf_state.bfs_addedbaw)
4912 					DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4913 					    "%s: wasn't added: seqno %d\n",
4914 					    __func__,
4915 					    SEQNO(bf->bf_state.bfs_seqno));
4916 			}
4917 			bf->bf_state.bfs_dobaw = 0;
4918 		}
4919 		/*
4920 		 * If any intermediate frames in the BAW were dropped when
4921 		 * handling filtering things, send a BAR.
4922 		 */
4923 		if (drops)
4924 			ath_tx_tid_bar_suspend(sc, atid);
4925 
4926 		/*
4927 		 * Finish up by sending a BAR if required and freeing
4928 		 * the frames outside of the TX lock.
4929 		 */
4930 		goto finish_send_bar;
4931 	}
4932 
4933 	/*
4934 	 * XXX for now, use the first frame in the aggregate for
4935 	 * XXX rate control completion; it's at least consistent.
4936 	 */
4937 	pktlen = bf_first->bf_state.bfs_pktlen;
4938 
4939 	/*
4940 	 * Handle errors first!
4941 	 *
4942 	 * Here, handle _any_ error as a "exceeded retries" error.
4943 	 * Later on (when filtered frames are to be specially handled)
4944 	 * it'll have to be expanded.
4945 	 */
4946 #if 0
4947 	if (ts.ts_status & HAL_TXERR_XRETRY) {
4948 #endif
4949 	if (ts.ts_status != 0) {
4950 		ATH_TX_UNLOCK(sc);
4951 		ath_tx_comp_aggr_error(sc, bf_first, atid);
4952 		return;
4953 	}
4954 
4955 	tap = ath_tx_get_tx_tid(an, tid);
4956 
4957 	/*
4958 	 * extract starting sequence and block-ack bitmap
4959 	 */
4960 	/* XXX endian-ness of seq_st, ba? */
4961 	seq_st = ts.ts_seqnum;
4962 	hasba = !! (ts.ts_flags & HAL_TX_BA);
4963 	tx_ok = (ts.ts_status == 0);
4964 	isaggr = bf_first->bf_state.bfs_aggr;
4965 	ba[0] = ts.ts_ba_low;
4966 	ba[1] = ts.ts_ba_high;
4967 
4968 	/*
4969 	 * Copy the TX completion status and the rate control
4970 	 * series from the first descriptor, as it may be freed
4971 	 * before the rate control code can get its grubby fingers
4972 	 * into things.
4973 	 */
4974 	memcpy(rc, bf_first->bf_state.bfs_rc, sizeof(rc));
4975 
4976 	DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4977 	    "%s: txa_start=%d, tx_ok=%d, status=%.8x, flags=%.8x, "
4978 	    "isaggr=%d, seq_st=%d, hasba=%d, ba=%.8x, %.8x\n",
4979 	    __func__, tap->txa_start, tx_ok, ts.ts_status, ts.ts_flags,
4980 	    isaggr, seq_st, hasba, ba[0], ba[1]);
4981 
4982 	/*
4983 	 * The reference driver doesn't do this; it simply ignores
4984 	 * this check in its entirety.
4985 	 *
4986 	 * I've seen this occur when using iperf to send traffic
4987 	 * out tid 1 - the aggregate frames are all marked as TID 1,
4988 	 * but the TXSTATUS has TID=0.  So, let's just ignore this
4989 	 * check.
4990 	 */
4991 #if 0
4992 	/* Occasionally, the MAC sends a tx status for the wrong TID. */
4993 	if (tid != ts.ts_tid) {
4994 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: tid %d != hw tid %d\n",
4995 		    __func__, tid, ts.ts_tid);
4996 		tx_ok = 0;
4997 	}
4998 #endif
4999 
5000 	/* AR5416 BA bug; this requires an interface reset */
5001 	if (isaggr && tx_ok && (! hasba)) {
5002 		device_printf(sc->sc_dev,
5003 		    "%s: AR5416 bug: hasba=%d; txok=%d, isaggr=%d, "
5004 		    "seq_st=%d\n",
5005 		    __func__, hasba, tx_ok, isaggr, seq_st);
5006 		/* XXX TODO: schedule an interface reset */
5007 #ifdef ATH_DEBUG
5008 		ath_printtxbuf(sc, bf_first,
5009 		    sc->sc_ac2q[atid->ac]->axq_qnum, 0, 0);
5010 #endif
5011 	}
5012 
5013 	/*
5014 	 * Walk the list of frames, figure out which ones were correctly
5015 	 * sent and which weren't.
5016 	 */
5017 	bf = bf_first;
5018 	nf = bf_first->bf_state.bfs_nframes;
5019 
5020 	/* bf_first is going to be invalid once this list is walked */
5021 	bf_first = NULL;
5022 
5023 	/*
5024 	 * Walk the list of completed frames and determine
5025 	 * which need to be completed and which need to be
5026 	 * retransmitted.
5027 	 *
5028 	 * For completed frames, the completion functions need
5029 	 * to be called at the end of this function as the last
5030 	 * node reference may free the node.
5031 	 *
5032 	 * Finally, since the TXQ lock can't be held during the
5033 	 * completion callback (to avoid lock recursion),
5034 	 * the completion calls have to be done outside of the
5035 	 * lock.
5036 	 */
5037 	while (bf) {
5038 		nframes++;
5039 		ba_index = ATH_BA_INDEX(seq_st,
5040 		    SEQNO(bf->bf_state.bfs_seqno));
5041 		bf_next = bf->bf_next;
5042 		bf->bf_next = NULL;	/* Remove it from the aggr list */
5043 
5044 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5045 		    "%s: checking bf=%p seqno=%d; ack=%d\n",
5046 		    __func__, bf, SEQNO(bf->bf_state.bfs_seqno),
5047 		    ATH_BA_ISSET(ba, ba_index));
5048 
5049 		if (tx_ok && ATH_BA_ISSET(ba, ba_index)) {
5050 			sc->sc_stats.ast_tx_aggr_ok++;
5051 			ath_tx_update_baw(sc, an, atid, bf);
5052 			bf->bf_state.bfs_dobaw = 0;
5053 			if (!bf->bf_state.bfs_addedbaw)
5054 				DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5055 				    "%s: wasn't added: seqno %d\n",
5056 				    __func__, SEQNO(bf->bf_state.bfs_seqno));
5057 			bf->bf_next = NULL;
5058 			TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list);
5059 		} else {
5060 			sc->sc_stats.ast_tx_aggr_fail++;
5061 			if (ath_tx_retry_subframe(sc, bf, &bf_q)) {
5062 				drops++;
5063 				bf->bf_next = NULL;
5064 				TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list);
5065 			}
5066 			nbad++;
5067 		}
5068 		bf = bf_next;
5069 	}
5070 
5071 	/*
5072 	 * Now that the BAW updates have been done, unlock
5073 	 *
5074 	 * txseq is grabbed before the lock is released so we
5075 	 * have a consistent view of what -was- in the BAW.
5076 	 * Anything after this point will not yet have been
5077 	 * TXed.
5078 	 */
5079 	txseq = tap->txa_start;
5080 	ATH_TX_UNLOCK(sc);
5081 
5082 	if (nframes != nf)
5083 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5084 		    "%s: num frames seen=%d; bf nframes=%d\n",
5085 		    __func__, nframes, nf);
5086 
5087 	/*
5088 	 * Now we know how many frames were bad, call the rate
5089 	 * control code.
5090 	 */
5091 	if (fail == 0)
5092 		ath_tx_update_ratectrl(sc, ni, rc, &ts, pktlen, nframes,
5093 		    nbad);
5094 
5095 	/*
5096 	 * send bar if we dropped any frames
5097 	 */
5098 	if (drops) {
5099 		/* Suspend the TX queue and get ready to send the BAR */
5100 		ATH_TX_LOCK(sc);
5101 		ath_tx_tid_bar_suspend(sc, atid);
5102 		ATH_TX_UNLOCK(sc);
5103 	}
5104 
5105 	DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5106 	    "%s: txa_start now %d\n", __func__, tap->txa_start);
5107 
5108 	ATH_TX_LOCK(sc);
5109 
5110 	/* Prepend all frames to the beginning of the queue */
5111 	while ((bf = TAILQ_LAST(&bf_q, ath_bufhead_s)) != NULL) {
5112 		TAILQ_REMOVE(&bf_q, bf, bf_list);
5113 		ATH_TID_INSERT_HEAD(atid, bf, bf_list);
5114 	}
5115 
5116 	/*
5117 	 * Reschedule to grab some further frames.
5118 	 */
5119 	ath_tx_tid_sched(sc, atid);
5120 
5121 	/*
5122 	 * If the queue is filtered, re-schedule as required.
5123 	 *
5124 	 * This is required as there may be a subsequent TX descriptor
5125 	 * for this end-node that has CLRDMASK set, so it's quite possible
5126 	 * that a filtered frame will be followed by a non-filtered
5127 	 * (complete or otherwise) frame.
5128 	 *
5129 	 * XXX should we do this before we complete the frame?
5130 	 */
5131 	if (atid->isfiltered)
5132 		ath_tx_tid_filt_comp_complete(sc, atid);
5133 
5134 finish_send_bar:
5135 
5136 	/*
5137 	 * Send BAR if required
5138 	 */
5139 	if (ath_tx_tid_bar_tx_ready(sc, atid))
5140 		ath_tx_tid_bar_tx(sc, atid);
5141 
5142 	ATH_TX_UNLOCK(sc);
5143 
5144 	/* Do deferred completion */
5145 	while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
5146 		TAILQ_REMOVE(&bf_cq, bf, bf_list);
5147 		ath_tx_default_comp(sc, bf, 0);
5148 	}
5149 }
5150 
5151 /*
5152  * Handle completion of unaggregated frames in an ADDBA
5153  * session.
5154  *
5155  * Fail is set to 1 if the entry is being freed via a call to
5156  * ath_tx_draintxq().
5157  */
5158 static void
5159 ath_tx_aggr_comp_unaggr(struct ath_softc *sc, struct ath_buf *bf, int fail)
5160 {
5161 	struct ieee80211_node *ni = bf->bf_node;
5162 	struct ath_node *an = ATH_NODE(ni);
5163 	int tid = bf->bf_state.bfs_tid;
5164 	struct ath_tid *atid = &an->an_tid[tid];
5165 	struct ath_tx_status ts;
5166 	int drops = 0;
5167 
5168 	/*
5169 	 * Take a copy of this; filtering/cloning the frame may free the
5170 	 * bf pointer.
5171 	 */
5172 	ts = bf->bf_status.ds_txstat;
5173 
5174 	/*
5175 	 * Update rate control status here, before we possibly
5176 	 * punt to retry or cleanup.
5177 	 *
5178 	 * Do it outside of the TXQ lock.
5179 	 */
5180 	if (fail == 0 && ((bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) == 0))
5181 		ath_tx_update_ratectrl(sc, ni, bf->bf_state.bfs_rc,
5182 		    &bf->bf_status.ds_txstat,
5183 		    bf->bf_state.bfs_pktlen,
5184 		    1, (ts.ts_status == 0) ? 0 : 1);
5185 
5186 	/*
5187 	 * This is called early so atid->hwq_depth can be tracked.
5188 	 * This unfortunately means that it's released and regrabbed
5189 	 * during retry and cleanup. That's rather inefficient.
5190 	 */
5191 	ATH_TX_LOCK(sc);
5192 
5193 	if (tid == IEEE80211_NONQOS_TID)
5194 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=16!\n", __func__);
5195 
5196 	DPRINTF(sc, ATH_DEBUG_SW_TX,
5197 	    "%s: bf=%p: tid=%d, hwq_depth=%d, seqno=%d\n",
5198 	    __func__, bf, bf->bf_state.bfs_tid, atid->hwq_depth,
5199 	    SEQNO(bf->bf_state.bfs_seqno));
5200 
5201 	atid->hwq_depth--;
5202 	if (atid->hwq_depth < 0)
5203 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: hwq_depth < 0: %d\n",
5204 		    __func__, atid->hwq_depth);
5205 
5206 	/*
5207 	 * If the TID is filtered, handle completing the filter
5208 	 * transition before potentially kicking it to the cleanup
5209 	 * function.
5210 	 */
5211 	if (atid->isfiltered)
5212 		ath_tx_tid_filt_comp_complete(sc, atid);
5213 
5214 	/*
5215 	 * If a cleanup is in progress, punt to comp_cleanup;
5216 	 * rather than handling it here. It's thus their
5217 	 * responsibility to clean up, call the completion
5218 	 * function in net80211, etc.
5219 	 */
5220 	if (atid->cleanup_inprogress) {
5221 		if (atid->isfiltered)
5222 			DPRINTF(sc, ATH_DEBUG_SW_TX,
5223 			    "%s: isfiltered=1, normal_comp?\n",
5224 			    __func__);
5225 		ATH_TX_UNLOCK(sc);
5226 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: cleanup_unaggr\n",
5227 		    __func__);
5228 		ath_tx_comp_cleanup_unaggr(sc, bf);
5229 		return;
5230 	}
5231 
5232 	/*
5233 	 * XXX TODO: how does cleanup, BAR and filtered frame handling
5234 	 * overlap?
5235 	 *
5236 	 * If the frame is filtered OR if it's any failure but
5237 	 * the TID is filtered, the frame must be added to the
5238 	 * filtered frame list.
5239 	 *
5240 	 * However - a busy buffer can't be added to the filtered
5241 	 * list as it will end up being recycled without having
5242 	 * been made available for the hardware.
5243 	 */
5244 	if ((ts.ts_status & HAL_TXERR_FILT) ||
5245 	    (ts.ts_status != 0 && atid->isfiltered)) {
5246 		int freeframe;
5247 
5248 		if (fail != 0)
5249 			DPRINTF(sc, ATH_DEBUG_SW_TX,
5250 			    "%s: isfiltered=1, fail=%d\n",
5251 			    __func__, fail);
5252 		freeframe = ath_tx_tid_filt_comp_single(sc, atid, bf);
5253 		/*
5254 		 * If freeframe=0 then bf is no longer ours; don't
5255 		 * touch it.
5256 		 */
5257 		if (freeframe) {
5258 			/* Remove from BAW */
5259 			if (bf->bf_state.bfs_addedbaw)
5260 				drops++;
5261 			if (bf->bf_state.bfs_dobaw) {
5262 				ath_tx_update_baw(sc, an, atid, bf);
5263 				if (!bf->bf_state.bfs_addedbaw)
5264 					DPRINTF(sc, ATH_DEBUG_SW_TX,
5265 					    "%s: wasn't added: seqno %d\n",
5266 					    __func__, SEQNO(bf->bf_state.bfs_seqno));
5267 			}
5268 			bf->bf_state.bfs_dobaw = 0;
5269 		}
5270 
5271 		/*
5272 		 * If the frame couldn't be filtered, treat it as a drop and
5273 		 * prepare to send a BAR.
5274 		 */
5275 		if (freeframe && drops)
5276 			ath_tx_tid_bar_suspend(sc, atid);
5277 
5278 		/*
5279 		 * Send BAR if required
5280 		 */
5281 		if (ath_tx_tid_bar_tx_ready(sc, atid))
5282 			ath_tx_tid_bar_tx(sc, atid);
5283 
5284 		ATH_TX_UNLOCK(sc);
5285 		/*
5286 		 * If freeframe is set, then the frame couldn't be
5287 		 * cloned and bf is still valid.  Just complete/free it.
5288 		 */
5289 		if (freeframe)
5290 			ath_tx_default_comp(sc, bf, fail);
5291 
5292 		return;
5293 	}
5294 	/*
5295 	 * Don't bother with the retry check if all frames
5296 	 * are being failed (eg during queue deletion.)
5297 	 */
5298 #if 0
5299 	if (fail == 0 && ts->ts_status & HAL_TXERR_XRETRY) {
5300 #endif
5301 	if (fail == 0 && ts.ts_status != 0) {
5302 		ATH_TX_UNLOCK(sc);
5303 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: retry_unaggr\n",
5304 		    __func__);
5305 		ath_tx_aggr_retry_unaggr(sc, bf);
5306 		return;
5307 	}
5308 
5309 	/* Success? Complete */
5310 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=%d, seqno %d\n",
5311 	    __func__, tid, SEQNO(bf->bf_state.bfs_seqno));
5312 	if (bf->bf_state.bfs_dobaw) {
5313 		ath_tx_update_baw(sc, an, atid, bf);
5314 		bf->bf_state.bfs_dobaw = 0;
5315 		if (!bf->bf_state.bfs_addedbaw)
5316 			DPRINTF(sc, ATH_DEBUG_SW_TX,
5317 			    "%s: wasn't added: seqno %d\n",
5318 			    __func__, SEQNO(bf->bf_state.bfs_seqno));
5319 	}
5320 
5321 	/*
5322 	 * If the queue is filtered, re-schedule as required.
5323 	 *
5324 	 * This is required as there may be a subsequent TX descriptor
5325 	 * for this end-node that has CLRDMASK set, so it's quite possible
5326 	 * that a filtered frame will be followed by a non-filtered
5327 	 * (complete or otherwise) frame.
5328 	 *
5329 	 * XXX should we do this before we complete the frame?
5330 	 */
5331 	if (atid->isfiltered)
5332 		ath_tx_tid_filt_comp_complete(sc, atid);
5333 
5334 	/*
5335 	 * Send BAR if required
5336 	 */
5337 	if (ath_tx_tid_bar_tx_ready(sc, atid))
5338 		ath_tx_tid_bar_tx(sc, atid);
5339 
5340 	ATH_TX_UNLOCK(sc);
5341 
5342 	ath_tx_default_comp(sc, bf, fail);
5343 	/* bf is freed at this point */
5344 }
5345 
5346 void
5347 ath_tx_aggr_comp(struct ath_softc *sc, struct ath_buf *bf, int fail)
5348 {
5349 	if (bf->bf_state.bfs_aggr)
5350 		ath_tx_aggr_comp_aggr(sc, bf, fail);
5351 	else
5352 		ath_tx_aggr_comp_unaggr(sc, bf, fail);
5353 }
5354 
5355 /*
5356  * Schedule some packets from the given node/TID to the hardware.
5357  *
5358  * This is the aggregate version.
5359  */
5360 void
5361 ath_tx_tid_hw_queue_aggr(struct ath_softc *sc, struct ath_node *an,
5362     struct ath_tid *tid)
5363 {
5364 	struct ath_buf *bf;
5365 	struct ath_txq *txq = sc->sc_ac2q[tid->ac];
5366 	struct ieee80211_tx_ampdu *tap;
5367 	ATH_AGGR_STATUS status;
5368 	ath_bufhead bf_q;
5369 
5370 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d\n", __func__, tid->tid);
5371 	ATH_TX_LOCK_ASSERT(sc);
5372 
5373 	/*
5374 	 * XXX TODO: If we're called for a queue that we're leaking frames to,
5375 	 * ensure we only leak one.
5376 	 */
5377 
5378 	tap = ath_tx_get_tx_tid(an, tid->tid);
5379 
5380 	if (tid->tid == IEEE80211_NONQOS_TID)
5381 		DPRINTF(sc, ATH_DEBUG_SW_TX,
5382 		    "%s: called for TID=NONQOS_TID?\n", __func__);
5383 
5384 	for (;;) {
5385 		status = ATH_AGGR_DONE;
5386 
5387 		/*
5388 		 * If the upper layer has paused the TID, don't
5389 		 * queue any further packets.
5390 		 *
5391 		 * This can also occur from the completion task because
5392 		 * of packet loss; but as its serialised with this code,
5393 		 * it won't "appear" half way through queuing packets.
5394 		 */
5395 		if (! ath_tx_tid_can_tx_or_sched(sc, tid))
5396 			break;
5397 
5398 		bf = ATH_TID_FIRST(tid);
5399 		if (bf == NULL) {
5400 			break;
5401 		}
5402 
5403 		/*
5404 		 * If the packet doesn't fall within the BAW (eg a NULL
5405 		 * data frame), schedule it directly; continue.
5406 		 */
5407 		if (! bf->bf_state.bfs_dobaw) {
5408 			DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5409 			    "%s: non-baw packet\n",
5410 			    __func__);
5411 			ATH_TID_REMOVE(tid, bf, bf_list);
5412 
5413 			if (bf->bf_state.bfs_nframes > 1)
5414 				DPRINTF(sc, ATH_DEBUG_SW_TX,
5415 				    "%s: aggr=%d, nframes=%d\n",
5416 				    __func__,
5417 				    bf->bf_state.bfs_aggr,
5418 				    bf->bf_state.bfs_nframes);
5419 
5420 			/*
5421 			 * This shouldn't happen - such frames shouldn't
5422 			 * ever have been queued as an aggregate in the
5423 			 * first place.  However, make sure the fields
5424 			 * are correctly setup just to be totally sure.
5425 			 */
5426 			bf->bf_state.bfs_aggr = 0;
5427 			bf->bf_state.bfs_nframes = 1;
5428 
5429 			/* Update CLRDMASK just before this frame is queued */
5430 			ath_tx_update_clrdmask(sc, tid, bf);
5431 
5432 			ath_tx_do_ratelookup(sc, bf);
5433 			ath_tx_calc_duration(sc, bf);
5434 			ath_tx_calc_protection(sc, bf);
5435 			ath_tx_set_rtscts(sc, bf);
5436 			ath_tx_rate_fill_rcflags(sc, bf);
5437 			ath_tx_setds(sc, bf);
5438 			ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc);
5439 
5440 			sc->sc_aggr_stats.aggr_nonbaw_pkt++;
5441 
5442 			/* Queue the packet; continue */
5443 			goto queuepkt;
5444 		}
5445 
5446 		TAILQ_INIT(&bf_q);
5447 
5448 		/*
5449 		 * Do a rate control lookup on the first frame in the
5450 		 * list. The rate control code needs that to occur
5451 		 * before it can determine whether to TX.
5452 		 * It's inaccurate because the rate control code doesn't
5453 		 * really "do" aggregate lookups, so it only considers
5454 		 * the size of the first frame.
5455 		 */
5456 		ath_tx_do_ratelookup(sc, bf);
5457 		bf->bf_state.bfs_rc[3].rix = 0;
5458 		bf->bf_state.bfs_rc[3].tries = 0;
5459 
5460 		ath_tx_calc_duration(sc, bf);
5461 		ath_tx_calc_protection(sc, bf);
5462 
5463 		ath_tx_set_rtscts(sc, bf);
5464 		ath_tx_rate_fill_rcflags(sc, bf);
5465 
5466 		status = ath_tx_form_aggr(sc, an, tid, &bf_q);
5467 
5468 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5469 		    "%s: ath_tx_form_aggr() status=%d\n", __func__, status);
5470 
5471 		/*
5472 		 * No frames to be picked up - out of BAW
5473 		 */
5474 		if (TAILQ_EMPTY(&bf_q))
5475 			break;
5476 
5477 		/*
5478 		 * This assumes that the descriptor list in the ath_bufhead
5479 		 * are already linked together via bf_next pointers.
5480 		 */
5481 		bf = TAILQ_FIRST(&bf_q);
5482 
5483 		if (status == ATH_AGGR_8K_LIMITED)
5484 			sc->sc_aggr_stats.aggr_rts_aggr_limited++;
5485 
5486 		/*
5487 		 * If it's the only frame send as non-aggregate
5488 		 * assume that ath_tx_form_aggr() has checked
5489 		 * whether it's in the BAW and added it appropriately.
5490 		 */
5491 		if (bf->bf_state.bfs_nframes == 1) {
5492 			DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5493 			    "%s: single-frame aggregate\n", __func__);
5494 
5495 			/* Update CLRDMASK just before this frame is queued */
5496 			ath_tx_update_clrdmask(sc, tid, bf);
5497 
5498 			bf->bf_state.bfs_aggr = 0;
5499 			bf->bf_state.bfs_ndelim = 0;
5500 			ath_tx_setds(sc, bf);
5501 			ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc);
5502 			if (status == ATH_AGGR_BAW_CLOSED)
5503 				sc->sc_aggr_stats.aggr_baw_closed_single_pkt++;
5504 			else
5505 				sc->sc_aggr_stats.aggr_single_pkt++;
5506 		} else {
5507 			DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5508 			    "%s: multi-frame aggregate: %d frames, "
5509 			    "length %d\n",
5510 			     __func__, bf->bf_state.bfs_nframes,
5511 			    bf->bf_state.bfs_al);
5512 			bf->bf_state.bfs_aggr = 1;
5513 			sc->sc_aggr_stats.aggr_pkts[bf->bf_state.bfs_nframes]++;
5514 			sc->sc_aggr_stats.aggr_aggr_pkt++;
5515 
5516 			/* Update CLRDMASK just before this frame is queued */
5517 			ath_tx_update_clrdmask(sc, tid, bf);
5518 
5519 			/*
5520 			 * Calculate the duration/protection as required.
5521 			 */
5522 			ath_tx_calc_duration(sc, bf);
5523 			ath_tx_calc_protection(sc, bf);
5524 
5525 			/*
5526 			 * Update the rate and rtscts information based on the
5527 			 * rate decision made by the rate control code;
5528 			 * the first frame in the aggregate needs it.
5529 			 */
5530 			ath_tx_set_rtscts(sc, bf);
5531 
5532 			/*
5533 			 * Setup the relevant descriptor fields
5534 			 * for aggregation. The first descriptor
5535 			 * already points to the rest in the chain.
5536 			 */
5537 			ath_tx_setds_11n(sc, bf);
5538 
5539 		}
5540 	queuepkt:
5541 		/* Set completion handler, multi-frame aggregate or not */
5542 		bf->bf_comp = ath_tx_aggr_comp;
5543 
5544 		if (bf->bf_state.bfs_tid == IEEE80211_NONQOS_TID)
5545 			DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=16?\n", __func__);
5546 
5547 		/*
5548 		 * Update leak count and frame config if were leaking frames.
5549 		 *
5550 		 * XXX TODO: it should update all frames in an aggregate
5551 		 * correctly!
5552 		 */
5553 		ath_tx_leak_count_update(sc, tid, bf);
5554 
5555 		/* Punt to txq */
5556 		ath_tx_handoff(sc, txq, bf);
5557 
5558 		/* Track outstanding buffer count to hardware */
5559 		/* aggregates are "one" buffer */
5560 		tid->hwq_depth++;
5561 
5562 		/*
5563 		 * Break out if ath_tx_form_aggr() indicated
5564 		 * there can't be any further progress (eg BAW is full.)
5565 		 * Checking for an empty txq is done above.
5566 		 *
5567 		 * XXX locking on txq here?
5568 		 */
5569 		/* XXX TXQ locking */
5570 		if (txq->axq_aggr_depth >= sc->sc_hwq_limit_aggr ||
5571 		    (status == ATH_AGGR_BAW_CLOSED ||
5572 		     status == ATH_AGGR_LEAK_CLOSED))
5573 			break;
5574 	}
5575 }
5576 
5577 /*
5578  * Schedule some packets from the given node/TID to the hardware.
5579  *
5580  * XXX TODO: this routine doesn't enforce the maximum TXQ depth.
5581  * It just dumps frames into the TXQ.  We should limit how deep
5582  * the transmit queue can grow for frames dispatched to the given
5583  * TXQ.
5584  *
5585  * To avoid locking issues, either we need to own the TXQ lock
5586  * at this point, or we need to pass in the maximum frame count
5587  * from the caller.
5588  */
5589 void
5590 ath_tx_tid_hw_queue_norm(struct ath_softc *sc, struct ath_node *an,
5591     struct ath_tid *tid)
5592 {
5593 	struct ath_buf *bf;
5594 	struct ath_txq *txq = sc->sc_ac2q[tid->ac];
5595 
5596 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: node %p: TID %d: called\n",
5597 	    __func__, an, tid->tid);
5598 
5599 	ATH_TX_LOCK_ASSERT(sc);
5600 
5601 	/* Check - is AMPDU pending or running? then print out something */
5602 	if (ath_tx_ampdu_pending(sc, an, tid->tid))
5603 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ampdu pending?\n",
5604 		    __func__, tid->tid);
5605 	if (ath_tx_ampdu_running(sc, an, tid->tid))
5606 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ampdu running?\n",
5607 		    __func__, tid->tid);
5608 
5609 	for (;;) {
5610 
5611 		/*
5612 		 * If the upper layers have paused the TID, don't
5613 		 * queue any further packets.
5614 		 *
5615 		 * XXX if we are leaking frames, make sure we decrement
5616 		 * that counter _and_ we continue here.
5617 		 */
5618 		if (! ath_tx_tid_can_tx_or_sched(sc, tid))
5619 			break;
5620 
5621 		bf = ATH_TID_FIRST(tid);
5622 		if (bf == NULL) {
5623 			break;
5624 		}
5625 
5626 		ATH_TID_REMOVE(tid, bf, bf_list);
5627 
5628 		/* Sanity check! */
5629 		if (tid->tid != bf->bf_state.bfs_tid) {
5630 			DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bfs_tid %d !="
5631 			    " tid %d\n", __func__, bf->bf_state.bfs_tid,
5632 			    tid->tid);
5633 		}
5634 		/* Normal completion handler */
5635 		bf->bf_comp = ath_tx_normal_comp;
5636 
5637 		/*
5638 		 * Override this for now, until the non-aggregate
5639 		 * completion handler correctly handles software retransmits.
5640 		 */
5641 		bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
5642 
5643 		/* Update CLRDMASK just before this frame is queued */
5644 		ath_tx_update_clrdmask(sc, tid, bf);
5645 
5646 		/* Program descriptors + rate control */
5647 		ath_tx_do_ratelookup(sc, bf);
5648 		ath_tx_calc_duration(sc, bf);
5649 		ath_tx_calc_protection(sc, bf);
5650 		ath_tx_set_rtscts(sc, bf);
5651 		ath_tx_rate_fill_rcflags(sc, bf);
5652 		ath_tx_setds(sc, bf);
5653 
5654 		/*
5655 		 * Update the current leak count if
5656 		 * we're leaking frames; and set the
5657 		 * MORE flag as appropriate.
5658 		 */
5659 		ath_tx_leak_count_update(sc, tid, bf);
5660 
5661 		/* Track outstanding buffer count to hardware */
5662 		/* aggregates are "one" buffer */
5663 		tid->hwq_depth++;
5664 
5665 		/* Punt to hardware or software txq */
5666 		ath_tx_handoff(sc, txq, bf);
5667 	}
5668 }
5669 
5670 /*
5671  * Schedule some packets to the given hardware queue.
5672  *
5673  * This function walks the list of TIDs (ie, ath_node TIDs
5674  * with queued traffic) and attempts to schedule traffic
5675  * from them.
5676  *
5677  * TID scheduling is implemented as a FIFO, with TIDs being
5678  * added to the end of the queue after some frames have been
5679  * scheduled.
5680  */
5681 void
5682 ath_txq_sched(struct ath_softc *sc, struct ath_txq *txq)
5683 {
5684 	struct ath_tid *tid, *next, *last;
5685 
5686 	ATH_TX_LOCK_ASSERT(sc);
5687 
5688 	/*
5689 	 * For non-EDMA chips, aggr frames that have been built are
5690 	 * in axq_aggr_depth, whether they've been scheduled or not.
5691 	 * There's no FIFO, so txq->axq_depth is what's been scheduled
5692 	 * to the hardware.
5693 	 *
5694 	 * For EDMA chips, we do it in two stages.  The existing code
5695 	 * builds a list of frames to go to the hardware and the EDMA
5696 	 * code turns it into a single entry to push into the FIFO.
5697 	 * That way we don't take up one packet per FIFO slot.
5698 	 * We do push one aggregate per FIFO slot though, just to keep
5699 	 * things simple.
5700 	 *
5701 	 * The FIFO depth is what's in the hardware; the txq->axq_depth
5702 	 * is what's been scheduled to the FIFO.
5703 	 *
5704 	 * fifo.axq_depth is the number of frames (or aggregates) pushed
5705 	 *  into the EDMA FIFO.  For multi-frame lists, this is the number
5706 	 *  of frames pushed in.
5707 	 * axq_fifo_depth is the number of FIFO slots currently busy.
5708 	 */
5709 
5710 	/* For EDMA and non-EDMA, check built/scheduled against aggr limit */
5711 	if (txq->axq_aggr_depth >= sc->sc_hwq_limit_aggr) {
5712 		sc->sc_aggr_stats.aggr_sched_nopkt++;
5713 		return;
5714 	}
5715 
5716 	/*
5717 	 * For non-EDMA chips, axq_depth is the "what's scheduled to
5718 	 * the hardware list".  For EDMA it's "What's built for the hardware"
5719 	 * and fifo.axq_depth is how many frames have been dispatched
5720 	 * already to the hardware.
5721 	 */
5722 	if (txq->axq_depth + txq->fifo.axq_depth >= sc->sc_hwq_limit_nonaggr) {
5723 		sc->sc_aggr_stats.aggr_sched_nopkt++;
5724 		return;
5725 	}
5726 
5727 	last = TAILQ_LAST(&txq->axq_tidq, axq_t_s);
5728 
5729 	TAILQ_FOREACH_SAFE(tid, &txq->axq_tidq, axq_qelem, next) {
5730 		/*
5731 		 * Suspend paused queues here; they'll be resumed
5732 		 * once the addba completes or times out.
5733 		 */
5734 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, paused=%d\n",
5735 		    __func__, tid->tid, tid->paused);
5736 		ath_tx_tid_unsched(sc, tid);
5737 		/*
5738 		 * This node may be in power-save and we're leaking
5739 		 * a frame; be careful.
5740 		 */
5741 		if (! ath_tx_tid_can_tx_or_sched(sc, tid)) {
5742 			goto loop_done;
5743 		}
5744 		if (ath_tx_ampdu_running(sc, tid->an, tid->tid))
5745 			ath_tx_tid_hw_queue_aggr(sc, tid->an, tid);
5746 		else
5747 			ath_tx_tid_hw_queue_norm(sc, tid->an, tid);
5748 
5749 		/* Not empty? Re-schedule */
5750 		if (tid->axq_depth != 0)
5751 			ath_tx_tid_sched(sc, tid);
5752 
5753 		/*
5754 		 * Give the software queue time to aggregate more
5755 		 * packets.  If we aren't running aggregation then
5756 		 * we should still limit the hardware queue depth.
5757 		 */
5758 		/* XXX TXQ locking */
5759 		if (txq->axq_aggr_depth + txq->fifo.axq_depth >= sc->sc_hwq_limit_aggr) {
5760 			break;
5761 		}
5762 		if (txq->axq_depth >= sc->sc_hwq_limit_nonaggr) {
5763 			break;
5764 		}
5765 loop_done:
5766 		/*
5767 		 * If this was the last entry on the original list, stop.
5768 		 * Otherwise nodes that have been rescheduled onto the end
5769 		 * of the TID FIFO list will just keep being rescheduled.
5770 		 *
5771 		 * XXX What should we do about nodes that were paused
5772 		 * but are pending a leaking frame in response to a ps-poll?
5773 		 * They'll be put at the front of the list; so they'll
5774 		 * prematurely trigger this condition! Ew.
5775 		 */
5776 		if (tid == last)
5777 			break;
5778 	}
5779 }
5780 
5781 /*
5782  * TX addba handling
5783  */
5784 
5785 /*
5786  * Return net80211 TID struct pointer, or NULL for none
5787  */
5788 struct ieee80211_tx_ampdu *
5789 ath_tx_get_tx_tid(struct ath_node *an, int tid)
5790 {
5791 	struct ieee80211_node *ni = &an->an_node;
5792 	struct ieee80211_tx_ampdu *tap;
5793 
5794 	if (tid == IEEE80211_NONQOS_TID)
5795 		return NULL;
5796 
5797 	tap = &ni->ni_tx_ampdu[tid];
5798 	return tap;
5799 }
5800 
5801 /*
5802  * Is AMPDU-TX running?
5803  */
5804 static int
5805 ath_tx_ampdu_running(struct ath_softc *sc, struct ath_node *an, int tid)
5806 {
5807 	struct ieee80211_tx_ampdu *tap;
5808 
5809 	if (tid == IEEE80211_NONQOS_TID)
5810 		return 0;
5811 
5812 	tap = ath_tx_get_tx_tid(an, tid);
5813 	if (tap == NULL)
5814 		return 0;	/* Not valid; default to not running */
5815 
5816 	return !! (tap->txa_flags & IEEE80211_AGGR_RUNNING);
5817 }
5818 
5819 /*
5820  * Is AMPDU-TX negotiation pending?
5821  */
5822 static int
5823 ath_tx_ampdu_pending(struct ath_softc *sc, struct ath_node *an, int tid)
5824 {
5825 	struct ieee80211_tx_ampdu *tap;
5826 
5827 	if (tid == IEEE80211_NONQOS_TID)
5828 		return 0;
5829 
5830 	tap = ath_tx_get_tx_tid(an, tid);
5831 	if (tap == NULL)
5832 		return 0;	/* Not valid; default to not pending */
5833 
5834 	return !! (tap->txa_flags & IEEE80211_AGGR_XCHGPEND);
5835 }
5836 
5837 /*
5838  * Is AMPDU-TX pending for the given TID?
5839  */
5840 
5841 
5842 /*
5843  * Method to handle sending an ADDBA request.
5844  *
5845  * We tap this so the relevant flags can be set to pause the TID
5846  * whilst waiting for the response.
5847  *
5848  * XXX there's no timeout handler we can override?
5849  */
5850 int
5851 ath_addba_request(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
5852     int dialogtoken, int baparamset, int batimeout)
5853 {
5854 	struct ath_softc *sc = ni->ni_ic->ic_softc;
5855 	int tid = tap->txa_tid;
5856 	struct ath_node *an = ATH_NODE(ni);
5857 	struct ath_tid *atid = &an->an_tid[tid];
5858 
5859 	/*
5860 	 * XXX danger Will Robinson!
5861 	 *
5862 	 * Although the taskqueue may be running and scheduling some more
5863 	 * packets, these should all be _before_ the addba sequence number.
5864 	 * However, net80211 will keep self-assigning sequence numbers
5865 	 * until addba has been negotiated.
5866 	 *
5867 	 * In the past, these packets would be "paused" (which still works
5868 	 * fine, as they're being scheduled to the driver in the same
5869 	 * serialised method which is calling the addba request routine)
5870 	 * and when the aggregation session begins, they'll be dequeued
5871 	 * as aggregate packets and added to the BAW. However, now there's
5872 	 * a "bf->bf_state.bfs_dobaw" flag, and this isn't set for these
5873 	 * packets. Thus they never get included in the BAW tracking and
5874 	 * this can cause the initial burst of packets after the addba
5875 	 * negotiation to "hang", as they quickly fall outside the BAW.
5876 	 *
5877 	 * The "eventual" solution should be to tag these packets with
5878 	 * dobaw. Although net80211 has given us a sequence number,
5879 	 * it'll be "after" the left edge of the BAW and thus it'll
5880 	 * fall within it.
5881 	 */
5882 	ATH_TX_LOCK(sc);
5883 	/*
5884 	 * This is a bit annoying.  Until net80211 HT code inherits some
5885 	 * (any) locking, we may have this called in parallel BUT only
5886 	 * one response/timeout will be called.  Grr.
5887 	 */
5888 	if (atid->addba_tx_pending == 0) {
5889 		ath_tx_tid_pause(sc, atid);
5890 		atid->addba_tx_pending = 1;
5891 	}
5892 	ATH_TX_UNLOCK(sc);
5893 
5894 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
5895 	    "%s: %6D: called; dialogtoken=%d, baparamset=%d, batimeout=%d\n",
5896 	    __func__,
5897 	    ni->ni_macaddr,
5898 	    ":",
5899 	    dialogtoken, baparamset, batimeout);
5900 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
5901 	    "%s: txa_start=%d, ni_txseqs=%d\n",
5902 	    __func__, tap->txa_start, ni->ni_txseqs[tid]);
5903 
5904 	return sc->sc_addba_request(ni, tap, dialogtoken, baparamset,
5905 	    batimeout);
5906 }
5907 
5908 /*
5909  * Handle an ADDBA response.
5910  *
5911  * We unpause the queue so TX'ing can resume.
5912  *
5913  * Any packets TX'ed from this point should be "aggregate" (whether
5914  * aggregate or not) so the BAW is updated.
5915  *
5916  * Note! net80211 keeps self-assigning sequence numbers until
5917  * ampdu is negotiated. This means the initially-negotiated BAW left
5918  * edge won't match the ni->ni_txseq.
5919  *
5920  * So, being very dirty, the BAW left edge is "slid" here to match
5921  * ni->ni_txseq.
5922  *
5923  * What likely SHOULD happen is that all packets subsequent to the
5924  * addba request should be tagged as aggregate and queued as non-aggregate
5925  * frames; thus updating the BAW. For now though, I'll just slide the
5926  * window.
5927  */
5928 int
5929 ath_addba_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
5930     int status, int code, int batimeout)
5931 {
5932 	struct ath_softc *sc = ni->ni_ic->ic_softc;
5933 	int tid = tap->txa_tid;
5934 	struct ath_node *an = ATH_NODE(ni);
5935 	struct ath_tid *atid = &an->an_tid[tid];
5936 	int r;
5937 
5938 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
5939 	    "%s: %6D: called; status=%d, code=%d, batimeout=%d\n", __func__,
5940 	    ni->ni_macaddr,
5941 	    ":",
5942 	    status, code, batimeout);
5943 
5944 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
5945 	    "%s: txa_start=%d, ni_txseqs=%d\n",
5946 	    __func__, tap->txa_start, ni->ni_txseqs[tid]);
5947 
5948 	/*
5949 	 * Call this first, so the interface flags get updated
5950 	 * before the TID is unpaused. Otherwise a race condition
5951 	 * exists where the unpaused TID still doesn't yet have
5952 	 * IEEE80211_AGGR_RUNNING set.
5953 	 */
5954 	r = sc->sc_addba_response(ni, tap, status, code, batimeout);
5955 
5956 	ATH_TX_LOCK(sc);
5957 	atid->addba_tx_pending = 0;
5958 	/*
5959 	 * XXX dirty!
5960 	 * Slide the BAW left edge to wherever net80211 left it for us.
5961 	 * Read above for more information.
5962 	 */
5963 	tap->txa_start = ni->ni_txseqs[tid];
5964 	ath_tx_tid_resume(sc, atid);
5965 	ATH_TX_UNLOCK(sc);
5966 	return r;
5967 }
5968 
5969 
5970 /*
5971  * Stop ADDBA on a queue.
5972  *
5973  * This can be called whilst BAR TX is currently active on the queue,
5974  * so make sure this is unblocked before continuing.
5975  */
5976 void
5977 ath_addba_stop(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap)
5978 {
5979 	struct ath_softc *sc = ni->ni_ic->ic_softc;
5980 	int tid = tap->txa_tid;
5981 	struct ath_node *an = ATH_NODE(ni);
5982 	struct ath_tid *atid = &an->an_tid[tid];
5983 	ath_bufhead bf_cq;
5984 	struct ath_buf *bf;
5985 
5986 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: %6D: called\n",
5987 	    __func__,
5988 	    ni->ni_macaddr,
5989 	    ":");
5990 
5991 	/*
5992 	 * Pause TID traffic early, so there aren't any races
5993 	 * Unblock the pending BAR held traffic, if it's currently paused.
5994 	 */
5995 	ATH_TX_LOCK(sc);
5996 	ath_tx_tid_pause(sc, atid);
5997 	if (atid->bar_wait) {
5998 		/*
5999 		 * bar_unsuspend() expects bar_tx == 1, as it should be
6000 		 * called from the TX completion path.  This quietens
6001 		 * the warning.  It's cleared for us anyway.
6002 		 */
6003 		atid->bar_tx = 1;
6004 		ath_tx_tid_bar_unsuspend(sc, atid);
6005 	}
6006 	ATH_TX_UNLOCK(sc);
6007 
6008 	/* There's no need to hold the TXQ lock here */
6009 	sc->sc_addba_stop(ni, tap);
6010 
6011 	/*
6012 	 * ath_tx_tid_cleanup will resume the TID if possible, otherwise
6013 	 * it'll set the cleanup flag, and it'll be unpaused once
6014 	 * things have been cleaned up.
6015 	 */
6016 	TAILQ_INIT(&bf_cq);
6017 	ATH_TX_LOCK(sc);
6018 
6019 	/*
6020 	 * In case there's a followup call to this, only call it
6021 	 * if we don't have a cleanup in progress.
6022 	 *
6023 	 * Since we've paused the queue above, we need to make
6024 	 * sure we unpause if there's already a cleanup in
6025 	 * progress - it means something else is also doing
6026 	 * this stuff, so we don't need to also keep it paused.
6027 	 */
6028 	if (atid->cleanup_inprogress) {
6029 		ath_tx_tid_resume(sc, atid);
6030 	} else {
6031 		ath_tx_tid_cleanup(sc, an, tid, &bf_cq);
6032 		/*
6033 		 * Unpause the TID if no cleanup is required.
6034 		 */
6035 		if (! atid->cleanup_inprogress)
6036 			ath_tx_tid_resume(sc, atid);
6037 	}
6038 	ATH_TX_UNLOCK(sc);
6039 
6040 	/* Handle completing frames and fail them */
6041 	while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
6042 		TAILQ_REMOVE(&bf_cq, bf, bf_list);
6043 		ath_tx_default_comp(sc, bf, 1);
6044 	}
6045 
6046 }
6047 
6048 /*
6049  * Handle a node reassociation.
6050  *
6051  * We may have a bunch of frames queued to the hardware; those need
6052  * to be marked as cleanup.
6053  */
6054 void
6055 ath_tx_node_reassoc(struct ath_softc *sc, struct ath_node *an)
6056 {
6057 	struct ath_tid *tid;
6058 	int i;
6059 	ath_bufhead bf_cq;
6060 	struct ath_buf *bf;
6061 
6062 	TAILQ_INIT(&bf_cq);
6063 
6064 	ATH_TX_UNLOCK_ASSERT(sc);
6065 
6066 	ATH_TX_LOCK(sc);
6067 	for (i = 0; i < IEEE80211_TID_SIZE; i++) {
6068 		tid = &an->an_tid[i];
6069 		if (tid->hwq_depth == 0)
6070 			continue;
6071 		DPRINTF(sc, ATH_DEBUG_NODE,
6072 		    "%s: %6D: TID %d: cleaning up TID\n",
6073 		    __func__,
6074 		    an->an_node.ni_macaddr,
6075 		    ":",
6076 		    i);
6077 		/*
6078 		 * In case there's a followup call to this, only call it
6079 		 * if we don't have a cleanup in progress.
6080 		 */
6081 		if (! tid->cleanup_inprogress) {
6082 			ath_tx_tid_pause(sc, tid);
6083 			ath_tx_tid_cleanup(sc, an, i, &bf_cq);
6084 			/*
6085 			 * Unpause the TID if no cleanup is required.
6086 			 */
6087 			if (! tid->cleanup_inprogress)
6088 				ath_tx_tid_resume(sc, tid);
6089 		}
6090 	}
6091 	ATH_TX_UNLOCK(sc);
6092 
6093 	/* Handle completing frames and fail them */
6094 	while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
6095 		TAILQ_REMOVE(&bf_cq, bf, bf_list);
6096 		ath_tx_default_comp(sc, bf, 1);
6097 	}
6098 }
6099 
6100 /*
6101  * Note: net80211 bar_timeout() doesn't call this function on BAR failure;
6102  * it simply tears down the aggregation session. Ew.
6103  *
6104  * It however will call ieee80211_ampdu_stop() which will call
6105  * ic->ic_addba_stop().
6106  *
6107  * XXX This uses a hard-coded max BAR count value; the whole
6108  * XXX BAR TX success or failure should be better handled!
6109  */
6110 void
6111 ath_bar_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
6112     int status)
6113 {
6114 	struct ath_softc *sc = ni->ni_ic->ic_softc;
6115 	int tid = tap->txa_tid;
6116 	struct ath_node *an = ATH_NODE(ni);
6117 	struct ath_tid *atid = &an->an_tid[tid];
6118 	int attempts = tap->txa_attempts;
6119 	int old_txa_start;
6120 
6121 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
6122 	    "%s: %6D: called; txa_tid=%d, atid->tid=%d, status=%d, attempts=%d, txa_start=%d, txa_seqpending=%d\n",
6123 	    __func__,
6124 	    ni->ni_macaddr,
6125 	    ":",
6126 	    tap->txa_tid,
6127 	    atid->tid,
6128 	    status,
6129 	    attempts,
6130 	    tap->txa_start,
6131 	    tap->txa_seqpending);
6132 
6133 	/* Note: This may update the BAW details */
6134 	/*
6135 	 * XXX What if this does slide the BAW along? We need to somehow
6136 	 * XXX either fix things when it does happen, or prevent the
6137 	 * XXX seqpending value to be anything other than exactly what
6138 	 * XXX the hell we want!
6139 	 *
6140 	 * XXX So for now, how I do this inside the TX lock for now
6141 	 * XXX and just correct it afterwards? The below condition should
6142 	 * XXX never happen and if it does I need to fix all kinds of things.
6143 	 */
6144 	ATH_TX_LOCK(sc);
6145 	old_txa_start = tap->txa_start;
6146 	sc->sc_bar_response(ni, tap, status);
6147 	if (tap->txa_start != old_txa_start) {
6148 		device_printf(sc->sc_dev, "%s: tid=%d; txa_start=%d, old=%d, adjusting\n",
6149 		    __func__,
6150 		    tid,
6151 		    tap->txa_start,
6152 		    old_txa_start);
6153 	}
6154 	tap->txa_start = old_txa_start;
6155 	ATH_TX_UNLOCK(sc);
6156 
6157 	/* Unpause the TID */
6158 	/*
6159 	 * XXX if this is attempt=50, the TID will be downgraded
6160 	 * XXX to a non-aggregate session. So we must unpause the
6161 	 * XXX TID here or it'll never be done.
6162 	 *
6163 	 * Also, don't call it if bar_tx/bar_wait are 0; something
6164 	 * has beaten us to the punch? (XXX figure out what?)
6165 	 */
6166 	if (status == 0 || attempts == 50) {
6167 		ATH_TX_LOCK(sc);
6168 		if (atid->bar_tx == 0 || atid->bar_wait == 0)
6169 			DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
6170 			    "%s: huh? bar_tx=%d, bar_wait=%d\n",
6171 			    __func__,
6172 			    atid->bar_tx, atid->bar_wait);
6173 		else
6174 			ath_tx_tid_bar_unsuspend(sc, atid);
6175 		ATH_TX_UNLOCK(sc);
6176 	}
6177 }
6178 
6179 /*
6180  * This is called whenever the pending ADDBA request times out.
6181  * Unpause and reschedule the TID.
6182  */
6183 void
6184 ath_addba_response_timeout(struct ieee80211_node *ni,
6185     struct ieee80211_tx_ampdu *tap)
6186 {
6187 	struct ath_softc *sc = ni->ni_ic->ic_softc;
6188 	int tid = tap->txa_tid;
6189 	struct ath_node *an = ATH_NODE(ni);
6190 	struct ath_tid *atid = &an->an_tid[tid];
6191 
6192 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
6193 	    "%s: %6D: TID=%d, called; resuming\n",
6194 	    __func__,
6195 	    ni->ni_macaddr,
6196 	    ":",
6197 	    tid);
6198 
6199 	ATH_TX_LOCK(sc);
6200 	atid->addba_tx_pending = 0;
6201 	ATH_TX_UNLOCK(sc);
6202 
6203 	/* Note: This updates the aggregate state to (again) pending */
6204 	sc->sc_addba_response_timeout(ni, tap);
6205 
6206 	/* Unpause the TID; which reschedules it */
6207 	ATH_TX_LOCK(sc);
6208 	ath_tx_tid_resume(sc, atid);
6209 	ATH_TX_UNLOCK(sc);
6210 }
6211 
6212 /*
6213  * Check if a node is asleep or not.
6214  */
6215 int
6216 ath_tx_node_is_asleep(struct ath_softc *sc, struct ath_node *an)
6217 {
6218 
6219 	ATH_TX_LOCK_ASSERT(sc);
6220 
6221 	return (an->an_is_powersave);
6222 }
6223 
6224 /*
6225  * Mark a node as currently "in powersaving."
6226  * This suspends all traffic on the node.
6227  *
6228  * This must be called with the node/tx locks free.
6229  *
6230  * XXX TODO: the locking silliness below is due to how the node
6231  * locking currently works.  Right now, the node lock is grabbed
6232  * to do rate control lookups and these are done with the TX
6233  * queue lock held.  This means the node lock can't be grabbed
6234  * first here or a LOR will occur.
6235  *
6236  * Eventually (hopefully!) the TX path code will only grab
6237  * the TXQ lock when transmitting and the ath_node lock when
6238  * doing node/TID operations.  There are other complications -
6239  * the sched/unsched operations involve walking the per-txq
6240  * 'active tid' list and this requires both locks to be held.
6241  */
6242 void
6243 ath_tx_node_sleep(struct ath_softc *sc, struct ath_node *an)
6244 {
6245 	struct ath_tid *atid;
6246 	struct ath_txq *txq;
6247 	int tid;
6248 
6249 	ATH_TX_UNLOCK_ASSERT(sc);
6250 
6251 	/* Suspend all traffic on the node */
6252 	ATH_TX_LOCK(sc);
6253 
6254 	if (an->an_is_powersave) {
6255 		DPRINTF(sc, ATH_DEBUG_XMIT,
6256 		    "%s: %6D: node was already asleep!\n",
6257 		    __func__, an->an_node.ni_macaddr, ":");
6258 		ATH_TX_UNLOCK(sc);
6259 		return;
6260 	}
6261 
6262 	for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) {
6263 		atid = &an->an_tid[tid];
6264 		txq = sc->sc_ac2q[atid->ac];
6265 
6266 		ath_tx_tid_pause(sc, atid);
6267 	}
6268 
6269 	/* Mark node as in powersaving */
6270 	an->an_is_powersave = 1;
6271 
6272 	ATH_TX_UNLOCK(sc);
6273 }
6274 
6275 /*
6276  * Mark a node as currently "awake."
6277  * This resumes all traffic to the node.
6278  */
6279 void
6280 ath_tx_node_wakeup(struct ath_softc *sc, struct ath_node *an)
6281 {
6282 	struct ath_tid *atid;
6283 	struct ath_txq *txq;
6284 	int tid;
6285 
6286 	ATH_TX_UNLOCK_ASSERT(sc);
6287 
6288 	ATH_TX_LOCK(sc);
6289 
6290 	/* !? */
6291 	if (an->an_is_powersave == 0) {
6292 		ATH_TX_UNLOCK(sc);
6293 		DPRINTF(sc, ATH_DEBUG_XMIT,
6294 		    "%s: an=%p: node was already awake\n",
6295 		    __func__, an);
6296 		return;
6297 	}
6298 
6299 	/* Mark node as awake */
6300 	an->an_is_powersave = 0;
6301 	/*
6302 	 * Clear any pending leaked frame requests
6303 	 */
6304 	an->an_leak_count = 0;
6305 
6306 	for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) {
6307 		atid = &an->an_tid[tid];
6308 		txq = sc->sc_ac2q[atid->ac];
6309 
6310 		ath_tx_tid_resume(sc, atid);
6311 	}
6312 	ATH_TX_UNLOCK(sc);
6313 }
6314 
6315 static int
6316 ath_legacy_dma_txsetup(struct ath_softc *sc)
6317 {
6318 
6319 	/* nothing new needed */
6320 	return (0);
6321 }
6322 
6323 static int
6324 ath_legacy_dma_txteardown(struct ath_softc *sc)
6325 {
6326 
6327 	/* nothing new needed */
6328 	return (0);
6329 }
6330 
6331 void
6332 ath_xmit_setup_legacy(struct ath_softc *sc)
6333 {
6334 	/*
6335 	 * For now, just set the descriptor length to sizeof(ath_desc);
6336 	 * worry about extracting the real length out of the HAL later.
6337 	 */
6338 	sc->sc_tx_desclen = sizeof(struct ath_desc);
6339 	sc->sc_tx_statuslen = sizeof(struct ath_desc);
6340 	sc->sc_tx_nmaps = 1;	/* only one buffer per TX desc */
6341 
6342 	sc->sc_tx.xmit_setup = ath_legacy_dma_txsetup;
6343 	sc->sc_tx.xmit_teardown = ath_legacy_dma_txteardown;
6344 	sc->sc_tx.xmit_attach_comp_func = ath_legacy_attach_comp_func;
6345 
6346 	sc->sc_tx.xmit_dma_restart = ath_legacy_tx_dma_restart;
6347 	sc->sc_tx.xmit_handoff = ath_legacy_xmit_handoff;
6348 
6349 	sc->sc_tx.xmit_drain = ath_legacy_tx_drain;
6350 }
6351