1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org> 5 * Copyright (c) 2017 The FreeBSD Foundation 6 * All rights reserved. 7 * 8 * Portions of this software were developed by Landon Fuller 9 * under sponsorship from the FreeBSD Foundation. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer, 16 * without modification. 17 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 18 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 19 * redistribution must be conditioned upon including a substantially 20 * similar Disclaimer requirement for further binary redistribution. 21 * 22 * NO WARRANTY 23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 25 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 26 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 27 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 28 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 31 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 33 * THE POSSIBILITY OF SUCH DAMAGES. 34 * 35 * $FreeBSD$ 36 */ 37 38 #ifndef _BHND_BHND_TYPES_H_ 39 #define _BHND_BHND_TYPES_H_ 40 41 #include <sys/types.h> 42 43 #include "nvram/bhnd_nvram.h" 44 45 /** bhnd(4) device classes. */ 46 typedef enum { 47 BHND_DEVCLASS_CC, /**< chipcommon i/o controller */ 48 BHND_DEVCLASS_CC_B, /**< chipcommon auxiliary controller */ 49 BHND_DEVCLASS_PMU, /**< pmu controller */ 50 BHND_DEVCLASS_PCI, /**< pci host/device bridge */ 51 BHND_DEVCLASS_PCIE, /**< pcie host/device bridge */ 52 BHND_DEVCLASS_PCCARD, /**< pcmcia host/device bridge */ 53 BHND_DEVCLASS_RAM, /**< internal RAM/SRAM */ 54 BHND_DEVCLASS_MEMC, /**< memory controller */ 55 BHND_DEVCLASS_ENET, /**< 802.3 MAC/PHY */ 56 BHND_DEVCLASS_ENET_MAC, /**< 802.3 MAC */ 57 BHND_DEVCLASS_ENET_PHY, /**< 802.3 PHY */ 58 BHND_DEVCLASS_WLAN, /**< 802.11 MAC/PHY/Radio */ 59 BHND_DEVCLASS_WLAN_MAC, /**< 802.11 MAC */ 60 BHND_DEVCLASS_WLAN_PHY, /**< 802.11 PHY */ 61 BHND_DEVCLASS_CPU, /**< cpu core */ 62 BHND_DEVCLASS_SOC_ROUTER, /**< interconnect router */ 63 BHND_DEVCLASS_SOC_BRIDGE, /**< interconnect host bridge */ 64 BHND_DEVCLASS_EROM, /**< bus device enumeration ROM */ 65 BHND_DEVCLASS_NVRAM, /**< nvram/flash controller */ 66 BHND_DEVCLASS_USB_HOST, /**< USB host controller */ 67 BHND_DEVCLASS_USB_DEV, /**< USB device controller */ 68 BHND_DEVCLASS_USB_DUAL, /**< USB host/device controller */ 69 BHND_DEVCLASS_SOFTMODEM, /**< analog/PSTN softmodem codec */ 70 71 BHND_DEVCLASS_OTHER = 1000, /**< other / unknown */ 72 BHND_DEVCLASS_INVALID /**< no/invalid class */ 73 } bhnd_devclass_t; 74 75 /** bhnd(4) platform services. */ 76 typedef enum { 77 BHND_SERVICE_CHIPC, /**< chipcommon service; implements the bhnd_chipc interface */ 78 BHND_SERVICE_PWRCTL, /**< legacy pwrctl service; implements the bhnd_pwrctl interface */ 79 BHND_SERVICE_PMU, /**< pmu service; implements the bhnd_pmu interface */ 80 BHND_SERVICE_NVRAM, /**< nvram service; implements the bhnd_nvram interface */ 81 BHND_SERVICE_GPIO, /**< gpio service; implements the standard gpio interface */ 82 83 BHND_SERVICE_ANY = 1000, /**< match on any service type */ 84 } bhnd_service_t; 85 86 /** 87 * bhnd(4) port types. 88 * 89 * Only BHND_PORT_DEVICE is guaranteed to be supported by all bhnd(4) bus 90 * implementations. 91 */ 92 typedef enum { 93 BHND_PORT_DEVICE = 0, /**< device memory */ 94 BHND_PORT_BRIDGE = 1, /**< bridge memory */ 95 BHND_PORT_AGENT = 2, /**< interconnect agent/wrapper */ 96 } bhnd_port_type; 97 98 /** 99 * bhnd(4) attachment types. 100 */ 101 typedef enum { 102 BHND_ATTACH_ADAPTER = 0, /**< A bridged card, such as a PCI WiFi chipset */ 103 BHND_ATTACH_NATIVE = 1 /**< A bus resident on the native host, such as 104 * the primary or secondary bus of an embedded 105 * SoC */ 106 } bhnd_attach_type; 107 108 /** 109 * bhnd(4) clock types. 110 */ 111 typedef enum { 112 /** 113 * Dynamically select an appropriate clock source based on all 114 * outstanding clock requests. 115 */ 116 BHND_CLOCK_DYN = (1 << 0), 117 118 /** 119 * Idle Low-Power (ILP). 120 * 121 * No register access is required, or long request latency is 122 * acceptable. 123 */ 124 BHND_CLOCK_ILP = (1 << 1), 125 126 /** 127 * Active Low-Power (ALP). 128 * 129 * Low-latency register access and low-rate DMA. 130 */ 131 BHND_CLOCK_ALP = (1 << 2), 132 133 /** 134 * High Throughput (HT). 135 * 136 * High bus throughput and lowest-latency register access. 137 */ 138 BHND_CLOCK_HT = (1 << 3) 139 } bhnd_clock; 140 141 /** 142 * Given two clock types, return the type with the highest precedence. 143 */ 144 static inline bhnd_clock 145 bhnd_clock_max(bhnd_clock a, bhnd_clock b) { 146 return (a > b ? a : b); 147 } 148 149 /** 150 * bhnd(4) clock sources. 151 */ 152 typedef enum { 153 /** 154 * Clock is provided by the PCI bus clock 155 */ 156 BHND_CLKSRC_PCI = 0, 157 158 /** Clock is provided by a crystal. */ 159 BHND_CLKSRC_XTAL = 1, 160 161 /** Clock is provided by a low power oscillator. */ 162 BHND_CLKSRC_LPO = 2, 163 164 /** Clock source is unknown */ 165 BHND_CLKSRC_UNKNOWN = 3 166 } bhnd_clksrc; 167 168 /** Evaluates to true if @p cls is a device class that can be configured 169 * as a host bridge device. */ 170 #define BHND_DEVCLASS_SUPPORTS_HOSTB(cls) \ 171 ((cls) == BHND_DEVCLASS_PCI || (cls) == BHND_DEVCLASS_PCIE || \ 172 (cls) == BHND_DEVCLASS_PCCARD) 173 174 /** 175 * BHND bus address. 176 * 177 * @note While the interconnect may support 64-bit addressing, not 178 * all bridges and SoC CPUs will. 179 */ 180 typedef uint64_t bhnd_addr_t; 181 #define BHND_ADDR_MAX UINT64_MAX /**< Maximum bhnd_addr_t value */ 182 183 /** BHND bus size. */ 184 typedef uint64_t bhnd_size_t; 185 #define BHND_SIZE_MAX UINT64_MAX /**< Maximum bhnd_size_t value */ 186 187 188 #endif /* _BHND_BHND_TYPES_H_ */ 189