1 /* 2 * Copyright (c) 2000,2001 Jonathan Chen. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions, and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in 13 * the documentation and/or other materials provided with the 14 * distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 20 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 31 /* 32 * Cardbus Bus Driver 33 * 34 * much of the bus code was stolen directly from sys/pci/pci.c 35 * (Copyright (c) 1997, Stefan Esser <se@freebsd.org>) 36 * 37 * Written by Jonathan Chen <jon@freebsd.org> 38 */ 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/malloc.h> 43 #include <sys/kernel.h> 44 #include <sys/sysctl.h> 45 46 #include <sys/bus.h> 47 #include <machine/bus.h> 48 #include <sys/rman.h> 49 #include <machine/resource.h> 50 51 #include <sys/pciio.h> 52 #include <dev/pci/pcivar.h> 53 #include <dev/pci/pcireg.h> 54 55 #include <dev/cardbus/cardbusreg.h> 56 #include <dev/cardbus/cardbusvar.h> 57 #include <dev/cardbus/cardbus_cis.h> 58 #include <dev/pccard/pccardvar.h> 59 60 #include "power_if.h" 61 #include "pcib_if.h" 62 63 /* sysctl vars */ 64 SYSCTL_NODE(_hw, OID_AUTO, cardbus, CTLFLAG_RD, 0, "CardBus parameters"); 65 66 int cardbus_debug = 0; 67 TUNABLE_INT("hw.cardbus.debug", &cardbus_debug); 68 SYSCTL_INT(_hw_cardbus, OID_AUTO, debug, CTLFLAG_RW, 69 &cardbus_debug, 0, 70 "CardBus debug"); 71 72 int cardbus_cis_debug = 0; 73 TUNABLE_INT("hw.cardbus.cis_debug", &cardbus_cis_debug); 74 SYSCTL_INT(_hw_cardbus, OID_AUTO, cis_debug, CTLFLAG_RW, 75 &cardbus_cis_debug, 0, 76 "CardBus CIS debug"); 77 78 #define DPRINTF(a) if (cardbus_debug) printf a 79 #define DEVPRINTF(x) if (cardbus_debug) device_printf x 80 81 82 static struct resource *cardbus_alloc_resource(device_t cbdev, device_t child, 83 int type, int *rid, u_long start, u_long end, u_long count, 84 u_int flags); 85 static int cardbus_attach(device_t cbdev); 86 static int cardbus_attach_card(device_t cbdev); 87 static int cardbus_child_location_str(device_t cbdev, device_t child, 88 char *, size_t len); 89 static int cardbus_child_pnpinfo_str(device_t cbdev, device_t child, 90 char *, size_t len); 91 static __inline void cardbus_clear_command_bit(device_t cbdev, device_t child, 92 u_int16_t bit); 93 static void cardbus_delete_resource(device_t cbdev, device_t child, 94 int type, int rid); 95 static void cardbus_delete_resource_method(device_t cbdev, device_t child, 96 int type, int rid); 97 static int cardbus_detach(device_t cbdev); 98 static int cardbus_detach_card(device_t cbdev); 99 static void cardbus_device_setup_regs(device_t brdev, int b, int s, int f, 100 pcicfgregs *cfg); 101 static void cardbus_disable_busmaster_method(device_t cbdev, device_t child); 102 static void cardbus_disable_io_method(device_t cbdev, device_t child, 103 int space); 104 static void cardbus_driver_added(device_t cbdev, driver_t *driver); 105 static void cardbus_enable_busmaster_method(device_t cbdev, device_t child); 106 static void cardbus_enable_io_method(device_t cbdev, device_t child, 107 int space); 108 static int cardbus_freecfg(struct cardbus_devinfo *dinfo); 109 static int cardbus_get_powerstate_method(device_t cbdev, device_t child); 110 static int cardbus_get_resource(device_t cbdev, device_t child, int type, 111 int rid, u_long *startp, u_long *countp); 112 static int cardbus_get_resource_method(device_t cbdev, device_t child, 113 int type, int rid, u_long *startp, u_long *countp); 114 static void cardbus_hdrtypedata(device_t brdev, int b, int s, int f, 115 pcicfgregs *cfg); 116 static int cardbus_print_child(device_t cbdev, device_t child); 117 static int cardbus_print_resources(struct resource_list *rl, 118 const char *name, int type, const char *format); 119 static void cardbus_print_verbose(struct cardbus_devinfo *dinfo); 120 static int cardbus_probe(device_t cbdev); 121 static void cardbus_probe_nomatch(device_t cbdev, device_t child); 122 static struct cardbus_devinfo *cardbus_read_device(device_t brdev, int b, 123 int s, int f); 124 static void cardbus_read_extcap(device_t cbdev, pcicfgregs *cfg); 125 static u_int32_t cardbus_read_config_method(device_t cbdev, 126 device_t child, int reg, int width); 127 static int cardbus_read_ivar(device_t cbdev, device_t child, int which, 128 u_long *result); 129 static void cardbus_release_all_resources(device_t cbdev, 130 struct cardbus_devinfo *dinfo); 131 static int cardbus_release_resource(device_t cbdev, device_t child, 132 int type, int rid, struct resource *r); 133 static __inline void cardbus_set_command_bit(device_t cbdev, device_t child, 134 u_int16_t bit); 135 static int cardbus_set_powerstate_method(device_t cbdev, device_t child, 136 int state); 137 static int cardbus_set_resource(device_t cbdev, device_t child, int type, 138 int rid, u_long start, u_long count, struct resource *res); 139 static int cardbus_set_resource_method(device_t cbdev, device_t child, 140 int type, int rid, u_long start, u_long count); 141 static int cardbus_setup_intr(device_t cbdev, device_t child, 142 struct resource *irq, int flags, driver_intr_t *intr, 143 void *arg, void **cookiep); 144 static int cardbus_teardown_intr(device_t cbdev, device_t child, 145 struct resource *irq, void *cookie); 146 static void cardbus_write_config_method(device_t cbdev, device_t child, 147 int reg, u_int32_t val, int width); 148 static int cardbus_write_ivar(device_t cbdev, device_t child, int which, 149 uintptr_t value); 150 151 /************************************************************************/ 152 /* Probe/Attach */ 153 /************************************************************************/ 154 155 static int 156 cardbus_probe(device_t cbdev) 157 { 158 device_set_desc(cbdev, "CardBus bus"); 159 return 0; 160 } 161 162 static int 163 cardbus_attach(device_t cbdev) 164 { 165 return 0; 166 } 167 168 static int 169 cardbus_detach(device_t cbdev) 170 { 171 cardbus_detach_card(cbdev); 172 return 0; 173 } 174 175 static int 176 cardbus_suspend(device_t self) 177 { 178 cardbus_detach_card(self); 179 return (0); 180 } 181 182 static int 183 cardbus_resume(device_t self) 184 { 185 return (0); 186 } 187 188 /************************************************************************/ 189 /* Attach/Detach card */ 190 /************************************************************************/ 191 192 static void 193 cardbus_device_setup_regs(device_t brdev, int b, int s, int f, pcicfgregs *cfg) 194 { 195 PCIB_WRITE_CONFIG(brdev, b, s, f, PCIR_INTLINE, 196 pci_get_irq(device_get_parent(brdev)), 1); 197 cfg->intline = PCIB_READ_CONFIG(brdev, b, s, f, PCIR_INTLINE, 1); 198 199 PCIB_WRITE_CONFIG(brdev, b, s, f, PCIR_CACHELNSZ, 0x08, 1); 200 cfg->cachelnsz = PCIB_READ_CONFIG(brdev, b, s, f, PCIR_CACHELNSZ, 1); 201 202 PCIB_WRITE_CONFIG(brdev, b, s, f, PCIR_LATTIMER, 0xa8, 1); 203 cfg->lattimer = PCIB_READ_CONFIG(brdev, b, s, f, PCIR_LATTIMER, 1); 204 205 PCIB_WRITE_CONFIG(brdev, b, s, f, PCIR_MINGNT, 0x14, 1); 206 cfg->mingnt = PCIB_READ_CONFIG(brdev, b, s, f, PCIR_MINGNT, 1); 207 208 PCIB_WRITE_CONFIG(brdev, b, s, f, PCIR_MAXLAT, 0x14, 1); 209 cfg->maxlat = PCIB_READ_CONFIG(brdev, b, s, f, PCIR_MAXLAT, 1); 210 } 211 212 static int 213 cardbus_attach_card(device_t cbdev) 214 { 215 device_t brdev = device_get_parent(cbdev); 216 int cardattached = 0; 217 static int curr_bus_number = 2; /* XXX EVILE BAD (see below) */ 218 int bus, slot, func; 219 220 cardbus_detach_card(cbdev); /* detach existing cards */ 221 222 POWER_ENABLE_SOCKET(brdev, cbdev); 223 bus = pcib_get_bus(cbdev); 224 if (bus == 0) { 225 /* 226 * XXX EVILE BAD XXX 227 * Not all BIOSes initialize the secondary bus number properly, 228 * so if the default is bad, we just put one in and hope it 229 * works. 230 */ 231 bus = curr_bus_number; 232 pci_write_config(brdev, PCIR_SECBUS_2, curr_bus_number, 1); 233 pci_write_config(brdev, PCIR_SUBBUS_2, curr_bus_number + 2, 1); 234 curr_bus_number += 3; 235 } 236 /* For each function, set it up and try to attach a driver to it */ 237 for (slot = 0; slot <= CARDBUS_SLOTMAX; slot++) { 238 int cardbusfunchigh = 0; 239 for (func = 0; func <= cardbusfunchigh; func++) { 240 struct cardbus_devinfo *dinfo = 241 cardbus_read_device(brdev, bus, slot, func); 242 243 if (dinfo == NULL) 244 continue; 245 if (dinfo->pci.cfg.mfdev) 246 cardbusfunchigh = CARDBUS_FUNCMAX; 247 248 cardbus_device_setup_regs(brdev, bus, slot, func, 249 &dinfo->pci.cfg); 250 cardbus_print_verbose(dinfo); 251 dinfo->pci.cfg.dev = device_add_child(cbdev, NULL, -1); 252 if (!dinfo->pci.cfg.dev) { 253 DEVPRINTF((cbdev, "Cannot add child!\n")); 254 cardbus_freecfg(dinfo); 255 continue; 256 } 257 resource_list_init(&dinfo->pci.resources); 258 device_set_ivars(dinfo->pci.cfg.dev, dinfo); 259 cardbus_do_cis(cbdev, dinfo->pci.cfg.dev); 260 if (device_probe_and_attach(dinfo->pci.cfg.dev) != 0) 261 cardbus_release_all_resources(cbdev, dinfo); 262 else 263 cardattached++; 264 } 265 } 266 267 if (cardattached > 0) 268 return (0); 269 POWER_DISABLE_SOCKET(brdev, cbdev); 270 return (ENOENT); 271 } 272 273 static int 274 cardbus_detach_card(device_t cbdev) 275 { 276 int numdevs; 277 device_t *devlist; 278 int tmp; 279 int err = 0; 280 281 device_get_children(cbdev, &devlist, &numdevs); 282 283 if (numdevs == 0) { 284 free(devlist, M_TEMP); 285 return (ENOENT); 286 } 287 288 for (tmp = 0; tmp < numdevs; tmp++) { 289 struct cardbus_devinfo *dinfo = device_get_ivars(devlist[tmp]); 290 int status = device_get_state(devlist[tmp]); 291 292 if (status == DS_ATTACHED || status == DS_BUSY) { 293 device_detach(dinfo->pci.cfg.dev); 294 cardbus_release_all_resources(cbdev, dinfo); 295 device_delete_child(cbdev, devlist[tmp]); 296 cardbus_freecfg(dinfo); 297 } else { 298 cardbus_release_all_resources(cbdev, dinfo); 299 device_delete_child(cbdev, devlist[tmp]); 300 cardbus_freecfg(dinfo); 301 } 302 } 303 POWER_DISABLE_SOCKET(device_get_parent(cbdev), cbdev); 304 free(devlist, M_TEMP); 305 return (err); 306 } 307 308 static void 309 cardbus_driver_added(device_t cbdev, driver_t *driver) 310 { 311 int numdevs; 312 device_t *devlist; 313 int tmp; 314 struct cardbus_devinfo *dinfo; 315 316 device_get_children(cbdev, &devlist, &numdevs); 317 318 DEVICE_IDENTIFY(driver, cbdev); 319 POWER_ENABLE_SOCKET(device_get_parent(cbdev), cbdev); 320 for (tmp = 0; tmp < numdevs; tmp++) { 321 if (device_get_state(devlist[tmp]) == DS_NOTPRESENT) { 322 dinfo = device_get_ivars(devlist[tmp]); 323 #ifdef notyet 324 cardbus_device_setup_regs(brdev, bus, slot, func, 325 &dinfo->pci.cfg); 326 #endif 327 cardbus_print_verbose(dinfo); 328 resource_list_init(&dinfo->pci.resources); 329 cardbus_do_cis(cbdev, dinfo->pci.cfg.dev); 330 if (device_probe_and_attach(dinfo->pci.cfg.dev) != 0) { 331 cardbus_release_all_resources(cbdev, dinfo); 332 } 333 } 334 } 335 336 free(devlist, M_TEMP); 337 } 338 339 /************************************************************************/ 340 /* PCI-Like config reading (copied from pci.c */ 341 /************************************************************************/ 342 343 /* read configuration header into pcicfgrect structure */ 344 345 static void 346 cardbus_read_extcap(device_t cbdev, pcicfgregs *cfg) 347 { 348 #define REG(n, w) PCIB_READ_CONFIG(cbdev, cfg->bus, cfg->slot, cfg->func, n, w) 349 int ptr, nextptr, ptrptr; 350 351 switch (cfg->hdrtype) { 352 case 0: 353 ptrptr = 0x34; 354 break; 355 case 2: 356 ptrptr = 0x14; 357 break; 358 default: 359 return; /* no extended capabilities support */ 360 } 361 nextptr = REG(ptrptr, 1); /* sanity check? */ 362 363 /* 364 * Read capability entries. 365 */ 366 while (nextptr != 0) { 367 /* Sanity check */ 368 if (nextptr > 255) { 369 printf("illegal PCI extended capability offset %d\n", 370 nextptr); 371 return; 372 } 373 /* Find the next entry */ 374 ptr = nextptr; 375 nextptr = REG(ptr + 1, 1); 376 377 /* Process this entry */ 378 switch (REG(ptr, 1)) { 379 case 0x01: /* PCI power management */ 380 if (cfg->pp_cap == 0) { 381 cfg->pp_cap = REG(ptr + PCIR_POWER_CAP, 2); 382 cfg->pp_status = ptr + PCIR_POWER_STATUS; 383 cfg->pp_pmcsr = ptr + PCIR_POWER_PMCSR; 384 if ((nextptr - ptr) > PCIR_POWER_DATA) 385 cfg->pp_data = ptr + PCIR_POWER_DATA; 386 } 387 break; 388 default: 389 break; 390 } 391 } 392 #undef REG 393 } 394 395 /* extract header type specific config data */ 396 397 static void 398 cardbus_hdrtypedata(device_t brdev, int b, int s, int f, pcicfgregs *cfg) 399 { 400 #define REG(n, w) PCIB_READ_CONFIG(brdev, b, s, f, n, w) 401 switch (cfg->hdrtype) { 402 case 0: 403 cfg->subvendor = REG(PCIR_SUBVEND_0, 2); 404 cfg->subdevice = REG(PCIR_SUBDEV_0, 2); 405 cfg->nummaps = PCI_MAXMAPS_0; 406 break; 407 case 1: 408 cfg->subvendor = REG(PCIR_SUBVEND_1, 2); 409 cfg->subdevice = REG(PCIR_SUBDEV_1, 2); 410 cfg->nummaps = PCI_MAXMAPS_1; 411 break; 412 case 2: 413 cfg->subvendor = REG(PCIR_SUBVEND_2, 2); 414 cfg->subdevice = REG(PCIR_SUBDEV_2, 2); 415 cfg->nummaps = PCI_MAXMAPS_2; 416 break; 417 } 418 #undef REG 419 } 420 421 static struct cardbus_devinfo * 422 cardbus_read_device(device_t brdev, int b, int s, int f) 423 { 424 #define REG(n, w) PCIB_READ_CONFIG(brdev, b, s, f, n, w) 425 pcicfgregs *cfg = NULL; 426 struct cardbus_devinfo *devlist_entry = NULL; 427 428 if (REG(PCIR_DEVVENDOR, 4) != 0xffffffff) { 429 devlist_entry = malloc(sizeof(struct cardbus_devinfo), 430 M_DEVBUF, M_WAITOK | M_ZERO); 431 if (devlist_entry == NULL) 432 return (NULL); 433 434 cfg = &devlist_entry->pci.cfg; 435 436 cfg->bus = b; 437 cfg->slot = s; 438 cfg->func = f; 439 cfg->vendor = REG(PCIR_VENDOR, 2); 440 cfg->device = REG(PCIR_DEVICE, 2); 441 cfg->cmdreg = REG(PCIR_COMMAND, 2); 442 cfg->statreg = REG(PCIR_STATUS, 2); 443 cfg->baseclass = REG(PCIR_CLASS, 1); 444 cfg->subclass = REG(PCIR_SUBCLASS, 1); 445 cfg->progif = REG(PCIR_PROGIF, 1); 446 cfg->revid = REG(PCIR_REVID, 1); 447 cfg->hdrtype = REG(PCIR_HEADERTYPE, 1); 448 cfg->cachelnsz = REG(PCIR_CACHELNSZ, 1); 449 cfg->lattimer = REG(PCIR_LATTIMER, 1); 450 cfg->intpin = REG(PCIR_INTPIN, 1); 451 cfg->intline = REG(PCIR_INTLINE, 1); 452 453 cfg->mingnt = REG(PCIR_MINGNT, 1); 454 cfg->maxlat = REG(PCIR_MAXLAT, 1); 455 456 cfg->mfdev = (cfg->hdrtype & PCIM_MFDEV) != 0; 457 cfg->hdrtype &= ~PCIM_MFDEV; 458 459 cardbus_hdrtypedata(brdev, b, s, f, cfg); 460 461 if (REG(PCIR_STATUS, 2) & PCIM_STATUS_CAPPRESENT) 462 cardbus_read_extcap(brdev, cfg); 463 464 devlist_entry->pci.conf.pc_sel.pc_bus = cfg->bus; 465 devlist_entry->pci.conf.pc_sel.pc_dev = cfg->slot; 466 devlist_entry->pci.conf.pc_sel.pc_func = cfg->func; 467 devlist_entry->pci.conf.pc_hdr = cfg->hdrtype; 468 469 devlist_entry->pci.conf.pc_subvendor = cfg->subvendor; 470 devlist_entry->pci.conf.pc_subdevice = cfg->subdevice; 471 devlist_entry->pci.conf.pc_vendor = cfg->vendor; 472 devlist_entry->pci.conf.pc_device = cfg->device; 473 474 devlist_entry->pci.conf.pc_class = cfg->baseclass; 475 devlist_entry->pci.conf.pc_subclass = cfg->subclass; 476 devlist_entry->pci.conf.pc_progif = cfg->progif; 477 devlist_entry->pci.conf.pc_revid = cfg->revid; 478 } 479 return (devlist_entry); 480 #undef REG 481 } 482 483 /* free pcicfgregs structure and all depending data structures */ 484 485 static int 486 cardbus_freecfg(struct cardbus_devinfo *dinfo) 487 { 488 free(dinfo, M_DEVBUF); 489 490 return (0); 491 } 492 493 static void 494 cardbus_print_verbose(struct cardbus_devinfo *dinfo) 495 { 496 if (bootverbose || cardbus_debug > 0) 497 { 498 pcicfgregs *cfg = &dinfo->pci.cfg; 499 500 printf("found->\tvendor=0x%04x, dev=0x%04x, revid=0x%02x\n", 501 cfg->vendor, cfg->device, cfg->revid); 502 printf("\tclass=%02x-%02x-%02x, hdrtype=0x%02x, mfdev=%d\n", 503 cfg->baseclass, cfg->subclass, cfg->progif, 504 cfg->hdrtype, cfg->mfdev); 505 printf("\tcmdreg=0x%04x, statreg=0x%04x, " 506 "cachelnsz=%d (dwords)\n", 507 cfg->cmdreg, cfg->statreg, cfg->cachelnsz); 508 printf("\tlattimer=0x%02x (%d ns), mingnt=0x%02x (%d ns), " 509 "maxlat=0x%02x (%d ns)\n", 510 cfg->lattimer, cfg->lattimer * 30, 511 cfg->mingnt, cfg->mingnt * 250, cfg->maxlat, 512 cfg->maxlat * 250); 513 if (cfg->intpin > 0) 514 printf("\tintpin=%c, irq=%d\n", 515 cfg->intpin + 'a' - 1, cfg->intline); 516 } 517 } 518 519 /************************************************************************/ 520 /* Resources */ 521 /************************************************************************/ 522 523 static int 524 cardbus_set_resource(device_t cbdev, device_t child, int type, int rid, 525 u_long start, u_long count, struct resource *res) 526 { 527 struct cardbus_devinfo *dinfo; 528 struct resource_list *rl; 529 struct resource_list_entry *rle; 530 531 if (device_get_parent(child) != cbdev) 532 return ENOENT; 533 534 dinfo = device_get_ivars(child); 535 rl = &dinfo->pci.resources; 536 rle = resource_list_find(rl, type, rid); 537 if (rle == NULL) { 538 resource_list_add(rl, type, rid, start, start + count - 1, 539 count); 540 if (res != NULL) { 541 rle = resource_list_find(rl, type, rid); 542 rle->res = res; 543 } 544 } else { 545 if (rle->res == NULL) { 546 } else if (rle->res->r_dev == cbdev && 547 (!(rman_get_flags(rle->res) & RF_ACTIVE))) { 548 int f; 549 f = rman_get_flags(rle->res); 550 bus_release_resource(cbdev, type, rid, res); 551 rle->res = bus_alloc_resource(cbdev, type, &rid, 552 start, start + count - 1, 553 count, f); 554 } else { 555 device_printf(cbdev, "set_resource: resource busy\n"); 556 return EBUSY; 557 } 558 rle->start = start; 559 rle->end = start + count - 1; 560 rle->count = count; 561 if (res != NULL) 562 rle->res = res; 563 } 564 if (device_get_parent(child) == cbdev) 565 pci_write_config(child, rid, start, 4); 566 return 0; 567 } 568 569 static int 570 cardbus_get_resource(device_t cbdev, device_t child, int type, int rid, 571 u_long *startp, u_long *countp) 572 { 573 struct cardbus_devinfo *dinfo; 574 struct resource_list *rl; 575 struct resource_list_entry *rle; 576 577 if (device_get_parent(child) != cbdev) 578 return ENOENT; 579 580 dinfo = device_get_ivars(child); 581 rl = &dinfo->pci.resources; 582 rle = resource_list_find(rl, type, rid); 583 if (!rle) 584 return ENOENT; 585 if (startp) 586 *startp = rle->start; 587 if (countp) 588 *countp = rle->count; 589 return 0; 590 } 591 592 static void 593 cardbus_delete_resource(device_t cbdev, device_t child, int type, int rid) 594 { 595 struct cardbus_devinfo *dinfo; 596 struct resource_list *rl; 597 struct resource_list_entry *rle; 598 599 if (device_get_parent(child) != cbdev) 600 return; 601 602 dinfo = device_get_ivars(child); 603 rl = &dinfo->pci.resources; 604 rle = resource_list_find(rl, type, rid); 605 if (rle) { 606 if (rle->res) { 607 if (rle->res->r_dev != cbdev || 608 rman_get_flags(rle->res) & RF_ACTIVE) { 609 device_printf(cbdev, "delete_resource: " 610 "Resource still owned by child, oops. " 611 "(type=%d, rid=%d, addr=%lx)\n", 612 rle->type, rle->rid, 613 rman_get_start(rle->res)); 614 return; 615 } 616 bus_release_resource(cbdev, type, rid, rle->res); 617 } 618 resource_list_delete(rl, type, rid); 619 } 620 if (device_get_parent(child) == cbdev) 621 pci_write_config(child, rid, 0, 4); 622 } 623 624 static int 625 cardbus_set_resource_method(device_t cbdev, device_t child, int type, int rid, 626 u_long start, u_long count) 627 { 628 int ret; 629 ret = cardbus_set_resource(cbdev, child, type, rid, start, count, NULL); 630 if (ret != 0) 631 return ret; 632 return BUS_SET_RESOURCE(device_get_parent(cbdev), child, type, rid, 633 start, count); 634 } 635 636 static int 637 cardbus_get_resource_method(device_t cbdev, device_t child, int type, int rid, 638 u_long *startp, u_long *countp) 639 { 640 int ret; 641 ret = cardbus_get_resource(cbdev, child, type, rid, startp, countp); 642 if (ret != 0) 643 return ret; 644 return BUS_GET_RESOURCE(device_get_parent(cbdev), child, type, rid, 645 startp, countp); 646 } 647 648 static void 649 cardbus_delete_resource_method(device_t cbdev, device_t child, 650 int type, int rid) 651 { 652 cardbus_delete_resource(cbdev, child, type, rid); 653 BUS_DELETE_RESOURCE(device_get_parent(cbdev), child, type, rid); 654 } 655 656 static void 657 cardbus_release_all_resources(device_t cbdev, struct cardbus_devinfo *dinfo) 658 { 659 struct resource_list_entry *rle; 660 661 /* Free all allocated resources */ 662 SLIST_FOREACH(rle, &dinfo->pci.resources, link) { 663 if (rle->res) { 664 if (rle->res->r_dev != cbdev) 665 device_printf(cbdev, "release_all_resource: " 666 "Resource still owned by child, oops. " 667 "(type=%d, rid=%d, addr=%lx)\n", 668 rle->type, rle->rid, 669 rman_get_start(rle->res)); 670 BUS_RELEASE_RESOURCE(device_get_parent(cbdev), 671 rle->res->r_dev, 672 rle->type, rle->rid, 673 rle->res); 674 rle->res = NULL; 675 /* 676 * zero out config so the card won't acknowledge 677 * access to the space anymore 678 */ 679 pci_write_config(dinfo->pci.cfg.dev, rle->rid, 0, 4); 680 } 681 } 682 resource_list_free(&dinfo->pci.resources); 683 } 684 685 static struct resource * 686 cardbus_alloc_resource(device_t cbdev, device_t child, int type, 687 int *rid, u_long start, u_long end, u_long count, u_int flags) 688 { 689 struct cardbus_devinfo *dinfo; 690 struct resource_list_entry *rle = 0; 691 int passthrough = (device_get_parent(child) != cbdev); 692 693 if (passthrough) { 694 return (BUS_ALLOC_RESOURCE(device_get_parent(cbdev), child, 695 type, rid, start, end, count, flags)); 696 } 697 698 dinfo = device_get_ivars(child); 699 rle = resource_list_find(&dinfo->pci.resources, type, *rid); 700 701 if (!rle) 702 return NULL; /* no resource of that type/rid */ 703 704 if (!rle->res) { 705 device_printf(cbdev, "WARNING: Resource not reserved by bus\n"); 706 return NULL; 707 } else { 708 /* Release the cardbus hold on the resource */ 709 if (rle->res->r_dev != cbdev) 710 return NULL; 711 bus_release_resource(cbdev, type, *rid, rle->res); 712 rle->res = NULL; 713 switch (type) { 714 case SYS_RES_IOPORT: 715 case SYS_RES_MEMORY: 716 if (!(flags & RF_ALIGNMENT_MASK)) 717 flags |= rman_make_alignment_flags(rle->count); 718 break; 719 case SYS_RES_IRQ: 720 flags |= RF_SHAREABLE; 721 break; 722 } 723 /* Allocate the resource to the child */ 724 return resource_list_alloc(&dinfo->pci.resources, cbdev, child, 725 type, rid, rle->start, rle->end, rle->count, flags); 726 } 727 } 728 729 static int 730 cardbus_release_resource(device_t cbdev, device_t child, int type, int rid, 731 struct resource *r) 732 { 733 struct cardbus_devinfo *dinfo; 734 int passthrough = (device_get_parent(child) != cbdev); 735 struct resource_list_entry *rle = 0; 736 int flags; 737 int ret; 738 739 if (passthrough) { 740 return BUS_RELEASE_RESOURCE(device_get_parent(cbdev), child, 741 type, rid, r); 742 } 743 744 dinfo = device_get_ivars(child); 745 /* 746 * According to the PCI 2.2 spec, devices may share an address 747 * decoder between memory mapped ROM access and memory 748 * mapped register access. To be safe, disable ROM access 749 * whenever it is released. 750 */ 751 if (rid == CARDBUS_ROM_REG) { 752 uint32_t rom_reg; 753 754 rom_reg = pci_read_config(child, rid, 4); 755 rom_reg &= ~CARDBUS_ROM_ENABLE; 756 pci_write_config(child, rid, rom_reg, 4); 757 } 758 759 rle = resource_list_find(&dinfo->pci.resources, type, rid); 760 761 if (!rle) { 762 device_printf(cbdev, "Allocated resource not found\n"); 763 return ENOENT; 764 } 765 if (!rle->res) { 766 device_printf(cbdev, "Allocated resource not recorded\n"); 767 return ENOENT; 768 } 769 770 ret = BUS_RELEASE_RESOURCE(device_get_parent(cbdev), child, 771 type, rid, r); 772 switch (type) { 773 case SYS_RES_IOPORT: 774 case SYS_RES_MEMORY: 775 flags = rman_make_alignment_flags(rle->count); 776 break; 777 case SYS_RES_IRQ: 778 flags = RF_SHAREABLE; 779 break; 780 default: 781 flags = 0; 782 } 783 /* Restore cardbus hold on the resource */ 784 rle->res = bus_alloc_resource(cbdev, type, &rid, 785 rle->start, rle->end, rle->count, flags); 786 if (rle->res == NULL) 787 device_printf(cbdev, "release_resource: " 788 "unable to reacquire resource\n"); 789 return ret; 790 } 791 792 static int 793 cardbus_setup_intr(device_t cbdev, device_t child, struct resource *irq, 794 int flags, driver_intr_t *intr, void *arg, void **cookiep) 795 { 796 int ret; 797 device_t cdev; 798 struct cardbus_devinfo *dinfo; 799 800 ret = bus_generic_setup_intr(cbdev, child, irq, flags, intr, arg, 801 cookiep); 802 if (ret != 0) 803 return ret; 804 805 for (cdev = child; cbdev != device_get_parent(cdev); 806 cdev = device_get_parent(cdev)) 807 /* NOTHING */; 808 dinfo = device_get_ivars(cdev); 809 810 return 0; 811 } 812 813 static int 814 cardbus_teardown_intr(device_t cbdev, device_t child, struct resource *irq, 815 void *cookie) 816 { 817 int ret; 818 device_t cdev; 819 struct cardbus_devinfo *dinfo; 820 821 ret = bus_generic_teardown_intr(cbdev, child, irq, cookie); 822 if (ret != 0) 823 return ret; 824 825 for (cdev = child; cbdev != device_get_parent(cdev); 826 cdev = device_get_parent(cdev)) 827 /* NOTHING */; 828 dinfo = device_get_ivars(cdev); 829 830 return (0); 831 } 832 833 834 /************************************************************************/ 835 /* Other Bus Methods */ 836 /************************************************************************/ 837 838 static int 839 cardbus_print_resources(struct resource_list *rl, const char *name, 840 int type, const char *format) 841 { 842 struct resource_list_entry *rle; 843 int printed, retval; 844 845 printed = 0; 846 retval = 0; 847 /* Yes, this is kinda cheating */ 848 SLIST_FOREACH(rle, rl, link) { 849 if (rle->type == type) { 850 if (printed == 0) 851 retval += printf(" %s ", name); 852 else if (printed > 0) 853 retval += printf(","); 854 printed++; 855 retval += printf(format, rle->start); 856 if (rle->count > 1) { 857 retval += printf("-"); 858 retval += printf(format, rle->start + 859 rle->count - 1); 860 } 861 } 862 } 863 return retval; 864 } 865 866 static int 867 cardbus_print_child(device_t cbdev, device_t child) 868 { 869 struct cardbus_devinfo *dinfo; 870 struct resource_list *rl; 871 pcicfgregs *cfg; 872 int retval = 0; 873 874 dinfo = device_get_ivars(child); 875 cfg = &dinfo->pci.cfg; 876 rl = &dinfo->pci.resources; 877 878 retval += bus_print_child_header(cbdev, child); 879 880 retval += cardbus_print_resources(rl, "port", SYS_RES_IOPORT, "%#lx"); 881 retval += cardbus_print_resources(rl, "mem", SYS_RES_MEMORY, "%#lx"); 882 retval += cardbus_print_resources(rl, "irq", SYS_RES_IRQ, "%ld"); 883 if (device_get_flags(cbdev)) 884 retval += printf(" flags %#x", device_get_flags(cbdev)); 885 886 retval += printf(" at device %d.%d", pci_get_slot(child), 887 pci_get_function(child)); 888 889 retval += bus_print_child_footer(cbdev, child); 890 891 return (retval); 892 } 893 894 static void 895 cardbus_probe_nomatch(device_t cbdev, device_t child) 896 { 897 struct cardbus_devinfo *dinfo; 898 pcicfgregs *cfg; 899 900 dinfo = device_get_ivars(child); 901 cfg = &dinfo->pci.cfg; 902 device_printf(cbdev, "<unknown card>"); 903 printf(" (vendor=0x%04x, dev=0x%04x)", cfg->vendor, cfg->device); 904 printf(" at %d.%d", pci_get_slot(child), pci_get_function(child)); 905 if (cfg->intpin > 0 && cfg->intline != 255) { 906 printf(" irq %d", cfg->intline); 907 } 908 printf("\n"); 909 910 return; 911 } 912 913 static int 914 cardbus_child_location_str(device_t cbdev, device_t child, char *buf, 915 size_t buflen) 916 { 917 struct cardbus_devinfo *dinfo; 918 pcicfgregs *cfg; 919 920 dinfo = device_get_ivars(child); 921 cfg = &dinfo->pci.cfg; 922 snprintf(buf, buflen, "slot=%d function=%d", pci_get_slot(child), 923 pci_get_function(child)); 924 return (0); 925 } 926 927 static int 928 cardbus_child_pnpinfo_str(device_t cbdev, device_t child, char *buf, 929 size_t buflen) 930 { 931 struct cardbus_devinfo *dinfo; 932 pcicfgregs *cfg; 933 934 dinfo = device_get_ivars(child); 935 cfg = &dinfo->pci.cfg; 936 snprintf(buf, buflen, "vendor=0x%04x device=0x%04x subvendor=0x%04x " 937 "subdevice=0x%04x", cfg->vendor, cfg->device, cfg->subvendor, 938 cfg->subdevice); 939 return (0); 940 } 941 942 static int 943 cardbus_read_ivar(device_t cbdev, device_t child, int which, u_long *result) 944 { 945 struct cardbus_devinfo *dinfo; 946 pcicfgregs *cfg; 947 948 dinfo = device_get_ivars(child); 949 cfg = &dinfo->pci.cfg; 950 951 switch (which) { 952 case PCI_IVAR_SUBVENDOR: 953 *result = cfg->subvendor; 954 break; 955 case PCI_IVAR_SUBDEVICE: 956 *result = cfg->subdevice; 957 break; 958 case PCI_IVAR_VENDOR: 959 *result = cfg->vendor; 960 break; 961 case PCI_IVAR_DEVICE: 962 *result = cfg->device; 963 break; 964 case PCI_IVAR_DEVID: 965 *result = (cfg->device << 16) | cfg->vendor; 966 break; 967 case PCI_IVAR_CLASS: 968 *result = cfg->baseclass; 969 break; 970 case PCI_IVAR_SUBCLASS: 971 *result = cfg->subclass; 972 break; 973 case PCI_IVAR_PROGIF: 974 *result = cfg->progif; 975 break; 976 case PCI_IVAR_REVID: 977 *result = cfg->revid; 978 break; 979 case PCI_IVAR_INTPIN: 980 *result = cfg->intpin; 981 break; 982 case PCI_IVAR_IRQ: 983 *result = cfg->intline; 984 break; 985 case PCI_IVAR_BUS: 986 *result = cfg->bus; 987 break; 988 case PCI_IVAR_SLOT: 989 *result = cfg->slot; 990 break; 991 case PCI_IVAR_FUNCTION: 992 *result = cfg->func; 993 break; 994 default: 995 return ENOENT; 996 } 997 return 0; 998 } 999 1000 static int 1001 cardbus_write_ivar(device_t cbdev, device_t child, int which, uintptr_t value) 1002 { 1003 struct cardbus_devinfo *dinfo; 1004 pcicfgregs *cfg; 1005 1006 dinfo = device_get_ivars(child); 1007 cfg = &dinfo->pci.cfg; 1008 1009 switch (which) { 1010 case PCI_IVAR_SUBVENDOR: 1011 case PCI_IVAR_SUBDEVICE: 1012 case PCI_IVAR_VENDOR: 1013 case PCI_IVAR_DEVICE: 1014 case PCI_IVAR_DEVID: 1015 case PCI_IVAR_CLASS: 1016 case PCI_IVAR_SUBCLASS: 1017 case PCI_IVAR_PROGIF: 1018 case PCI_IVAR_REVID: 1019 case PCI_IVAR_INTPIN: 1020 case PCI_IVAR_IRQ: 1021 case PCI_IVAR_BUS: 1022 case PCI_IVAR_SLOT: 1023 case PCI_IVAR_FUNCTION: 1024 return EINVAL; /* disallow for now */ 1025 default: 1026 return ENOENT; 1027 } 1028 return 0; 1029 } 1030 1031 /************************************************************************/ 1032 /* Compatibility with PCI bus (XXX: Do we need this?) */ 1033 /************************************************************************/ 1034 1035 /* 1036 * PCI power manangement 1037 */ 1038 static int 1039 cardbus_set_powerstate_method(device_t cbdev, device_t child, int state) 1040 { 1041 struct cardbus_devinfo *dinfo = device_get_ivars(child); 1042 pcicfgregs *cfg = &dinfo->pci.cfg; 1043 u_int16_t status; 1044 int result; 1045 1046 if (cfg->pp_cap != 0) { 1047 status = PCI_READ_CONFIG(cbdev, child, cfg->pp_status, 2) 1048 & ~PCIM_PSTAT_DMASK; 1049 result = 0; 1050 switch (state) { 1051 case PCI_POWERSTATE_D0: 1052 status |= PCIM_PSTAT_D0; 1053 break; 1054 case PCI_POWERSTATE_D1: 1055 if (cfg->pp_cap & PCIM_PCAP_D1SUPP) { 1056 status |= PCIM_PSTAT_D1; 1057 } else { 1058 result = EOPNOTSUPP; 1059 } 1060 break; 1061 case PCI_POWERSTATE_D2: 1062 if (cfg->pp_cap & PCIM_PCAP_D2SUPP) { 1063 status |= PCIM_PSTAT_D2; 1064 } else { 1065 result = EOPNOTSUPP; 1066 } 1067 break; 1068 case PCI_POWERSTATE_D3: 1069 status |= PCIM_PSTAT_D3; 1070 break; 1071 default: 1072 result = EINVAL; 1073 } 1074 if (result == 0) 1075 PCI_WRITE_CONFIG(cbdev, child, cfg->pp_status, 1076 status, 2); 1077 } else { 1078 result = ENXIO; 1079 } 1080 return (result); 1081 } 1082 1083 static int 1084 cardbus_get_powerstate_method(device_t cbdev, device_t child) 1085 { 1086 struct cardbus_devinfo *dinfo = device_get_ivars(child); 1087 pcicfgregs *cfg = &dinfo->pci.cfg; 1088 u_int16_t status; 1089 int result; 1090 1091 if (cfg->pp_cap != 0) { 1092 status = PCI_READ_CONFIG(cbdev, child, cfg->pp_status, 2); 1093 switch (status & PCIM_PSTAT_DMASK) { 1094 case PCIM_PSTAT_D0: 1095 result = PCI_POWERSTATE_D0; 1096 break; 1097 case PCIM_PSTAT_D1: 1098 result = PCI_POWERSTATE_D1; 1099 break; 1100 case PCIM_PSTAT_D2: 1101 result = PCI_POWERSTATE_D2; 1102 break; 1103 case PCIM_PSTAT_D3: 1104 result = PCI_POWERSTATE_D3; 1105 break; 1106 default: 1107 result = PCI_POWERSTATE_UNKNOWN; 1108 break; 1109 } 1110 } else { 1111 /* No support, device is always at D0 */ 1112 result = PCI_POWERSTATE_D0; 1113 } 1114 return (result); 1115 } 1116 1117 static u_int32_t 1118 cardbus_read_config_method(device_t cbdev, device_t child, int reg, int width) 1119 { 1120 struct cardbus_devinfo *dinfo = device_get_ivars(child); 1121 pcicfgregs *cfg = &dinfo->pci.cfg; 1122 1123 return PCIB_READ_CONFIG(device_get_parent(cbdev), 1124 cfg->bus, cfg->slot, cfg->func, reg, width); 1125 } 1126 1127 static void 1128 cardbus_write_config_method(device_t cbdev, device_t child, int reg, 1129 u_int32_t val, int width) 1130 { 1131 struct cardbus_devinfo *dinfo = device_get_ivars(child); 1132 pcicfgregs *cfg = &dinfo->pci.cfg; 1133 1134 PCIB_WRITE_CONFIG(device_get_parent(cbdev), 1135 cfg->bus, cfg->slot, cfg->func, reg, val, width); 1136 } 1137 1138 static __inline void 1139 cardbus_set_command_bit(device_t cbdev, device_t child, u_int16_t bit) 1140 { 1141 u_int16_t command; 1142 1143 command = PCI_READ_CONFIG(cbdev, child, PCIR_COMMAND, 2); 1144 command |= bit; 1145 PCI_WRITE_CONFIG(cbdev, child, PCIR_COMMAND, command, 2); 1146 } 1147 1148 static __inline void 1149 cardbus_clear_command_bit(device_t cbdev, device_t child, u_int16_t bit) 1150 { 1151 u_int16_t command; 1152 1153 command = PCI_READ_CONFIG(cbdev, child, PCIR_COMMAND, 2); 1154 command &= ~bit; 1155 PCI_WRITE_CONFIG(cbdev, child, PCIR_COMMAND, command, 2); 1156 } 1157 1158 static void 1159 cardbus_enable_busmaster_method(device_t cbdev, device_t child) 1160 { 1161 cardbus_set_command_bit(cbdev, child, PCIM_CMD_BUSMASTEREN); 1162 } 1163 1164 static void 1165 cardbus_disable_busmaster_method(device_t cbdev, device_t child) 1166 { 1167 cardbus_clear_command_bit(cbdev, child, PCIM_CMD_BUSMASTEREN); 1168 } 1169 1170 static void 1171 cardbus_enable_io_method(device_t cbdev, device_t child, int space) 1172 { 1173 switch (space) { 1174 case SYS_RES_IOPORT: 1175 cardbus_set_command_bit(cbdev, child, PCIM_CMD_PORTEN); 1176 break; 1177 case SYS_RES_MEMORY: 1178 cardbus_set_command_bit(cbdev, child, PCIM_CMD_MEMEN); 1179 break; 1180 } 1181 } 1182 1183 static void 1184 cardbus_disable_io_method(device_t cbdev, device_t child, int space) 1185 { 1186 switch (space) { 1187 case SYS_RES_IOPORT: 1188 cardbus_clear_command_bit(cbdev, child, PCIM_CMD_PORTEN); 1189 break; 1190 case SYS_RES_MEMORY: 1191 cardbus_clear_command_bit(cbdev, child, PCIM_CMD_MEMEN); 1192 break; 1193 } 1194 } 1195 1196 static device_method_t cardbus_methods[] = { 1197 /* Device interface */ 1198 DEVMETHOD(device_probe, cardbus_probe), 1199 DEVMETHOD(device_attach, cardbus_attach), 1200 DEVMETHOD(device_detach, cardbus_detach), 1201 DEVMETHOD(device_shutdown, bus_generic_shutdown), 1202 DEVMETHOD(device_suspend, cardbus_suspend), 1203 DEVMETHOD(device_resume, cardbus_resume), 1204 1205 /* Bus interface */ 1206 DEVMETHOD(bus_print_child, cardbus_print_child), 1207 DEVMETHOD(bus_probe_nomatch, cardbus_probe_nomatch), 1208 DEVMETHOD(bus_read_ivar, cardbus_read_ivar), 1209 DEVMETHOD(bus_write_ivar, cardbus_write_ivar), 1210 DEVMETHOD(bus_driver_added, cardbus_driver_added), 1211 DEVMETHOD(bus_alloc_resource, cardbus_alloc_resource), 1212 DEVMETHOD(bus_release_resource, cardbus_release_resource), 1213 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 1214 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 1215 DEVMETHOD(bus_setup_intr, cardbus_setup_intr), 1216 DEVMETHOD(bus_teardown_intr, cardbus_teardown_intr), 1217 1218 DEVMETHOD(bus_set_resource, cardbus_set_resource_method), 1219 DEVMETHOD(bus_get_resource, cardbus_get_resource_method), 1220 DEVMETHOD(bus_delete_resource, cardbus_delete_resource_method), 1221 DEVMETHOD(bus_child_pnpinfo_str, cardbus_child_pnpinfo_str), 1222 DEVMETHOD(bus_child_location_str, cardbus_child_location_str), 1223 1224 /* Card Interface */ 1225 DEVMETHOD(card_attach_card, cardbus_attach_card), 1226 DEVMETHOD(card_detach_card, cardbus_detach_card), 1227 DEVMETHOD(card_cis_read, cardbus_cis_read), 1228 DEVMETHOD(card_cis_free, cardbus_cis_free), 1229 1230 /* Cardbus/PCI interface */ 1231 DEVMETHOD(pci_read_config, cardbus_read_config_method), 1232 DEVMETHOD(pci_write_config, cardbus_write_config_method), 1233 DEVMETHOD(pci_enable_busmaster, cardbus_enable_busmaster_method), 1234 DEVMETHOD(pci_disable_busmaster, cardbus_disable_busmaster_method), 1235 DEVMETHOD(pci_enable_io, cardbus_enable_io_method), 1236 DEVMETHOD(pci_disable_io, cardbus_disable_io_method), 1237 DEVMETHOD(pci_get_powerstate, cardbus_get_powerstate_method), 1238 DEVMETHOD(pci_set_powerstate, cardbus_set_powerstate_method), 1239 1240 {0,0} 1241 }; 1242 1243 static driver_t cardbus_driver = { 1244 "cardbus", 1245 cardbus_methods, 1246 0 /* no softc */ 1247 }; 1248 1249 static devclass_t cardbus_devclass; 1250 1251 DRIVER_MODULE(cardbus, cbb, cardbus_driver, cardbus_devclass, 0, 0); 1252 MODULE_VERSION(cardbus, 1); 1253 MODULE_DEPEND(cardbus, exca, 1, 1, 1); 1254 /* 1255 MODULE_DEPEND(cardbus, pccbb, 1, 1, 1); 1256 */ 1257