xref: /freebsd/sys/dev/cardbus/cardbus.c (revision c669d6a0)
1 /*
2  * Copyright (c) 2000,2001 Jonathan Chen.
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions, and the following disclaimer,
10  *    without modification, immediately at the beginning of the file.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in
13  *    the documentation and/or other materials provided with the
14  *    distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
20  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  *
28  * $FreeBSD$
29  */
30 
31 /*
32  * Cardbus Bus Driver
33  *
34  * much of the bus code was stolen directly from sys/pci/pci.c
35  *   (Copyright (c) 1997, Stefan Esser <se@freebsd.org>)
36  *
37  * Written by Jonathan Chen <jon@freebsd.org>
38  */
39 
40 #define CARDBUS_DEBUG
41 
42 #include <sys/param.h>
43 #include <sys/systm.h>
44 #include <sys/malloc.h>
45 #include <sys/kernel.h>
46 
47 #include <sys/bus.h>
48 #include <machine/bus.h>
49 #include <sys/rman.h>
50 #include <machine/resource.h>
51 
52 #include <pci/pcivar.h>
53 #include <pci/pcireg.h>
54 #include <sys/pciio.h>
55 
56 #include <dev/cardbus/cardbusreg.h>
57 #include <dev/cardbus/cardbusvar.h>
58 #include <dev/cardbus/cardbus_cis.h>
59 
60 #include "power_if.h"
61 #include "card_if.h"
62 #include "pcib_if.h"
63 
64 #if defined CARDBUS_DEBUG
65 #define STATIC
66 #define DPRINTF(a) printf a
67 #define DEVPRINTF(x) device_printf x
68 #else
69 #define STATIC static
70 #define DPRINTF(a)
71 #define DEVPRINTF(x)
72 #endif
73 
74 #if !defined(lint)
75 static const char rcsid[] =
76   "$FreeBSD$";
77 #endif
78 
79 struct cardbus_quirk {
80 	u_int32_t devid;	/* Vendor/device of the card */
81 	int	type;
82 #define CARDBUS_QUIRK_MAP_REG	1 /* PCI map register in wierd place */
83 	int	arg1;
84 	int	arg2;
85 };
86 
87 struct cardbus_quirk cardbus_quirks[] = {
88 	{ 0 }
89 };
90 
91 static int cardbus_probe(device_t dev);
92 static int cardbus_attach(device_t dev);
93 static void device_setup_regs(device_t cbdev, int b, int s, int f,
94 			      pcicfgregs *cfg);
95 static int cardbus_attach_card(device_t dev);
96 static int cardbus_detach_card(device_t dev, int flags);
97 static struct cardbus_devinfo *cardbus_read_device(device_t pcib,
98 						   int b, int s, int f);
99 static void *cardbus_readppb(device_t pcib, int b, int s, int f);
100 static void *cardbus_readpcb(device_t pcib, int b, int s, int f);
101 static void cardbus_hdrtypedata(device_t pcib, int b, int s, int f,
102 				pcicfgregs *cfg);
103 static int cardbus_freecfg(struct cardbus_devinfo *dinfo);
104 static void cardbus_print_verbose(struct cardbus_devinfo *dinfo);
105 static int cardbus_set_resource(device_t dev, device_t child, int type,
106 				int rid, u_long start, u_long count);
107 static int cardbus_get_resource(device_t dev, device_t child, int type,
108 				int rid, u_long *startp, u_long *countp);
109 static void cardbus_delete_resource(device_t dev, device_t child, int type,
110 				    int rid);
111 static int cardbus_set_resource_method(device_t dev, device_t child, int type,
112 				       int rid, u_long start, u_long count);
113 static int cardbus_get_resource_method(device_t dev, device_t child, int type,
114 				      int rid, u_long *startp, u_long *countp);
115 static int cardbus_add_map(device_t bdev, device_t dev, pcicfgregs *cfg,
116 			   int reg);
117 static void cardbus_add_resources(device_t dev, pcicfgregs* cfg);
118 static void cardbus_release_all_resources(device_t dev,
119 					  struct resource_list *rl);
120 static struct resource* cardbus_alloc_resource(device_t self, device_t child,
121 					       int type, int* rid,u_long start,
122 					       u_long end, u_long count,
123 					       u_int flags);
124 static int cardbus_release_resource(device_t dev, device_t child, int type,
125 				    int rid, struct resource *r);
126 static int cardbus_print_resources(struct resource_list *rl, const char *name,
127 				   int type, const char *format);
128 static int cardbus_print_child(device_t dev, device_t child);
129 static void cardbus_probe_nomatch(device_t dev, device_t child);
130 static int cardbus_read_ivar(device_t dev, device_t child, int which,
131 			     u_long *result);
132 static int cardbus_write_ivar(device_t dev, device_t child, int which,
133 			      uintptr_t value);
134 static u_int32_t cardbus_read_config_method(device_t dev, device_t child,
135 					    int reg, int width);
136 static void cardbus_write_config_method(device_t dev, device_t child, int reg,
137 					u_int32_t val, int width);
138 
139 /************************************************************************/
140 /* Probe/Attach								*/
141 /************************************************************************/
142 
143 static int
144 cardbus_probe(device_t dev)
145 {
146 	device_set_desc(dev, "Cardbus bus (newcard)");
147 	return 0;
148 }
149 
150 static int
151 cardbus_attach(device_t dev)
152 {
153 	return 0;
154 }
155 
156 static int
157 cardbus_detach(device_t dev)
158 {
159 	cardbus_detach_card(dev, DETACH_FORCE);
160 	return 0;
161 }
162 
163 /************************************************************************/
164 /* Attach/Detach card							*/
165 /************************************************************************/
166 
167 static void
168 device_setup_regs(device_t bdev, int b, int s, int f, pcicfgregs *cfg)
169 {
170 	PCIB_WRITE_CONFIG(bdev, b, s, f, PCIR_INTLINE,
171 			  pci_get_irq(device_get_parent(bdev)), 1);
172 	cfg->intline = PCIB_READ_CONFIG(bdev, b, s, f, PCIR_INTLINE, 1);
173 
174 	PCIB_WRITE_CONFIG(bdev, b, s, f, PCIR_CACHELNSZ, 0x08, 1);
175 	cfg->cachelnsz = PCIB_READ_CONFIG(bdev, b, s, f, PCIR_CACHELNSZ, 1);
176 
177 	PCIB_WRITE_CONFIG(bdev, b, s, f, PCIR_LATTIMER, 0xa8, 1);
178 	cfg->lattimer = PCIB_READ_CONFIG(bdev, b, s, f, PCIR_LATTIMER, 1);
179 
180 	PCIB_WRITE_CONFIG(bdev, b, s, f, PCIR_MINGNT, 0x14, 1);
181 	cfg->mingnt = PCIB_READ_CONFIG(bdev, b, s, f, PCIR_MINGNT, 1);
182 
183 	PCIB_WRITE_CONFIG(bdev, b, s, f, PCIR_MAXLAT, 0x14, 1);
184 	cfg->maxlat = PCIB_READ_CONFIG(bdev, b, s, f, PCIR_MAXLAT, 1);
185 }
186 
187 static int
188 cardbus_attach_card(device_t dev)
189 {
190 	device_t bdev = device_get_parent(dev);
191 	int cardattached = 0;
192 	static int curr_bus_number = 2; /* XXX EVILE BAD (see below) */
193 	int bus, slot, func;
194 
195 	POWER_ENABLE_SOCKET(bdev, dev);
196 
197 	bus = pci_get_secondarybus(bdev);
198 	if (bus == 0) {
199 		/*
200 		 * XXX EVILE BAD XXX
201 		 * Not all BIOSes initialize the secondary bus number properly,
202 		 * so if the default is bad, we just put one in and hope it
203 		 * works.
204 		 */
205 		bus = curr_bus_number;
206 		pci_write_config (bdev, PCIR_SECBUS_2, curr_bus_number, 1);
207 		pci_write_config (bdev, PCIR_SUBBUS_2, curr_bus_number+2, 1);
208 		curr_bus_number += 3;
209 	}
210 
211 	for (slot = 0; slot <= CARDBUS_SLOTMAX; slot++) {
212 		int cardbusfunchigh = 0;
213 		for (func = 0; func <= cardbusfunchigh; func++) {
214 			struct cardbus_devinfo *dinfo =
215 				cardbus_read_device(bdev, bus, slot, func);
216 
217 			if (dinfo == NULL) continue;
218 			if (dinfo->cfg.mfdev)
219 				cardbusfunchigh = CARDBUS_FUNCMAX;
220 			device_setup_regs(bdev, bus, slot, func, &dinfo->cfg);
221 			cardbus_print_verbose(dinfo);
222 			dinfo->cfg.dev = device_add_child(dev, NULL, -1);
223 			if (!dinfo->cfg.dev) {
224 				DEVPRINTF((dev, "Cannot add child!\n"));
225 				cardbus_freecfg(dinfo);
226 				continue;
227 			}
228 			resource_list_init(&dinfo->resources);
229 			device_set_ivars(dinfo->cfg.dev, dinfo);
230 			cardbus_add_resources(dinfo->cfg.dev, &dinfo->cfg);
231 			cardbus_do_cis(dev, dinfo->cfg.dev);
232 			if (device_probe_and_attach(dinfo->cfg.dev) != 0) {
233 				cardbus_release_all_resources(dinfo->cfg.dev,
234 						      &dinfo->resources);
235 				device_delete_child(dev, dinfo->cfg.dev);
236 				cardbus_freecfg(dinfo);
237 			} else
238 				cardattached++;
239 		}
240 	}
241 
242 	if (cardattached > 0) return 0;
243 	POWER_DISABLE_SOCKET(bdev, dev);
244 	return ENOENT;
245 }
246 
247 static int
248 cardbus_detach_card(device_t dev, int flags)
249 {
250 	int numdevs;
251 	device_t *devlist;
252 	int tmp;
253 	int err=0;
254 
255 	device_get_children(dev, &devlist, &numdevs);
256 
257 	if (numdevs == 0) {
258 		DEVPRINTF((dev, "Detaching card: no cards to detach!\n"));
259 		POWER_DISABLE_SOCKET(device_get_parent(dev), dev);
260 		return ENOENT;
261 	}
262 
263 	for (tmp = 0; tmp < numdevs; tmp++) {
264 		struct cardbus_devinfo *dinfo = device_get_ivars(devlist[tmp]);
265 		if (device_detach(dinfo->cfg.dev) == 0 || flags & DETACH_FORCE){
266 			cardbus_release_all_resources(dinfo->cfg.dev,
267 						      &dinfo->resources);
268 			device_delete_child(dev, devlist[tmp]);
269 		} else
270 			err++;
271 		cardbus_freecfg(dinfo);
272 	}
273 	if (err == 0)
274 		POWER_DISABLE_SOCKET(device_get_parent(dev), dev);
275 	return err;
276 }
277 
278 static void
279 cardbus_driver_added(device_t dev, driver_t *driver)
280 {
281 	/*
282 	 * For this to work, we should:
283 	 * 1) power up the slot if it isn't powered.
284 	 *    (Is this necessary?  Can we assume _probe() doesn't need power?)
285 	 * 2) probe (we should probe even though we already have child?)
286 	 * 3) power up if we haven't done so and probe succeeds
287 	 * 4) attach if probe succeeds.
288 	 * 5) power down if probe or attach failed, and the slot was powered
289 	 *    down to begin with.
290 	 */
291 	printf("I see you added a driver that could be a child of cardbus...\n");
292 	printf("If this is for a cardbus card, please remove and reinsert the card.\n");
293 	printf("(there is no current support for adding a driver like this)\n");
294 }
295 
296 /************************************************************************/
297 /* PCI-Like config reading (copied from pci.c				*/
298 /************************************************************************/
299 
300 /* read configuration header into pcicfgrect structure */
301 
302 static struct cardbus_devinfo *
303 cardbus_read_device(device_t pcib, int b, int s, int f)
304 {
305 #define REG(n, w)	PCIB_READ_CONFIG(pcib, b, s, f, n, w)
306 	pcicfgregs *cfg = NULL;
307 	struct cardbus_devinfo *devlist_entry = NULL;
308 
309 	if (PCIB_READ_CONFIG(pcib, b, s, f, PCIR_DEVVENDOR, 4) != -1) {
310 		devlist_entry = malloc(sizeof(struct cardbus_devinfo),
311 				       M_DEVBUF, M_WAITOK | M_ZERO);
312 		if (devlist_entry == NULL)
313 			return (NULL);
314 
315 		cfg = &devlist_entry->cfg;
316 
317 		cfg->bus		= b;
318 		cfg->slot		= s;
319 		cfg->func		= f;
320 		cfg->vendor		= REG(PCIR_VENDOR, 2);
321 		cfg->device		= REG(PCIR_DEVICE, 2);
322 		cfg->cmdreg		= REG(PCIR_COMMAND, 2);
323 		cfg->statreg		= REG(PCIR_STATUS, 2);
324 		cfg->baseclass		= REG(PCIR_CLASS, 1);
325 		cfg->subclass		= REG(PCIR_SUBCLASS, 1);
326 		cfg->progif		= REG(PCIR_PROGIF, 1);
327 		cfg->revid		= REG(PCIR_REVID, 1);
328 		cfg->hdrtype		= REG(PCIR_HEADERTYPE, 1);
329 		cfg->cachelnsz		= REG(PCIR_CACHELNSZ, 1);
330 		cfg->lattimer		= REG(PCIR_LATTIMER, 1);
331 		cfg->intpin		= REG(PCIR_INTPIN, 1);
332 		cfg->intline		= REG(PCIR_INTLINE, 1);
333 #ifdef __alpha__
334 		alpha_platform_assign_pciintr(cfg);
335 #endif
336 
337 #ifdef APIC_IO
338 		if (cfg->intpin != 0) {
339 			int airq;
340 
341 			airq = pci_apic_irq(cfg->bus, cfg->slot, cfg->intpin);
342 			if (airq >= 0) {
343 				/* PCI specific entry found in MP table */
344 				if (airq != cfg->intline) {
345 					undirect_pci_irq(cfg->intline);
346 					cfg->intline = airq;
347 				}
348 			} else {
349 				/*
350 				 * PCI interrupts might be redirected to the
351 				 * ISA bus according to some MP tables. Use the
352 				 * same methods as used by the ISA devices
353 				 * devices to find the proper IOAPIC int pin.
354 				 */
355 				airq = isa_apic_irq(cfg->intline);
356 				if ((airq >= 0) && (airq != cfg->intline)) {
357 					/* XXX: undirect_pci_irq() ? */
358 					undirect_isa_irq(cfg->intline);
359 					cfg->intline = airq;
360 				}
361 			}
362 		}
363 #endif /* APIC_IO */
364 
365 		cfg->mingnt		= REG(PCIR_MINGNT, 1);
366 		cfg->maxlat		= REG(PCIR_MAXLAT, 1);
367 
368 		cfg->mfdev		= (cfg->hdrtype & PCIM_MFDEV) != 0;
369 		cfg->hdrtype		&= ~PCIM_MFDEV;
370 
371 		cardbus_hdrtypedata(pcib, b, s, f, cfg);
372 
373 		devlist_entry->conf.pc_sel.pc_bus = cfg->bus;
374 		devlist_entry->conf.pc_sel.pc_dev = cfg->slot;
375 		devlist_entry->conf.pc_sel.pc_func = cfg->func;
376 		devlist_entry->conf.pc_hdr = cfg->hdrtype;
377 
378 		devlist_entry->conf.pc_subvendor = cfg->subvendor;
379 		devlist_entry->conf.pc_subdevice = cfg->subdevice;
380 		devlist_entry->conf.pc_vendor = cfg->vendor;
381 		devlist_entry->conf.pc_device = cfg->device;
382 
383 		devlist_entry->conf.pc_class = cfg->baseclass;
384 		devlist_entry->conf.pc_subclass = cfg->subclass;
385 		devlist_entry->conf.pc_progif = cfg->progif;
386 		devlist_entry->conf.pc_revid = cfg->revid;
387 	}
388 	return (devlist_entry);
389 #undef REG
390 }
391 
392 /* read config data specific to header type 1 device (PCI to PCI bridge) */
393 
394 static void *
395 cardbus_readppb(device_t pcib, int b, int s, int f)
396 {
397 	pcih1cfgregs *p;
398 
399 	p = malloc(sizeof (pcih1cfgregs), M_DEVBUF, M_WAITOK | M_ZERO);
400 	if (p == NULL)
401 		return (NULL);
402 
403 	p->secstat = PCIB_READ_CONFIG(pcib, b, s, f, PCIR_SECSTAT_1, 2);
404 	p->bridgectl = PCIB_READ_CONFIG(pcib, b, s, f, PCIR_BRIDGECTL_1, 2);
405 
406 	p->seclat = PCIB_READ_CONFIG(pcib, b, s, f, PCIR_SECLAT_1, 1);
407 
408 	p->iobase = PCI_PPBIOBASE (PCIB_READ_CONFIG(pcib, b, s, f,
409 						    PCIR_IOBASEH_1, 2),
410 				   PCIB_READ_CONFIG(pcib, b, s, f,
411 						    PCIR_IOBASEL_1, 1));
412 	p->iolimit = PCI_PPBIOLIMIT (PCIB_READ_CONFIG(pcib, b, s, f,
413 						      PCIR_IOLIMITH_1, 2),
414 				     PCIB_READ_CONFIG(pcib, b, s, f,
415 						      PCIR_IOLIMITL_1, 1));
416 
417 	p->membase = PCI_PPBMEMBASE (0,
418 				     PCIB_READ_CONFIG(pcib, b, s, f,
419 						      PCIR_MEMBASE_1, 2));
420 	p->memlimit = PCI_PPBMEMLIMIT (0,
421 				       PCIB_READ_CONFIG(pcib, b, s, f,
422 							PCIR_MEMLIMIT_1, 2));
423 
424 	p->pmembase = PCI_PPBMEMBASE (
425 		(pci_addr_t)PCIB_READ_CONFIG(pcib, b, s, f, PCIR_PMBASEH_1, 4),
426 		PCIB_READ_CONFIG(pcib, b, s, f, PCIR_PMBASEL_1, 2));
427 
428 	p->pmemlimit = PCI_PPBMEMLIMIT (
429 		(pci_addr_t)PCIB_READ_CONFIG(pcib, b, s, f,
430 					     PCIR_PMLIMITH_1, 4),
431 		PCIB_READ_CONFIG(pcib, b, s, f, PCIR_PMLIMITL_1, 2));
432 
433 	return (p);
434 }
435 
436 /* read config data specific to header type 2 device (PCI to CardBus bridge) */
437 
438 static void *
439 cardbus_readpcb(device_t pcib, int b, int s, int f)
440 {
441 	pcih2cfgregs *p;
442 
443 	p = malloc(sizeof (pcih2cfgregs), M_DEVBUF, M_WAITOK | M_ZERO);
444 	if (p == NULL)
445 		return (NULL);
446 
447 	p->secstat = PCIB_READ_CONFIG(pcib, b, s, f, PCIR_SECSTAT_2, 2);
448 	p->bridgectl = PCIB_READ_CONFIG(pcib, b, s, f, PCIR_BRIDGECTL_2, 2);
449 
450 	p->seclat = PCIB_READ_CONFIG(pcib, b, s, f, PCIR_SECLAT_2, 1);
451 
452 	p->membase0 = PCIB_READ_CONFIG(pcib, b, s, f, PCIR_MEMBASE0_2, 4);
453 	p->memlimit0 = PCIB_READ_CONFIG(pcib, b, s, f, PCIR_MEMLIMIT0_2, 4);
454 	p->membase1 = PCIB_READ_CONFIG(pcib, b, s, f, PCIR_MEMBASE1_2, 4);
455 	p->memlimit1 = PCIB_READ_CONFIG(pcib, b, s, f, PCIR_MEMLIMIT1_2, 4);
456 
457 	p->iobase0 = PCIB_READ_CONFIG(pcib, b, s, f, PCIR_IOBASE0_2, 4);
458 	p->iolimit0 = PCIB_READ_CONFIG(pcib, b, s, f, PCIR_IOLIMIT0_2, 4);
459 	p->iobase1 = PCIB_READ_CONFIG(pcib, b, s, f, PCIR_IOBASE1_2, 4);
460 	p->iolimit1 = PCIB_READ_CONFIG(pcib, b, s, f, PCIR_IOLIMIT1_2, 4);
461 
462 	p->pccardif = PCIB_READ_CONFIG(pcib, b, s, f, PCIR_PCCARDIF_2, 4);
463 	return p;
464 }
465 
466 /* extract header type specific config data */
467 
468 static void
469 cardbus_hdrtypedata(device_t pcib, int b, int s, int f, pcicfgregs *cfg)
470 {
471 #define REG(n, w)	PCIB_READ_CONFIG(pcib, b, s, f, n, w)
472 	switch (cfg->hdrtype) {
473 	case 0:
474 		cfg->subvendor      = REG(PCIR_SUBVEND_0, 2);
475 		cfg->subdevice      = REG(PCIR_SUBDEV_0, 2);
476 		cfg->nummaps	    = PCI_MAXMAPS_0;
477 		break;
478 	case 1:
479 		cfg->subvendor      = REG(PCIR_SUBVEND_1, 2);
480 		cfg->subdevice      = REG(PCIR_SUBDEV_1, 2);
481 		cfg->secondarybus   = REG(PCIR_SECBUS_1, 1);
482 		cfg->subordinatebus = REG(PCIR_SUBBUS_1, 1);
483 		cfg->nummaps	    = PCI_MAXMAPS_1;
484 		cfg->hdrspec        = cardbus_readppb(pcib, b, s, f);
485 		break;
486 	case 2:
487 		cfg->subvendor      = REG(PCIR_SUBVEND_2, 2);
488 		cfg->subdevice      = REG(PCIR_SUBDEV_2, 2);
489 		cfg->secondarybus   = REG(PCIR_SECBUS_2, 1);
490 		cfg->subordinatebus = REG(PCIR_SUBBUS_2, 1);
491 		cfg->nummaps	    = PCI_MAXMAPS_2;
492 		cfg->hdrspec        = cardbus_readpcb(pcib, b, s, f);
493 		break;
494 	}
495 #undef REG
496 }
497 
498 /* free pcicfgregs structure and all depending data structures */
499 
500 static int
501 cardbus_freecfg(struct cardbus_devinfo *dinfo)
502 {
503 	if (dinfo->cfg.hdrspec != NULL)
504 		free(dinfo->cfg.hdrspec, M_DEVBUF);
505 	free(dinfo, M_DEVBUF);
506 
507 	return (0);
508 }
509 
510 static void
511 cardbus_print_verbose(struct cardbus_devinfo *dinfo)
512 {
513 	if (bootverbose) {
514 		pcicfgregs *cfg = &dinfo->cfg;
515 
516 		printf("found->\tvendor=0x%04x, dev=0x%04x, revid=0x%02x\n",
517 		       cfg->vendor, cfg->device, cfg->revid);
518 		printf("\tclass=%02x-%02x-%02x, hdrtype=0x%02x, mfdev=%d\n",
519 		       cfg->baseclass, cfg->subclass, cfg->progif,
520 		       cfg->hdrtype, cfg->mfdev);
521 		printf("\tsubordinatebus=%x \tsecondarybus=%x\n",
522 		       cfg->subordinatebus, cfg->secondarybus);
523 #ifdef CARDBUS_DEBUG
524 		printf("\tcmdreg=0x%04x, statreg=0x%04x, cachelnsz=%d (dwords)\n",
525 		       cfg->cmdreg, cfg->statreg, cfg->cachelnsz);
526 		printf("\tlattimer=0x%02x (%d ns), mingnt=0x%02x (%d ns), maxlat=0x%02x (%d ns)\n",
527 		       cfg->lattimer, cfg->lattimer * 30,
528 		       cfg->mingnt, cfg->mingnt * 250, cfg->maxlat, cfg->maxlat * 250);
529 #endif /* CARDBUS_DEBUG */
530 		if (cfg->intpin > 0)
531 			printf("\tintpin=%c, irq=%d\n", cfg->intpin +'a' -1, cfg->intline);
532 	}
533 }
534 
535 /************************************************************************/
536 /* Resources								*/
537 /************************************************************************/
538 
539 static int
540 cardbus_set_resource(device_t dev, device_t child, int type, int rid,
541 		     u_long start, u_long count)
542 {
543 	struct cardbus_devinfo *dinfo = device_get_ivars(child);
544 	struct resource_list *rl = &dinfo->resources;
545 	resource_list_add(rl, type, rid, start, start + count - 1, count);
546 	if (device_get_parent(child) == dev)
547 		pci_write_config(child, rid, start, 4);
548 	return 0;
549 }
550 
551 static int
552 cardbus_get_resource(device_t dev, device_t child, int type, int rid,
553 		     u_long *startp, u_long *countp)
554 {
555 	struct cardbus_devinfo *dinfo = device_get_ivars(child);
556 	struct resource_list *rl = &dinfo->resources;
557 	struct resource_list_entry *rle;
558 	rle = resource_list_find(rl, type, rid);
559 	if (!rle)
560 		return ENOENT;
561 	if (startp)
562 		*startp = rle->start;
563 	if (countp)
564 		*countp = rle->count;
565 	return 0;
566 }
567 
568 static void
569 cardbus_delete_resource(device_t dev, device_t child, int type, int rid)
570 {
571 	struct cardbus_devinfo *dinfo = device_get_ivars(child);
572 	struct resource_list *rl = &dinfo->resources;
573 	struct resource_list_entry *rle;
574 	rle = resource_list_find(rl, type, rid);
575 	if (rle) {
576 		if (rle->res)
577 			bus_generic_release_resource(dev, child, type, rid,
578 						     rle->res);
579 		resource_list_delete(rl, type, rid);
580 	}
581 	if (device_get_parent(child) == dev)
582 		pci_write_config(child, rid, 0, 4);
583 }
584 
585 static int
586 cardbus_set_resource_method(device_t dev, device_t child, int type, int rid,
587 			    u_long start, u_long count)
588 {
589 	int ret;
590 	ret = cardbus_set_resource(dev, child, type, rid, start, count);
591 	if (ret != 0) return ret;
592 	return BUS_SET_RESOURCE(device_get_parent(dev), child, type, rid,
593 				start, count);
594 }
595 
596 static int
597 cardbus_get_resource_method(device_t dev, device_t child, int type, int rid,
598 			    u_long *startp, u_long *countp)
599 {
600 	int ret;
601 	ret = cardbus_get_resource(dev, child, type, rid, startp, countp);
602 	if (ret != 0) return ret;
603 	return BUS_GET_RESOURCE(device_get_parent(dev), child, type, rid,
604 				startp, countp);
605 }
606 
607 static void
608 cardbus_delete_resource_method(device_t dev, device_t child,
609 					   int type, int rid)
610 {
611 	cardbus_delete_resource(dev, child, type, rid);
612 	BUS_DELETE_RESOURCE(device_get_parent(dev), child, type, rid);
613 }
614 
615 static int
616 cardbus_add_map(device_t cbdev, device_t dev, pcicfgregs *cfg, int reg)
617 {
618 	struct cardbus_devinfo *dinfo = device_get_ivars(dev);
619 	struct resource_list *rl = &dinfo->resources;
620 	struct resource_list_entry *rle;
621 	struct resource *res;
622 	device_t bdev = device_get_parent(cbdev);
623 	u_int32_t size;
624 	u_int32_t testval;
625 	int type;
626 
627 	if (reg == CARDBUS_ROM_REG)
628 		testval = CARDBUS_ROM_ADDRMASK;
629 	else
630 		testval = ~0;
631 
632 	PCIB_WRITE_CONFIG(bdev, cfg->bus, cfg->slot, cfg->func,
633 			  reg, testval, 4);
634 
635 	testval = PCIB_READ_CONFIG(bdev, cfg->bus, cfg->slot, cfg->func,
636 				   reg, 4);
637 	if (testval == ~0 || testval == 0)
638 		return 0;
639 
640 	if ((testval&1) == 0)
641 		type = SYS_RES_MEMORY;
642 	else
643 		type = SYS_RES_IOPORT;
644 
645 	size = CARDBUS_MAPREG_MEM_SIZE(testval);
646 	res = bus_generic_alloc_resource(cbdev, dev, type, &reg, 0, ~0, size,
647 					 rman_make_alignment_flags(size));
648 	if (res) {
649 		u_int32_t start = rman_get_start(res);
650 		u_int32_t end = rman_get_end(res);
651 		cardbus_set_resource(cbdev, dev, type, reg, start,end-start+1);
652 		rle = resource_list_find(rl, type, reg);
653 		rle->res = res;
654 	} else {
655 		device_printf(dev, "Unable to add map %02x\n", reg);
656 		type = 0;
657 	}
658 	return type;
659 }
660 
661 static void
662 cardbus_add_resources(device_t dev, pcicfgregs* cfg)
663 {
664 	device_t cbdev = device_get_parent(dev);
665 	device_t bdev = device_get_parent(cbdev);
666 	struct cardbus_devinfo *dinfo = device_get_ivars(dev);
667 	struct resource_list *rl = &dinfo->resources;
668 	struct cardbus_quirk *q;
669 	struct resource_list_entry *rle;
670 	struct resource *res;
671 	int rid;
672 	u_int command;
673 	int type;
674 	int types;
675 	int i;
676 
677 	types = 0;
678 	for (i = 0; i < cfg->nummaps; i++) {
679 		type = cardbus_add_map(cbdev, dev, cfg, PCIR_MAPS + i*4);
680 		types |= 0x1 << type;
681 	}
682 	type = cardbus_add_map(cbdev, dev, cfg, CARDBUS_ROM_REG);
683 	types |= 0x1 << type;
684 
685 	for (q = &cardbus_quirks[0]; q->devid; q++) {
686 		if (q->devid == ((cfg->device << 16) | cfg->vendor)
687 		    && q->type == CARDBUS_QUIRK_MAP_REG) {
688 			type = cardbus_add_map(cbdev, dev, cfg, q->arg1);
689 			types |= 0x1 << type;
690 		}
691 	}
692 
693 	command = PCIB_READ_CONFIG(bdev, cfg->bus, cfg->slot,
694 				   cfg->func, PCIR_COMMAND, 2);
695 	if ((types & (0x1 << SYS_RES_MEMORY)) != 0)
696 		command |= PCIM_CMD_MEMEN;
697 	if ((types & (0x1 << SYS_RES_IOPORT)) != 0)
698 		command |= PCIM_CMD_PORTEN;
699 	command |= PCIM_CMD_BUSMASTEREN;
700 	PCIB_WRITE_CONFIG(bdev, cfg->bus, cfg->slot, cfg->func,
701 			  PCIR_COMMAND, command, 2);
702 
703 	rid = 0;
704 	res = bus_generic_alloc_resource(cbdev, dev, SYS_RES_IRQ,
705 					 &rid, 0, ~0, 1, RF_SHAREABLE);
706 
707 	if (res == NULL)
708 		panic("Cannot allocate IRQ for card\n");
709 
710 	resource_list_add(rl, SYS_RES_IRQ, rid,
711 			  rman_get_start(res), rman_get_start(res), 1);
712 	rle = resource_list_find(rl, SYS_RES_IRQ, rid);
713 	rle->res = res;
714 }
715 
716 static void
717 cardbus_release_all_resources(device_t dev, struct resource_list *rl)
718 {
719 	struct resource_list_entry *rle;
720 
721 	SLIST_FOREACH(rle, rl, link) {
722 		if (rle->res) {
723 			bus_generic_release_resource(device_get_parent(dev),
724 						     dev, rle->type, rle->rid,
725 						     rle->res);
726 		}
727 	}
728 }
729 
730 static struct resource*
731 cardbus_alloc_resource(device_t self, device_t child, int type,
732 				 int* rid, u_long start, u_long end,
733 				 u_long count, u_int flags)
734 {
735 	struct cardbus_devinfo *dinfo = device_get_ivars(child);
736 	struct resource_list *rl = &dinfo->resources;
737 	struct resource_list_entry *rle = NULL;
738 	struct resource *res;
739 
740 	if (device_get_parent(child) == self || child == self)
741 		rle = resource_list_find(rl, type, *rid);
742 	if (rle) {
743 		if (flags & RF_ACTIVE) {
744 			if (bus_activate_resource(child, type, *rid,
745 						  rle->res)) {
746 				return NULL;
747 			}
748 			if (*rid == CARDBUS_ROM_REG) {
749 				uint32_t rom_reg;
750 
751 				rom_reg = pci_read_config(child, *rid, 4);
752 				rom_reg |= CARDBUS_ROM_ENABLE;
753 				pci_write_config(child, *rid, rom_reg, 4);
754 			}
755 		}
756 		return rle->res; /* XXX: check if range within start/end */
757 	} else {
758 		res = bus_generic_alloc_resource(self, child, type, rid,
759 						 start, end, count, flags);
760 		if (res) {
761 			start = rman_get_start(res);
762 			end = rman_get_end(res);
763 			cardbus_set_resource(self, child, type, *rid, start,
764 					     end-start+1);
765 			rle = resource_list_find(rl, type, *rid);
766 			rle->res = res;
767 			return res;
768 		} else {
769 			device_printf(self, "Resource Allocation Failed!\n");
770 			return NULL;
771 		}
772 	}
773 }
774 
775 static int
776 cardbus_release_resource(device_t dev, device_t child, int type, int rid,
777 			 struct resource *r)
778 {
779 	/*
780 	 * According to the PCI 2.2 spec, devices may share an address
781 	 * decoder between memory mapped ROM access and memory
782 	 * mapped register access.  To be safe, disable ROM access
783 	 * whenever it is released.
784 	 */
785 	if (rid == CARDBUS_ROM_REG) {
786 		uint32_t rom_reg;
787 
788 		rom_reg = pci_read_config(child, rid, 4);
789 		rom_reg &= ~CARDBUS_ROM_ENABLE;
790 		pci_write_config(child, rid, rom_reg, 4);
791 	}
792 
793 	return bus_deactivate_resource(child, type, rid, r);
794 }
795 
796 /************************************************************************/
797 /* Other Bus Methods							*/
798 /************************************************************************/
799 
800 static int
801 cardbus_print_resources(struct resource_list *rl, const char *name,
802 			int type, const char *format)
803 {
804 	struct resource_list_entry *rle;
805 	int printed, retval;
806 
807 	printed = 0;
808 	retval = 0;
809 	/* Yes, this is kinda cheating */
810 	SLIST_FOREACH(rle, rl, link) {
811 		if (rle->type == type) {
812 			if (printed == 0)
813 				retval += printf(" %s ", name);
814 			else if (printed > 0)
815 				retval += printf(",");
816 			printed++;
817 			retval += printf(format, rle->start);
818 			if (rle->count > 1) {
819 				retval += printf("-");
820 				retval += printf(format, rle->start +
821 						 rle->count - 1);
822 			}
823 		}
824 	}
825 	return retval;
826 }
827 
828 static int
829 cardbus_print_child(device_t dev, device_t child)
830 {
831 	struct cardbus_devinfo *dinfo;
832 	struct resource_list *rl;
833 	pcicfgregs *cfg;
834 	int retval = 0;
835 
836 	dinfo = device_get_ivars(child);
837 	cfg = &dinfo->cfg;
838 	rl = &dinfo->resources;
839 
840 	retval += bus_print_child_header(dev, child);
841 
842 	retval += cardbus_print_resources(rl, "port", SYS_RES_IOPORT, "%#lx");
843 	retval += cardbus_print_resources(rl, "mem", SYS_RES_MEMORY, "%#lx");
844 	retval += cardbus_print_resources(rl, "irq", SYS_RES_IRQ, "%ld");
845 	if (device_get_flags(dev))
846 		retval += printf(" flags %#x", device_get_flags(dev));
847 
848 	retval += printf(" at device %d.%d", pci_get_slot(child),
849 			 pci_get_function(child));
850 
851 	retval += bus_print_child_footer(dev, child);
852 
853 	return (retval);
854 }
855 
856 static void cardbus_probe_nomatch(device_t dev, device_t child) {
857 	struct cardbus_devinfo *dinfo;
858 	pcicfgregs *cfg;
859 
860 	dinfo = device_get_ivars(child);
861 	cfg = &dinfo->cfg;
862 	device_printf(dev, "<unknown card>");
863 	printf(" (vendor=0x%04x, dev=0x%04x)", cfg->vendor, cfg->device);
864 	printf(" at %d.%d", pci_get_slot(child), pci_get_function(child));
865 	if (cfg->intpin > 0 && cfg->intline != 255) {
866 		printf(" irq %d", cfg->intline);
867 	}
868 	printf("\n");
869 
870 	return;
871 }
872 
873 static int
874 cardbus_read_ivar(device_t dev, device_t child, int which, u_long *result)
875 {
876 	struct cardbus_devinfo *dinfo;
877 	pcicfgregs *cfg;
878 
879 	dinfo = device_get_ivars(child);
880 	cfg = &dinfo->cfg;
881 
882 	switch (which) {
883 	case PCI_IVAR_SUBVENDOR:
884 		*result = cfg->subvendor;
885 		break;
886 	case PCI_IVAR_SUBDEVICE:
887 		*result = cfg->subdevice;
888 		break;
889 	case PCI_IVAR_VENDOR:
890 		*result = cfg->vendor;
891 		break;
892 	case PCI_IVAR_DEVICE:
893 		*result = cfg->device;
894 		break;
895 	case PCI_IVAR_DEVID:
896 		*result = (cfg->device << 16) | cfg->vendor;
897 		break;
898 	case PCI_IVAR_CLASS:
899 		*result = cfg->baseclass;
900 		break;
901 	case PCI_IVAR_SUBCLASS:
902 		*result = cfg->subclass;
903 		break;
904 	case PCI_IVAR_PROGIF:
905 		*result = cfg->progif;
906 		break;
907 	case PCI_IVAR_REVID:
908 		*result = cfg->revid;
909 		break;
910 	case PCI_IVAR_INTPIN:
911 		*result = cfg->intpin;
912 		break;
913 	case PCI_IVAR_IRQ:
914 		*result = cfg->intline;
915 		break;
916 	case PCI_IVAR_BUS:
917 		*result = cfg->bus;
918 		break;
919 	case PCI_IVAR_SLOT:
920 		*result = cfg->slot;
921 		break;
922 	case PCI_IVAR_FUNCTION:
923 		*result = cfg->func;
924 		break;
925 	case PCI_IVAR_SECONDARYBUS:
926 		*result = cfg->secondarybus;
927 		break;
928 	case PCI_IVAR_SUBORDINATEBUS:
929 		*result = cfg->subordinatebus;
930 		break;
931 	default:
932 		return ENOENT;
933 	}
934 	return 0;
935 }
936 
937 static int
938 cardbus_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
939 {
940 	struct cardbus_devinfo *dinfo;
941 	pcicfgregs *cfg;
942 
943 	dinfo = device_get_ivars(child);
944 	cfg = &dinfo->cfg;
945 
946 	switch (which) {
947 	case PCI_IVAR_SUBVENDOR:
948 	case PCI_IVAR_SUBDEVICE:
949 	case PCI_IVAR_VENDOR:
950 	case PCI_IVAR_DEVICE:
951 	case PCI_IVAR_DEVID:
952 	case PCI_IVAR_CLASS:
953 	case PCI_IVAR_SUBCLASS:
954 	case PCI_IVAR_PROGIF:
955 	case PCI_IVAR_REVID:
956 	case PCI_IVAR_INTPIN:
957 	case PCI_IVAR_IRQ:
958 	case PCI_IVAR_BUS:
959 	case PCI_IVAR_SLOT:
960 	case PCI_IVAR_FUNCTION:
961 		return EINVAL;	/* disallow for now */
962 	case PCI_IVAR_SECONDARYBUS:
963 		cfg->secondarybus = value;
964 		break;
965 	case PCI_IVAR_SUBORDINATEBUS:
966 		cfg->subordinatebus = value;
967 		break;
968 	default:
969 		return ENOENT;
970 	}
971 	return 0;
972 }
973 
974 /************************************************************************/
975 /* Compatibility with PCI bus (XXX: Do we need this?)			*/
976 /************************************************************************/
977 
978 static u_int32_t
979 cardbus_read_config_method(device_t dev, device_t child, int reg, int width)
980 {
981 	struct cardbus_devinfo *dinfo = device_get_ivars(child);
982 	pcicfgregs *cfg = &dinfo->cfg;
983 
984 	return PCIB_READ_CONFIG(device_get_parent(dev),
985 				cfg->bus, cfg->slot, cfg->func,
986 				reg, width);
987 }
988 
989 static void
990 cardbus_write_config_method(device_t dev, device_t child, int reg,
991 			    u_int32_t val, int width)
992 {
993 	struct cardbus_devinfo *dinfo = device_get_ivars(child);
994 	pcicfgregs *cfg = &dinfo->cfg;
995 
996 	PCIB_WRITE_CONFIG(device_get_parent(dev),
997 			  cfg->bus, cfg->slot, cfg->func,
998 			  reg, val, width);
999 }
1000 
1001 static device_method_t cardbus_methods[] = {
1002 	/* Device interface */
1003 	DEVMETHOD(device_probe,		cardbus_probe),
1004 	DEVMETHOD(device_attach,	cardbus_attach),
1005 	DEVMETHOD(device_detach,	cardbus_detach),
1006 	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
1007 	DEVMETHOD(device_suspend,	bus_generic_suspend),
1008 	DEVMETHOD(device_resume,	bus_generic_resume),
1009 
1010 	/* Bus interface */
1011 	DEVMETHOD(bus_print_child,	cardbus_print_child),
1012 	DEVMETHOD(bus_probe_nomatch,	cardbus_probe_nomatch),
1013 	DEVMETHOD(bus_read_ivar,	cardbus_read_ivar),
1014 	DEVMETHOD(bus_write_ivar,	cardbus_write_ivar),
1015 	DEVMETHOD(bus_driver_added,	cardbus_driver_added),
1016 	DEVMETHOD(bus_alloc_resource,	cardbus_alloc_resource),
1017 	DEVMETHOD(bus_release_resource,	cardbus_release_resource),
1018 	DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
1019 	DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
1020 	DEVMETHOD(bus_setup_intr,	bus_generic_setup_intr),
1021 	DEVMETHOD(bus_teardown_intr,	bus_generic_teardown_intr),
1022 	DEVMETHOD(bus_driver_added,	bus_generic_driver_added),
1023 
1024 	DEVMETHOD(bus_set_resource,	cardbus_set_resource_method),
1025 	DEVMETHOD(bus_get_resource,	cardbus_get_resource_method),
1026 	DEVMETHOD(bus_delete_resource,	cardbus_delete_resource_method),
1027 
1028 	/* Card Interface */
1029 	DEVMETHOD(card_attach_card,	cardbus_attach_card),
1030 	DEVMETHOD(card_detach_card,	cardbus_detach_card),
1031 
1032 	/* Cardbus/PCI interface */
1033 	DEVMETHOD(pci_read_config,	cardbus_read_config_method),
1034 	DEVMETHOD(pci_write_config,	cardbus_write_config_method),
1035 
1036 	{0,0}
1037 };
1038 
1039 static driver_t cardbus_driver = {
1040 	"cardbus",
1041 	cardbus_methods,
1042 	0 /* no softc */
1043 };
1044 
1045 static devclass_t cardbus_devclass;
1046 
1047 DRIVER_MODULE(cardbus, pccbb, cardbus_driver, cardbus_devclass, 0, 0);
1048 MODULE_DEPEND(cardbus, pccbb, 1, 1, 1);
1049