1# Firmware configuration file. 2# 3# Global limits (some are hardware limits, others are due to the firmware). 4# nvi = 128 virtual interfaces 5# niqflint = 1023 ingress queues with freelists and/or interrupts 6# nethctrl = 64K Ethernet or ctrl egress queues 7# neq = 64K egress queues of all kinds, including freelists 8# nexactf = 512 MPS TCAM entries, can oversubscribe. 9# 10 11[global] 12 rss_glb_config_mode = basicvirtual 13 rss_glb_config_options = tnlmapen,hashtoeplitz,tnlalllkp 14 15 # PL_TIMEOUT register 16 pl_timeout_value = 10000 # the timeout value in units of us 17 18 # SGE_THROTTLE_CONTROL 19 bar2throttlecount = 500 # bar2throttlecount in us 20 21 sge_timer_value = 1, 5, 10, 50, 100, 200 # SGE_TIMER_VALUE* in usecs 22 23 reg[0x1124] = 0x00000400/0x00000400 # SGE_CONTROL2, enable VFIFO; if 24 # SGE_VFIFO_SIZE is not set, then 25 # firmware will set it up in function 26 # of number of egress queues used 27 28 reg[0x1130] = 0x00d5ffeb # SGE_DBP_FETCH_THRESHOLD, fetch 29 # threshold set to queue depth 30 # minus 128-entries for FL and HP 31 # queues, and 0xfff for LP which 32 # prompts the firmware to set it up 33 # in function of egress queues 34 # used 35 36 reg[0x113c] = 0x0002ffc0 # SGE_VFIFO_SIZE, set to 0x2ffc0 which 37 # prompts the firmware to set it up in 38 # function of number of egress queues 39 # used 40 41 # enable TP_OUT_CONFIG.IPIDSPLITMODE 42 reg[0x7d04] = 0x00010000/0x00010000 43 44 # disable TP_PARA_REG3.RxFragEn 45 reg[0x7d6c] = 0x00000000/0x00007000 46 47 # enable TP_PARA_REG6.EnableCSnd 48 reg[0x7d78] = 0x00000400/0x00000000 49 50 reg[0x7dc0] = 0x0e2f8849 # TP_SHIFT_CNT 51 52 filterMode = fragmentation, mpshittype, protocol, vlan, port, fcoe 53 filterMask = port, protocol 54 55 tp_pmrx = 20, 512 56 tp_pmrx_pagesize = 16K 57 58 # TP number of RX channels (0 = auto) 59 tp_nrxch = 0 60 61 tp_pmtx = 40, 512 62 tp_pmtx_pagesize = 64K 63 64 # TP number of TX channels (0 = auto) 65 tp_ntxch = 0 66 67 # TP OFLD MTUs 68 tp_mtus = 88, 256, 512, 576, 808, 1024, 1280, 1488, 1500, 2002, 2048, 4096, 4352, 8192, 9000, 9600 69 70 # TP_GLOBAL_CONFIG 71 reg[0x7d08] = 0x00000800/0x00000800 # set IssFromCplEnable 72 73 # TP_PC_CONFIG 74 reg[0x7d48] = 0x00000000/0x00000400 # clear EnableFLMError 75 76 # TP_PC_CONFIG2 77 reg[0x7d4c] = 0x00010000/0x00010000 # set DisableNewPshFlag 78 79 # TP_PARA_REG0 80 reg[0x7d60] = 0x06000000/0x07000000 # set InitCWND to 6 81 82 # TP_PARA_REG3 83 reg[0x7d6c] = 0x28000000/0x28000000 # set EnableTnlCngHdr 84 # set RxMacCheck (Note: 85 # Only for hash filter, 86 # no tcp offload) 87 88 # TP_PIO_ADDR:TP_RX_LPBK 89 reg[tp_pio:0x28] = 0x00208208/0x00ffffff # set commit limits to 8 90 91 # MC configuration 92 mc_mode_brc[0] = 0 # mc0 - 1: enable BRC, 0: enable RBC 93 mc_mode_brc[1] = 0 # mc1 - 1: enable BRC, 0: enable RBC 94 95 # ULP_TX_CONFIG 96 reg[0x8dc0] = 0x00000004/0x00000004 # Enable more error msg for ... 97 # TPT error. 98 99# PFs 0-3. These get 8 MSI/8 MSI-X vectors each. VFs are supported by 100# these 4 PFs only. 101[function "0"] 102 nvf = 4 103 wx_caps = all 104 r_caps = all 105 nvi = 2 106 rssnvi = 2 107 niqflint = 4 108 nethctrl = 4 109 neq = 8 110 nexactf = 4 111 cmask = all 112 pmask = 0x1 113 114[function "1"] 115 nvf = 4 116 wx_caps = all 117 r_caps = all 118 nvi = 2 119 rssnvi = 2 120 niqflint = 4 121 nethctrl = 4 122 neq = 8 123 nexactf = 4 124 cmask = all 125 pmask = 0x2 126 127[function "2"] 128 nvf = 4 129 wx_caps = all 130 r_caps = all 131 nvi = 2 132 rssnvi = 2 133 niqflint = 4 134 nethctrl = 4 135 neq = 8 136 nexactf = 4 137 cmask = all 138 pmask = 0x4 139 140[function "3"] 141 nvf = 4 142 wx_caps = all 143 r_caps = all 144 nvi = 2 145 rssnvi = 2 146 niqflint = 4 147 nethctrl = 4 148 neq = 8 149 nexactf = 4 150 cmask = all 151 pmask = 0x8 152 153# PF4 is the resource-rich PF that the bus/nexus driver attaches to. 154# It gets 32 MSI/128 MSI-X vectors. 155[function "4"] 156 wx_caps = all 157 r_caps = all 158 nvi = 32 159 rssnvi = 8 160 niqflint = 512 161 nethctrl = 1024 162 neq = 2048 163 nqpcq = 8192 164 nexactf = 456 165 cmask = all 166 pmask = all 167 168 # driver will mask off features it won't use 169 protocol = nic_hashfilter 170 171 tp_l2t = 4096 172 173 # TCAM has 8K cells; each region must start at a multiple of 128 cell. 174 # Each entry in these categories takes 4 cells each. nhash will use the 175 # TCAM iff there is room left (that is, the rest don't add up to 2048). 176 nroute = 32 177 nclip = 32 178 nfilter = 1008 179 nserver = 512 180 nhash = 524288 181 182# PF5 is the SCSI Controller PF. It gets 32 MSI/40 MSI-X vectors. 183# Not used right now. 184[function "5"] 185 nvi = 1 186 rssnvi = 0 187 188# PF6 is the FCoE Controller PF. It gets 32 MSI/40 MSI-X vectors. 189# Not used right now. 190[function "6"] 191 nvi = 1 192 rssnvi = 0 193 194# The following function, 1023, is not an actual PCIE function but is used to 195# configure and reserve firmware internal resources that come from the global 196# resource pool. 197[function "1023"] 198 wx_caps = all 199 r_caps = all 200 nvi = 4 201 rssnvi = 0 202 cmask = all 203 pmask = all 204 nexactf = 8 205 nfilter = 16 206 207# For Virtual functions, we only allow NIC functionality and we only allow 208# access to one port (1 << PF). Note that because of limitations in the 209# Scatter Gather Engine (SGE) hardware which checks writes to VF KDOORBELL 210# and GTS registers, the number of Ingress and Egress Queues must be a power 211# of 2. 212# 213[function "0/*"] 214 wx_caps = 0x82 215 r_caps = 0x86 216 nvi = 1 217 rssnvi = 1 218 niqflint = 2 219 nethctrl = 2 220 neq = 4 221 nexactf = 2 222 cmask = all 223 pmask = 0x1 224 225[function "1/*"] 226 wx_caps = 0x82 227 r_caps = 0x86 228 nvi = 1 229 rssnvi = 1 230 niqflint = 2 231 nethctrl = 2 232 neq = 4 233 nexactf = 2 234 cmask = all 235 pmask = 0x2 236 237[function "2/*"] 238 wx_caps = 0x82 239 r_caps = 0x86 240 nvi = 1 241 rssnvi = 1 242 niqflint = 2 243 nethctrl = 2 244 neq = 4 245 nexactf = 2 246 cmask = all 247 pmask = 0x4 248 249[function "3/*"] 250 wx_caps = 0x82 251 r_caps = 0x86 252 nvi = 1 253 rssnvi = 1 254 niqflint = 2 255 nethctrl = 2 256 neq = 4 257 nexactf = 2 258 cmask = all 259 pmask = 0x8 260 261# MPS has 192K buffer space for ingress packets from the wire as well as 262# loopback path of the L2 switch. 263[port "0"] 264 dcb = none 265 bg_mem = 25 266 lpbk_mem = 25 267 hwm = 30 268 lwm = 15 269 dwm = 30 270 271[port "1"] 272 dcb = none 273 bg_mem = 25 274 lpbk_mem = 25 275 hwm = 30 276 lwm = 15 277 dwm = 30 278 279[port "2"] 280 dcb = none 281 bg_mem = 25 282 lpbk_mem = 25 283 hwm = 30 284 lwm = 15 285 dwm = 30 286 287[port "3"] 288 dcb = none 289 bg_mem = 25 290 lpbk_mem = 25 291 hwm = 30 292 lwm = 15 293 dwm = 30 294 295[fini] 296 version = 0x1 297 checksum = 0x380a0a4 298# 299# $FreeBSD$ 300# 301