xref: /freebsd/sys/dev/ena/ena.c (revision f374ba41)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2015-2021 Amazon.com, Inc. or its affiliates.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  *
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  *
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
21  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
22  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
23  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
24  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
28  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29  */
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
32 
33 #include "opt_rss.h"
34 
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/bus.h>
38 #include <sys/endian.h>
39 #include <sys/eventhandler.h>
40 #include <sys/kernel.h>
41 #include <sys/kthread.h>
42 #include <sys/malloc.h>
43 #include <sys/mbuf.h>
44 #include <sys/module.h>
45 #include <sys/rman.h>
46 #include <sys/smp.h>
47 #include <sys/socket.h>
48 #include <sys/sockio.h>
49 #include <sys/sysctl.h>
50 #include <sys/taskqueue.h>
51 #include <sys/time.h>
52 
53 #include <vm/vm.h>
54 #include <vm/pmap.h>
55 
56 #include <machine/atomic.h>
57 #include <machine/bus.h>
58 #include <machine/in_cksum.h>
59 #include <machine/resource.h>
60 
61 #include <dev/pci/pcireg.h>
62 #include <dev/pci/pcivar.h>
63 
64 #include <net/bpf.h>
65 #include <net/ethernet.h>
66 #include <net/if.h>
67 #include <net/if_arp.h>
68 #include <net/if_dl.h>
69 #include <net/if_media.h>
70 #include <net/if_types.h>
71 #include <net/if_var.h>
72 #include <net/if_vlan_var.h>
73 #include <netinet/in.h>
74 #include <netinet/in_systm.h>
75 #include <netinet/if_ether.h>
76 #include <netinet/ip.h>
77 #include <netinet/ip6.h>
78 #include <netinet/tcp.h>
79 #include <netinet/udp.h>
80 
81 #include "ena.h"
82 #include "ena_datapath.h"
83 #include "ena_rss.h"
84 #include "ena_sysctl.h"
85 
86 #ifdef DEV_NETMAP
87 #include "ena_netmap.h"
88 #endif /* DEV_NETMAP */
89 
90 /*********************************************************
91  *  Function prototypes
92  *********************************************************/
93 static int ena_probe(device_t);
94 static void ena_intr_msix_mgmnt(void *);
95 static void ena_free_pci_resources(struct ena_adapter *);
96 static int ena_change_mtu(if_t, int);
97 static inline void ena_alloc_counters(counter_u64_t *, int);
98 static inline void ena_free_counters(counter_u64_t *, int);
99 static inline void ena_reset_counters(counter_u64_t *, int);
100 static void ena_init_io_rings_common(struct ena_adapter *, struct ena_ring *,
101     uint16_t);
102 static void ena_init_io_rings_basic(struct ena_adapter *);
103 static void ena_init_io_rings_advanced(struct ena_adapter *);
104 static void ena_init_io_rings(struct ena_adapter *);
105 static void ena_free_io_ring_resources(struct ena_adapter *, unsigned int);
106 static void ena_free_all_io_rings_resources(struct ena_adapter *);
107 static int ena_setup_tx_dma_tag(struct ena_adapter *);
108 static int ena_free_tx_dma_tag(struct ena_adapter *);
109 static int ena_setup_rx_dma_tag(struct ena_adapter *);
110 static int ena_free_rx_dma_tag(struct ena_adapter *);
111 static void ena_release_all_tx_dmamap(struct ena_ring *);
112 static int ena_setup_tx_resources(struct ena_adapter *, int);
113 static void ena_free_tx_resources(struct ena_adapter *, int);
114 static int ena_setup_all_tx_resources(struct ena_adapter *);
115 static void ena_free_all_tx_resources(struct ena_adapter *);
116 static int ena_setup_rx_resources(struct ena_adapter *, unsigned int);
117 static void ena_free_rx_resources(struct ena_adapter *, unsigned int);
118 static int ena_setup_all_rx_resources(struct ena_adapter *);
119 static void ena_free_all_rx_resources(struct ena_adapter *);
120 static inline int ena_alloc_rx_mbuf(struct ena_adapter *, struct ena_ring *,
121     struct ena_rx_buffer *);
122 static void ena_free_rx_mbuf(struct ena_adapter *, struct ena_ring *,
123     struct ena_rx_buffer *);
124 static void ena_free_rx_bufs(struct ena_adapter *, unsigned int);
125 static void ena_refill_all_rx_bufs(struct ena_adapter *);
126 static void ena_free_all_rx_bufs(struct ena_adapter *);
127 static void ena_free_tx_bufs(struct ena_adapter *, unsigned int);
128 static void ena_free_all_tx_bufs(struct ena_adapter *);
129 static void ena_destroy_all_tx_queues(struct ena_adapter *);
130 static void ena_destroy_all_rx_queues(struct ena_adapter *);
131 static void ena_destroy_all_io_queues(struct ena_adapter *);
132 static int ena_create_io_queues(struct ena_adapter *);
133 static int ena_handle_msix(void *);
134 static int ena_enable_msix(struct ena_adapter *);
135 static void ena_setup_mgmnt_intr(struct ena_adapter *);
136 static int ena_setup_io_intr(struct ena_adapter *);
137 static int ena_request_mgmnt_irq(struct ena_adapter *);
138 static int ena_request_io_irq(struct ena_adapter *);
139 static void ena_free_mgmnt_irq(struct ena_adapter *);
140 static void ena_free_io_irq(struct ena_adapter *);
141 static void ena_free_irqs(struct ena_adapter *);
142 static void ena_disable_msix(struct ena_adapter *);
143 static void ena_unmask_all_io_irqs(struct ena_adapter *);
144 static int ena_up_complete(struct ena_adapter *);
145 static uint64_t ena_get_counter(if_t, ift_counter);
146 static int ena_media_change(if_t);
147 static void ena_media_status(if_t, struct ifmediareq *);
148 static void ena_init(void *);
149 static int ena_ioctl(if_t, u_long, caddr_t);
150 static int ena_get_dev_offloads(struct ena_com_dev_get_features_ctx *);
151 static void ena_update_host_info(struct ena_admin_host_info *, if_t);
152 static void ena_update_hwassist(struct ena_adapter *);
153 static int ena_setup_ifnet(device_t, struct ena_adapter *,
154     struct ena_com_dev_get_features_ctx *);
155 static int ena_enable_wc(device_t, struct resource *);
156 static int ena_set_queues_placement_policy(device_t, struct ena_com_dev *,
157     struct ena_admin_feature_llq_desc *, struct ena_llq_configurations *);
158 static int ena_map_llq_mem_bar(device_t, struct ena_com_dev *);
159 static uint32_t ena_calc_max_io_queue_num(device_t, struct ena_com_dev *,
160     struct ena_com_dev_get_features_ctx *);
161 static int ena_calc_io_queue_size(struct ena_calc_queue_size_ctx *);
162 static void ena_config_host_info(struct ena_com_dev *, device_t);
163 static int ena_attach(device_t);
164 static int ena_detach(device_t);
165 static int ena_device_init(struct ena_adapter *, device_t,
166     struct ena_com_dev_get_features_ctx *, int *);
167 static int ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *);
168 static void ena_update_on_link_change(void *, struct ena_admin_aenq_entry *);
169 static void unimplemented_aenq_handler(void *, struct ena_admin_aenq_entry *);
170 static int ena_copy_eni_metrics(struct ena_adapter *);
171 static void ena_timer_service(void *);
172 
173 static char ena_version[] = ENA_DEVICE_NAME ENA_DRV_MODULE_NAME
174     " v" ENA_DRV_MODULE_VERSION;
175 
176 static ena_vendor_info_t ena_vendor_info_array[] = {
177 	{ PCI_VENDOR_ID_AMAZON, PCI_DEV_ID_ENA_PF, 0 },
178 	{ PCI_VENDOR_ID_AMAZON, PCI_DEV_ID_ENA_PF_RSERV0, 0 },
179 	{ PCI_VENDOR_ID_AMAZON, PCI_DEV_ID_ENA_VF, 0 },
180 	{ PCI_VENDOR_ID_AMAZON, PCI_DEV_ID_ENA_VF_RSERV0, 0 },
181 	/* Last entry */
182 	{ 0, 0, 0 }
183 };
184 
185 struct sx ena_global_lock;
186 
187 /*
188  * Contains pointers to event handlers, e.g. link state chage.
189  */
190 static struct ena_aenq_handlers aenq_handlers;
191 
192 void
193 ena_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nseg, int error)
194 {
195 	if (error != 0)
196 		return;
197 	*(bus_addr_t *)arg = segs[0].ds_addr;
198 }
199 
200 int
201 ena_dma_alloc(device_t dmadev, bus_size_t size, ena_mem_handle_t *dma,
202     int mapflags, bus_size_t alignment, int domain)
203 {
204 	struct ena_adapter *adapter = device_get_softc(dmadev);
205 	device_t pdev = adapter->pdev;
206 	uint32_t maxsize;
207 	uint64_t dma_space_addr;
208 	int error;
209 
210 	maxsize = ((size - 1) / PAGE_SIZE + 1) * PAGE_SIZE;
211 
212 	dma_space_addr = ENA_DMA_BIT_MASK(adapter->dma_width);
213 	if (unlikely(dma_space_addr == 0))
214 		dma_space_addr = BUS_SPACE_MAXADDR;
215 
216 	error = bus_dma_tag_create(bus_get_dma_tag(dmadev), /* parent */
217 	    alignment, 0,      /* alignment, bounds 		*/
218 	    dma_space_addr,    /* lowaddr of exclusion window	*/
219 	    BUS_SPACE_MAXADDR, /* highaddr of exclusion window	*/
220 	    NULL, NULL,	       /* filter, filterarg 		*/
221 	    maxsize,	       /* maxsize 			*/
222 	    1,		       /* nsegments 			*/
223 	    maxsize,	       /* maxsegsize 			*/
224 	    BUS_DMA_ALLOCNOW,  /* flags 			*/
225 	    NULL,	       /* lockfunc 			*/
226 	    NULL,	       /* lockarg 			*/
227 	    &dma->tag);
228 	if (unlikely(error != 0)) {
229 		ena_log(pdev, ERR, "bus_dma_tag_create failed: %d\n", error);
230 		goto fail_tag;
231 	}
232 
233 	error = bus_dma_tag_set_domain(dma->tag, domain);
234 	if (unlikely(error != 0)) {
235 		ena_log(pdev, ERR, "bus_dma_tag_set_domain failed: %d\n",
236 		    error);
237 		goto fail_map_create;
238 	}
239 
240 	error = bus_dmamem_alloc(dma->tag, (void **)&dma->vaddr,
241 	    BUS_DMA_COHERENT | BUS_DMA_ZERO, &dma->map);
242 	if (unlikely(error != 0)) {
243 		ena_log(pdev, ERR, "bus_dmamem_alloc(%ju) failed: %d\n",
244 		    (uintmax_t)size, error);
245 		goto fail_map_create;
246 	}
247 
248 	dma->paddr = 0;
249 	error = bus_dmamap_load(dma->tag, dma->map, dma->vaddr, size,
250 	    ena_dmamap_callback, &dma->paddr, mapflags);
251 	if (unlikely((error != 0) || (dma->paddr == 0))) {
252 		ena_log(pdev, ERR, "bus_dmamap_load failed: %d\n", error);
253 		goto fail_map_load;
254 	}
255 
256 	bus_dmamap_sync(dma->tag, dma->map,
257 	    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
258 
259 	return (0);
260 
261 fail_map_load:
262 	bus_dmamem_free(dma->tag, dma->vaddr, dma->map);
263 fail_map_create:
264 	bus_dma_tag_destroy(dma->tag);
265 fail_tag:
266 	dma->tag = NULL;
267 	dma->vaddr = NULL;
268 	dma->paddr = 0;
269 
270 	return (error);
271 }
272 
273 static void
274 ena_free_pci_resources(struct ena_adapter *adapter)
275 {
276 	device_t pdev = adapter->pdev;
277 
278 	if (adapter->memory != NULL) {
279 		bus_release_resource(pdev, SYS_RES_MEMORY,
280 		    PCIR_BAR(ENA_MEM_BAR), adapter->memory);
281 	}
282 
283 	if (adapter->registers != NULL) {
284 		bus_release_resource(pdev, SYS_RES_MEMORY,
285 		    PCIR_BAR(ENA_REG_BAR), adapter->registers);
286 	}
287 
288 	if (adapter->msix != NULL) {
289 		bus_release_resource(pdev, SYS_RES_MEMORY, adapter->msix_rid,
290 		    adapter->msix);
291 	}
292 }
293 
294 static int
295 ena_probe(device_t dev)
296 {
297 	ena_vendor_info_t *ent;
298 	uint16_t pci_vendor_id = 0;
299 	uint16_t pci_device_id = 0;
300 
301 	pci_vendor_id = pci_get_vendor(dev);
302 	pci_device_id = pci_get_device(dev);
303 
304 	ent = ena_vendor_info_array;
305 	while (ent->vendor_id != 0) {
306 		if ((pci_vendor_id == ent->vendor_id) &&
307 		    (pci_device_id == ent->device_id)) {
308 			ena_log_raw(DBG, "vendor=%x device=%x\n", pci_vendor_id,
309 			    pci_device_id);
310 
311 			device_set_desc(dev, ENA_DEVICE_DESC);
312 			return (BUS_PROBE_DEFAULT);
313 		}
314 
315 		ent++;
316 	}
317 
318 	return (ENXIO);
319 }
320 
321 static int
322 ena_change_mtu(if_t ifp, int new_mtu)
323 {
324 	struct ena_adapter *adapter = if_getsoftc(ifp);
325 	device_t pdev = adapter->pdev;
326 	int rc;
327 
328 	if ((new_mtu > adapter->max_mtu) || (new_mtu < ENA_MIN_MTU)) {
329 		ena_log(pdev, ERR, "Invalid MTU setting. new_mtu: %d max mtu: %d min mtu: %d\n",
330 		    new_mtu, adapter->max_mtu, ENA_MIN_MTU);
331 		return (EINVAL);
332 	}
333 
334 	rc = ena_com_set_dev_mtu(adapter->ena_dev, new_mtu);
335 	if (likely(rc == 0)) {
336 		ena_log(pdev, DBG, "set MTU to %d\n", new_mtu);
337 		if_setmtu(ifp, new_mtu);
338 	} else {
339 		ena_log(pdev, ERR, "Failed to set MTU to %d\n", new_mtu);
340 	}
341 
342 	return (rc);
343 }
344 
345 static inline void
346 ena_alloc_counters(counter_u64_t *begin, int size)
347 {
348 	counter_u64_t *end = (counter_u64_t *)((char *)begin + size);
349 
350 	for (; begin < end; ++begin)
351 		*begin = counter_u64_alloc(M_WAITOK);
352 }
353 
354 static inline void
355 ena_free_counters(counter_u64_t *begin, int size)
356 {
357 	counter_u64_t *end = (counter_u64_t *)((char *)begin + size);
358 
359 	for (; begin < end; ++begin)
360 		counter_u64_free(*begin);
361 }
362 
363 static inline void
364 ena_reset_counters(counter_u64_t *begin, int size)
365 {
366 	counter_u64_t *end = (counter_u64_t *)((char *)begin + size);
367 
368 	for (; begin < end; ++begin)
369 		counter_u64_zero(*begin);
370 }
371 
372 static void
373 ena_init_io_rings_common(struct ena_adapter *adapter, struct ena_ring *ring,
374     uint16_t qid)
375 {
376 	ring->qid = qid;
377 	ring->adapter = adapter;
378 	ring->ena_dev = adapter->ena_dev;
379 	atomic_store_8(&ring->first_interrupt, 0);
380 	ring->no_interrupt_event_cnt = 0;
381 }
382 
383 static void
384 ena_init_io_rings_basic(struct ena_adapter *adapter)
385 {
386 	struct ena_com_dev *ena_dev;
387 	struct ena_ring *txr, *rxr;
388 	struct ena_que *que;
389 	int i;
390 
391 	ena_dev = adapter->ena_dev;
392 
393 	for (i = 0; i < adapter->num_io_queues; i++) {
394 		txr = &adapter->tx_ring[i];
395 		rxr = &adapter->rx_ring[i];
396 
397 		/* TX/RX common ring state */
398 		ena_init_io_rings_common(adapter, txr, i);
399 		ena_init_io_rings_common(adapter, rxr, i);
400 
401 		/* TX specific ring state */
402 		txr->tx_max_header_size = ena_dev->tx_max_header_size;
403 		txr->tx_mem_queue_type = ena_dev->tx_mem_queue_type;
404 
405 		que = &adapter->que[i];
406 		que->adapter = adapter;
407 		que->id = i;
408 		que->tx_ring = txr;
409 		que->rx_ring = rxr;
410 
411 		txr->que = que;
412 		rxr->que = que;
413 
414 		rxr->empty_rx_queue = 0;
415 		rxr->rx_mbuf_sz = ena_mbuf_sz;
416 	}
417 }
418 
419 static void
420 ena_init_io_rings_advanced(struct ena_adapter *adapter)
421 {
422 	struct ena_ring *txr, *rxr;
423 	int i;
424 
425 	for (i = 0; i < adapter->num_io_queues; i++) {
426 		txr = &adapter->tx_ring[i];
427 		rxr = &adapter->rx_ring[i];
428 
429 		/* Allocate a buf ring */
430 		txr->buf_ring_size = adapter->buf_ring_size;
431 		txr->br = buf_ring_alloc(txr->buf_ring_size, M_DEVBUF, M_WAITOK,
432 		    &txr->ring_mtx);
433 
434 		/* Allocate Tx statistics. */
435 		ena_alloc_counters((counter_u64_t *)&txr->tx_stats,
436 		    sizeof(txr->tx_stats));
437 		txr->tx_last_cleanup_ticks = ticks;
438 
439 		/* Allocate Rx statistics. */
440 		ena_alloc_counters((counter_u64_t *)&rxr->rx_stats,
441 		    sizeof(rxr->rx_stats));
442 
443 		/* Initialize locks */
444 		snprintf(txr->mtx_name, nitems(txr->mtx_name), "%s:tx(%d)",
445 		    device_get_nameunit(adapter->pdev), i);
446 		snprintf(rxr->mtx_name, nitems(rxr->mtx_name), "%s:rx(%d)",
447 		    device_get_nameunit(adapter->pdev), i);
448 
449 		mtx_init(&txr->ring_mtx, txr->mtx_name, NULL, MTX_DEF);
450 	}
451 }
452 
453 static void
454 ena_init_io_rings(struct ena_adapter *adapter)
455 {
456 	/*
457 	 * IO rings initialization can be divided into the 2 steps:
458 	 *   1. Initialize variables and fields with initial values and copy
459 	 *      them from adapter/ena_dev (basic)
460 	 *   2. Allocate mutex, counters and buf_ring (advanced)
461 	 */
462 	ena_init_io_rings_basic(adapter);
463 	ena_init_io_rings_advanced(adapter);
464 }
465 
466 static void
467 ena_free_io_ring_resources(struct ena_adapter *adapter, unsigned int qid)
468 {
469 	struct ena_ring *txr = &adapter->tx_ring[qid];
470 	struct ena_ring *rxr = &adapter->rx_ring[qid];
471 
472 	ena_free_counters((counter_u64_t *)&txr->tx_stats,
473 	    sizeof(txr->tx_stats));
474 	ena_free_counters((counter_u64_t *)&rxr->rx_stats,
475 	    sizeof(rxr->rx_stats));
476 
477 	ENA_RING_MTX_LOCK(txr);
478 	drbr_free(txr->br, M_DEVBUF);
479 	ENA_RING_MTX_UNLOCK(txr);
480 
481 	mtx_destroy(&txr->ring_mtx);
482 }
483 
484 static void
485 ena_free_all_io_rings_resources(struct ena_adapter *adapter)
486 {
487 	int i;
488 
489 	for (i = 0; i < adapter->num_io_queues; i++)
490 		ena_free_io_ring_resources(adapter, i);
491 }
492 
493 static int
494 ena_setup_tx_dma_tag(struct ena_adapter *adapter)
495 {
496 	int ret;
497 
498 	/* Create DMA tag for Tx buffers */
499 	ret = bus_dma_tag_create(bus_get_dma_tag(adapter->pdev),
500 	    1, 0,				  /* alignment, bounds 	     */
501 	    ENA_DMA_BIT_MASK(adapter->dma_width), /* lowaddr of excl window  */
502 	    BUS_SPACE_MAXADDR,			  /* highaddr of excl window */
503 	    NULL, NULL,				  /* filter, filterarg 	     */
504 	    ENA_TSO_MAXSIZE,			  /* maxsize 		     */
505 	    adapter->max_tx_sgl_size - 1,	  /* nsegments 		     */
506 	    ENA_TSO_MAXSIZE,			  /* maxsegsize 	     */
507 	    0,					  /* flags 		     */
508 	    NULL,				  /* lockfunc 		     */
509 	    NULL,				  /* lockfuncarg 	     */
510 	    &adapter->tx_buf_tag);
511 
512 	return (ret);
513 }
514 
515 static int
516 ena_free_tx_dma_tag(struct ena_adapter *adapter)
517 {
518 	int ret;
519 
520 	ret = bus_dma_tag_destroy(adapter->tx_buf_tag);
521 
522 	if (likely(ret == 0))
523 		adapter->tx_buf_tag = NULL;
524 
525 	return (ret);
526 }
527 
528 static int
529 ena_setup_rx_dma_tag(struct ena_adapter *adapter)
530 {
531 	int ret;
532 
533 	/* Create DMA tag for Rx buffers*/
534 	ret = bus_dma_tag_create(bus_get_dma_tag(adapter->pdev), /* parent   */
535 	    1, 0,				  /* alignment, bounds 	     */
536 	    ENA_DMA_BIT_MASK(adapter->dma_width), /* lowaddr of excl window  */
537 	    BUS_SPACE_MAXADDR,			  /* highaddr of excl window */
538 	    NULL, NULL,				  /* filter, filterarg 	     */
539 	    ena_mbuf_sz,			  /* maxsize 		     */
540 	    adapter->max_rx_sgl_size,		  /* nsegments 		     */
541 	    ena_mbuf_sz,			  /* maxsegsize 	     */
542 	    0,					  /* flags 		     */
543 	    NULL,				  /* lockfunc 		     */
544 	    NULL,				  /* lockarg 		     */
545 	    &adapter->rx_buf_tag);
546 
547 	return (ret);
548 }
549 
550 static int
551 ena_free_rx_dma_tag(struct ena_adapter *adapter)
552 {
553 	int ret;
554 
555 	ret = bus_dma_tag_destroy(adapter->rx_buf_tag);
556 
557 	if (likely(ret == 0))
558 		adapter->rx_buf_tag = NULL;
559 
560 	return (ret);
561 }
562 
563 static void
564 ena_release_all_tx_dmamap(struct ena_ring *tx_ring)
565 {
566 	struct ena_adapter *adapter = tx_ring->adapter;
567 	struct ena_tx_buffer *tx_info;
568 	bus_dma_tag_t tx_tag = adapter->tx_buf_tag;
569 	int i;
570 #ifdef DEV_NETMAP
571 	struct ena_netmap_tx_info *nm_info;
572 	int j;
573 #endif /* DEV_NETMAP */
574 
575 	for (i = 0; i < tx_ring->ring_size; ++i) {
576 		tx_info = &tx_ring->tx_buffer_info[i];
577 #ifdef DEV_NETMAP
578 		if (if_getcapenable(adapter->ifp) & IFCAP_NETMAP) {
579 			nm_info = &tx_info->nm_info;
580 			for (j = 0; j < ENA_PKT_MAX_BUFS; ++j) {
581 				if (nm_info->map_seg[j] != NULL) {
582 					bus_dmamap_destroy(tx_tag,
583 					    nm_info->map_seg[j]);
584 					nm_info->map_seg[j] = NULL;
585 				}
586 			}
587 		}
588 #endif /* DEV_NETMAP */
589 		if (tx_info->dmamap != NULL) {
590 			bus_dmamap_destroy(tx_tag, tx_info->dmamap);
591 			tx_info->dmamap = NULL;
592 		}
593 	}
594 }
595 
596 /**
597  * ena_setup_tx_resources - allocate Tx resources (Descriptors)
598  * @adapter: network interface device structure
599  * @qid: queue index
600  *
601  * Returns 0 on success, otherwise on failure.
602  **/
603 static int
604 ena_setup_tx_resources(struct ena_adapter *adapter, int qid)
605 {
606 	device_t pdev = adapter->pdev;
607 	char thread_name[MAXCOMLEN + 1];
608 	struct ena_que *que = &adapter->que[qid];
609 	struct ena_ring *tx_ring = que->tx_ring;
610 	cpuset_t *cpu_mask = NULL;
611 	int size, i, err;
612 #ifdef DEV_NETMAP
613 	bus_dmamap_t *map;
614 	int j;
615 
616 	ena_netmap_reset_tx_ring(adapter, qid);
617 #endif /* DEV_NETMAP */
618 
619 	size = sizeof(struct ena_tx_buffer) * tx_ring->ring_size;
620 
621 	tx_ring->tx_buffer_info = malloc(size, M_DEVBUF, M_NOWAIT | M_ZERO);
622 	if (unlikely(tx_ring->tx_buffer_info == NULL))
623 		return (ENOMEM);
624 
625 	size = sizeof(uint16_t) * tx_ring->ring_size;
626 	tx_ring->free_tx_ids = malloc(size, M_DEVBUF, M_NOWAIT | M_ZERO);
627 	if (unlikely(tx_ring->free_tx_ids == NULL))
628 		goto err_buf_info_free;
629 
630 	size = tx_ring->tx_max_header_size;
631 	tx_ring->push_buf_intermediate_buf = malloc(size, M_DEVBUF,
632 	    M_NOWAIT | M_ZERO);
633 	if (unlikely(tx_ring->push_buf_intermediate_buf == NULL))
634 		goto err_tx_ids_free;
635 
636 	/* Req id stack for TX OOO completions */
637 	for (i = 0; i < tx_ring->ring_size; i++)
638 		tx_ring->free_tx_ids[i] = i;
639 
640 	/* Reset TX statistics. */
641 	ena_reset_counters((counter_u64_t *)&tx_ring->tx_stats,
642 	    sizeof(tx_ring->tx_stats));
643 
644 	tx_ring->next_to_use = 0;
645 	tx_ring->next_to_clean = 0;
646 	tx_ring->acum_pkts = 0;
647 
648 	/* Make sure that drbr is empty */
649 	ENA_RING_MTX_LOCK(tx_ring);
650 	drbr_flush(adapter->ifp, tx_ring->br);
651 	ENA_RING_MTX_UNLOCK(tx_ring);
652 
653 	/* ... and create the buffer DMA maps */
654 	for (i = 0; i < tx_ring->ring_size; i++) {
655 		err = bus_dmamap_create(adapter->tx_buf_tag, 0,
656 		    &tx_ring->tx_buffer_info[i].dmamap);
657 		if (unlikely(err != 0)) {
658 			ena_log(pdev, ERR,
659 			    "Unable to create Tx DMA map for buffer %d\n", i);
660 			goto err_map_release;
661 		}
662 
663 #ifdef DEV_NETMAP
664 		if (if_getcapenable(adapter->ifp) & IFCAP_NETMAP) {
665 			map = tx_ring->tx_buffer_info[i].nm_info.map_seg;
666 			for (j = 0; j < ENA_PKT_MAX_BUFS; j++) {
667 				err = bus_dmamap_create(adapter->tx_buf_tag, 0,
668 				    &map[j]);
669 				if (unlikely(err != 0)) {
670 					ena_log(pdev, ERR,
671 					    "Unable to create Tx DMA for buffer %d %d\n",
672 					    i, j);
673 					goto err_map_release;
674 				}
675 			}
676 		}
677 #endif /* DEV_NETMAP */
678 	}
679 
680 	/* Allocate taskqueues */
681 	TASK_INIT(&tx_ring->enqueue_task, 0, ena_deferred_mq_start, tx_ring);
682 	tx_ring->enqueue_tq = taskqueue_create_fast("ena_tx_enque", M_NOWAIT,
683 	    taskqueue_thread_enqueue, &tx_ring->enqueue_tq);
684 	if (unlikely(tx_ring->enqueue_tq == NULL)) {
685 		ena_log(pdev, ERR,
686 		    "Unable to create taskqueue for enqueue task\n");
687 		i = tx_ring->ring_size;
688 		goto err_map_release;
689 	}
690 
691 	tx_ring->running = true;
692 
693 #ifdef RSS
694 	cpu_mask = &que->cpu_mask;
695 	snprintf(thread_name, sizeof(thread_name), "%s txeq %d",
696 	    device_get_nameunit(adapter->pdev), que->cpu);
697 #else
698 	snprintf(thread_name, sizeof(thread_name), "%s txeq %d",
699 	    device_get_nameunit(adapter->pdev), que->id);
700 #endif
701 	taskqueue_start_threads_cpuset(&tx_ring->enqueue_tq, 1, PI_NET,
702 	    cpu_mask, "%s", thread_name);
703 
704 	return (0);
705 
706 err_map_release:
707 	ena_release_all_tx_dmamap(tx_ring);
708 err_tx_ids_free:
709 	free(tx_ring->free_tx_ids, M_DEVBUF);
710 	tx_ring->free_tx_ids = NULL;
711 err_buf_info_free:
712 	free(tx_ring->tx_buffer_info, M_DEVBUF);
713 	tx_ring->tx_buffer_info = NULL;
714 
715 	return (ENOMEM);
716 }
717 
718 /**
719  * ena_free_tx_resources - Free Tx Resources per Queue
720  * @adapter: network interface device structure
721  * @qid: queue index
722  *
723  * Free all transmit software resources
724  **/
725 static void
726 ena_free_tx_resources(struct ena_adapter *adapter, int qid)
727 {
728 	struct ena_ring *tx_ring = &adapter->tx_ring[qid];
729 #ifdef DEV_NETMAP
730 	struct ena_netmap_tx_info *nm_info;
731 	int j;
732 #endif /* DEV_NETMAP */
733 
734 	while (taskqueue_cancel(tx_ring->enqueue_tq, &tx_ring->enqueue_task, NULL))
735 		taskqueue_drain(tx_ring->enqueue_tq, &tx_ring->enqueue_task);
736 
737 	taskqueue_free(tx_ring->enqueue_tq);
738 
739 	ENA_RING_MTX_LOCK(tx_ring);
740 	/* Flush buffer ring, */
741 	drbr_flush(adapter->ifp, tx_ring->br);
742 
743 	/* Free buffer DMA maps, */
744 	for (int i = 0; i < tx_ring->ring_size; i++) {
745 		bus_dmamap_sync(adapter->tx_buf_tag,
746 		    tx_ring->tx_buffer_info[i].dmamap, BUS_DMASYNC_POSTWRITE);
747 		bus_dmamap_unload(adapter->tx_buf_tag,
748 		    tx_ring->tx_buffer_info[i].dmamap);
749 		bus_dmamap_destroy(adapter->tx_buf_tag,
750 		    tx_ring->tx_buffer_info[i].dmamap);
751 
752 #ifdef DEV_NETMAP
753 		if (if_getcapenable(adapter->ifp) & IFCAP_NETMAP) {
754 			nm_info = &tx_ring->tx_buffer_info[i].nm_info;
755 			for (j = 0; j < ENA_PKT_MAX_BUFS; j++) {
756 				if (nm_info->socket_buf_idx[j] != 0) {
757 					bus_dmamap_sync(adapter->tx_buf_tag,
758 					    nm_info->map_seg[j],
759 					    BUS_DMASYNC_POSTWRITE);
760 					ena_netmap_unload(adapter,
761 					    nm_info->map_seg[j]);
762 				}
763 				bus_dmamap_destroy(adapter->tx_buf_tag,
764 				    nm_info->map_seg[j]);
765 				nm_info->socket_buf_idx[j] = 0;
766 			}
767 		}
768 #endif /* DEV_NETMAP */
769 
770 		m_freem(tx_ring->tx_buffer_info[i].mbuf);
771 		tx_ring->tx_buffer_info[i].mbuf = NULL;
772 	}
773 	ENA_RING_MTX_UNLOCK(tx_ring);
774 
775 	/* And free allocated memory. */
776 	free(tx_ring->tx_buffer_info, M_DEVBUF);
777 	tx_ring->tx_buffer_info = NULL;
778 
779 	free(tx_ring->free_tx_ids, M_DEVBUF);
780 	tx_ring->free_tx_ids = NULL;
781 
782 	free(tx_ring->push_buf_intermediate_buf, M_DEVBUF);
783 	tx_ring->push_buf_intermediate_buf = NULL;
784 }
785 
786 /**
787  * ena_setup_all_tx_resources - allocate all queues Tx resources
788  * @adapter: network interface device structure
789  *
790  * Returns 0 on success, otherwise on failure.
791  **/
792 static int
793 ena_setup_all_tx_resources(struct ena_adapter *adapter)
794 {
795 	int i, rc;
796 
797 	for (i = 0; i < adapter->num_io_queues; i++) {
798 		rc = ena_setup_tx_resources(adapter, i);
799 		if (rc != 0) {
800 			ena_log(adapter->pdev, ERR,
801 			    "Allocation for Tx Queue %u failed\n", i);
802 			goto err_setup_tx;
803 		}
804 	}
805 
806 	return (0);
807 
808 err_setup_tx:
809 	/* Rewind the index freeing the rings as we go */
810 	while (i--)
811 		ena_free_tx_resources(adapter, i);
812 	return (rc);
813 }
814 
815 /**
816  * ena_free_all_tx_resources - Free Tx Resources for All Queues
817  * @adapter: network interface device structure
818  *
819  * Free all transmit software resources
820  **/
821 static void
822 ena_free_all_tx_resources(struct ena_adapter *adapter)
823 {
824 	int i;
825 
826 	for (i = 0; i < adapter->num_io_queues; i++)
827 		ena_free_tx_resources(adapter, i);
828 }
829 
830 /**
831  * ena_setup_rx_resources - allocate Rx resources (Descriptors)
832  * @adapter: network interface device structure
833  * @qid: queue index
834  *
835  * Returns 0 on success, otherwise on failure.
836  **/
837 static int
838 ena_setup_rx_resources(struct ena_adapter *adapter, unsigned int qid)
839 {
840 	device_t pdev = adapter->pdev;
841 	struct ena_que *que = &adapter->que[qid];
842 	struct ena_ring *rx_ring = que->rx_ring;
843 	int size, err, i;
844 
845 	size = sizeof(struct ena_rx_buffer) * rx_ring->ring_size;
846 
847 #ifdef DEV_NETMAP
848 	ena_netmap_reset_rx_ring(adapter, qid);
849 	rx_ring->initialized = false;
850 #endif /* DEV_NETMAP */
851 
852 	/*
853 	 * Alloc extra element so in rx path
854 	 * we can always prefetch rx_info + 1
855 	 */
856 	size += sizeof(struct ena_rx_buffer);
857 
858 	rx_ring->rx_buffer_info = malloc(size, M_DEVBUF, M_WAITOK | M_ZERO);
859 
860 	size = sizeof(uint16_t) * rx_ring->ring_size;
861 	rx_ring->free_rx_ids = malloc(size, M_DEVBUF, M_WAITOK);
862 
863 	for (i = 0; i < rx_ring->ring_size; i++)
864 		rx_ring->free_rx_ids[i] = i;
865 
866 	/* Reset RX statistics. */
867 	ena_reset_counters((counter_u64_t *)&rx_ring->rx_stats,
868 	    sizeof(rx_ring->rx_stats));
869 
870 	rx_ring->next_to_clean = 0;
871 	rx_ring->next_to_use = 0;
872 
873 	/* ... and create the buffer DMA maps */
874 	for (i = 0; i < rx_ring->ring_size; i++) {
875 		err = bus_dmamap_create(adapter->rx_buf_tag, 0,
876 		    &(rx_ring->rx_buffer_info[i].map));
877 		if (err != 0) {
878 			ena_log(pdev, ERR,
879 			    "Unable to create Rx DMA map for buffer %d\n", i);
880 			goto err_buf_info_unmap;
881 		}
882 	}
883 
884 	/* Create LRO for the ring */
885 	if ((if_getcapenable(adapter->ifp) & IFCAP_LRO) != 0) {
886 		int err = tcp_lro_init(&rx_ring->lro);
887 		if (err != 0) {
888 			ena_log(pdev, ERR, "LRO[%d] Initialization failed!\n",
889 			    qid);
890 		} else {
891 			ena_log(pdev, DBG, "RX Soft LRO[%d] Initialized\n",
892 			    qid);
893 			rx_ring->lro.ifp = adapter->ifp;
894 		}
895 	}
896 
897 	return (0);
898 
899 err_buf_info_unmap:
900 	while (i--) {
901 		bus_dmamap_destroy(adapter->rx_buf_tag,
902 		    rx_ring->rx_buffer_info[i].map);
903 	}
904 
905 	free(rx_ring->free_rx_ids, M_DEVBUF);
906 	rx_ring->free_rx_ids = NULL;
907 	free(rx_ring->rx_buffer_info, M_DEVBUF);
908 	rx_ring->rx_buffer_info = NULL;
909 	return (ENOMEM);
910 }
911 
912 /**
913  * ena_free_rx_resources - Free Rx Resources
914  * @adapter: network interface device structure
915  * @qid: queue index
916  *
917  * Free all receive software resources
918  **/
919 static void
920 ena_free_rx_resources(struct ena_adapter *adapter, unsigned int qid)
921 {
922 	struct ena_ring *rx_ring = &adapter->rx_ring[qid];
923 
924 	/* Free buffer DMA maps, */
925 	for (int i = 0; i < rx_ring->ring_size; i++) {
926 		bus_dmamap_sync(adapter->rx_buf_tag,
927 		    rx_ring->rx_buffer_info[i].map, BUS_DMASYNC_POSTREAD);
928 		m_freem(rx_ring->rx_buffer_info[i].mbuf);
929 		rx_ring->rx_buffer_info[i].mbuf = NULL;
930 		bus_dmamap_unload(adapter->rx_buf_tag,
931 		    rx_ring->rx_buffer_info[i].map);
932 		bus_dmamap_destroy(adapter->rx_buf_tag,
933 		    rx_ring->rx_buffer_info[i].map);
934 	}
935 
936 	/* free LRO resources, */
937 	tcp_lro_free(&rx_ring->lro);
938 
939 	/* free allocated memory */
940 	free(rx_ring->rx_buffer_info, M_DEVBUF);
941 	rx_ring->rx_buffer_info = NULL;
942 
943 	free(rx_ring->free_rx_ids, M_DEVBUF);
944 	rx_ring->free_rx_ids = NULL;
945 }
946 
947 /**
948  * ena_setup_all_rx_resources - allocate all queues Rx resources
949  * @adapter: network interface device structure
950  *
951  * Returns 0 on success, otherwise on failure.
952  **/
953 static int
954 ena_setup_all_rx_resources(struct ena_adapter *adapter)
955 {
956 	int i, rc = 0;
957 
958 	for (i = 0; i < adapter->num_io_queues; i++) {
959 		rc = ena_setup_rx_resources(adapter, i);
960 		if (rc != 0) {
961 			ena_log(adapter->pdev, ERR,
962 			    "Allocation for Rx Queue %u failed\n", i);
963 			goto err_setup_rx;
964 		}
965 	}
966 	return (0);
967 
968 err_setup_rx:
969 	/* rewind the index freeing the rings as we go */
970 	while (i--)
971 		ena_free_rx_resources(adapter, i);
972 	return (rc);
973 }
974 
975 /**
976  * ena_free_all_rx_resources - Free Rx resources for all queues
977  * @adapter: network interface device structure
978  *
979  * Free all receive software resources
980  **/
981 static void
982 ena_free_all_rx_resources(struct ena_adapter *adapter)
983 {
984 	int i;
985 
986 	for (i = 0; i < adapter->num_io_queues; i++)
987 		ena_free_rx_resources(adapter, i);
988 }
989 
990 static inline int
991 ena_alloc_rx_mbuf(struct ena_adapter *adapter, struct ena_ring *rx_ring,
992     struct ena_rx_buffer *rx_info)
993 {
994 	device_t pdev = adapter->pdev;
995 	struct ena_com_buf *ena_buf;
996 	bus_dma_segment_t segs[1];
997 	int nsegs, error;
998 	int mlen;
999 
1000 	/* if previous allocated frag is not used */
1001 	if (unlikely(rx_info->mbuf != NULL))
1002 		return (0);
1003 
1004 	/* Get mbuf using UMA allocator */
1005 	rx_info->mbuf = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR,
1006 	    rx_ring->rx_mbuf_sz);
1007 
1008 	if (unlikely(rx_info->mbuf == NULL)) {
1009 		counter_u64_add(rx_ring->rx_stats.mjum_alloc_fail, 1);
1010 		rx_info->mbuf = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
1011 		if (unlikely(rx_info->mbuf == NULL)) {
1012 			counter_u64_add(rx_ring->rx_stats.mbuf_alloc_fail, 1);
1013 			return (ENOMEM);
1014 		}
1015 		mlen = MCLBYTES;
1016 	} else {
1017 		mlen = rx_ring->rx_mbuf_sz;
1018 	}
1019 	/* Set mbuf length*/
1020 	rx_info->mbuf->m_pkthdr.len = rx_info->mbuf->m_len = mlen;
1021 
1022 	/* Map packets for DMA */
1023 	ena_log(pdev, DBG,
1024 	    "Using tag %p for buffers' DMA mapping, mbuf %p len: %d\n",
1025 	    adapter->rx_buf_tag, rx_info->mbuf, rx_info->mbuf->m_len);
1026 	error = bus_dmamap_load_mbuf_sg(adapter->rx_buf_tag, rx_info->map,
1027 	    rx_info->mbuf, segs, &nsegs, BUS_DMA_NOWAIT);
1028 	if (unlikely((error != 0) || (nsegs != 1))) {
1029 		ena_log(pdev, WARN,
1030 		    "failed to map mbuf, error: %d, nsegs: %d\n", error, nsegs);
1031 		counter_u64_add(rx_ring->rx_stats.dma_mapping_err, 1);
1032 		goto exit;
1033 	}
1034 
1035 	bus_dmamap_sync(adapter->rx_buf_tag, rx_info->map, BUS_DMASYNC_PREREAD);
1036 
1037 	ena_buf = &rx_info->ena_buf;
1038 	ena_buf->paddr = segs[0].ds_addr;
1039 	ena_buf->len = mlen;
1040 
1041 	ena_log(pdev, DBG,
1042 	    "ALLOC RX BUF: mbuf %p, rx_info %p, len %d, paddr %#jx\n",
1043 	    rx_info->mbuf, rx_info, ena_buf->len, (uintmax_t)ena_buf->paddr);
1044 
1045 	return (0);
1046 
1047 exit:
1048 	m_freem(rx_info->mbuf);
1049 	rx_info->mbuf = NULL;
1050 	return (EFAULT);
1051 }
1052 
1053 static void
1054 ena_free_rx_mbuf(struct ena_adapter *adapter, struct ena_ring *rx_ring,
1055     struct ena_rx_buffer *rx_info)
1056 {
1057 	if (rx_info->mbuf == NULL) {
1058 		ena_log(adapter->pdev, WARN,
1059 		    "Trying to free unallocated buffer\n");
1060 		return;
1061 	}
1062 
1063 	bus_dmamap_sync(adapter->rx_buf_tag, rx_info->map,
1064 	    BUS_DMASYNC_POSTREAD);
1065 	bus_dmamap_unload(adapter->rx_buf_tag, rx_info->map);
1066 	m_freem(rx_info->mbuf);
1067 	rx_info->mbuf = NULL;
1068 }
1069 
1070 /**
1071  * ena_refill_rx_bufs - Refills ring with descriptors
1072  * @rx_ring: the ring which we want to feed with free descriptors
1073  * @num: number of descriptors to refill
1074  * Refills the ring with newly allocated DMA-mapped mbufs for receiving
1075  **/
1076 int
1077 ena_refill_rx_bufs(struct ena_ring *rx_ring, uint32_t num)
1078 {
1079 	struct ena_adapter *adapter = rx_ring->adapter;
1080 	device_t pdev = adapter->pdev;
1081 	uint16_t next_to_use, req_id;
1082 	uint32_t i;
1083 	int rc;
1084 
1085 	ena_log_io(adapter->pdev, DBG, "refill qid: %d\n", rx_ring->qid);
1086 
1087 	next_to_use = rx_ring->next_to_use;
1088 
1089 	for (i = 0; i < num; i++) {
1090 		struct ena_rx_buffer *rx_info;
1091 
1092 		ena_log_io(pdev, DBG, "RX buffer - next to use: %d\n",
1093 		    next_to_use);
1094 
1095 		req_id = rx_ring->free_rx_ids[next_to_use];
1096 		rx_info = &rx_ring->rx_buffer_info[req_id];
1097 #ifdef DEV_NETMAP
1098 		if (ena_rx_ring_in_netmap(adapter, rx_ring->qid))
1099 			rc = ena_netmap_alloc_rx_slot(adapter, rx_ring,
1100 			    rx_info);
1101 		else
1102 #endif /* DEV_NETMAP */
1103 			rc = ena_alloc_rx_mbuf(adapter, rx_ring, rx_info);
1104 		if (unlikely(rc != 0)) {
1105 			ena_log_io(pdev, WARN,
1106 			    "failed to alloc buffer for rx queue %d\n",
1107 			    rx_ring->qid);
1108 			break;
1109 		}
1110 		rc = ena_com_add_single_rx_desc(rx_ring->ena_com_io_sq,
1111 		    &rx_info->ena_buf, req_id);
1112 		if (unlikely(rc != 0)) {
1113 			ena_log_io(pdev, WARN,
1114 			    "failed to add buffer for rx queue %d\n",
1115 			    rx_ring->qid);
1116 			break;
1117 		}
1118 		next_to_use = ENA_RX_RING_IDX_NEXT(next_to_use,
1119 		    rx_ring->ring_size);
1120 	}
1121 
1122 	if (unlikely(i < num)) {
1123 		counter_u64_add(rx_ring->rx_stats.refil_partial, 1);
1124 		ena_log_io(pdev, WARN,
1125 		    "refilled rx qid %d with only %d mbufs (from %d)\n",
1126 		    rx_ring->qid, i, num);
1127 	}
1128 
1129 	if (likely(i != 0))
1130 		ena_com_write_sq_doorbell(rx_ring->ena_com_io_sq);
1131 
1132 	rx_ring->next_to_use = next_to_use;
1133 	return (i);
1134 }
1135 
1136 int
1137 ena_update_buf_ring_size(struct ena_adapter *adapter,
1138     uint32_t new_buf_ring_size)
1139 {
1140 	uint32_t old_buf_ring_size;
1141 	int rc = 0;
1142 	bool dev_was_up;
1143 
1144 	old_buf_ring_size = adapter->buf_ring_size;
1145 	adapter->buf_ring_size = new_buf_ring_size;
1146 
1147 	dev_was_up = ENA_FLAG_ISSET(ENA_FLAG_DEV_UP, adapter);
1148 	ena_down(adapter);
1149 
1150 	/* Reconfigure buf ring for all Tx rings. */
1151 	ena_free_all_io_rings_resources(adapter);
1152 	ena_init_io_rings_advanced(adapter);
1153 	if (dev_was_up) {
1154 		/*
1155 		 * If ena_up() fails, it's not because of recent buf_ring size
1156 		 * changes. Because of that, we just want to revert old drbr
1157 		 * value and trigger the reset because something else had to
1158 		 * go wrong.
1159 		 */
1160 		rc = ena_up(adapter);
1161 		if (unlikely(rc != 0)) {
1162 			ena_log(adapter->pdev, ERR,
1163 			    "Failed to configure device after setting new drbr size: %u. Reverting old value: %u and triggering the reset\n",
1164 			    new_buf_ring_size, old_buf_ring_size);
1165 
1166 			/* Revert old size and trigger the reset */
1167 			adapter->buf_ring_size = old_buf_ring_size;
1168 			ena_free_all_io_rings_resources(adapter);
1169 			ena_init_io_rings_advanced(adapter);
1170 
1171 			ENA_FLAG_SET_ATOMIC(ENA_FLAG_DEV_UP_BEFORE_RESET,
1172 			    adapter);
1173 			ena_trigger_reset(adapter, ENA_REGS_RESET_OS_TRIGGER);
1174 		}
1175 	}
1176 
1177 	return (rc);
1178 }
1179 
1180 int
1181 ena_update_queue_size(struct ena_adapter *adapter, uint32_t new_tx_size,
1182     uint32_t new_rx_size)
1183 {
1184 	uint32_t old_tx_size, old_rx_size;
1185 	int rc = 0;
1186 	bool dev_was_up;
1187 
1188 	old_tx_size = adapter->requested_tx_ring_size;
1189 	old_rx_size = adapter->requested_rx_ring_size;
1190 	adapter->requested_tx_ring_size = new_tx_size;
1191 	adapter->requested_rx_ring_size = new_rx_size;
1192 
1193 	dev_was_up = ENA_FLAG_ISSET(ENA_FLAG_DEV_UP, adapter);
1194 	ena_down(adapter);
1195 
1196 	/* Configure queues with new size. */
1197 	ena_init_io_rings_basic(adapter);
1198 	if (dev_was_up) {
1199 		rc = ena_up(adapter);
1200 		if (unlikely(rc != 0)) {
1201 			ena_log(adapter->pdev, ERR,
1202 			    "Failed to configure device with the new sizes - Tx: %u Rx: %u. Reverting old values - Tx: %u Rx: %u\n",
1203 			    new_tx_size, new_rx_size, old_tx_size, old_rx_size);
1204 
1205 			/* Revert old size. */
1206 			adapter->requested_tx_ring_size = old_tx_size;
1207 			adapter->requested_rx_ring_size = old_rx_size;
1208 			ena_init_io_rings_basic(adapter);
1209 
1210 			/* And try again. */
1211 			rc = ena_up(adapter);
1212 			if (unlikely(rc != 0)) {
1213 				ena_log(adapter->pdev, ERR,
1214 				    "Failed to revert old queue sizes. Triggering device reset.\n");
1215 				/*
1216 				 * If we've failed again, something had to go
1217 				 * wrong. After reset, the device should try to
1218 				 * go up
1219 				 */
1220 				ENA_FLAG_SET_ATOMIC(
1221 				    ENA_FLAG_DEV_UP_BEFORE_RESET, adapter);
1222 				ena_trigger_reset(adapter,
1223 				    ENA_REGS_RESET_OS_TRIGGER);
1224 			}
1225 		}
1226 	}
1227 
1228 	return (rc);
1229 }
1230 
1231 static void
1232 ena_update_io_rings(struct ena_adapter *adapter, uint32_t num)
1233 {
1234 	ena_free_all_io_rings_resources(adapter);
1235 	/* Force indirection table to be reinitialized */
1236 	ena_com_rss_destroy(adapter->ena_dev);
1237 
1238 	adapter->num_io_queues = num;
1239 	ena_init_io_rings(adapter);
1240 }
1241 
1242 /* Caller should sanitize new_num */
1243 int
1244 ena_update_io_queue_nb(struct ena_adapter *adapter, uint32_t new_num)
1245 {
1246 	uint32_t old_num;
1247 	int rc = 0;
1248 	bool dev_was_up;
1249 
1250 	dev_was_up = ENA_FLAG_ISSET(ENA_FLAG_DEV_UP, adapter);
1251 	old_num = adapter->num_io_queues;
1252 	ena_down(adapter);
1253 
1254 	ena_update_io_rings(adapter, new_num);
1255 
1256 	if (dev_was_up) {
1257 		rc = ena_up(adapter);
1258 		if (unlikely(rc != 0)) {
1259 			ena_log(adapter->pdev, ERR,
1260 			    "Failed to configure device with %u IO queues. "
1261 			    "Reverting to previous value: %u\n",
1262 			    new_num, old_num);
1263 
1264 			ena_update_io_rings(adapter, old_num);
1265 
1266 			rc = ena_up(adapter);
1267 			if (unlikely(rc != 0)) {
1268 				ena_log(adapter->pdev, ERR,
1269 				    "Failed to revert to previous setup IO "
1270 				    "queues. Triggering device reset.\n");
1271 				ENA_FLAG_SET_ATOMIC(
1272 				    ENA_FLAG_DEV_UP_BEFORE_RESET, adapter);
1273 				ena_trigger_reset(adapter,
1274 				    ENA_REGS_RESET_OS_TRIGGER);
1275 			}
1276 		}
1277 	}
1278 
1279 	return (rc);
1280 }
1281 
1282 static void
1283 ena_free_rx_bufs(struct ena_adapter *adapter, unsigned int qid)
1284 {
1285 	struct ena_ring *rx_ring = &adapter->rx_ring[qid];
1286 	unsigned int i;
1287 
1288 	for (i = 0; i < rx_ring->ring_size; i++) {
1289 		struct ena_rx_buffer *rx_info = &rx_ring->rx_buffer_info[i];
1290 
1291 		if (rx_info->mbuf != NULL)
1292 			ena_free_rx_mbuf(adapter, rx_ring, rx_info);
1293 #ifdef DEV_NETMAP
1294 		if (((if_getflags(adapter->ifp) & IFF_DYING) == 0) &&
1295 		    (if_getcapenable(adapter->ifp) & IFCAP_NETMAP)) {
1296 			if (rx_info->netmap_buf_idx != 0)
1297 				ena_netmap_free_rx_slot(adapter, rx_ring,
1298 				    rx_info);
1299 		}
1300 #endif /* DEV_NETMAP */
1301 	}
1302 }
1303 
1304 /**
1305  * ena_refill_all_rx_bufs - allocate all queues Rx buffers
1306  * @adapter: network interface device structure
1307  *
1308  */
1309 static void
1310 ena_refill_all_rx_bufs(struct ena_adapter *adapter)
1311 {
1312 	struct ena_ring *rx_ring;
1313 	int i, rc, bufs_num;
1314 
1315 	for (i = 0; i < adapter->num_io_queues; i++) {
1316 		rx_ring = &adapter->rx_ring[i];
1317 		bufs_num = rx_ring->ring_size - 1;
1318 		rc = ena_refill_rx_bufs(rx_ring, bufs_num);
1319 		if (unlikely(rc != bufs_num))
1320 			ena_log_io(adapter->pdev, WARN,
1321 			    "refilling Queue %d failed. "
1322 			    "Allocated %d buffers from: %d\n",
1323 			    i, rc, bufs_num);
1324 #ifdef DEV_NETMAP
1325 		rx_ring->initialized = true;
1326 #endif /* DEV_NETMAP */
1327 	}
1328 }
1329 
1330 static void
1331 ena_free_all_rx_bufs(struct ena_adapter *adapter)
1332 {
1333 	int i;
1334 
1335 	for (i = 0; i < adapter->num_io_queues; i++)
1336 		ena_free_rx_bufs(adapter, i);
1337 }
1338 
1339 /**
1340  * ena_free_tx_bufs - Free Tx Buffers per Queue
1341  * @adapter: network interface device structure
1342  * @qid: queue index
1343  **/
1344 static void
1345 ena_free_tx_bufs(struct ena_adapter *adapter, unsigned int qid)
1346 {
1347 	bool print_once = true;
1348 	struct ena_ring *tx_ring = &adapter->tx_ring[qid];
1349 
1350 	ENA_RING_MTX_LOCK(tx_ring);
1351 	for (int i = 0; i < tx_ring->ring_size; i++) {
1352 		struct ena_tx_buffer *tx_info = &tx_ring->tx_buffer_info[i];
1353 
1354 		if (tx_info->mbuf == NULL)
1355 			continue;
1356 
1357 		if (print_once) {
1358 			ena_log(adapter->pdev, WARN,
1359 			    "free uncompleted tx mbuf qid %d idx 0x%x\n", qid,
1360 			    i);
1361 			print_once = false;
1362 		} else {
1363 			ena_log(adapter->pdev, DBG,
1364 			    "free uncompleted tx mbuf qid %d idx 0x%x\n", qid,
1365 			    i);
1366 		}
1367 
1368 		bus_dmamap_sync(adapter->tx_buf_tag, tx_info->dmamap,
1369 		    BUS_DMASYNC_POSTWRITE);
1370 		bus_dmamap_unload(adapter->tx_buf_tag, tx_info->dmamap);
1371 
1372 		m_free(tx_info->mbuf);
1373 		tx_info->mbuf = NULL;
1374 	}
1375 	ENA_RING_MTX_UNLOCK(tx_ring);
1376 }
1377 
1378 static void
1379 ena_free_all_tx_bufs(struct ena_adapter *adapter)
1380 {
1381 	for (int i = 0; i < adapter->num_io_queues; i++)
1382 		ena_free_tx_bufs(adapter, i);
1383 }
1384 
1385 static void
1386 ena_destroy_all_tx_queues(struct ena_adapter *adapter)
1387 {
1388 	uint16_t ena_qid;
1389 	int i;
1390 
1391 	for (i = 0; i < adapter->num_io_queues; i++) {
1392 		ena_qid = ENA_IO_TXQ_IDX(i);
1393 		ena_com_destroy_io_queue(adapter->ena_dev, ena_qid);
1394 	}
1395 }
1396 
1397 static void
1398 ena_destroy_all_rx_queues(struct ena_adapter *adapter)
1399 {
1400 	uint16_t ena_qid;
1401 	int i;
1402 
1403 	for (i = 0; i < adapter->num_io_queues; i++) {
1404 		ena_qid = ENA_IO_RXQ_IDX(i);
1405 		ena_com_destroy_io_queue(adapter->ena_dev, ena_qid);
1406 	}
1407 }
1408 
1409 static void
1410 ena_destroy_all_io_queues(struct ena_adapter *adapter)
1411 {
1412 	struct ena_que *queue;
1413 	int i;
1414 
1415 	for (i = 0; i < adapter->num_io_queues; i++) {
1416 		queue = &adapter->que[i];
1417 		while (taskqueue_cancel(queue->cleanup_tq, &queue->cleanup_task, NULL))
1418 			taskqueue_drain(queue->cleanup_tq, &queue->cleanup_task);
1419 		taskqueue_free(queue->cleanup_tq);
1420 	}
1421 
1422 	ena_destroy_all_tx_queues(adapter);
1423 	ena_destroy_all_rx_queues(adapter);
1424 }
1425 
1426 static int
1427 ena_create_io_queues(struct ena_adapter *adapter)
1428 {
1429 	struct ena_com_dev *ena_dev = adapter->ena_dev;
1430 	struct ena_com_create_io_ctx ctx;
1431 	struct ena_ring *ring;
1432 	struct ena_que *queue;
1433 	uint16_t ena_qid;
1434 	uint32_t msix_vector;
1435 	cpuset_t *cpu_mask = NULL;
1436 	int rc, i;
1437 
1438 	/* Create TX queues */
1439 	for (i = 0; i < adapter->num_io_queues; i++) {
1440 		msix_vector = ENA_IO_IRQ_IDX(i);
1441 		ena_qid = ENA_IO_TXQ_IDX(i);
1442 		ctx.mem_queue_type = ena_dev->tx_mem_queue_type;
1443 		ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_TX;
1444 		ctx.queue_size = adapter->requested_tx_ring_size;
1445 		ctx.msix_vector = msix_vector;
1446 		ctx.qid = ena_qid;
1447 		ctx.numa_node = adapter->que[i].domain;
1448 
1449 		rc = ena_com_create_io_queue(ena_dev, &ctx);
1450 		if (rc != 0) {
1451 			ena_log(adapter->pdev, ERR,
1452 			    "Failed to create io TX queue #%d rc: %d\n", i, rc);
1453 			goto err_tx;
1454 		}
1455 		ring = &adapter->tx_ring[i];
1456 		rc = ena_com_get_io_handlers(ena_dev, ena_qid,
1457 		    &ring->ena_com_io_sq, &ring->ena_com_io_cq);
1458 		if (rc != 0) {
1459 			ena_log(adapter->pdev, ERR,
1460 			    "Failed to get TX queue handlers. TX queue num"
1461 			    " %d rc: %d\n",
1462 			    i, rc);
1463 			ena_com_destroy_io_queue(ena_dev, ena_qid);
1464 			goto err_tx;
1465 		}
1466 
1467 		if (ctx.numa_node >= 0) {
1468 			ena_com_update_numa_node(ring->ena_com_io_cq,
1469 			    ctx.numa_node);
1470 		}
1471 	}
1472 
1473 	/* Create RX queues */
1474 	for (i = 0; i < adapter->num_io_queues; i++) {
1475 		msix_vector = ENA_IO_IRQ_IDX(i);
1476 		ena_qid = ENA_IO_RXQ_IDX(i);
1477 		ctx.mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
1478 		ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_RX;
1479 		ctx.queue_size = adapter->requested_rx_ring_size;
1480 		ctx.msix_vector = msix_vector;
1481 		ctx.qid = ena_qid;
1482 		ctx.numa_node = adapter->que[i].domain;
1483 
1484 		rc = ena_com_create_io_queue(ena_dev, &ctx);
1485 		if (unlikely(rc != 0)) {
1486 			ena_log(adapter->pdev, ERR,
1487 			    "Failed to create io RX queue[%d] rc: %d\n", i, rc);
1488 			goto err_rx;
1489 		}
1490 
1491 		ring = &adapter->rx_ring[i];
1492 		rc = ena_com_get_io_handlers(ena_dev, ena_qid,
1493 		    &ring->ena_com_io_sq, &ring->ena_com_io_cq);
1494 		if (unlikely(rc != 0)) {
1495 			ena_log(adapter->pdev, ERR,
1496 			    "Failed to get RX queue handlers. RX queue num"
1497 			    " %d rc: %d\n",
1498 			    i, rc);
1499 			ena_com_destroy_io_queue(ena_dev, ena_qid);
1500 			goto err_rx;
1501 		}
1502 
1503 		if (ctx.numa_node >= 0) {
1504 			ena_com_update_numa_node(ring->ena_com_io_cq,
1505 			    ctx.numa_node);
1506 		}
1507 	}
1508 
1509 	for (i = 0; i < adapter->num_io_queues; i++) {
1510 		queue = &adapter->que[i];
1511 
1512 		NET_TASK_INIT(&queue->cleanup_task, 0, ena_cleanup, queue);
1513 		queue->cleanup_tq = taskqueue_create_fast("ena cleanup",
1514 		    M_WAITOK, taskqueue_thread_enqueue, &queue->cleanup_tq);
1515 
1516 #ifdef RSS
1517 		cpu_mask = &queue->cpu_mask;
1518 #endif
1519 		taskqueue_start_threads_cpuset(&queue->cleanup_tq, 1, PI_NET,
1520 		    cpu_mask, "%s queue %d cleanup",
1521 		    device_get_nameunit(adapter->pdev), i);
1522 	}
1523 
1524 	return (0);
1525 
1526 err_rx:
1527 	while (i--)
1528 		ena_com_destroy_io_queue(ena_dev, ENA_IO_RXQ_IDX(i));
1529 	i = adapter->num_io_queues;
1530 err_tx:
1531 	while (i--)
1532 		ena_com_destroy_io_queue(ena_dev, ENA_IO_TXQ_IDX(i));
1533 
1534 	return (ENXIO);
1535 }
1536 
1537 /*********************************************************************
1538  *
1539  *  MSIX & Interrupt Service routine
1540  *
1541  **********************************************************************/
1542 
1543 /**
1544  * ena_handle_msix - MSIX Interrupt Handler for admin/async queue
1545  * @arg: interrupt number
1546  **/
1547 static void
1548 ena_intr_msix_mgmnt(void *arg)
1549 {
1550 	struct ena_adapter *adapter = (struct ena_adapter *)arg;
1551 
1552 	ena_com_admin_q_comp_intr_handler(adapter->ena_dev);
1553 	if (likely(ENA_FLAG_ISSET(ENA_FLAG_DEVICE_RUNNING, adapter)))
1554 		ena_com_aenq_intr_handler(adapter->ena_dev, arg);
1555 }
1556 
1557 /**
1558  * ena_handle_msix - MSIX Interrupt Handler for Tx/Rx
1559  * @arg: queue
1560  **/
1561 static int
1562 ena_handle_msix(void *arg)
1563 {
1564 	struct ena_que *queue = arg;
1565 	struct ena_adapter *adapter = queue->adapter;
1566 	if_t ifp = adapter->ifp;
1567 
1568 	if (unlikely((if_getdrvflags(ifp) & IFF_DRV_RUNNING) == 0))
1569 		return (FILTER_STRAY);
1570 
1571 	taskqueue_enqueue(queue->cleanup_tq, &queue->cleanup_task);
1572 
1573 	return (FILTER_HANDLED);
1574 }
1575 
1576 static int
1577 ena_enable_msix(struct ena_adapter *adapter)
1578 {
1579 	device_t dev = adapter->pdev;
1580 	int msix_vecs, msix_req;
1581 	int i, rc = 0;
1582 
1583 	if (ENA_FLAG_ISSET(ENA_FLAG_MSIX_ENABLED, adapter)) {
1584 		ena_log(dev, ERR, "Error, MSI-X is already enabled\n");
1585 		return (EINVAL);
1586 	}
1587 
1588 	/* Reserved the max msix vectors we might need */
1589 	msix_vecs = ENA_MAX_MSIX_VEC(adapter->max_num_io_queues);
1590 
1591 	adapter->msix_entries = malloc(msix_vecs * sizeof(struct msix_entry),
1592 	    M_DEVBUF, M_WAITOK | M_ZERO);
1593 
1594 	ena_log(dev, DBG, "trying to enable MSI-X, vectors: %d\n", msix_vecs);
1595 
1596 	for (i = 0; i < msix_vecs; i++) {
1597 		adapter->msix_entries[i].entry = i;
1598 		/* Vectors must start from 1 */
1599 		adapter->msix_entries[i].vector = i + 1;
1600 	}
1601 
1602 	msix_req = msix_vecs;
1603 	rc = pci_alloc_msix(dev, &msix_vecs);
1604 	if (unlikely(rc != 0)) {
1605 		ena_log(dev, ERR, "Failed to enable MSIX, vectors %d rc %d\n",
1606 		    msix_vecs, rc);
1607 
1608 		rc = ENOSPC;
1609 		goto err_msix_free;
1610 	}
1611 
1612 	if (msix_vecs != msix_req) {
1613 		if (msix_vecs == ENA_ADMIN_MSIX_VEC) {
1614 			ena_log(dev, ERR,
1615 			    "Not enough number of MSI-x allocated: %d\n",
1616 			    msix_vecs);
1617 			pci_release_msi(dev);
1618 			rc = ENOSPC;
1619 			goto err_msix_free;
1620 		}
1621 		ena_log(dev, ERR,
1622 		    "Enable only %d MSI-x (out of %d), reduce "
1623 		    "the number of queues\n",
1624 		    msix_vecs, msix_req);
1625 	}
1626 
1627 	adapter->msix_vecs = msix_vecs;
1628 	ENA_FLAG_SET_ATOMIC(ENA_FLAG_MSIX_ENABLED, adapter);
1629 
1630 	return (0);
1631 
1632 err_msix_free:
1633 	free(adapter->msix_entries, M_DEVBUF);
1634 	adapter->msix_entries = NULL;
1635 
1636 	return (rc);
1637 }
1638 
1639 static void
1640 ena_setup_mgmnt_intr(struct ena_adapter *adapter)
1641 {
1642 	snprintf(adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].name, ENA_IRQNAME_SIZE,
1643 	    "ena-mgmnt@pci:%s", device_get_nameunit(adapter->pdev));
1644 	/*
1645 	 * Handler is NULL on purpose, it will be set
1646 	 * when mgmnt interrupt is acquired
1647 	 */
1648 	adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].handler = NULL;
1649 	adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].data = adapter;
1650 	adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].vector =
1651 	    adapter->msix_entries[ENA_MGMNT_IRQ_IDX].vector;
1652 }
1653 
1654 static int
1655 ena_setup_io_intr(struct ena_adapter *adapter)
1656 {
1657 #ifdef RSS
1658 	int num_buckets = rss_getnumbuckets();
1659 	static int last_bind = 0;
1660 	int cur_bind;
1661 	int idx;
1662 #endif
1663 	int irq_idx;
1664 
1665 	if (adapter->msix_entries == NULL)
1666 		return (EINVAL);
1667 
1668 #ifdef RSS
1669 	if (adapter->first_bind < 0) {
1670 		adapter->first_bind = last_bind;
1671 		last_bind = (last_bind + adapter->num_io_queues) % num_buckets;
1672 	}
1673 	cur_bind = adapter->first_bind;
1674 #endif
1675 
1676 	for (int i = 0; i < adapter->num_io_queues; i++) {
1677 		irq_idx = ENA_IO_IRQ_IDX(i);
1678 
1679 		snprintf(adapter->irq_tbl[irq_idx].name, ENA_IRQNAME_SIZE,
1680 		    "%s-TxRx-%d", device_get_nameunit(adapter->pdev), i);
1681 		adapter->irq_tbl[irq_idx].handler = ena_handle_msix;
1682 		adapter->irq_tbl[irq_idx].data = &adapter->que[i];
1683 		adapter->irq_tbl[irq_idx].vector =
1684 		    adapter->msix_entries[irq_idx].vector;
1685 		ena_log(adapter->pdev, DBG, "ena_setup_io_intr vector: %d\n",
1686 		    adapter->msix_entries[irq_idx].vector);
1687 
1688 #ifdef RSS
1689 		adapter->que[i].cpu = adapter->irq_tbl[irq_idx].cpu =
1690 		    rss_getcpu(cur_bind);
1691 		cur_bind = (cur_bind + 1) % num_buckets;
1692 		CPU_SETOF(adapter->que[i].cpu, &adapter->que[i].cpu_mask);
1693 
1694 		for (idx = 0; idx < MAXMEMDOM; ++idx) {
1695 			if (CPU_ISSET(adapter->que[i].cpu, &cpuset_domain[idx]))
1696 				break;
1697 		}
1698 		adapter->que[i].domain = idx;
1699 #else
1700 		adapter->que[i].domain = -1;
1701 #endif
1702 	}
1703 
1704 	return (0);
1705 }
1706 
1707 static int
1708 ena_request_mgmnt_irq(struct ena_adapter *adapter)
1709 {
1710 	device_t pdev = adapter->pdev;
1711 	struct ena_irq *irq;
1712 	unsigned long flags;
1713 	int rc, rcc;
1714 
1715 	flags = RF_ACTIVE | RF_SHAREABLE;
1716 
1717 	irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX];
1718 	irq->res = bus_alloc_resource_any(adapter->pdev, SYS_RES_IRQ,
1719 	    &irq->vector, flags);
1720 
1721 	if (unlikely(irq->res == NULL)) {
1722 		ena_log(pdev, ERR, "could not allocate irq vector: %d\n",
1723 		    irq->vector);
1724 		return (ENXIO);
1725 	}
1726 
1727 	rc = bus_setup_intr(adapter->pdev, irq->res,
1728 	    INTR_TYPE_NET | INTR_MPSAFE, NULL, ena_intr_msix_mgmnt, irq->data,
1729 	    &irq->cookie);
1730 	if (unlikely(rc != 0)) {
1731 		ena_log(pdev, ERR,
1732 		    "failed to register interrupt handler for irq %ju: %d\n",
1733 		    rman_get_start(irq->res), rc);
1734 		goto err_res_free;
1735 	}
1736 	irq->requested = true;
1737 
1738 	return (rc);
1739 
1740 err_res_free:
1741 	ena_log(pdev, INFO, "releasing resource for irq %d\n", irq->vector);
1742 	rcc = bus_release_resource(adapter->pdev, SYS_RES_IRQ, irq->vector,
1743 	    irq->res);
1744 	if (unlikely(rcc != 0))
1745 		ena_log(pdev, ERR,
1746 		    "dev has no parent while releasing res for irq: %d\n",
1747 		    irq->vector);
1748 	irq->res = NULL;
1749 
1750 	return (rc);
1751 }
1752 
1753 static int
1754 ena_request_io_irq(struct ena_adapter *adapter)
1755 {
1756 	device_t pdev = adapter->pdev;
1757 	struct ena_irq *irq;
1758 	unsigned long flags = 0;
1759 	int rc = 0, i, rcc;
1760 
1761 	if (unlikely(!ENA_FLAG_ISSET(ENA_FLAG_MSIX_ENABLED, adapter))) {
1762 		ena_log(pdev, ERR,
1763 		    "failed to request I/O IRQ: MSI-X is not enabled\n");
1764 		return (EINVAL);
1765 	} else {
1766 		flags = RF_ACTIVE | RF_SHAREABLE;
1767 	}
1768 
1769 	for (i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++) {
1770 		irq = &adapter->irq_tbl[i];
1771 
1772 		if (unlikely(irq->requested))
1773 			continue;
1774 
1775 		irq->res = bus_alloc_resource_any(adapter->pdev, SYS_RES_IRQ,
1776 		    &irq->vector, flags);
1777 		if (unlikely(irq->res == NULL)) {
1778 			rc = ENOMEM;
1779 			ena_log(pdev, ERR,
1780 			    "could not allocate irq vector: %d\n", irq->vector);
1781 			goto err;
1782 		}
1783 
1784 		rc = bus_setup_intr(adapter->pdev, irq->res,
1785 		    INTR_TYPE_NET | INTR_MPSAFE, irq->handler, NULL, irq->data,
1786 		    &irq->cookie);
1787 		if (unlikely(rc != 0)) {
1788 			ena_log(pdev, ERR,
1789 			    "failed to register interrupt handler for irq %ju: %d\n",
1790 			    rman_get_start(irq->res), rc);
1791 			goto err;
1792 		}
1793 		irq->requested = true;
1794 
1795 #ifdef RSS
1796 		rc = bus_bind_intr(adapter->pdev, irq->res, irq->cpu);
1797 		if (unlikely(rc != 0)) {
1798 			ena_log(pdev, ERR,
1799 			    "failed to bind interrupt handler for irq %ju to cpu %d: %d\n",
1800 			    rman_get_start(irq->res), irq->cpu, rc);
1801 			goto err;
1802 		}
1803 
1804 		ena_log(pdev, INFO, "queue %d - cpu %d\n",
1805 		    i - ENA_IO_IRQ_FIRST_IDX, irq->cpu);
1806 #endif
1807 	}
1808 
1809 	return (rc);
1810 
1811 err:
1812 
1813 	for (; i >= ENA_IO_IRQ_FIRST_IDX; i--) {
1814 		irq = &adapter->irq_tbl[i];
1815 		rcc = 0;
1816 
1817 		/* Once we entered err: section and irq->requested is true we
1818 		   free both intr and resources */
1819 		if (irq->requested)
1820 			rcc = bus_teardown_intr(adapter->pdev, irq->res,
1821 			    irq->cookie);
1822 		if (unlikely(rcc != 0))
1823 			ena_log(pdev, ERR,
1824 			    "could not release irq: %d, error: %d\n",
1825 			    irq->vector, rcc);
1826 
1827 		/* If we entered err: section without irq->requested set we know
1828 		   it was bus_alloc_resource_any() that needs cleanup, provided
1829 		   res is not NULL. In case res is NULL no work in needed in
1830 		   this iteration */
1831 		rcc = 0;
1832 		if (irq->res != NULL) {
1833 			rcc = bus_release_resource(adapter->pdev, SYS_RES_IRQ,
1834 			    irq->vector, irq->res);
1835 		}
1836 		if (unlikely(rcc != 0))
1837 			ena_log(pdev, ERR,
1838 			    "dev has no parent while releasing res for irq: %d\n",
1839 			    irq->vector);
1840 		irq->requested = false;
1841 		irq->res = NULL;
1842 	}
1843 
1844 	return (rc);
1845 }
1846 
1847 static void
1848 ena_free_mgmnt_irq(struct ena_adapter *adapter)
1849 {
1850 	device_t pdev = adapter->pdev;
1851 	struct ena_irq *irq;
1852 	int rc;
1853 
1854 	irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX];
1855 	if (irq->requested) {
1856 		ena_log(pdev, DBG, "tear down irq: %d\n", irq->vector);
1857 		rc = bus_teardown_intr(adapter->pdev, irq->res, irq->cookie);
1858 		if (unlikely(rc != 0))
1859 			ena_log(pdev, ERR, "failed to tear down irq: %d\n",
1860 			    irq->vector);
1861 		irq->requested = 0;
1862 	}
1863 
1864 	if (irq->res != NULL) {
1865 		ena_log(pdev, DBG, "release resource irq: %d\n", irq->vector);
1866 		rc = bus_release_resource(adapter->pdev, SYS_RES_IRQ,
1867 		    irq->vector, irq->res);
1868 		irq->res = NULL;
1869 		if (unlikely(rc != 0))
1870 			ena_log(pdev, ERR,
1871 			    "dev has no parent while releasing res for irq: %d\n",
1872 			    irq->vector);
1873 	}
1874 }
1875 
1876 static void
1877 ena_free_io_irq(struct ena_adapter *adapter)
1878 {
1879 	device_t pdev = adapter->pdev;
1880 	struct ena_irq *irq;
1881 	int rc;
1882 
1883 	for (int i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++) {
1884 		irq = &adapter->irq_tbl[i];
1885 		if (irq->requested) {
1886 			ena_log(pdev, DBG, "tear down irq: %d\n", irq->vector);
1887 			rc = bus_teardown_intr(adapter->pdev, irq->res,
1888 			    irq->cookie);
1889 			if (unlikely(rc != 0)) {
1890 				ena_log(pdev, ERR,
1891 				    "failed to tear down irq: %d\n",
1892 				    irq->vector);
1893 			}
1894 			irq->requested = 0;
1895 		}
1896 
1897 		if (irq->res != NULL) {
1898 			ena_log(pdev, DBG, "release resource irq: %d\n",
1899 			    irq->vector);
1900 			rc = bus_release_resource(adapter->pdev, SYS_RES_IRQ,
1901 			    irq->vector, irq->res);
1902 			irq->res = NULL;
1903 			if (unlikely(rc != 0)) {
1904 				ena_log(pdev, ERR,
1905 				    "dev has no parent while releasing res for irq: %d\n",
1906 				    irq->vector);
1907 			}
1908 		}
1909 	}
1910 }
1911 
1912 static void
1913 ena_free_irqs(struct ena_adapter *adapter)
1914 {
1915 	ena_free_io_irq(adapter);
1916 	ena_free_mgmnt_irq(adapter);
1917 	ena_disable_msix(adapter);
1918 }
1919 
1920 static void
1921 ena_disable_msix(struct ena_adapter *adapter)
1922 {
1923 	if (ENA_FLAG_ISSET(ENA_FLAG_MSIX_ENABLED, adapter)) {
1924 		ENA_FLAG_CLEAR_ATOMIC(ENA_FLAG_MSIX_ENABLED, adapter);
1925 		pci_release_msi(adapter->pdev);
1926 	}
1927 
1928 	adapter->msix_vecs = 0;
1929 	free(adapter->msix_entries, M_DEVBUF);
1930 	adapter->msix_entries = NULL;
1931 }
1932 
1933 static void
1934 ena_unmask_all_io_irqs(struct ena_adapter *adapter)
1935 {
1936 	struct ena_com_io_cq *io_cq;
1937 	struct ena_eth_io_intr_reg intr_reg;
1938 	struct ena_ring *tx_ring;
1939 	uint16_t ena_qid;
1940 	int i;
1941 
1942 	/* Unmask interrupts for all queues */
1943 	for (i = 0; i < adapter->num_io_queues; i++) {
1944 		ena_qid = ENA_IO_TXQ_IDX(i);
1945 		io_cq = &adapter->ena_dev->io_cq_queues[ena_qid];
1946 		ena_com_update_intr_reg(&intr_reg, 0, 0, true);
1947 		tx_ring = &adapter->tx_ring[i];
1948 		counter_u64_add(tx_ring->tx_stats.unmask_interrupt_num, 1);
1949 		ena_com_unmask_intr(io_cq, &intr_reg);
1950 	}
1951 }
1952 
1953 static int
1954 ena_up_complete(struct ena_adapter *adapter)
1955 {
1956 	int rc;
1957 
1958 	if (likely(ENA_FLAG_ISSET(ENA_FLAG_RSS_ACTIVE, adapter))) {
1959 		rc = ena_rss_configure(adapter);
1960 		if (rc != 0) {
1961 			ena_log(adapter->pdev, ERR,
1962 			    "Failed to configure RSS\n");
1963 			return (rc);
1964 		}
1965 	}
1966 
1967 	rc = ena_change_mtu(adapter->ifp, if_getmtu(adapter->ifp));
1968 	if (unlikely(rc != 0))
1969 		return (rc);
1970 
1971 	ena_refill_all_rx_bufs(adapter);
1972 	ena_reset_counters((counter_u64_t *)&adapter->hw_stats,
1973 	    sizeof(adapter->hw_stats));
1974 
1975 	return (0);
1976 }
1977 
1978 static void
1979 set_io_rings_size(struct ena_adapter *adapter, int new_tx_size, int new_rx_size)
1980 {
1981 	int i;
1982 
1983 	for (i = 0; i < adapter->num_io_queues; i++) {
1984 		adapter->tx_ring[i].ring_size = new_tx_size;
1985 		adapter->rx_ring[i].ring_size = new_rx_size;
1986 	}
1987 }
1988 
1989 static int
1990 create_queues_with_size_backoff(struct ena_adapter *adapter)
1991 {
1992 	device_t pdev = adapter->pdev;
1993 	int rc;
1994 	uint32_t cur_rx_ring_size, cur_tx_ring_size;
1995 	uint32_t new_rx_ring_size, new_tx_ring_size;
1996 
1997 	/*
1998 	 * Current queue sizes might be set to smaller than the requested
1999 	 * ones due to past queue allocation failures.
2000 	 */
2001 	set_io_rings_size(adapter, adapter->requested_tx_ring_size,
2002 	    adapter->requested_rx_ring_size);
2003 
2004 	while (1) {
2005 		/* Allocate transmit descriptors */
2006 		rc = ena_setup_all_tx_resources(adapter);
2007 		if (unlikely(rc != 0)) {
2008 			ena_log(pdev, ERR, "err_setup_tx\n");
2009 			goto err_setup_tx;
2010 		}
2011 
2012 		/* Allocate receive descriptors */
2013 		rc = ena_setup_all_rx_resources(adapter);
2014 		if (unlikely(rc != 0)) {
2015 			ena_log(pdev, ERR, "err_setup_rx\n");
2016 			goto err_setup_rx;
2017 		}
2018 
2019 		/* Create IO queues for Rx & Tx */
2020 		rc = ena_create_io_queues(adapter);
2021 		if (unlikely(rc != 0)) {
2022 			ena_log(pdev, ERR, "create IO queues failed\n");
2023 			goto err_io_que;
2024 		}
2025 
2026 		return (0);
2027 
2028 err_io_que:
2029 		ena_free_all_rx_resources(adapter);
2030 err_setup_rx:
2031 		ena_free_all_tx_resources(adapter);
2032 err_setup_tx:
2033 		/*
2034 		 * Lower the ring size if ENOMEM. Otherwise, return the
2035 		 * error straightaway.
2036 		 */
2037 		if (unlikely(rc != ENOMEM)) {
2038 			ena_log(pdev, ERR,
2039 			    "Queue creation failed with error code: %d\n", rc);
2040 			return (rc);
2041 		}
2042 
2043 		cur_tx_ring_size = adapter->tx_ring[0].ring_size;
2044 		cur_rx_ring_size = adapter->rx_ring[0].ring_size;
2045 
2046 		ena_log(pdev, ERR,
2047 		    "Not enough memory to create queues with sizes TX=%d, RX=%d\n",
2048 		    cur_tx_ring_size, cur_rx_ring_size);
2049 
2050 		new_tx_ring_size = cur_tx_ring_size;
2051 		new_rx_ring_size = cur_rx_ring_size;
2052 
2053 		/*
2054 		 * Decrease the size of a larger queue, or decrease both if they
2055 		 * are the same size.
2056 		 */
2057 		if (cur_rx_ring_size <= cur_tx_ring_size)
2058 			new_tx_ring_size = cur_tx_ring_size / 2;
2059 		if (cur_rx_ring_size >= cur_tx_ring_size)
2060 			new_rx_ring_size = cur_rx_ring_size / 2;
2061 
2062 		if (new_tx_ring_size < ENA_MIN_RING_SIZE ||
2063 		    new_rx_ring_size < ENA_MIN_RING_SIZE) {
2064 			ena_log(pdev, ERR,
2065 			    "Queue creation failed with the smallest possible queue size"
2066 			    "of %d for both queues. Not retrying with smaller queues\n",
2067 			    ENA_MIN_RING_SIZE);
2068 			return (rc);
2069 		}
2070 
2071 		ena_log(pdev, INFO,
2072 		    "Retrying queue creation with sizes TX=%d, RX=%d\n",
2073 		    new_tx_ring_size, new_rx_ring_size);
2074 
2075 		set_io_rings_size(adapter, new_tx_ring_size, new_rx_ring_size);
2076 	}
2077 }
2078 
2079 int
2080 ena_up(struct ena_adapter *adapter)
2081 {
2082 	int rc = 0;
2083 
2084 	ENA_LOCK_ASSERT();
2085 
2086 	if (unlikely(device_is_attached(adapter->pdev) == 0)) {
2087 		ena_log(adapter->pdev, ERR, "device is not attached!\n");
2088 		return (ENXIO);
2089 	}
2090 
2091 	if (ENA_FLAG_ISSET(ENA_FLAG_DEV_UP, adapter))
2092 		return (0);
2093 
2094 	ena_log(adapter->pdev, INFO, "device is going UP\n");
2095 
2096 	/* setup interrupts for IO queues */
2097 	rc = ena_setup_io_intr(adapter);
2098 	if (unlikely(rc != 0)) {
2099 		ena_log(adapter->pdev, ERR, "error setting up IO interrupt\n");
2100 		goto error;
2101 	}
2102 	rc = ena_request_io_irq(adapter);
2103 	if (unlikely(rc != 0)) {
2104 		ena_log(adapter->pdev, ERR, "err_req_irq\n");
2105 		goto error;
2106 	}
2107 
2108 	ena_log(adapter->pdev, INFO,
2109 	    "Creating %u IO queues. Rx queue size: %d, Tx queue size: %d, LLQ is %s\n",
2110 	    adapter->num_io_queues,
2111 	    adapter->requested_rx_ring_size,
2112 	    adapter->requested_tx_ring_size,
2113 	    (adapter->ena_dev->tx_mem_queue_type ==
2114 		ENA_ADMIN_PLACEMENT_POLICY_DEV) ? "ENABLED" : "DISABLED");
2115 
2116 	rc = create_queues_with_size_backoff(adapter);
2117 	if (unlikely(rc != 0)) {
2118 		ena_log(adapter->pdev, ERR,
2119 		    "error creating queues with size backoff\n");
2120 		goto err_create_queues_with_backoff;
2121 	}
2122 
2123 	if (ENA_FLAG_ISSET(ENA_FLAG_LINK_UP, adapter))
2124 		if_link_state_change(adapter->ifp, LINK_STATE_UP);
2125 
2126 	rc = ena_up_complete(adapter);
2127 	if (unlikely(rc != 0))
2128 		goto err_up_complete;
2129 
2130 	counter_u64_add(adapter->dev_stats.interface_up, 1);
2131 
2132 	ena_update_hwassist(adapter);
2133 
2134 	if_setdrvflagbits(adapter->ifp, IFF_DRV_RUNNING, IFF_DRV_OACTIVE);
2135 
2136 	ENA_FLAG_SET_ATOMIC(ENA_FLAG_DEV_UP, adapter);
2137 
2138 	ena_unmask_all_io_irqs(adapter);
2139 
2140 	return (0);
2141 
2142 err_up_complete:
2143 	ena_destroy_all_io_queues(adapter);
2144 	ena_free_all_rx_resources(adapter);
2145 	ena_free_all_tx_resources(adapter);
2146 err_create_queues_with_backoff:
2147 	ena_free_io_irq(adapter);
2148 error:
2149 	return (rc);
2150 }
2151 
2152 static uint64_t
2153 ena_get_counter(if_t ifp, ift_counter cnt)
2154 {
2155 	struct ena_adapter *adapter;
2156 	struct ena_hw_stats *stats;
2157 
2158 	adapter = if_getsoftc(ifp);
2159 	stats = &adapter->hw_stats;
2160 
2161 	switch (cnt) {
2162 	case IFCOUNTER_IPACKETS:
2163 		return (counter_u64_fetch(stats->rx_packets));
2164 	case IFCOUNTER_OPACKETS:
2165 		return (counter_u64_fetch(stats->tx_packets));
2166 	case IFCOUNTER_IBYTES:
2167 		return (counter_u64_fetch(stats->rx_bytes));
2168 	case IFCOUNTER_OBYTES:
2169 		return (counter_u64_fetch(stats->tx_bytes));
2170 	case IFCOUNTER_IQDROPS:
2171 		return (counter_u64_fetch(stats->rx_drops));
2172 	case IFCOUNTER_OQDROPS:
2173 		return (counter_u64_fetch(stats->tx_drops));
2174 	default:
2175 		return (if_get_counter_default(ifp, cnt));
2176 	}
2177 }
2178 
2179 static int
2180 ena_media_change(if_t ifp)
2181 {
2182 	/* Media Change is not supported by firmware */
2183 	return (0);
2184 }
2185 
2186 static void
2187 ena_media_status(if_t ifp, struct ifmediareq *ifmr)
2188 {
2189 	struct ena_adapter *adapter = if_getsoftc(ifp);
2190 	ena_log(adapter->pdev, DBG, "Media status update\n");
2191 
2192 	ENA_LOCK_LOCK();
2193 
2194 	ifmr->ifm_status = IFM_AVALID;
2195 	ifmr->ifm_active = IFM_ETHER;
2196 
2197 	if (!ENA_FLAG_ISSET(ENA_FLAG_LINK_UP, adapter)) {
2198 		ENA_LOCK_UNLOCK();
2199 		ena_log(adapter->pdev, INFO, "Link is down\n");
2200 		return;
2201 	}
2202 
2203 	ifmr->ifm_status |= IFM_ACTIVE;
2204 	ifmr->ifm_active |= IFM_UNKNOWN | IFM_FDX;
2205 
2206 	ENA_LOCK_UNLOCK();
2207 }
2208 
2209 static void
2210 ena_init(void *arg)
2211 {
2212 	struct ena_adapter *adapter = (struct ena_adapter *)arg;
2213 
2214 	if (!ENA_FLAG_ISSET(ENA_FLAG_DEV_UP, adapter)) {
2215 		ENA_LOCK_LOCK();
2216 		ena_up(adapter);
2217 		ENA_LOCK_UNLOCK();
2218 	}
2219 }
2220 
2221 static int
2222 ena_ioctl(if_t ifp, u_long command, caddr_t data)
2223 {
2224 	struct ena_adapter *adapter;
2225 	struct ifreq *ifr;
2226 	int rc;
2227 
2228 	adapter = if_getsoftc(ifp);
2229 	ifr = (struct ifreq *)data;
2230 
2231 	/*
2232 	 * Acquiring lock to prevent from running up and down routines parallel.
2233 	 */
2234 	rc = 0;
2235 	switch (command) {
2236 	case SIOCSIFMTU:
2237 		if (if_getmtu(ifp) == ifr->ifr_mtu)
2238 			break;
2239 		ENA_LOCK_LOCK();
2240 		ena_down(adapter);
2241 
2242 		ena_change_mtu(ifp, ifr->ifr_mtu);
2243 
2244 		rc = ena_up(adapter);
2245 		ENA_LOCK_UNLOCK();
2246 		break;
2247 
2248 	case SIOCSIFFLAGS:
2249 		if ((if_getflags(ifp) & IFF_UP) != 0) {
2250 			if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) != 0) {
2251 				if ((if_getflags(ifp) & (IFF_PROMISC |
2252 				    IFF_ALLMULTI)) != 0) {
2253 					ena_log(adapter->pdev, INFO,
2254 					    "ioctl promisc/allmulti\n");
2255 				}
2256 			} else {
2257 				ENA_LOCK_LOCK();
2258 				rc = ena_up(adapter);
2259 				ENA_LOCK_UNLOCK();
2260 			}
2261 		} else {
2262 			if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) != 0) {
2263 				ENA_LOCK_LOCK();
2264 				ena_down(adapter);
2265 				ENA_LOCK_UNLOCK();
2266 			}
2267 		}
2268 		break;
2269 
2270 	case SIOCADDMULTI:
2271 	case SIOCDELMULTI:
2272 		break;
2273 
2274 	case SIOCSIFMEDIA:
2275 	case SIOCGIFMEDIA:
2276 		rc = ifmedia_ioctl(ifp, ifr, &adapter->media, command);
2277 		break;
2278 
2279 	case SIOCSIFCAP:
2280 		{
2281 			int reinit = 0;
2282 
2283 			if (ifr->ifr_reqcap != if_getcapenable(ifp)) {
2284 				if_setcapenable(ifp, ifr->ifr_reqcap);
2285 				reinit = 1;
2286 			}
2287 
2288 			if ((reinit != 0) &&
2289 			    ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) != 0)) {
2290 				ENA_LOCK_LOCK();
2291 				ena_down(adapter);
2292 				rc = ena_up(adapter);
2293 				ENA_LOCK_UNLOCK();
2294 			}
2295 		}
2296 
2297 		break;
2298 	default:
2299 		rc = ether_ioctl(ifp, command, data);
2300 		break;
2301 	}
2302 
2303 	return (rc);
2304 }
2305 
2306 static int
2307 ena_get_dev_offloads(struct ena_com_dev_get_features_ctx *feat)
2308 {
2309 	int caps = 0;
2310 
2311 	if ((feat->offload.tx &
2312 	    (ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_FULL_MASK |
2313 	    ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK |
2314 	    ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L3_CSUM_IPV4_MASK)) != 0)
2315 		caps |= IFCAP_TXCSUM;
2316 
2317 	if ((feat->offload.tx &
2318 	    (ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_FULL_MASK |
2319 	    ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_MASK)) != 0)
2320 		caps |= IFCAP_TXCSUM_IPV6;
2321 
2322 	if ((feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_MASK) != 0)
2323 		caps |= IFCAP_TSO4;
2324 
2325 	if ((feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_MASK) != 0)
2326 		caps |= IFCAP_TSO6;
2327 
2328 	if ((feat->offload.rx_supported &
2329 	    (ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_MASK |
2330 	    ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L3_CSUM_IPV4_MASK)) != 0)
2331 		caps |= IFCAP_RXCSUM;
2332 
2333 	if ((feat->offload.rx_supported &
2334 	    ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_MASK) != 0)
2335 		caps |= IFCAP_RXCSUM_IPV6;
2336 
2337 	caps |= IFCAP_LRO | IFCAP_JUMBO_MTU;
2338 
2339 	return (caps);
2340 }
2341 
2342 static void
2343 ena_update_host_info(struct ena_admin_host_info *host_info, if_t ifp)
2344 {
2345 	host_info->supported_network_features[0] = (uint32_t)if_getcapabilities(ifp);
2346 }
2347 
2348 static void
2349 ena_update_hwassist(struct ena_adapter *adapter)
2350 {
2351 	if_t ifp = adapter->ifp;
2352 	uint32_t feat = adapter->tx_offload_cap;
2353 	int cap = if_getcapenable(ifp);
2354 	int flags = 0;
2355 
2356 	if_clearhwassist(ifp);
2357 
2358 	if ((cap & IFCAP_TXCSUM) != 0) {
2359 		if ((feat &
2360 		    ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L3_CSUM_IPV4_MASK) != 0)
2361 			flags |= CSUM_IP;
2362 		if ((feat &
2363 		    (ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_FULL_MASK |
2364 		    ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK)) != 0)
2365 			flags |= CSUM_IP_UDP | CSUM_IP_TCP;
2366 	}
2367 
2368 	if ((cap & IFCAP_TXCSUM_IPV6) != 0)
2369 		flags |= CSUM_IP6_UDP | CSUM_IP6_TCP;
2370 
2371 	if ((cap & IFCAP_TSO4) != 0)
2372 		flags |= CSUM_IP_TSO;
2373 
2374 	if ((cap & IFCAP_TSO6) != 0)
2375 		flags |= CSUM_IP6_TSO;
2376 
2377 	if_sethwassistbits(ifp, flags, 0);
2378 }
2379 
2380 static int
2381 ena_setup_ifnet(device_t pdev, struct ena_adapter *adapter,
2382     struct ena_com_dev_get_features_ctx *feat)
2383 {
2384 	if_t ifp;
2385 	int caps = 0;
2386 
2387 	ifp = adapter->ifp = if_gethandle(IFT_ETHER);
2388 	if (unlikely(ifp == NULL)) {
2389 		ena_log(pdev, ERR, "can not allocate ifnet structure\n");
2390 		return (ENXIO);
2391 	}
2392 	if_initname(ifp, device_get_name(pdev), device_get_unit(pdev));
2393 	if_setdev(ifp, pdev);
2394 	if_setsoftc(ifp, adapter);
2395 
2396 	if_setflags(ifp,
2397 	    IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST | IFF_KNOWSEPOCH);
2398 	if_setinitfn(ifp, ena_init);
2399 	if_settransmitfn(ifp, ena_mq_start);
2400 	if_setqflushfn(ifp, ena_qflush);
2401 	if_setioctlfn(ifp, ena_ioctl);
2402 	if_setgetcounterfn(ifp, ena_get_counter);
2403 
2404 	if_setsendqlen(ifp, adapter->requested_tx_ring_size);
2405 	if_setsendqready(ifp);
2406 	if_setmtu(ifp, ETHERMTU);
2407 	if_setbaudrate(ifp, 0);
2408 	/* Zeroize capabilities... */
2409 	if_setcapabilities(ifp, 0);
2410 	if_setcapenable(ifp, 0);
2411 	/* check hardware support */
2412 	caps = ena_get_dev_offloads(feat);
2413 	/* ... and set them */
2414 	if_setcapabilitiesbit(ifp, caps, 0);
2415 
2416 	/* TSO parameters */
2417 	if_sethwtsomax(ifp, ENA_TSO_MAXSIZE -
2418 	    (ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN));
2419 	if_sethwtsomaxsegcount(ifp, adapter->max_tx_sgl_size - 1);
2420 	if_sethwtsomaxsegsize(ifp, ENA_TSO_MAXSIZE);
2421 
2422 	if_setifheaderlen(ifp, sizeof(struct ether_vlan_header));
2423 	if_setcapenable(ifp, if_getcapabilities(ifp));
2424 
2425 	/*
2426 	 * Specify the media types supported by this adapter and register
2427 	 * callbacks to update media and link information
2428 	 */
2429 	ifmedia_init(&adapter->media, IFM_IMASK, ena_media_change,
2430 	    ena_media_status);
2431 	ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL);
2432 	ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO);
2433 
2434 	ether_ifattach(ifp, adapter->mac_addr);
2435 
2436 	return (0);
2437 }
2438 
2439 void
2440 ena_down(struct ena_adapter *adapter)
2441 {
2442 	int rc;
2443 
2444 	ENA_LOCK_ASSERT();
2445 
2446 	if (!ENA_FLAG_ISSET(ENA_FLAG_DEV_UP, adapter))
2447 		return;
2448 
2449 	ena_log(adapter->pdev, INFO, "device is going DOWN\n");
2450 
2451 	ENA_FLAG_CLEAR_ATOMIC(ENA_FLAG_DEV_UP, adapter);
2452 	if_setdrvflagbits(adapter->ifp, IFF_DRV_OACTIVE, IFF_DRV_RUNNING);
2453 
2454 	ena_free_io_irq(adapter);
2455 
2456 	if (ENA_FLAG_ISSET(ENA_FLAG_TRIGGER_RESET, adapter)) {
2457 		rc = ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason);
2458 		if (unlikely(rc != 0))
2459 			ena_log(adapter->pdev, ERR, "Device reset failed\n");
2460 	}
2461 
2462 	ena_destroy_all_io_queues(adapter);
2463 
2464 	ena_free_all_tx_bufs(adapter);
2465 	ena_free_all_rx_bufs(adapter);
2466 	ena_free_all_tx_resources(adapter);
2467 	ena_free_all_rx_resources(adapter);
2468 
2469 	counter_u64_add(adapter->dev_stats.interface_down, 1);
2470 }
2471 
2472 static uint32_t
2473 ena_calc_max_io_queue_num(device_t pdev, struct ena_com_dev *ena_dev,
2474     struct ena_com_dev_get_features_ctx *get_feat_ctx)
2475 {
2476 	uint32_t io_tx_sq_num, io_tx_cq_num, io_rx_num, max_num_io_queues;
2477 
2478 	/* Regular queues capabilities */
2479 	if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) {
2480 		struct ena_admin_queue_ext_feature_fields *max_queue_ext =
2481 		    &get_feat_ctx->max_queue_ext.max_queue_ext;
2482 		io_rx_num = min_t(int, max_queue_ext->max_rx_sq_num,
2483 		    max_queue_ext->max_rx_cq_num);
2484 
2485 		io_tx_sq_num = max_queue_ext->max_tx_sq_num;
2486 		io_tx_cq_num = max_queue_ext->max_tx_cq_num;
2487 	} else {
2488 		struct ena_admin_queue_feature_desc *max_queues =
2489 		    &get_feat_ctx->max_queues;
2490 		io_tx_sq_num = max_queues->max_sq_num;
2491 		io_tx_cq_num = max_queues->max_cq_num;
2492 		io_rx_num = min_t(int, io_tx_sq_num, io_tx_cq_num);
2493 	}
2494 
2495 	/* In case of LLQ use the llq fields for the tx SQ/CQ */
2496 	if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
2497 		io_tx_sq_num = get_feat_ctx->llq.max_llq_num;
2498 
2499 	max_num_io_queues = min_t(uint32_t, mp_ncpus, ENA_MAX_NUM_IO_QUEUES);
2500 	max_num_io_queues = min_t(uint32_t, max_num_io_queues, io_rx_num);
2501 	max_num_io_queues = min_t(uint32_t, max_num_io_queues, io_tx_sq_num);
2502 	max_num_io_queues = min_t(uint32_t, max_num_io_queues, io_tx_cq_num);
2503 	/* 1 IRQ for mgmnt and 1 IRQ for each TX/RX pair */
2504 	max_num_io_queues = min_t(uint32_t, max_num_io_queues,
2505 	    pci_msix_count(pdev) - 1);
2506 #ifdef RSS
2507 	max_num_io_queues = min_t(uint32_t, max_num_io_queues,
2508 	    rss_getnumbuckets());
2509 #endif
2510 
2511 	return (max_num_io_queues);
2512 }
2513 
2514 static int
2515 ena_enable_wc(device_t pdev, struct resource *res)
2516 {
2517 #if defined(__i386) || defined(__amd64) || defined(__aarch64__)
2518 	vm_offset_t va;
2519 	vm_size_t len;
2520 	int rc;
2521 
2522 	va = (vm_offset_t)rman_get_virtual(res);
2523 	len = rman_get_size(res);
2524 	/* Enable write combining */
2525 	rc = pmap_change_attr(va, len, VM_MEMATTR_WRITE_COMBINING);
2526 	if (unlikely(rc != 0)) {
2527 		ena_log(pdev, ERR, "pmap_change_attr failed, %d\n", rc);
2528 		return (rc);
2529 	}
2530 
2531 	return (0);
2532 #endif
2533 	return (EOPNOTSUPP);
2534 }
2535 
2536 static int
2537 ena_set_queues_placement_policy(device_t pdev, struct ena_com_dev *ena_dev,
2538     struct ena_admin_feature_llq_desc *llq,
2539     struct ena_llq_configurations *llq_default_configurations)
2540 {
2541 	int rc;
2542 	uint32_t llq_feature_mask;
2543 
2544 	llq_feature_mask = 1 << ENA_ADMIN_LLQ;
2545 	if (!(ena_dev->supported_features & llq_feature_mask)) {
2546 		ena_log(pdev, WARN,
2547 		    "LLQ is not supported. Fallback to host mode policy.\n");
2548 		ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
2549 		return (0);
2550 	}
2551 
2552 	if (ena_dev->mem_bar == NULL) {
2553 		ena_log(pdev, WARN,
2554 		    "LLQ is advertised as supported but device doesn't expose mem bar.\n");
2555 		ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
2556 		return (0);
2557 	}
2558 
2559 	rc = ena_com_config_dev_mode(ena_dev, llq, llq_default_configurations);
2560 	if (unlikely(rc != 0)) {
2561 		ena_log(pdev, WARN,
2562 		    "Failed to configure the device mode. "
2563 		    "Fallback to host mode policy.\n");
2564 		ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
2565 	}
2566 
2567 	return (0);
2568 }
2569 
2570 static int
2571 ena_map_llq_mem_bar(device_t pdev, struct ena_com_dev *ena_dev)
2572 {
2573 	struct ena_adapter *adapter = device_get_softc(pdev);
2574 	int rc, rid;
2575 
2576 	/* Try to allocate resources for LLQ bar */
2577 	rid = PCIR_BAR(ENA_MEM_BAR);
2578 	adapter->memory = bus_alloc_resource_any(pdev, SYS_RES_MEMORY, &rid,
2579 	    RF_ACTIVE);
2580 	if (unlikely(adapter->memory == NULL)) {
2581 		ena_log(pdev, WARN,
2582 		    "Unable to allocate LLQ bar resource. LLQ mode won't be used.\n");
2583 		return (0);
2584 	}
2585 
2586 	/* Enable write combining for better LLQ performance */
2587 	rc = ena_enable_wc(adapter->pdev, adapter->memory);
2588 	if (unlikely(rc != 0)) {
2589 		ena_log(pdev, ERR, "failed to enable write combining.\n");
2590 		return (rc);
2591 	}
2592 
2593 	/*
2594 	 * Save virtual address of the device's memory region
2595 	 * for the ena_com layer.
2596 	 */
2597 	ena_dev->mem_bar = rman_get_virtual(adapter->memory);
2598 
2599 	return (0);
2600 }
2601 
2602 static inline void
2603 set_default_llq_configurations(struct ena_llq_configurations *llq_config,
2604     struct ena_admin_feature_llq_desc *llq)
2605 {
2606 	llq_config->llq_header_location = ENA_ADMIN_INLINE_HEADER;
2607 	llq_config->llq_stride_ctrl = ENA_ADMIN_MULTIPLE_DESCS_PER_ENTRY;
2608 	llq_config->llq_num_decs_before_header =
2609 	    ENA_ADMIN_LLQ_NUM_DESCS_BEFORE_HEADER_2;
2610 	if ((llq->entry_size_ctrl_supported & ENA_ADMIN_LIST_ENTRY_SIZE_256B) !=
2611 	    0 && ena_force_large_llq_header) {
2612 		llq_config->llq_ring_entry_size =
2613 		    ENA_ADMIN_LIST_ENTRY_SIZE_256B;
2614 		llq_config->llq_ring_entry_size_value = 256;
2615 	} else {
2616 		llq_config->llq_ring_entry_size =
2617 		    ENA_ADMIN_LIST_ENTRY_SIZE_128B;
2618 		llq_config->llq_ring_entry_size_value = 128;
2619 	}
2620 }
2621 
2622 static int
2623 ena_calc_io_queue_size(struct ena_calc_queue_size_ctx *ctx)
2624 {
2625 	struct ena_admin_feature_llq_desc *llq = &ctx->get_feat_ctx->llq;
2626 	struct ena_com_dev *ena_dev = ctx->ena_dev;
2627 	uint32_t tx_queue_size = ENA_DEFAULT_RING_SIZE;
2628 	uint32_t rx_queue_size = ENA_DEFAULT_RING_SIZE;
2629 	uint32_t max_tx_queue_size;
2630 	uint32_t max_rx_queue_size;
2631 
2632 	if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) {
2633 		struct ena_admin_queue_ext_feature_fields *max_queue_ext =
2634 		    &ctx->get_feat_ctx->max_queue_ext.max_queue_ext;
2635 		max_rx_queue_size = min_t(uint32_t,
2636 		    max_queue_ext->max_rx_cq_depth,
2637 		    max_queue_ext->max_rx_sq_depth);
2638 		max_tx_queue_size = max_queue_ext->max_tx_cq_depth;
2639 
2640 		if (ena_dev->tx_mem_queue_type ==
2641 		    ENA_ADMIN_PLACEMENT_POLICY_DEV)
2642 			max_tx_queue_size = min_t(uint32_t, max_tx_queue_size,
2643 			    llq->max_llq_depth);
2644 		else
2645 			max_tx_queue_size = min_t(uint32_t, max_tx_queue_size,
2646 			    max_queue_ext->max_tx_sq_depth);
2647 
2648 		ctx->max_tx_sgl_size = min_t(uint16_t, ENA_PKT_MAX_BUFS,
2649 		    max_queue_ext->max_per_packet_tx_descs);
2650 		ctx->max_rx_sgl_size = min_t(uint16_t, ENA_PKT_MAX_BUFS,
2651 		    max_queue_ext->max_per_packet_rx_descs);
2652 	} else {
2653 		struct ena_admin_queue_feature_desc *max_queues =
2654 		    &ctx->get_feat_ctx->max_queues;
2655 		max_rx_queue_size = min_t(uint32_t, max_queues->max_cq_depth,
2656 		    max_queues->max_sq_depth);
2657 		max_tx_queue_size = max_queues->max_cq_depth;
2658 
2659 		if (ena_dev->tx_mem_queue_type ==
2660 		    ENA_ADMIN_PLACEMENT_POLICY_DEV)
2661 			max_tx_queue_size = min_t(uint32_t, max_tx_queue_size,
2662 			    llq->max_llq_depth);
2663 		else
2664 			max_tx_queue_size = min_t(uint32_t, max_tx_queue_size,
2665 			    max_queues->max_sq_depth);
2666 
2667 		ctx->max_tx_sgl_size = min_t(uint16_t, ENA_PKT_MAX_BUFS,
2668 		    max_queues->max_packet_tx_descs);
2669 		ctx->max_rx_sgl_size = min_t(uint16_t, ENA_PKT_MAX_BUFS,
2670 		    max_queues->max_packet_rx_descs);
2671 	}
2672 
2673 	/* round down to the nearest power of 2 */
2674 	max_tx_queue_size = 1 << (flsl(max_tx_queue_size) - 1);
2675 	max_rx_queue_size = 1 << (flsl(max_rx_queue_size) - 1);
2676 
2677 	/*
2678 	 * When forcing large headers, we multiply the entry size by 2,
2679 	 * and therefore divide the queue size by 2, leaving the amount
2680 	 * of memory used by the queues unchanged.
2681 	 */
2682 	if (ena_force_large_llq_header) {
2683 		if ((llq->entry_size_ctrl_supported &
2684 		    ENA_ADMIN_LIST_ENTRY_SIZE_256B) != 0 &&
2685 		    ena_dev->tx_mem_queue_type ==
2686 		    ENA_ADMIN_PLACEMENT_POLICY_DEV) {
2687 			max_tx_queue_size /= 2;
2688 			ena_log(ctx->pdev, INFO,
2689 			    "Forcing large headers and decreasing maximum Tx queue size to %d\n",
2690 			    max_tx_queue_size);
2691 		} else {
2692 			ena_log(ctx->pdev, WARN,
2693 			    "Forcing large headers failed: LLQ is disabled or device does not support large headers\n");
2694 		}
2695 	}
2696 
2697 	tx_queue_size = clamp_val(tx_queue_size, ENA_MIN_RING_SIZE,
2698 	    max_tx_queue_size);
2699 	rx_queue_size = clamp_val(rx_queue_size, ENA_MIN_RING_SIZE,
2700 	    max_rx_queue_size);
2701 
2702 	tx_queue_size = 1 << (flsl(tx_queue_size) - 1);
2703 	rx_queue_size = 1 << (flsl(rx_queue_size) - 1);
2704 
2705 	ctx->max_tx_queue_size = max_tx_queue_size;
2706 	ctx->max_rx_queue_size = max_rx_queue_size;
2707 	ctx->tx_queue_size = tx_queue_size;
2708 	ctx->rx_queue_size = rx_queue_size;
2709 
2710 	return (0);
2711 }
2712 
2713 static void
2714 ena_config_host_info(struct ena_com_dev *ena_dev, device_t dev)
2715 {
2716 	struct ena_admin_host_info *host_info;
2717 	uintptr_t rid;
2718 	int rc;
2719 
2720 	/* Allocate only the host info */
2721 	rc = ena_com_allocate_host_info(ena_dev);
2722 	if (unlikely(rc != 0)) {
2723 		ena_log(dev, ERR, "Cannot allocate host info\n");
2724 		return;
2725 	}
2726 
2727 	host_info = ena_dev->host_attr.host_info;
2728 
2729 	if (pci_get_id(dev, PCI_ID_RID, &rid) == 0)
2730 		host_info->bdf = rid;
2731 	host_info->os_type = ENA_ADMIN_OS_FREEBSD;
2732 	host_info->kernel_ver = osreldate;
2733 
2734 	sprintf(host_info->kernel_ver_str, "%d", osreldate);
2735 	host_info->os_dist = 0;
2736 	strncpy(host_info->os_dist_str, osrelease,
2737 	    sizeof(host_info->os_dist_str) - 1);
2738 
2739 	host_info->driver_version = (ENA_DRV_MODULE_VER_MAJOR) |
2740 	    (ENA_DRV_MODULE_VER_MINOR << ENA_ADMIN_HOST_INFO_MINOR_SHIFT) |
2741 	    (ENA_DRV_MODULE_VER_SUBMINOR << ENA_ADMIN_HOST_INFO_SUB_MINOR_SHIFT);
2742 	host_info->num_cpus = mp_ncpus;
2743 	host_info->driver_supported_features =
2744 	    ENA_ADMIN_HOST_INFO_RX_OFFSET_MASK |
2745 	    ENA_ADMIN_HOST_INFO_RSS_CONFIGURABLE_FUNCTION_KEY_MASK;
2746 
2747 	rc = ena_com_set_host_attributes(ena_dev);
2748 	if (unlikely(rc != 0)) {
2749 		if (rc == EOPNOTSUPP)
2750 			ena_log(dev, WARN, "Cannot set host attributes\n");
2751 		else
2752 			ena_log(dev, ERR, "Cannot set host attributes\n");
2753 
2754 		goto err;
2755 	}
2756 
2757 	return;
2758 
2759 err:
2760 	ena_com_delete_host_info(ena_dev);
2761 }
2762 
2763 static int
2764 ena_device_init(struct ena_adapter *adapter, device_t pdev,
2765     struct ena_com_dev_get_features_ctx *get_feat_ctx, int *wd_active)
2766 {
2767 	struct ena_llq_configurations llq_config;
2768 	struct ena_com_dev *ena_dev = adapter->ena_dev;
2769 	bool readless_supported;
2770 	uint32_t aenq_groups;
2771 	int dma_width;
2772 	int rc;
2773 
2774 	rc = ena_com_mmio_reg_read_request_init(ena_dev);
2775 	if (unlikely(rc != 0)) {
2776 		ena_log(pdev, ERR, "failed to init mmio read less\n");
2777 		return (rc);
2778 	}
2779 
2780 	/*
2781 	 * The PCIe configuration space revision id indicate if mmio reg
2782 	 * read is disabled
2783 	 */
2784 	readless_supported = !(pci_get_revid(pdev) & ENA_MMIO_DISABLE_REG_READ);
2785 	ena_com_set_mmio_read_mode(ena_dev, readless_supported);
2786 
2787 	rc = ena_com_dev_reset(ena_dev, ENA_REGS_RESET_NORMAL);
2788 	if (unlikely(rc != 0)) {
2789 		ena_log(pdev, ERR, "Can not reset device\n");
2790 		goto err_mmio_read_less;
2791 	}
2792 
2793 	rc = ena_com_validate_version(ena_dev);
2794 	if (unlikely(rc != 0)) {
2795 		ena_log(pdev, ERR, "device version is too low\n");
2796 		goto err_mmio_read_less;
2797 	}
2798 
2799 	dma_width = ena_com_get_dma_width(ena_dev);
2800 	if (unlikely(dma_width < 0)) {
2801 		ena_log(pdev, ERR, "Invalid dma width value %d", dma_width);
2802 		rc = dma_width;
2803 		goto err_mmio_read_less;
2804 	}
2805 	adapter->dma_width = dma_width;
2806 
2807 	/* ENA admin level init */
2808 	rc = ena_com_admin_init(ena_dev, &aenq_handlers);
2809 	if (unlikely(rc != 0)) {
2810 		ena_log(pdev, ERR,
2811 		    "Can not initialize ena admin queue with device\n");
2812 		goto err_mmio_read_less;
2813 	}
2814 
2815 	/*
2816 	 * To enable the msix interrupts the driver needs to know the number
2817 	 * of queues. So the driver uses polling mode to retrieve this
2818 	 * information
2819 	 */
2820 	ena_com_set_admin_polling_mode(ena_dev, true);
2821 
2822 	ena_config_host_info(ena_dev, pdev);
2823 
2824 	/* Get Device Attributes */
2825 	rc = ena_com_get_dev_attr_feat(ena_dev, get_feat_ctx);
2826 	if (unlikely(rc != 0)) {
2827 		ena_log(pdev, ERR,
2828 		    "Cannot get attribute for ena device rc: %d\n", rc);
2829 		goto err_admin_init;
2830 	}
2831 
2832 	aenq_groups = BIT(ENA_ADMIN_LINK_CHANGE) |
2833 	    BIT(ENA_ADMIN_FATAL_ERROR) |
2834 	    BIT(ENA_ADMIN_WARNING) |
2835 	    BIT(ENA_ADMIN_NOTIFICATION) |
2836 	    BIT(ENA_ADMIN_KEEP_ALIVE);
2837 
2838 	aenq_groups &= get_feat_ctx->aenq.supported_groups;
2839 	rc = ena_com_set_aenq_config(ena_dev, aenq_groups);
2840 	if (unlikely(rc != 0)) {
2841 		ena_log(pdev, ERR, "Cannot configure aenq groups rc: %d\n", rc);
2842 		goto err_admin_init;
2843 	}
2844 
2845 	*wd_active = !!(aenq_groups & BIT(ENA_ADMIN_KEEP_ALIVE));
2846 
2847 	set_default_llq_configurations(&llq_config, &get_feat_ctx->llq);
2848 
2849 	rc = ena_set_queues_placement_policy(pdev, ena_dev, &get_feat_ctx->llq,
2850 	    &llq_config);
2851 	if (unlikely(rc != 0)) {
2852 		ena_log(pdev, ERR, "Failed to set placement policy\n");
2853 		goto err_admin_init;
2854 	}
2855 
2856 	return (0);
2857 
2858 err_admin_init:
2859 	ena_com_delete_host_info(ena_dev);
2860 	ena_com_admin_destroy(ena_dev);
2861 err_mmio_read_less:
2862 	ena_com_mmio_reg_read_request_destroy(ena_dev);
2863 
2864 	return (rc);
2865 }
2866 
2867 static int
2868 ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *adapter)
2869 {
2870 	struct ena_com_dev *ena_dev = adapter->ena_dev;
2871 	int rc;
2872 
2873 	rc = ena_enable_msix(adapter);
2874 	if (unlikely(rc != 0)) {
2875 		ena_log(adapter->pdev, ERR, "Error with MSI-X enablement\n");
2876 		return (rc);
2877 	}
2878 
2879 	ena_setup_mgmnt_intr(adapter);
2880 
2881 	rc = ena_request_mgmnt_irq(adapter);
2882 	if (unlikely(rc != 0)) {
2883 		ena_log(adapter->pdev, ERR, "Cannot setup mgmnt queue intr\n");
2884 		goto err_disable_msix;
2885 	}
2886 
2887 	ena_com_set_admin_polling_mode(ena_dev, false);
2888 
2889 	ena_com_admin_aenq_enable(ena_dev);
2890 
2891 	return (0);
2892 
2893 err_disable_msix:
2894 	ena_disable_msix(adapter);
2895 
2896 	return (rc);
2897 }
2898 
2899 /* Function called on ENA_ADMIN_KEEP_ALIVE event */
2900 static void
2901 ena_keep_alive_wd(void *adapter_data, struct ena_admin_aenq_entry *aenq_e)
2902 {
2903 	struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
2904 	struct ena_admin_aenq_keep_alive_desc *desc;
2905 	sbintime_t stime;
2906 	uint64_t rx_drops;
2907 	uint64_t tx_drops;
2908 
2909 	desc = (struct ena_admin_aenq_keep_alive_desc *)aenq_e;
2910 
2911 	rx_drops = ((uint64_t)desc->rx_drops_high << 32) | desc->rx_drops_low;
2912 	tx_drops = ((uint64_t)desc->tx_drops_high << 32) | desc->tx_drops_low;
2913 	counter_u64_zero(adapter->hw_stats.rx_drops);
2914 	counter_u64_add(adapter->hw_stats.rx_drops, rx_drops);
2915 	counter_u64_zero(adapter->hw_stats.tx_drops);
2916 	counter_u64_add(adapter->hw_stats.tx_drops, tx_drops);
2917 
2918 	stime = getsbinuptime();
2919 	atomic_store_rel_64(&adapter->keep_alive_timestamp, stime);
2920 }
2921 
2922 /* Check for keep alive expiration */
2923 static void
2924 check_for_missing_keep_alive(struct ena_adapter *adapter)
2925 {
2926 	sbintime_t timestamp, time;
2927 
2928 	if (adapter->wd_active == 0)
2929 		return;
2930 
2931 	if (adapter->keep_alive_timeout == ENA_HW_HINTS_NO_TIMEOUT)
2932 		return;
2933 
2934 	timestamp = atomic_load_acq_64(&adapter->keep_alive_timestamp);
2935 	time = getsbinuptime() - timestamp;
2936 	if (unlikely(time > adapter->keep_alive_timeout)) {
2937 		ena_log(adapter->pdev, ERR, "Keep alive watchdog timeout.\n");
2938 		counter_u64_add(adapter->dev_stats.wd_expired, 1);
2939 		ena_trigger_reset(adapter, ENA_REGS_RESET_KEEP_ALIVE_TO);
2940 	}
2941 }
2942 
2943 /* Check if admin queue is enabled */
2944 static void
2945 check_for_admin_com_state(struct ena_adapter *adapter)
2946 {
2947 	if (unlikely(ena_com_get_admin_running_state(adapter->ena_dev) == false)) {
2948 		ena_log(adapter->pdev, ERR,
2949 		    "ENA admin queue is not in running state!\n");
2950 		counter_u64_add(adapter->dev_stats.admin_q_pause, 1);
2951 		ena_trigger_reset(adapter, ENA_REGS_RESET_ADMIN_TO);
2952 	}
2953 }
2954 
2955 static int
2956 check_for_rx_interrupt_queue(struct ena_adapter *adapter,
2957     struct ena_ring *rx_ring)
2958 {
2959 	if (likely(atomic_load_8(&rx_ring->first_interrupt)))
2960 		return (0);
2961 
2962 	if (ena_com_cq_empty(rx_ring->ena_com_io_cq))
2963 		return (0);
2964 
2965 	rx_ring->no_interrupt_event_cnt++;
2966 
2967 	if (rx_ring->no_interrupt_event_cnt ==
2968 	    ENA_MAX_NO_INTERRUPT_ITERATIONS) {
2969 		ena_log(adapter->pdev, ERR,
2970 		    "Potential MSIX issue on Rx side Queue = %d. Reset the device\n",
2971 		    rx_ring->qid);
2972 		ena_trigger_reset(adapter, ENA_REGS_RESET_MISS_INTERRUPT);
2973 		return (EIO);
2974 	}
2975 
2976 	return (0);
2977 }
2978 
2979 static int
2980 check_missing_comp_in_tx_queue(struct ena_adapter *adapter,
2981     struct ena_ring *tx_ring)
2982 {
2983 	device_t pdev = adapter->pdev;
2984 	struct bintime curtime, time;
2985 	struct ena_tx_buffer *tx_buf;
2986 	int time_since_last_cleanup;
2987 	int missing_tx_comp_to;
2988 	sbintime_t time_offset;
2989 	uint32_t missed_tx = 0;
2990 	int i, rc = 0;
2991 
2992 	getbinuptime(&curtime);
2993 
2994 	for (i = 0; i < tx_ring->ring_size; i++) {
2995 		tx_buf = &tx_ring->tx_buffer_info[i];
2996 
2997 		if (bintime_isset(&tx_buf->timestamp) == 0)
2998 			continue;
2999 
3000 		time = curtime;
3001 		bintime_sub(&time, &tx_buf->timestamp);
3002 		time_offset = bttosbt(time);
3003 
3004 		if (unlikely(!atomic_load_8(&tx_ring->first_interrupt) &&
3005 		    time_offset > 2 * adapter->missing_tx_timeout)) {
3006 			/*
3007 			 * If after graceful period interrupt is still not
3008 			 * received, we schedule a reset.
3009 			 */
3010 			ena_log(pdev, ERR,
3011 			    "Potential MSIX issue on Tx side Queue = %d. "
3012 			    "Reset the device\n",
3013 			    tx_ring->qid);
3014 			ena_trigger_reset(adapter,
3015 			    ENA_REGS_RESET_MISS_INTERRUPT);
3016 			return (EIO);
3017 		}
3018 
3019 		/* Check again if packet is still waiting */
3020 		if (unlikely(time_offset > adapter->missing_tx_timeout)) {
3021 
3022 			if (tx_buf->print_once) {
3023 				time_since_last_cleanup = TICKS_2_USEC(ticks -
3024 				    tx_ring->tx_last_cleanup_ticks);
3025 				missing_tx_comp_to = sbttoms(
3026 				    adapter->missing_tx_timeout);
3027 				ena_log(pdev, WARN,
3028 				    "Found a Tx that wasn't completed on time, qid %d, index %d. "
3029 				    "%d usecs have passed since last cleanup. Missing Tx timeout value %d msecs.\n",
3030 				    tx_ring->qid, i, time_since_last_cleanup,
3031 				    missing_tx_comp_to);
3032 			}
3033 
3034 			tx_buf->print_once = false;
3035 			missed_tx++;
3036 		}
3037 	}
3038 
3039 	if (unlikely(missed_tx > adapter->missing_tx_threshold)) {
3040 		ena_log(pdev, ERR,
3041 		    "The number of lost tx completion is above the threshold "
3042 		    "(%d > %d). Reset the device\n",
3043 		    missed_tx, adapter->missing_tx_threshold);
3044 		ena_trigger_reset(adapter, ENA_REGS_RESET_MISS_TX_CMPL);
3045 		rc = EIO;
3046 	}
3047 
3048 	counter_u64_add(tx_ring->tx_stats.missing_tx_comp, missed_tx);
3049 
3050 	return (rc);
3051 }
3052 
3053 /*
3054  * Check for TX which were not completed on time.
3055  * Timeout is defined by "missing_tx_timeout".
3056  * Reset will be performed if number of incompleted
3057  * transactions exceeds "missing_tx_threshold".
3058  */
3059 static void
3060 check_for_missing_completions(struct ena_adapter *adapter)
3061 {
3062 	struct ena_ring *tx_ring;
3063 	struct ena_ring *rx_ring;
3064 	int i, budget, rc;
3065 
3066 	/* Make sure the driver doesn't turn the device in other process */
3067 	rmb();
3068 
3069 	if (!ENA_FLAG_ISSET(ENA_FLAG_DEV_UP, adapter))
3070 		return;
3071 
3072 	if (ENA_FLAG_ISSET(ENA_FLAG_TRIGGER_RESET, adapter))
3073 		return;
3074 
3075 	if (adapter->missing_tx_timeout == ENA_HW_HINTS_NO_TIMEOUT)
3076 		return;
3077 
3078 	budget = adapter->missing_tx_max_queues;
3079 
3080 	for (i = adapter->next_monitored_tx_qid; i < adapter->num_io_queues; i++) {
3081 		tx_ring = &adapter->tx_ring[i];
3082 		rx_ring = &adapter->rx_ring[i];
3083 
3084 		rc = check_missing_comp_in_tx_queue(adapter, tx_ring);
3085 		if (unlikely(rc != 0))
3086 			return;
3087 
3088 		rc = check_for_rx_interrupt_queue(adapter, rx_ring);
3089 		if (unlikely(rc != 0))
3090 			return;
3091 
3092 		budget--;
3093 		if (budget == 0) {
3094 			i++;
3095 			break;
3096 		}
3097 	}
3098 
3099 	adapter->next_monitored_tx_qid = i % adapter->num_io_queues;
3100 }
3101 
3102 /* trigger rx cleanup after 2 consecutive detections */
3103 #define EMPTY_RX_REFILL 2
3104 /* For the rare case where the device runs out of Rx descriptors and the
3105  * msix handler failed to refill new Rx descriptors (due to a lack of memory
3106  * for example).
3107  * This case will lead to a deadlock:
3108  * The device won't send interrupts since all the new Rx packets will be dropped
3109  * The msix handler won't allocate new Rx descriptors so the device won't be
3110  * able to send new packets.
3111  *
3112  * When such a situation is detected - execute rx cleanup task in another thread
3113  */
3114 static void
3115 check_for_empty_rx_ring(struct ena_adapter *adapter)
3116 {
3117 	struct ena_ring *rx_ring;
3118 	int i, refill_required;
3119 
3120 	if (!ENA_FLAG_ISSET(ENA_FLAG_DEV_UP, adapter))
3121 		return;
3122 
3123 	if (ENA_FLAG_ISSET(ENA_FLAG_TRIGGER_RESET, adapter))
3124 		return;
3125 
3126 	for (i = 0; i < adapter->num_io_queues; i++) {
3127 		rx_ring = &adapter->rx_ring[i];
3128 
3129 		refill_required = ena_com_free_q_entries(
3130 		    rx_ring->ena_com_io_sq);
3131 		if (unlikely(refill_required == (rx_ring->ring_size - 1))) {
3132 			rx_ring->empty_rx_queue++;
3133 
3134 			if (rx_ring->empty_rx_queue >= EMPTY_RX_REFILL) {
3135 				counter_u64_add(rx_ring->rx_stats.empty_rx_ring,
3136 				    1);
3137 
3138 				ena_log(adapter->pdev, WARN,
3139 				    "Rx ring %d is stalled. Triggering the refill function\n",
3140 				    i);
3141 
3142 				taskqueue_enqueue(rx_ring->que->cleanup_tq,
3143 				    &rx_ring->que->cleanup_task);
3144 				rx_ring->empty_rx_queue = 0;
3145 			}
3146 		} else {
3147 			rx_ring->empty_rx_queue = 0;
3148 		}
3149 	}
3150 }
3151 
3152 static void
3153 ena_update_hints(struct ena_adapter *adapter,
3154     struct ena_admin_ena_hw_hints *hints)
3155 {
3156 	struct ena_com_dev *ena_dev = adapter->ena_dev;
3157 
3158 	if (hints->admin_completion_tx_timeout)
3159 		ena_dev->admin_queue.completion_timeout =
3160 		    hints->admin_completion_tx_timeout * 1000;
3161 
3162 	if (hints->mmio_read_timeout)
3163 		/* convert to usec */
3164 		ena_dev->mmio_read.reg_read_to = hints->mmio_read_timeout * 1000;
3165 
3166 	if (hints->missed_tx_completion_count_threshold_to_reset)
3167 		adapter->missing_tx_threshold =
3168 		    hints->missed_tx_completion_count_threshold_to_reset;
3169 
3170 	if (hints->missing_tx_completion_timeout) {
3171 		if (hints->missing_tx_completion_timeout ==
3172 		    ENA_HW_HINTS_NO_TIMEOUT)
3173 			adapter->missing_tx_timeout = ENA_HW_HINTS_NO_TIMEOUT;
3174 		else
3175 			adapter->missing_tx_timeout = SBT_1MS *
3176 			    hints->missing_tx_completion_timeout;
3177 	}
3178 
3179 	if (hints->driver_watchdog_timeout) {
3180 		if (hints->driver_watchdog_timeout == ENA_HW_HINTS_NO_TIMEOUT)
3181 			adapter->keep_alive_timeout = ENA_HW_HINTS_NO_TIMEOUT;
3182 		else
3183 			adapter->keep_alive_timeout = SBT_1MS *
3184 			    hints->driver_watchdog_timeout;
3185 	}
3186 }
3187 
3188 /**
3189  * ena_copy_eni_metrics - Get and copy ENI metrics from the HW.
3190  * @adapter: ENA device adapter
3191  *
3192  * Returns 0 on success, EOPNOTSUPP if current HW doesn't support those metrics
3193  * and other error codes on failure.
3194  *
3195  * This function can possibly cause a race with other calls to the admin queue.
3196  * Because of that, the caller should either lock this function or make sure
3197  * that there is no race in the current context.
3198  */
3199 static int
3200 ena_copy_eni_metrics(struct ena_adapter *adapter)
3201 {
3202 	static bool print_once = true;
3203 	int rc;
3204 
3205 	rc = ena_com_get_eni_stats(adapter->ena_dev, &adapter->eni_metrics);
3206 
3207 	if (rc != 0) {
3208 		if (rc == ENA_COM_UNSUPPORTED) {
3209 			if (print_once) {
3210 				ena_log(adapter->pdev, WARN,
3211 				    "Retrieving ENI metrics is not supported.\n");
3212 				print_once = false;
3213 			} else {
3214 				ena_log(adapter->pdev, DBG,
3215 				    "Retrieving ENI metrics is not supported.\n");
3216 			}
3217 		} else {
3218 			ena_log(adapter->pdev, ERR,
3219 			    "Failed to get ENI metrics: %d\n", rc);
3220 		}
3221 	}
3222 
3223 	return (rc);
3224 }
3225 
3226 static void
3227 ena_timer_service(void *data)
3228 {
3229 	struct ena_adapter *adapter = (struct ena_adapter *)data;
3230 	struct ena_admin_host_info *host_info =
3231 	    adapter->ena_dev->host_attr.host_info;
3232 
3233 	check_for_missing_keep_alive(adapter);
3234 
3235 	check_for_admin_com_state(adapter);
3236 
3237 	check_for_missing_completions(adapter);
3238 
3239 	check_for_empty_rx_ring(adapter);
3240 
3241 	/*
3242 	 * User controller update of the ENI metrics.
3243 	 * If the delay was set to 0, then the stats shouldn't be updated at
3244 	 * all.
3245 	 * Otherwise, wait 'eni_metrics_sample_interval' seconds, before
3246 	 * updating stats.
3247 	 * As timer service is executed every second, it's enough to increment
3248 	 * appropriate counter each time the timer service is executed.
3249 	 */
3250 	if ((adapter->eni_metrics_sample_interval != 0) &&
3251 	    (++adapter->eni_metrics_sample_interval_cnt >=
3252 	     adapter->eni_metrics_sample_interval)) {
3253 		taskqueue_enqueue(adapter->metrics_tq, &adapter->metrics_task);
3254 		adapter->eni_metrics_sample_interval_cnt = 0;
3255 	}
3256 
3257 
3258 	if (host_info != NULL)
3259 		ena_update_host_info(host_info, adapter->ifp);
3260 
3261 	if (unlikely(ENA_FLAG_ISSET(ENA_FLAG_TRIGGER_RESET, adapter))) {
3262 		/*
3263 		 * Timeout when validating version indicates that the device
3264 		 * became unresponsive. If that happens skip the reset and
3265 		 * reschedule timer service, so the reset can be retried later.
3266 		 */
3267 		if (ena_com_validate_version(adapter->ena_dev) ==
3268 		    ENA_COM_TIMER_EXPIRED) {
3269 			ena_log(adapter->pdev, WARN,
3270 			    "FW unresponsive, skipping reset\n");
3271 			ENA_TIMER_RESET(adapter);
3272 			return;
3273 		}
3274 		ena_log(adapter->pdev, WARN, "Trigger reset is on\n");
3275 		taskqueue_enqueue(adapter->reset_tq, &adapter->reset_task);
3276 		return;
3277 	}
3278 
3279 	/*
3280 	 * Schedule another timeout one second from now.
3281 	 */
3282 	ENA_TIMER_RESET(adapter);
3283 }
3284 
3285 void
3286 ena_destroy_device(struct ena_adapter *adapter, bool graceful)
3287 {
3288 	if_t ifp = adapter->ifp;
3289 	struct ena_com_dev *ena_dev = adapter->ena_dev;
3290 	bool dev_up;
3291 
3292 	if (!ENA_FLAG_ISSET(ENA_FLAG_DEVICE_RUNNING, adapter))
3293 		return;
3294 
3295 	if_link_state_change(ifp, LINK_STATE_DOWN);
3296 
3297 	ENA_TIMER_DRAIN(adapter);
3298 
3299 	dev_up = ENA_FLAG_ISSET(ENA_FLAG_DEV_UP, adapter);
3300 	if (dev_up)
3301 		ENA_FLAG_SET_ATOMIC(ENA_FLAG_DEV_UP_BEFORE_RESET, adapter);
3302 
3303 	if (!graceful)
3304 		ena_com_set_admin_running_state(ena_dev, false);
3305 
3306 	if (ENA_FLAG_ISSET(ENA_FLAG_DEV_UP, adapter))
3307 		ena_down(adapter);
3308 
3309 	/*
3310 	 * Stop the device from sending AENQ events (if the device was up, and
3311 	 * the trigger reset was on, ena_down already performs device reset)
3312 	 */
3313 	if (!(ENA_FLAG_ISSET(ENA_FLAG_TRIGGER_RESET, adapter) && dev_up))
3314 		ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason);
3315 
3316 	ena_free_mgmnt_irq(adapter);
3317 
3318 	ena_disable_msix(adapter);
3319 
3320 	/*
3321 	 * IO rings resources should be freed because `ena_restore_device()`
3322 	 * calls (not directly) `ena_enable_msix()`, which re-allocates MSIX
3323 	 * vectors. The amount of MSIX vectors after destroy-restore may be
3324 	 * different than before. Therefore, IO rings resources should be
3325 	 * established from scratch each time.
3326 	 */
3327 	ena_free_all_io_rings_resources(adapter);
3328 
3329 	ena_com_abort_admin_commands(ena_dev);
3330 
3331 	ena_com_wait_for_abort_completion(ena_dev);
3332 
3333 	ena_com_admin_destroy(ena_dev);
3334 
3335 	ena_com_mmio_reg_read_request_destroy(ena_dev);
3336 
3337 	adapter->reset_reason = ENA_REGS_RESET_NORMAL;
3338 
3339 	ENA_FLAG_CLEAR_ATOMIC(ENA_FLAG_TRIGGER_RESET, adapter);
3340 	ENA_FLAG_CLEAR_ATOMIC(ENA_FLAG_DEVICE_RUNNING, adapter);
3341 }
3342 
3343 static int
3344 ena_device_validate_params(struct ena_adapter *adapter,
3345     struct ena_com_dev_get_features_ctx *get_feat_ctx)
3346 {
3347 	if (memcmp(get_feat_ctx->dev_attr.mac_addr, adapter->mac_addr,
3348 	    ETHER_ADDR_LEN) != 0) {
3349 		ena_log(adapter->pdev, ERR, "Error, mac addresses differ\n");
3350 		return (EINVAL);
3351 	}
3352 
3353 	if (get_feat_ctx->dev_attr.max_mtu < if_getmtu(adapter->ifp)) {
3354 		ena_log(adapter->pdev, ERR,
3355 		    "Error, device max mtu is smaller than ifp MTU\n");
3356 		return (EINVAL);
3357 	}
3358 
3359 	return 0;
3360 }
3361 
3362 int
3363 ena_restore_device(struct ena_adapter *adapter)
3364 {
3365 	struct ena_com_dev_get_features_ctx get_feat_ctx;
3366 	struct ena_com_dev *ena_dev = adapter->ena_dev;
3367 	if_t ifp = adapter->ifp;
3368 	device_t dev = adapter->pdev;
3369 	int wd_active;
3370 	int rc;
3371 
3372 	ENA_FLAG_SET_ATOMIC(ENA_FLAG_ONGOING_RESET, adapter);
3373 
3374 	rc = ena_device_init(adapter, dev, &get_feat_ctx, &wd_active);
3375 	if (rc != 0) {
3376 		ena_log(dev, ERR, "Cannot initialize device\n");
3377 		goto err;
3378 	}
3379 	/*
3380 	 * Only enable WD if it was enabled before reset, so it won't override
3381 	 * value set by the user by the sysctl.
3382 	 */
3383 	if (adapter->wd_active != 0)
3384 		adapter->wd_active = wd_active;
3385 
3386 	rc = ena_device_validate_params(adapter, &get_feat_ctx);
3387 	if (rc != 0) {
3388 		ena_log(dev, ERR, "Validation of device parameters failed\n");
3389 		goto err_device_destroy;
3390 	}
3391 
3392 	ENA_FLAG_CLEAR_ATOMIC(ENA_FLAG_ONGOING_RESET, adapter);
3393 	/* Make sure we don't have a race with AENQ Links state handler */
3394 	if (ENA_FLAG_ISSET(ENA_FLAG_LINK_UP, adapter))
3395 		if_link_state_change(ifp, LINK_STATE_UP);
3396 
3397 	rc = ena_enable_msix_and_set_admin_interrupts(adapter);
3398 	if (rc != 0) {
3399 		ena_log(dev, ERR, "Enable MSI-X failed\n");
3400 		goto err_device_destroy;
3401 	}
3402 
3403 	/*
3404 	 * Effective value of used MSIX vectors should be the same as before
3405 	 * `ena_destroy_device()`, if possible, or closest to it if less vectors
3406 	 * are available.
3407 	 */
3408 	if ((adapter->msix_vecs - ENA_ADMIN_MSIX_VEC) < adapter->num_io_queues)
3409 		adapter->num_io_queues = adapter->msix_vecs - ENA_ADMIN_MSIX_VEC;
3410 
3411 	/* Re-initialize rings basic information */
3412 	ena_init_io_rings(adapter);
3413 
3414 	/* If the interface was up before the reset bring it up */
3415 	if (ENA_FLAG_ISSET(ENA_FLAG_DEV_UP_BEFORE_RESET, adapter)) {
3416 		rc = ena_up(adapter);
3417 		if (rc != 0) {
3418 			ena_log(dev, ERR, "Failed to create I/O queues\n");
3419 			goto err_disable_msix;
3420 		}
3421 	}
3422 
3423 	/* Indicate that device is running again and ready to work */
3424 	ENA_FLAG_SET_ATOMIC(ENA_FLAG_DEVICE_RUNNING, adapter);
3425 
3426 	/*
3427 	 * As the AENQ handlers weren't executed during reset because
3428 	 * the flag ENA_FLAG_DEVICE_RUNNING was turned off, the
3429 	 * timestamp must be updated again That will prevent next reset
3430 	 * caused by missing keep alive.
3431 	 */
3432 	adapter->keep_alive_timestamp = getsbinuptime();
3433 	ENA_TIMER_RESET(adapter);
3434 
3435 	ENA_FLAG_CLEAR_ATOMIC(ENA_FLAG_DEV_UP_BEFORE_RESET, adapter);
3436 
3437 	return (rc);
3438 
3439 err_disable_msix:
3440 	ena_free_mgmnt_irq(adapter);
3441 	ena_disable_msix(adapter);
3442 err_device_destroy:
3443 	ena_com_abort_admin_commands(ena_dev);
3444 	ena_com_wait_for_abort_completion(ena_dev);
3445 	ena_com_admin_destroy(ena_dev);
3446 	ena_com_dev_reset(ena_dev, ENA_REGS_RESET_DRIVER_INVALID_STATE);
3447 	ena_com_mmio_reg_read_request_destroy(ena_dev);
3448 err:
3449 	ENA_FLAG_CLEAR_ATOMIC(ENA_FLAG_DEVICE_RUNNING, adapter);
3450 	ENA_FLAG_CLEAR_ATOMIC(ENA_FLAG_ONGOING_RESET, adapter);
3451 	ena_log(dev, ERR, "Reset attempt failed. Can not reset the device\n");
3452 
3453 	return (rc);
3454 }
3455 
3456 static void
3457 ena_metrics_task(void *arg, int pending)
3458 {
3459 	struct ena_adapter *adapter = (struct ena_adapter *)arg;
3460 
3461 	ENA_LOCK_LOCK();
3462 	(void)ena_copy_eni_metrics(adapter);
3463 	ENA_LOCK_UNLOCK();
3464 }
3465 
3466 static void
3467 ena_reset_task(void *arg, int pending)
3468 {
3469 	struct ena_adapter *adapter = (struct ena_adapter *)arg;
3470 
3471 	ENA_LOCK_LOCK();
3472 	if (likely(ENA_FLAG_ISSET(ENA_FLAG_TRIGGER_RESET, adapter))) {
3473 		ena_destroy_device(adapter, false);
3474 		ena_restore_device(adapter);
3475 
3476 		ena_log(adapter->pdev, INFO,
3477 		    "Device reset completed successfully, Driver info: %s\n",
3478 		    ena_version);
3479 	}
3480 	ENA_LOCK_UNLOCK();
3481 }
3482 
3483 /**
3484  * ena_attach - Device Initialization Routine
3485  * @pdev: device information struct
3486  *
3487  * Returns 0 on success, otherwise on failure.
3488  *
3489  * ena_attach initializes an adapter identified by a device structure.
3490  * The OS initialization, configuring of the adapter private structure,
3491  * and a hardware reset occur.
3492  **/
3493 static int
3494 ena_attach(device_t pdev)
3495 {
3496 	struct ena_com_dev_get_features_ctx get_feat_ctx;
3497 	struct ena_calc_queue_size_ctx calc_queue_ctx = { 0 };
3498 	static int version_printed;
3499 	struct ena_adapter *adapter;
3500 	struct ena_com_dev *ena_dev = NULL;
3501 	uint32_t max_num_io_queues;
3502 	int msix_rid;
3503 	int rid, rc;
3504 
3505 	adapter = device_get_softc(pdev);
3506 	adapter->pdev = pdev;
3507 	adapter->first_bind = -1;
3508 
3509 	/*
3510 	 * Set up the timer service - driver is responsible for avoiding
3511 	 * concurrency, as the callout won't be using any locking inside.
3512 	 */
3513 	ENA_TIMER_INIT(adapter);
3514 	adapter->keep_alive_timeout = ENA_DEFAULT_KEEP_ALIVE_TO;
3515 	adapter->missing_tx_timeout = ENA_DEFAULT_TX_CMP_TO;
3516 	adapter->missing_tx_max_queues = ENA_DEFAULT_TX_MONITORED_QUEUES;
3517 	adapter->missing_tx_threshold = ENA_DEFAULT_TX_CMP_THRESHOLD;
3518 
3519 	if (version_printed++ == 0)
3520 		ena_log(pdev, INFO, "%s\n", ena_version);
3521 
3522 	/* Allocate memory for ena_dev structure */
3523 	ena_dev = malloc(sizeof(struct ena_com_dev), M_DEVBUF,
3524 	    M_WAITOK | M_ZERO);
3525 
3526 	adapter->ena_dev = ena_dev;
3527 	ena_dev->dmadev = pdev;
3528 
3529 	rid = PCIR_BAR(ENA_REG_BAR);
3530 	adapter->memory = NULL;
3531 	adapter->registers = bus_alloc_resource_any(pdev, SYS_RES_MEMORY, &rid,
3532 	    RF_ACTIVE);
3533 	if (unlikely(adapter->registers == NULL)) {
3534 		ena_log(pdev, ERR,
3535 		    "unable to allocate bus resource: registers!\n");
3536 		rc = ENOMEM;
3537 		goto err_dev_free;
3538 	}
3539 
3540 	/* MSIx vector table may reside on BAR0 with registers or on BAR1. */
3541 	msix_rid = pci_msix_table_bar(pdev);
3542 	if (msix_rid != rid) {
3543 		adapter->msix = bus_alloc_resource_any(pdev, SYS_RES_MEMORY,
3544 		    &msix_rid, RF_ACTIVE);
3545 		if (unlikely(adapter->msix == NULL)) {
3546 			ena_log(pdev, ERR,
3547 			    "unable to allocate bus resource: msix!\n");
3548 			rc = ENOMEM;
3549 			goto err_pci_free;
3550 		}
3551 		adapter->msix_rid = msix_rid;
3552 	}
3553 
3554 	ena_dev->bus = malloc(sizeof(struct ena_bus), M_DEVBUF,
3555 	    M_WAITOK | M_ZERO);
3556 
3557 	/* Store register resources */
3558 	((struct ena_bus *)(ena_dev->bus))->reg_bar_t = rman_get_bustag(
3559 	    adapter->registers);
3560 	((struct ena_bus *)(ena_dev->bus))->reg_bar_h = rman_get_bushandle(
3561 	    adapter->registers);
3562 
3563 	if (unlikely(((struct ena_bus *)(ena_dev->bus))->reg_bar_h == 0)) {
3564 		ena_log(pdev, ERR, "failed to pmap registers bar\n");
3565 		rc = ENXIO;
3566 		goto err_bus_free;
3567 	}
3568 
3569 	rc = ena_map_llq_mem_bar(pdev, ena_dev);
3570 	if (unlikely(rc != 0)) {
3571 		ena_log(pdev, ERR, "Failed to map ENA mem bar");
3572 		goto err_bus_free;
3573 	}
3574 
3575 	/* Initially clear all the flags */
3576 	ENA_FLAG_ZERO(adapter);
3577 
3578 	/* Device initialization */
3579 	rc = ena_device_init(adapter, pdev, &get_feat_ctx, &adapter->wd_active);
3580 	if (unlikely(rc != 0)) {
3581 		ena_log(pdev, ERR, "ENA device init failed! (err: %d)\n", rc);
3582 		rc = ENXIO;
3583 		goto err_bus_free;
3584 	}
3585 
3586 	if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
3587 		adapter->disable_meta_caching = !!(
3588 		    get_feat_ctx.llq.accel_mode.u.get.supported_flags &
3589 		    BIT(ENA_ADMIN_DISABLE_META_CACHING));
3590 
3591 	adapter->keep_alive_timestamp = getsbinuptime();
3592 
3593 	adapter->tx_offload_cap = get_feat_ctx.offload.tx;
3594 
3595 	memcpy(adapter->mac_addr, get_feat_ctx.dev_attr.mac_addr,
3596 	    ETHER_ADDR_LEN);
3597 
3598 	calc_queue_ctx.pdev = pdev;
3599 	calc_queue_ctx.ena_dev = ena_dev;
3600 	calc_queue_ctx.get_feat_ctx = &get_feat_ctx;
3601 
3602 	/* Calculate initial and maximum IO queue number and size */
3603 	max_num_io_queues = ena_calc_max_io_queue_num(pdev, ena_dev,
3604 	    &get_feat_ctx);
3605 	rc = ena_calc_io_queue_size(&calc_queue_ctx);
3606 	if (unlikely((rc != 0) || (max_num_io_queues <= 0))) {
3607 		rc = EFAULT;
3608 		goto err_com_free;
3609 	}
3610 
3611 	adapter->requested_tx_ring_size = calc_queue_ctx.tx_queue_size;
3612 	adapter->requested_rx_ring_size = calc_queue_ctx.rx_queue_size;
3613 	adapter->max_tx_ring_size = calc_queue_ctx.max_tx_queue_size;
3614 	adapter->max_rx_ring_size = calc_queue_ctx.max_rx_queue_size;
3615 	adapter->max_tx_sgl_size = calc_queue_ctx.max_tx_sgl_size;
3616 	adapter->max_rx_sgl_size = calc_queue_ctx.max_rx_sgl_size;
3617 
3618 	adapter->max_num_io_queues = max_num_io_queues;
3619 
3620 	adapter->buf_ring_size = ENA_DEFAULT_BUF_RING_SIZE;
3621 
3622 	adapter->max_mtu = get_feat_ctx.dev_attr.max_mtu;
3623 
3624 	adapter->reset_reason = ENA_REGS_RESET_NORMAL;
3625 
3626 	/* set up dma tags for rx and tx buffers */
3627 	rc = ena_setup_tx_dma_tag(adapter);
3628 	if (unlikely(rc != 0)) {
3629 		ena_log(pdev, ERR, "Failed to create TX DMA tag\n");
3630 		goto err_com_free;
3631 	}
3632 
3633 	rc = ena_setup_rx_dma_tag(adapter);
3634 	if (unlikely(rc != 0)) {
3635 		ena_log(pdev, ERR, "Failed to create RX DMA tag\n");
3636 		goto err_tx_tag_free;
3637 	}
3638 
3639 	/*
3640 	 * The amount of requested MSIX vectors is equal to
3641 	 * adapter::max_num_io_queues (see `ena_enable_msix()`), plus a constant
3642 	 * number of admin queue interrupts. The former is initially determined
3643 	 * by HW capabilities (see `ena_calc_max_io_queue_num())` but may not be
3644 	 * achieved if there are not enough system resources. By default, the
3645 	 * number of effectively used IO queues is the same but later on it can
3646 	 * be limited by the user using sysctl interface.
3647 	 */
3648 	rc = ena_enable_msix_and_set_admin_interrupts(adapter);
3649 	if (unlikely(rc != 0)) {
3650 		ena_log(pdev, ERR,
3651 		    "Failed to enable and set the admin interrupts\n");
3652 		goto err_io_free;
3653 	}
3654 	/* By default all of allocated MSIX vectors are actively used */
3655 	adapter->num_io_queues = adapter->msix_vecs - ENA_ADMIN_MSIX_VEC;
3656 
3657 	/* initialize rings basic information */
3658 	ena_init_io_rings(adapter);
3659 
3660 	/* setup network interface */
3661 	rc = ena_setup_ifnet(pdev, adapter, &get_feat_ctx);
3662 	if (unlikely(rc != 0)) {
3663 		ena_log(pdev, ERR, "Error with network interface setup\n");
3664 		goto err_msix_free;
3665 	}
3666 
3667 	/* Initialize reset task queue */
3668 	TASK_INIT(&adapter->reset_task, 0, ena_reset_task, adapter);
3669 	adapter->reset_tq = taskqueue_create("ena_reset_enqueue",
3670 	    M_WAITOK | M_ZERO, taskqueue_thread_enqueue, &adapter->reset_tq);
3671 	taskqueue_start_threads(&adapter->reset_tq, 1, PI_NET, "%s rstq",
3672 	    device_get_nameunit(adapter->pdev));
3673 
3674 	/* Initialize metrics task queue */
3675 	TASK_INIT(&adapter->metrics_task, 0, ena_metrics_task, adapter);
3676 	adapter->metrics_tq = taskqueue_create("ena_metrics_enqueue",
3677 	    M_WAITOK | M_ZERO, taskqueue_thread_enqueue, &adapter->metrics_tq);
3678 	taskqueue_start_threads(&adapter->metrics_tq, 1, PI_NET, "%s metricsq",
3679 	    device_get_nameunit(adapter->pdev));
3680 
3681 	/* Initialize statistics */
3682 	ena_alloc_counters((counter_u64_t *)&adapter->dev_stats,
3683 	    sizeof(struct ena_stats_dev));
3684 	ena_alloc_counters((counter_u64_t *)&adapter->hw_stats,
3685 	    sizeof(struct ena_hw_stats));
3686 	ena_sysctl_add_nodes(adapter);
3687 
3688 #ifdef DEV_NETMAP
3689 	rc = ena_netmap_attach(adapter);
3690 	if (rc != 0) {
3691 		ena_log(pdev, ERR, "netmap attach failed: %d\n", rc);
3692 		goto err_detach;
3693 	}
3694 #endif /* DEV_NETMAP */
3695 
3696 	/* Tell the stack that the interface is not active */
3697 	if_setdrvflagbits(adapter->ifp, IFF_DRV_OACTIVE, IFF_DRV_RUNNING);
3698 	ENA_FLAG_SET_ATOMIC(ENA_FLAG_DEVICE_RUNNING, adapter);
3699 
3700 	/* Run the timer service */
3701 	ENA_TIMER_RESET(adapter);
3702 
3703 	return (0);
3704 
3705 #ifdef DEV_NETMAP
3706 err_detach:
3707 	ether_ifdetach(adapter->ifp);
3708 #endif /* DEV_NETMAP */
3709 err_msix_free:
3710 	ena_com_dev_reset(adapter->ena_dev, ENA_REGS_RESET_INIT_ERR);
3711 	ena_free_mgmnt_irq(adapter);
3712 	ena_disable_msix(adapter);
3713 err_io_free:
3714 	ena_free_all_io_rings_resources(adapter);
3715 	ena_free_rx_dma_tag(adapter);
3716 err_tx_tag_free:
3717 	ena_free_tx_dma_tag(adapter);
3718 err_com_free:
3719 	ena_com_admin_destroy(ena_dev);
3720 	ena_com_delete_host_info(ena_dev);
3721 	ena_com_mmio_reg_read_request_destroy(ena_dev);
3722 err_bus_free:
3723 	free(ena_dev->bus, M_DEVBUF);
3724 err_pci_free:
3725 	ena_free_pci_resources(adapter);
3726 err_dev_free:
3727 	free(ena_dev, M_DEVBUF);
3728 
3729 	return (rc);
3730 }
3731 
3732 /**
3733  * ena_detach - Device Removal Routine
3734  * @pdev: device information struct
3735  *
3736  * ena_detach is called by the device subsystem to alert the driver
3737  * that it should release a PCI device.
3738  **/
3739 static int
3740 ena_detach(device_t pdev)
3741 {
3742 	struct ena_adapter *adapter = device_get_softc(pdev);
3743 	struct ena_com_dev *ena_dev = adapter->ena_dev;
3744 	int rc;
3745 
3746 	/* Make sure VLANS are not using driver */
3747 	if (if_vlantrunkinuse(adapter->ifp)) {
3748 		ena_log(adapter->pdev, ERR, "VLAN is in use, detach first\n");
3749 		return (EBUSY);
3750 	}
3751 
3752 	ether_ifdetach(adapter->ifp);
3753 
3754 	/* Stop timer service */
3755 	ENA_LOCK_LOCK();
3756 	ENA_TIMER_DRAIN(adapter);
3757 	ENA_LOCK_UNLOCK();
3758 
3759 	/* Release metrics task */
3760 	while (taskqueue_cancel(adapter->metrics_tq, &adapter->metrics_task, NULL))
3761 		taskqueue_drain(adapter->metrics_tq, &adapter->metrics_task);
3762 	taskqueue_free(adapter->metrics_tq);
3763 
3764 	/* Release reset task */
3765 	while (taskqueue_cancel(adapter->reset_tq, &adapter->reset_task, NULL))
3766 		taskqueue_drain(adapter->reset_tq, &adapter->reset_task);
3767 	taskqueue_free(adapter->reset_tq);
3768 
3769 	ENA_LOCK_LOCK();
3770 	ena_down(adapter);
3771 	ena_destroy_device(adapter, true);
3772 	ENA_LOCK_UNLOCK();
3773 
3774 	/* Restore unregistered sysctl queue nodes. */
3775 	ena_sysctl_update_queue_node_nb(adapter, adapter->num_io_queues,
3776 	    adapter->max_num_io_queues);
3777 
3778 #ifdef DEV_NETMAP
3779 	netmap_detach(adapter->ifp);
3780 #endif /* DEV_NETMAP */
3781 
3782 	ena_free_counters((counter_u64_t *)&adapter->hw_stats,
3783 	    sizeof(struct ena_hw_stats));
3784 	ena_free_counters((counter_u64_t *)&adapter->dev_stats,
3785 	    sizeof(struct ena_stats_dev));
3786 
3787 	rc = ena_free_rx_dma_tag(adapter);
3788 	if (unlikely(rc != 0))
3789 		ena_log(adapter->pdev, WARN,
3790 		    "Unmapped RX DMA tag associations\n");
3791 
3792 	rc = ena_free_tx_dma_tag(adapter);
3793 	if (unlikely(rc != 0))
3794 		ena_log(adapter->pdev, WARN,
3795 		    "Unmapped TX DMA tag associations\n");
3796 
3797 	ena_free_irqs(adapter);
3798 
3799 	ena_free_pci_resources(adapter);
3800 
3801 	if (adapter->rss_indir != NULL)
3802 		free(adapter->rss_indir, M_DEVBUF);
3803 
3804 	if (likely(ENA_FLAG_ISSET(ENA_FLAG_RSS_ACTIVE, adapter)))
3805 		ena_com_rss_destroy(ena_dev);
3806 
3807 	ena_com_delete_host_info(ena_dev);
3808 
3809 	if_free(adapter->ifp);
3810 
3811 	free(ena_dev->bus, M_DEVBUF);
3812 
3813 	free(ena_dev, M_DEVBUF);
3814 
3815 	return (bus_generic_detach(pdev));
3816 }
3817 
3818 /******************************************************************************
3819  ******************************** AENQ Handlers *******************************
3820  *****************************************************************************/
3821 /**
3822  * ena_update_on_link_change:
3823  * Notify the network interface about the change in link status
3824  **/
3825 static void
3826 ena_update_on_link_change(void *adapter_data,
3827     struct ena_admin_aenq_entry *aenq_e)
3828 {
3829 	struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
3830 	struct ena_admin_aenq_link_change_desc *aenq_desc;
3831 	int status;
3832 	if_t ifp;
3833 
3834 	aenq_desc = (struct ena_admin_aenq_link_change_desc *)aenq_e;
3835 	ifp = adapter->ifp;
3836 	status = aenq_desc->flags &
3837 	    ENA_ADMIN_AENQ_LINK_CHANGE_DESC_LINK_STATUS_MASK;
3838 
3839 	if (status != 0) {
3840 		ena_log(adapter->pdev, INFO, "link is UP\n");
3841 		ENA_FLAG_SET_ATOMIC(ENA_FLAG_LINK_UP, adapter);
3842 		if (!ENA_FLAG_ISSET(ENA_FLAG_ONGOING_RESET, adapter))
3843 			if_link_state_change(ifp, LINK_STATE_UP);
3844 	} else {
3845 		ena_log(adapter->pdev, INFO, "link is DOWN\n");
3846 		if_link_state_change(ifp, LINK_STATE_DOWN);
3847 		ENA_FLAG_CLEAR_ATOMIC(ENA_FLAG_LINK_UP, adapter);
3848 	}
3849 }
3850 
3851 static void
3852 ena_notification(void *adapter_data, struct ena_admin_aenq_entry *aenq_e)
3853 {
3854 	struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
3855 	struct ena_admin_ena_hw_hints *hints;
3856 
3857 	ENA_WARN(aenq_e->aenq_common_desc.group != ENA_ADMIN_NOTIFICATION,
3858 	    adapter->ena_dev, "Invalid group(%x) expected %x\n",
3859 	    aenq_e->aenq_common_desc.group, ENA_ADMIN_NOTIFICATION);
3860 
3861 	switch (aenq_e->aenq_common_desc.syndrome) {
3862 	case ENA_ADMIN_UPDATE_HINTS:
3863 		hints =
3864 		    (struct ena_admin_ena_hw_hints *)(&aenq_e->inline_data_w4);
3865 		ena_update_hints(adapter, hints);
3866 		break;
3867 	default:
3868 		ena_log(adapter->pdev, ERR,
3869 		    "Invalid aenq notification link state %d\n",
3870 		    aenq_e->aenq_common_desc.syndrome);
3871 	}
3872 }
3873 
3874 static void
3875 ena_lock_init(void *arg)
3876 {
3877 	ENA_LOCK_INIT();
3878 }
3879 SYSINIT(ena_lock_init, SI_SUB_LOCK, SI_ORDER_FIRST, ena_lock_init, NULL);
3880 
3881 static void
3882 ena_lock_uninit(void *arg)
3883 {
3884 	ENA_LOCK_DESTROY();
3885 }
3886 SYSUNINIT(ena_lock_uninit, SI_SUB_LOCK, SI_ORDER_FIRST, ena_lock_uninit, NULL);
3887 
3888 /**
3889  * This handler will called for unknown event group or unimplemented handlers
3890  **/
3891 static void
3892 unimplemented_aenq_handler(void *adapter_data,
3893     struct ena_admin_aenq_entry *aenq_e)
3894 {
3895 	struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
3896 
3897 	ena_log(adapter->pdev, ERR,
3898 	    "Unknown event was received or event with unimplemented handler\n");
3899 }
3900 
3901 static struct ena_aenq_handlers aenq_handlers = {
3902     .handlers = {
3903 	    [ENA_ADMIN_LINK_CHANGE] = ena_update_on_link_change,
3904 	    [ENA_ADMIN_NOTIFICATION] = ena_notification,
3905 	    [ENA_ADMIN_KEEP_ALIVE] = ena_keep_alive_wd,
3906     },
3907     .unimplemented_handler = unimplemented_aenq_handler
3908 };
3909 
3910 /*********************************************************************
3911  *  FreeBSD Device Interface Entry Points
3912  *********************************************************************/
3913 
3914 static device_method_t ena_methods[] = { /* Device interface */
3915 	DEVMETHOD(device_probe, ena_probe),
3916 	DEVMETHOD(device_attach, ena_attach),
3917 	DEVMETHOD(device_detach, ena_detach), DEVMETHOD_END
3918 };
3919 
3920 static driver_t ena_driver = {
3921 	"ena",
3922 	ena_methods,
3923 	sizeof(struct ena_adapter),
3924 };
3925 
3926 DRIVER_MODULE(ena, pci, ena_driver, 0, 0);
3927 MODULE_PNP_INFO("U16:vendor;U16:device", pci, ena, ena_vendor_info_array,
3928     nitems(ena_vendor_info_array) - 1);
3929 MODULE_DEPEND(ena, pci, 1, 1, 1);
3930 MODULE_DEPEND(ena, ether, 1, 1, 1);
3931 #ifdef DEV_NETMAP
3932 MODULE_DEPEND(ena, netmap, 1, 1, 1);
3933 #endif /* DEV_NETMAP */
3934 
3935 /*********************************************************************/
3936