xref: /freebsd/sys/dev/gve/gve_desc.h (revision 535af610)
1 /*-
2  * SPDX-License-Identifier: BSD-3-Clause
3  *
4  * Copyright (c) 2023 Google LLC
5  *
6  * Redistribution and use in source and binary forms, with or without modification,
7  * are permitted provided that the following conditions are met:
8  *
9  * 1. Redistributions of source code must retain the above copyright notice, this
10  *    list of conditions and the following disclaimer.
11  *
12  * 2. Redistributions in binary form must reproduce the above copyright notice,
13  *    this list of conditions and the following disclaimer in the documentation
14  *    and/or other materials provided with the distribution.
15  *
16  * 3. Neither the name of the copyright holder nor the names of its contributors
17  *    may be used to endorse or promote products derived from this software without
18  *    specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
21  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
22  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
23  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
24  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
25  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
26  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
27  * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
29  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30  */
31 #ifndef _GVE_DESC_H_
32 #define _GVE_DESC_H_
33 
34 #include "gve_plat.h"
35 
36 /*
37  * A note on seg_addrs
38  *
39  * Base addresses encoded in seg_addr are not assumed to be physical
40  * addresses. The ring format assumes these come from some linear address
41  * space. This could be physical memory, kernel virtual memory, user virtual
42  * memory.
43  *
44  * Each queue is assumed to be associated with a single such linear
45  * address space to ensure a consistent meaning for seg_addrs posted to its
46  * rings.
47  */
48 struct gve_tx_pkt_desc {
49 	uint8_t	type_flags;  /* desc type is lower 4 bits, flags upper */
50 	uint8_t	l4_csum_offset;  /* relative offset of L4 csum word */
51 	uint8_t	l4_hdr_offset;  /* Offset of start of L4 headers in packet */
52 	uint8_t	desc_cnt;  /* Total descriptors for this packet */
53 	__be16	len;  /* Total length of this packet (in bytes) */
54 	__be16	seg_len;  /* Length of this descriptor's segment */
55 	__be64	seg_addr;  /* Base address (see note) of this segment */
56 } __packed;
57 
58 struct gve_tx_mtd_desc {
59 	uint8_t	type_flags;	/* type is lower 4 bits, subtype upper  */
60 	uint8_t	path_state;	/* state is lower 4 bits, hash type upper */
61 	__be16	reserved0;
62 	__be32	path_hash;
63 	__be64	reserved1;
64 } __packed;
65 
66 struct gve_tx_seg_desc {
67 	uint8_t	type_flags;	/* type is lower 4 bits, flags upper	*/
68 	uint8_t	l3_offset;	/* TSO: 2 byte units to start of IPH	*/
69 	__be16	reserved;
70 	__be16	mss;		/* TSO MSS				*/
71 	__be16	seg_len;
72 	__be64	seg_addr;
73 } __packed;
74 
75 /* GVE Transmit Descriptor Types */
76 #define	GVE_TXD_STD		(0x0 << 4) /* Std with Host Address	*/
77 #define	GVE_TXD_TSO		(0x1 << 4) /* TSO with Host Address	*/
78 #define	GVE_TXD_SEG		(0x2 << 4) /* Seg with Host Address	*/
79 #define	GVE_TXD_MTD		(0x3 << 4) /* Metadata			*/
80 
81 /* GVE Transmit Descriptor Flags for Std Pkts */
82 #define	GVE_TXF_L4CSUM	BIT(0)	/* Need csum offload */
83 #define	GVE_TXF_TSTAMP	BIT(2)	/* Timestamp required */
84 
85 /* GVE Transmit Descriptor Flags for TSO Segs */
86 #define	GVE_TXSF_IPV6	BIT(1)	/* IPv6 TSO */
87 
88 /* GVE Transmit Descriptor Options for MTD Segs */
89 #define GVE_MTD_SUBTYPE_PATH		0
90 
91 #define GVE_MTD_PATH_STATE_DEFAULT	0
92 #define GVE_MTD_PATH_STATE_TIMEOUT	1
93 #define GVE_MTD_PATH_STATE_CONGESTION	2
94 #define GVE_MTD_PATH_STATE_RETRANSMIT	3
95 
96 #define GVE_MTD_PATH_HASH_NONE		(0x0 << 4)
97 #define GVE_MTD_PATH_HASH_L4		(0x1 << 4)
98 
99 /*
100  * GVE Receive Packet Descriptor
101  *
102  * The start of an ethernet packet comes 2 bytes into the rx buffer.
103  * gVNIC adds this padding so that both the DMA and the L3/4 protocol header
104  * access is aligned.
105  */
106 #define GVE_RX_PAD 2
107 
108 struct gve_rx_desc {
109 	uint8_t	padding[48];
110 	__be32	rss_hash;  /* Receive-side scaling hash (Toeplitz for gVNIC) */
111 	__be16	mss;
112 	__be16	reserved;  /* Reserved to zero */
113 	uint8_t	hdr_len;   /* Header length (L2-L4) including padding */
114 	uint8_t	hdr_off;   /* 64-byte-scaled offset into RX_DATA entry */
115 	uint16_t csum;     /* 1's-complement partial checksum of L3+ bytes */
116 	__be16	len;       /* Length of the received packet */
117 	__be16	flags_seq; /* Flags [15:3] and sequence number [2:0] (1-7) */
118 } __packed;
119 _Static_assert(sizeof(struct gve_rx_desc) == 64, "gve: bad desc struct length");
120 
121 /*
122  * If the device supports raw dma addressing then the addr in data slot is
123  * the dma address of the buffer.
124  * If the device only supports registered segments then the addr is a byte
125  * offset into the registered segment (an ordered list of pages) where the
126  * buffer is.
127  */
128 union gve_rx_data_slot {
129 	__be64 qpl_offset;
130 	__be64 addr;
131 };
132 
133 /* GVE Recive Packet Descriptor Seq No */
134 #define GVE_SEQNO(x) (be16toh(x) & 0x7)
135 
136 /* GVE Recive Packet Descriptor Flags */
137 #define GVE_RXFLG(x)	htobe16(1 << (3 + (x)))
138 #define	GVE_RXF_FRAG		GVE_RXFLG(3)	/* IP Fragment			*/
139 #define	GVE_RXF_IPV4		GVE_RXFLG(4)	/* IPv4				*/
140 #define	GVE_RXF_IPV6		GVE_RXFLG(5)	/* IPv6				*/
141 #define	GVE_RXF_TCP		GVE_RXFLG(6)	/* TCP Packet			*/
142 #define	GVE_RXF_UDP		GVE_RXFLG(7)	/* UDP Packet			*/
143 #define	GVE_RXF_ERR		GVE_RXFLG(8)	/* Packet Error Detected	*/
144 #define	GVE_RXF_PKT_CONT	GVE_RXFLG(10)	/* Multi Fragment RX packet	*/
145 
146 /* GVE IRQ */
147 #define GVE_IRQ_ACK	BIT(31)
148 #define GVE_IRQ_MASK	BIT(30)
149 #define GVE_IRQ_EVENT	BIT(29)
150 
151 #endif /* _GVE_DESC_H_ */
152