1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2008 Joseph Koshy 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/param.h> 30 #include <sys/pmc.h> 31 #include <sys/pmckern.h> 32 #include <sys/systm.h> 33 34 #include <machine/specialreg.h> 35 36 /* 37 * TSC support. 38 */ 39 40 #define TSC_CAPS PMC_CAP_READ 41 42 struct tsc_descr { 43 struct pmc_descr pm_descr; /* "base class" */ 44 }; 45 46 static struct tsc_descr tsc_pmcdesc[TSC_NPMCS] = 47 { 48 { 49 .pm_descr = 50 { 51 .pd_name = "TSC", 52 .pd_class = PMC_CLASS_TSC, 53 .pd_caps = TSC_CAPS, 54 .pd_width = 64 55 } 56 } 57 }; 58 59 /* 60 * Per-CPU data structure for TSCs. 61 */ 62 63 struct tsc_cpu { 64 struct pmc_hw tc_hw; 65 }; 66 67 static struct tsc_cpu **tsc_pcpu; 68 69 static int 70 tsc_allocate_pmc(int cpu __diagused, int ri __diagused, struct pmc *pm __unused, 71 const struct pmc_op_pmcallocate *a) 72 { 73 74 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 75 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu)); 76 KASSERT(ri >= 0 && ri < TSC_NPMCS, 77 ("[tsc,%d] illegal row index %d", __LINE__, ri)); 78 79 if (a->pm_class != PMC_CLASS_TSC) 80 return (EINVAL); 81 82 if (a->pm_ev != PMC_EV_TSC_TSC || 83 a->pm_mode != PMC_MODE_SC) 84 return (EINVAL); 85 86 return (0); 87 } 88 89 static int 90 tsc_config_pmc(int cpu, int ri, struct pmc *pm) 91 { 92 struct pmc_hw *phw; 93 94 PMCDBG3(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm); 95 96 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 97 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu)); 98 KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri)); 99 100 phw = &tsc_pcpu[cpu]->tc_hw; 101 102 KASSERT(pm == NULL || phw->phw_pmc == NULL, 103 ("[tsc,%d] pm=%p phw->pm=%p hwpmc not unconfigured", __LINE__, 104 pm, phw->phw_pmc)); 105 106 phw->phw_pmc = pm; 107 108 return (0); 109 } 110 111 static int 112 tsc_describe(int cpu, int ri, struct pmc_info *pi, struct pmc **ppmc) 113 { 114 const struct tsc_descr *pd; 115 struct pmc_hw *phw; 116 117 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 118 ("[tsc,%d] illegal CPU %d", __LINE__, cpu)); 119 KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri)); 120 121 phw = &tsc_pcpu[cpu]->tc_hw; 122 pd = &tsc_pmcdesc[ri]; 123 124 strlcpy(pi->pm_name, pd->pm_descr.pd_name, sizeof(pi->pm_name)); 125 pi->pm_class = pd->pm_descr.pd_class; 126 127 if (phw->phw_state & PMC_PHW_FLAG_IS_ENABLED) { 128 pi->pm_enabled = TRUE; 129 *ppmc = phw->phw_pmc; 130 } else { 131 pi->pm_enabled = FALSE; 132 *ppmc = NULL; 133 } 134 135 return (0); 136 } 137 138 static int 139 tsc_get_config(int cpu, int ri __diagused, struct pmc **ppm) 140 { 141 142 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 143 ("[tsc,%d] illegal CPU %d", __LINE__, cpu)); 144 KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri)); 145 146 *ppm = tsc_pcpu[cpu]->tc_hw.phw_pmc; 147 148 return (0); 149 } 150 151 static int 152 tsc_get_msr(int ri __diagused, uint32_t *msr) 153 { 154 155 KASSERT(ri >= 0 && ri < TSC_NPMCS, 156 ("[tsc,%d] ri %d out of range", __LINE__, ri)); 157 158 *msr = MSR_TSC; 159 160 return (0); 161 } 162 163 static int 164 tsc_pcpu_fini(struct pmc_mdep *md, int cpu) 165 { 166 int ri; 167 struct pmc_cpu *pc; 168 169 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 170 ("[tsc,%d] illegal cpu %d", __LINE__, cpu)); 171 KASSERT(tsc_pcpu[cpu] != NULL, ("[tsc,%d] null pcpu", __LINE__)); 172 173 free(tsc_pcpu[cpu], M_PMC); 174 tsc_pcpu[cpu] = NULL; 175 176 ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_TSC].pcd_ri; 177 178 pc = pmc_pcpu[cpu]; 179 pc->pc_hwpmcs[ri] = NULL; 180 181 return (0); 182 } 183 184 static int 185 tsc_pcpu_init(struct pmc_mdep *md, int cpu) 186 { 187 int ri; 188 struct pmc_cpu *pc; 189 struct tsc_cpu *tsc_pc; 190 191 192 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 193 ("[tsc,%d] illegal cpu %d", __LINE__, cpu)); 194 KASSERT(tsc_pcpu, ("[tsc,%d] null pcpu", __LINE__)); 195 KASSERT(tsc_pcpu[cpu] == NULL, ("[tsc,%d] non-null per-cpu", 196 __LINE__)); 197 198 tsc_pc = malloc(sizeof(struct tsc_cpu), M_PMC, M_WAITOK|M_ZERO); 199 200 tsc_pc->tc_hw.phw_state = PMC_PHW_FLAG_IS_ENABLED | 201 PMC_PHW_CPU_TO_STATE(cpu) | PMC_PHW_INDEX_TO_STATE(0) | 202 PMC_PHW_FLAG_IS_SHAREABLE; 203 204 tsc_pcpu[cpu] = tsc_pc; 205 206 ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_TSC].pcd_ri; 207 208 KASSERT(pmc_pcpu, ("[tsc,%d] null generic pcpu", __LINE__)); 209 210 pc = pmc_pcpu[cpu]; 211 212 KASSERT(pc, ("[tsc,%d] null generic per-cpu", __LINE__)); 213 214 pc->pc_hwpmcs[ri] = &tsc_pc->tc_hw; 215 216 return (0); 217 } 218 219 static int 220 tsc_read_pmc(int cpu, int ri, struct pmc *pm, pmc_value_t *v) 221 { 222 enum pmc_mode mode __diagused; 223 224 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 225 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu)); 226 KASSERT(ri == 0, ("[tsc,%d] illegal ri %d", __LINE__, ri)); 227 228 mode = PMC_TO_MODE(pm); 229 230 KASSERT(mode == PMC_MODE_SC, 231 ("[tsc,%d] illegal pmc mode %d", __LINE__, mode)); 232 233 PMCDBG1(MDP,REA,1,"tsc-read id=%d", ri); 234 235 *v = rdtsc(); 236 237 return (0); 238 } 239 240 static int 241 tsc_release_pmc(int cpu, int ri __diagused, struct pmc *pmc __unused) 242 { 243 struct pmc_hw *phw __diagused; 244 245 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 246 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu)); 247 KASSERT(ri == 0, 248 ("[tsc,%d] illegal row-index %d", __LINE__, ri)); 249 250 phw = &tsc_pcpu[cpu]->tc_hw; 251 252 KASSERT(phw->phw_pmc == NULL, 253 ("[tsc,%d] PHW pmc %p non-NULL", __LINE__, phw->phw_pmc)); 254 255 /* 256 * Nothing to do. 257 */ 258 return (0); 259 } 260 261 static int 262 tsc_start_pmc(int cpu __diagused, int ri __diagused, struct pmc *pm __unused) 263 { 264 265 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 266 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu)); 267 KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri)); 268 269 return (0); /* TSCs are always running. */ 270 } 271 272 static int 273 tsc_stop_pmc(int cpu __diagused, int ri __diagused, struct pmc *pm __unused) 274 { 275 276 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 277 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu)); 278 KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri)); 279 280 return (0); /* Cannot actually stop a TSC. */ 281 } 282 283 static int 284 tsc_write_pmc(int cpu __diagused, int ri __diagused, struct pmc *pm __unused, 285 pmc_value_t v __unused) 286 { 287 288 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 289 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu)); 290 KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri)); 291 292 /* 293 * The TSCs are used as timecounters by the kernel, so even 294 * though some i386 CPUs support writeable TSCs, we don't 295 * support writing changing TSC values through the HWPMC API. 296 */ 297 return (0); 298 } 299 300 int 301 pmc_tsc_initialize(struct pmc_mdep *md, int maxcpu) 302 { 303 struct pmc_classdep *pcd; 304 305 KASSERT(md != NULL, ("[tsc,%d] md is NULL", __LINE__)); 306 KASSERT(md->pmd_nclass >= 1, ("[tsc,%d] dubious md->nclass %d", 307 __LINE__, md->pmd_nclass)); 308 309 tsc_pcpu = malloc(sizeof(struct tsc_cpu *) * maxcpu, M_PMC, 310 M_ZERO|M_WAITOK); 311 312 pcd = &md->pmd_classdep[PMC_MDEP_CLASS_INDEX_TSC]; 313 314 pcd->pcd_caps = PMC_CAP_READ; 315 pcd->pcd_class = PMC_CLASS_TSC; 316 pcd->pcd_num = TSC_NPMCS; 317 pcd->pcd_ri = md->pmd_npmc; 318 pcd->pcd_width = 64; 319 320 pcd->pcd_allocate_pmc = tsc_allocate_pmc; 321 pcd->pcd_config_pmc = tsc_config_pmc; 322 pcd->pcd_describe = tsc_describe; 323 pcd->pcd_get_config = tsc_get_config; 324 pcd->pcd_get_msr = tsc_get_msr; 325 pcd->pcd_pcpu_init = tsc_pcpu_init; 326 pcd->pcd_pcpu_fini = tsc_pcpu_fini; 327 pcd->pcd_read_pmc = tsc_read_pmc; 328 pcd->pcd_release_pmc = tsc_release_pmc; 329 pcd->pcd_start_pmc = tsc_start_pmc; 330 pcd->pcd_stop_pmc = tsc_stop_pmc; 331 pcd->pcd_write_pmc = tsc_write_pmc; 332 333 md->pmd_npmc += TSC_NPMCS; 334 335 return (0); 336 } 337 338 void 339 pmc_tsc_finalize(struct pmc_mdep *md __diagused) 340 { 341 PMCDBG0(MDP, INI, 1, "tsc-finalize"); 342 343 for (int i = 0; i < pmc_cpu_max(); i++) 344 KASSERT(tsc_pcpu[i] == NULL, ("[tsc,%d] non-null pcpu cpu %d", 345 __LINE__, i)); 346 347 free(tsc_pcpu, M_PMC); 348 tsc_pcpu = NULL; 349 } 350