1 /* SPDX-License-Identifier: BSD-3-Clause */ 2 /* Copyright (c) 2022, Intel Corporation 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * 3. Neither the name of the Intel Corporation nor the names of its 16 * contributors may be used to endorse or promote products derived from 17 * this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 /*$FreeBSD$*/ 32 33 /** 34 * @file ice_lib.h 35 * @brief header for generic device and sysctl functions 36 * 37 * Contains definitions and function declarations for the ice_lib.c file. It 38 * does not depend on the iflib networking stack. 39 */ 40 41 #ifndef _ICE_LIB_H_ 42 #define _ICE_LIB_H_ 43 44 #include <sys/types.h> 45 #include <sys/bus.h> 46 #include <sys/rman.h> 47 #include <sys/socket.h> 48 #include <sys/sbuf.h> 49 #include <sys/sysctl.h> 50 #include <sys/syslog.h> 51 #include <sys/module.h> 52 #include <sys/proc.h> 53 54 #include <net/if.h> 55 #include <net/if_var.h> 56 #include <net/if_media.h> 57 #include <net/ethernet.h> 58 59 #include <sys/bitstring.h> 60 61 #include "ice_dcb.h" 62 #include "ice_type.h" 63 #include "ice_common.h" 64 #include "ice_flow.h" 65 #include "ice_sched.h" 66 #include "ice_resmgr.h" 67 68 #include "ice_rdma_internal.h" 69 70 #include "ice_rss.h" 71 72 /* Hide debug sysctls unless INVARIANTS is enabled */ 73 #ifdef INVARIANTS 74 #define ICE_CTLFLAG_DEBUG 0 75 #else 76 #define ICE_CTLFLAG_DEBUG CTLFLAG_SKIP 77 #endif 78 79 /** 80 * for_each_set_bit - For loop over each set bit in a bit string 81 * @bit: storage for the bit index 82 * @data: address of data block to loop over 83 * @nbits: maximum number of bits to loop over 84 * 85 * macro to create a for loop over a bit string, which runs the body once for 86 * each bit that is set in the string. The bit variable will be set to the 87 * index of each set bit in the string, with zero representing the first bit. 88 */ 89 #define for_each_set_bit(bit, data, nbits) \ 90 for (bit_ffs((bitstr_t *)(data), (nbits), &(bit)); \ 91 (bit) != -1; \ 92 bit_ffs_at((bitstr_t *)(data), (bit) + 1, (nbits), &(bit))) 93 94 /** 95 * @var broadcastaddr 96 * @brief broadcast MAC address 97 * 98 * constant defining the broadcast MAC address, used for programming the 99 * broadcast address as a MAC filter for the PF VSI. 100 */ 101 static const u8 broadcastaddr[ETHER_ADDR_LEN] = { 102 0xff, 0xff, 0xff, 0xff, 0xff, 0xff 103 }; 104 105 MALLOC_DECLARE(M_ICE); 106 107 extern const char ice_driver_version[]; 108 extern const uint8_t ice_major_version; 109 extern const uint8_t ice_minor_version; 110 extern const uint8_t ice_patch_version; 111 extern const uint8_t ice_rc_version; 112 113 /* global sysctl indicating whether the Tx FC filter should be enabled */ 114 extern bool ice_enable_tx_fc_filter; 115 116 /* global sysctl indicating whether the Tx LLDP filter should be enabled */ 117 extern bool ice_enable_tx_lldp_filter; 118 119 /* global sysctl indicating whether FW health status events should be enabled */ 120 extern bool ice_enable_health_events; 121 122 /* global sysctl indicating whether to enable 5-layer scheduler topology */ 123 extern bool ice_tx_balance_en; 124 125 /** 126 * @struct ice_bar_info 127 * @brief PCI BAR mapping information 128 * 129 * Contains data about a PCI BAR that the driver has mapped for use. 130 */ 131 struct ice_bar_info { 132 struct resource *res; 133 bus_space_tag_t tag; 134 bus_space_handle_t handle; 135 bus_size_t size; 136 int rid; 137 }; 138 139 /* Alignment for queues */ 140 #define DBA_ALIGN 128 141 142 /* Maximum TSO size is (256K)-1 */ 143 #define ICE_TSO_SIZE ((256*1024) - 1) 144 145 /* Minimum size for TSO MSS */ 146 #define ICE_MIN_TSO_MSS 64 147 148 #define ICE_MAX_TX_SEGS 8 149 #define ICE_MAX_TSO_SEGS 128 150 151 #define ICE_MAX_DMA_SEG_SIZE ((16*1024) - 1) 152 153 #define ICE_MAX_RX_SEGS 5 154 155 #define ICE_MAX_TSO_HDR_SEGS 3 156 157 #define ICE_MSIX_BAR 3 158 159 #define ICE_MAX_DCB_TCS 8 160 161 #define ICE_DEFAULT_DESC_COUNT 1024 162 #define ICE_MAX_DESC_COUNT 8160 163 #define ICE_MIN_DESC_COUNT 64 164 #define ICE_DESC_COUNT_INCR 32 165 166 /* List of hardware offloads we support */ 167 #define ICE_CSUM_OFFLOAD (CSUM_IP | CSUM_IP_TCP | CSUM_IP_UDP | CSUM_IP_SCTP | \ 168 CSUM_IP6_TCP| CSUM_IP6_UDP | CSUM_IP6_SCTP | \ 169 CSUM_IP_TSO | CSUM_IP6_TSO) 170 171 /* Macros to decide what kind of hardware offload to enable */ 172 #define ICE_CSUM_TCP (CSUM_IP_TCP|CSUM_IP_TSO|CSUM_IP6_TSO|CSUM_IP6_TCP) 173 #define ICE_CSUM_UDP (CSUM_IP_UDP|CSUM_IP6_UDP) 174 #define ICE_CSUM_SCTP (CSUM_IP_SCTP|CSUM_IP6_SCTP) 175 #define ICE_CSUM_IP (CSUM_IP|CSUM_IP_TSO) 176 177 /* List of known RX CSUM offload flags */ 178 #define ICE_RX_CSUM_FLAGS (CSUM_L3_CALC | CSUM_L3_VALID | CSUM_L4_CALC | \ 179 CSUM_L4_VALID | CSUM_L5_CALC | CSUM_L5_VALID | \ 180 CSUM_COALESCED) 181 182 /* List of interface capabilities supported by ice hardware */ 183 #define ICE_FULL_CAPS \ 184 (IFCAP_TSO4 | IFCAP_TSO6 | \ 185 IFCAP_TXCSUM | IFCAP_TXCSUM_IPV6 | \ 186 IFCAP_RXCSUM | IFCAP_RXCSUM_IPV6 | \ 187 IFCAP_VLAN_HWFILTER | IFCAP_VLAN_HWTSO | \ 188 IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_HWCSUM | IFCAP_VLAN_HWTSO | \ 189 IFCAP_VLAN_MTU | IFCAP_JUMBO_MTU | IFCAP_LRO) 190 191 /* Safe mode disables support for hardware checksums and TSO */ 192 #define ICE_SAFE_CAPS \ 193 (ICE_FULL_CAPS & ~(IFCAP_HWCSUM | IFCAP_TSO | \ 194 IFCAP_VLAN_HWTSO | IFCAP_VLAN_HWCSUM)) 195 196 #define ICE_CAPS(sc) \ 197 (ice_is_bit_set(sc->feat_en, ICE_FEATURE_SAFE_MODE) ? ICE_SAFE_CAPS : ICE_FULL_CAPS) 198 199 /** 200 * ICE_NVM_ACCESS 201 * @brief Private ioctl command number for NVM access ioctls 202 * 203 * The ioctl command number used by NVM update for accessing the driver for 204 * NVM access commands. 205 */ 206 #define ICE_NVM_ACCESS \ 207 (((((((('E' << 4) + '1') << 4) + 'K') << 4) + 'G') << 4) | 5) 208 209 /** 210 * ICE_DEBUG_DUMP 211 * @brief Private ioctl command number for retrieving debug dump data 212 * 213 * The ioctl command number used by a userspace tool for accessing the driver for 214 * getting debug dump data from the firmware. 215 */ 216 #define ICE_DEBUG_DUMP \ 217 (((((((('E' << 4) + '1') << 4) + 'K') << 4) + 'G') << 4) | 6) 218 219 #define ICE_AQ_LEN 1023 220 #define ICE_MBXQ_LEN 512 221 #define ICE_SBQ_LEN 512 222 223 #define ICE_CTRLQ_WORK_LIMIT 256 224 225 #define ICE_DFLT_TRAFFIC_CLASS BIT(0) 226 227 /* wait up to 50 microseconds for queue state change */ 228 #define ICE_Q_WAIT_RETRY_LIMIT 5 229 230 #define ICE_UP_TABLE_TRANSLATE(val, i) \ 231 (((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \ 232 ICE_AQ_VSI_UP_TABLE_UP##i##_M) 233 234 /* 235 * For now, set this to the hardware maximum. Each function gets a smaller 236 * number assigned to it in hw->func_caps.guar_num_vsi, though there 237 * appears to be no guarantee that is the maximum number that a function 238 * can use. 239 */ 240 #define ICE_MAX_VSI_AVAILABLE 768 241 242 /* Maximum size of a single frame (for Tx and Rx) */ 243 #define ICE_MAX_FRAME_SIZE ICE_AQ_SET_MAC_FRAME_SIZE_MAX 244 245 /* Maximum MTU size */ 246 #define ICE_MAX_MTU (ICE_MAX_FRAME_SIZE - \ 247 ETHER_HDR_LEN - ETHER_CRC_LEN - ETHER_VLAN_ENCAP_LEN) 248 249 /* 250 * Hardware requires that TSO packets have an segment size of at least 64 251 * bytes. To avoid sending bad frames to the hardware, the driver forces the 252 * MSS for all TSO packets to have a segment size of at least 64 bytes. 253 * 254 * However, if the MTU is reduced below a certain size, then the resulting 255 * larger MSS can result in transmitting segmented frames with a packet size 256 * larger than the MTU. 257 * 258 * Avoid this by preventing the MTU from being lowered below this limit. 259 * Alternative solutions require changing the TCP stack to disable offloading 260 * the segmentation when the requested segment size goes below 64 bytes. 261 */ 262 #define ICE_MIN_MTU 112 263 264 #define ICE_DEFAULT_VF_QUEUES 4 265 266 /* 267 * The maximum number of RX queues allowed per TC in a VSI. 268 */ 269 #define ICE_MAX_RXQS_PER_TC 256 270 271 /* 272 * There are three settings that can be updated independently or 273 * altogether: Link speed, FEC, and Flow Control. These macros allow 274 * the caller to specify which setting(s) to update. 275 */ 276 #define ICE_APPLY_LS BIT(0) 277 #define ICE_APPLY_FEC BIT(1) 278 #define ICE_APPLY_FC BIT(2) 279 #define ICE_APPLY_LS_FEC (ICE_APPLY_LS | ICE_APPLY_FEC) 280 #define ICE_APPLY_LS_FC (ICE_APPLY_LS | ICE_APPLY_FC) 281 #define ICE_APPLY_FEC_FC (ICE_APPLY_FEC | ICE_APPLY_FC) 282 #define ICE_APPLY_LS_FEC_FC (ICE_APPLY_LS_FEC | ICE_APPLY_FC) 283 284 /** 285 * @enum ice_dyn_idx_t 286 * @brief Dynamic Control ITR indexes 287 * 288 * This enum matches hardware bits and is meant to be used by DYN_CTLN 289 * registers and QINT registers or more generally anywhere in the manual 290 * mentioning ITR_INDX, ITR_NONE cannot be used as an index 'n' into any 291 * register but instead is a special value meaning "don't update" ITR0/1/2. 292 */ 293 enum ice_dyn_idx_t { 294 ICE_IDX_ITR0 = 0, 295 ICE_IDX_ITR1 = 1, 296 ICE_IDX_ITR2 = 2, 297 ICE_ITR_NONE = 3 /* ITR_NONE must not be used as an index */ 298 }; 299 300 /* By convenction ITR0 is used for RX, and ITR1 is used for TX */ 301 #define ICE_RX_ITR ICE_IDX_ITR0 302 #define ICE_TX_ITR ICE_IDX_ITR1 303 304 #define ICE_ITR_MAX 8160 305 306 /* Define the default Tx and Rx ITR as 50us (translates to ~20k int/sec max) */ 307 #define ICE_DFLT_TX_ITR 50 308 #define ICE_DFLT_RX_ITR 50 309 310 /** 311 * ice_itr_to_reg - Convert an ITR setting into its register equivalent 312 * @hw: The device HW structure 313 * @itr_setting: the ITR setting to convert 314 * 315 * Based on the hardware ITR granularity, convert an ITR setting into the 316 * correct value to prepare programming to the HW. 317 */ 318 static inline u16 ice_itr_to_reg(struct ice_hw *hw, u16 itr_setting) 319 { 320 return itr_setting / hw->itr_gran; 321 } 322 323 /** 324 * @enum ice_rx_dtype 325 * @brief DTYPE header split options 326 * 327 * This enum matches the Rx context bits to define whether header split is 328 * enabled or not. 329 */ 330 enum ice_rx_dtype { 331 ICE_RX_DTYPE_NO_SPLIT = 0, 332 ICE_RX_DTYPE_HEADER_SPLIT = 1, 333 ICE_RX_DTYPE_SPLIT_ALWAYS = 2, 334 }; 335 336 /* Strings used for displaying FEC mode 337 * 338 * Use ice_fec_str() to get these unless these need to be embedded in a 339 * string constant. 340 */ 341 #define ICE_FEC_STRING_AUTO "Auto" 342 #define ICE_FEC_STRING_RS "RS-FEC" 343 #define ICE_FEC_STRING_BASER "FC-FEC/BASE-R" 344 #define ICE_FEC_STRING_NONE "None" 345 #define ICE_FEC_STRING_DIS_AUTO "Auto (w/ No-FEC)" 346 347 /* Strings used for displaying Flow Control mode 348 * 349 * Use ice_fc_str() to get these unless these need to be embedded in a 350 * string constant. 351 */ 352 #define ICE_FC_STRING_FULL "Full" 353 #define ICE_FC_STRING_TX "Tx" 354 #define ICE_FC_STRING_RX "Rx" 355 #define ICE_FC_STRING_NONE "None" 356 357 /* 358 * The number of times the ice_handle_i2c_req function will retry reading 359 * I2C data via the Admin Queue before returning EBUSY. 360 */ 361 #define ICE_I2C_MAX_RETRIES 10 362 363 /* 364 * The Start LLDP Agent AQ command will fail if it's sent too soon after 365 * the LLDP agent is stopped. The period between the stop and start 366 * commands must currently be at least 2 seconds. 367 */ 368 #define ICE_START_LLDP_RETRY_WAIT (2 * hz) 369 370 /* 371 * The ice_(set|clear)_vsi_promisc() function expects a mask of promiscuous 372 * modes to operate on. This mask is the default one for the driver, where 373 * promiscuous is enabled/disabled for all types of non-VLAN-tagged/VLAN 0 374 * traffic. 375 */ 376 #define ICE_VSI_PROMISC_MASK (ICE_PROMISC_UCAST_TX | \ 377 ICE_PROMISC_UCAST_RX | \ 378 ICE_PROMISC_MCAST_TX | \ 379 ICE_PROMISC_MCAST_RX) 380 381 /* 382 * Only certain cluster IDs are valid for the FW debug dump functionality, 383 * so define a mask of those here. 384 */ 385 #define ICE_FW_DEBUG_DUMP_VALID_CLUSTER_MASK 0x1af 386 387 struct ice_softc; 388 389 /** 390 * @enum ice_rx_cso_stat 391 * @brief software checksum offload statistics 392 * 393 * Enumeration of possible checksum offload statistics captured by software 394 * during the Rx path. 395 */ 396 enum ice_rx_cso_stat { 397 ICE_CSO_STAT_RX_IP4_ERR, 398 ICE_CSO_STAT_RX_IP6_ERR, 399 ICE_CSO_STAT_RX_L3_ERR, 400 ICE_CSO_STAT_RX_TCP_ERR, 401 ICE_CSO_STAT_RX_UDP_ERR, 402 ICE_CSO_STAT_RX_SCTP_ERR, 403 ICE_CSO_STAT_RX_L4_ERR, 404 ICE_CSO_STAT_RX_COUNT 405 }; 406 407 /** 408 * @enum ice_tx_cso_stat 409 * @brief software checksum offload statistics 410 * 411 * Enumeration of possible checksum offload statistics captured by software 412 * during the Tx path. 413 */ 414 enum ice_tx_cso_stat { 415 ICE_CSO_STAT_TX_TCP, 416 ICE_CSO_STAT_TX_UDP, 417 ICE_CSO_STAT_TX_SCTP, 418 ICE_CSO_STAT_TX_IP4, 419 ICE_CSO_STAT_TX_IP6, 420 ICE_CSO_STAT_TX_L3_ERR, 421 ICE_CSO_STAT_TX_L4_ERR, 422 ICE_CSO_STAT_TX_COUNT 423 }; 424 425 /** 426 * @struct tx_stats 427 * @brief software Tx statistics 428 * 429 * Contains software counted Tx statistics for a single queue 430 */ 431 struct tx_stats { 432 /* Soft Stats */ 433 u64 tx_bytes; 434 u64 tx_packets; 435 u64 mss_too_small; 436 u64 cso[ICE_CSO_STAT_TX_COUNT]; 437 }; 438 439 /** 440 * @struct rx_stats 441 * @brief software Rx statistics 442 * 443 * Contains software counted Rx statistics for a single queue 444 */ 445 struct rx_stats { 446 /* Soft Stats */ 447 u64 rx_packets; 448 u64 rx_bytes; 449 u64 desc_errs; 450 u64 cso[ICE_CSO_STAT_RX_COUNT]; 451 }; 452 453 /** 454 * @struct ice_vsi_hw_stats 455 * @brief hardware statistics for a VSI 456 * 457 * Stores statistics that are generated by hardware for a VSI. 458 */ 459 struct ice_vsi_hw_stats { 460 struct ice_eth_stats prev; 461 struct ice_eth_stats cur; 462 bool offsets_loaded; 463 }; 464 465 /** 466 * @struct ice_pf_hw_stats 467 * @brief hardware statistics for a PF 468 * 469 * Stores statistics that are generated by hardware for each PF. 470 */ 471 struct ice_pf_hw_stats { 472 struct ice_hw_port_stats prev; 473 struct ice_hw_port_stats cur; 474 bool offsets_loaded; 475 }; 476 477 /** 478 * @struct ice_pf_sw_stats 479 * @brief software statistics for a PF 480 * 481 * Contains software generated statistics relevant to a PF. 482 */ 483 struct ice_pf_sw_stats { 484 /* # of reset events handled, by type */ 485 u32 corer_count; 486 u32 globr_count; 487 u32 empr_count; 488 u32 pfr_count; 489 490 /* # of detected MDD events for Tx and Rx */ 491 u32 tx_mdd_count; 492 u32 rx_mdd_count; 493 }; 494 495 /** 496 * @struct ice_tc_info 497 * @brief Traffic class information for a VSI 498 * 499 * Stores traffic class information used in configuring 500 * a VSI. 501 */ 502 struct ice_tc_info { 503 u16 qoffset; /* Offset in VSI queue space */ 504 u16 qcount_tx; /* TX queues for this Traffic Class */ 505 u16 qcount_rx; /* RX queues */ 506 }; 507 508 /** 509 * @struct ice_vsi 510 * @brief VSI structure 511 * 512 * Contains data relevant to a single VSI 513 */ 514 struct ice_vsi { 515 /* back pointer to the softc */ 516 struct ice_softc *sc; 517 518 bool dynamic; /* if true, dynamically allocated */ 519 520 enum ice_vsi_type type; /* type of this VSI */ 521 u16 idx; /* software index to sc->all_vsi[] */ 522 523 u16 *tx_qmap; /* Tx VSI to PF queue mapping */ 524 u16 *rx_qmap; /* Rx VSI to PF queue mapping */ 525 526 bitstr_t *vmap; /* Vector(s) assigned to VSI */ 527 528 enum ice_resmgr_alloc_type qmap_type; 529 530 struct ice_tx_queue *tx_queues; /* Tx queue array */ 531 struct ice_rx_queue *rx_queues; /* Rx queue array */ 532 533 int num_tx_queues; 534 int num_rx_queues; 535 int num_vectors; 536 537 int16_t rx_itr; 538 int16_t tx_itr; 539 540 /* RSS configuration */ 541 u16 rss_table_size; /* HW RSS table size */ 542 u8 rss_lut_type; /* Used to configure Get/Set RSS LUT AQ call */ 543 544 int max_frame_size; 545 u16 mbuf_sz; 546 547 struct ice_aqc_vsi_props info; 548 549 /* DCB configuration */ 550 u8 num_tcs; /* Total number of enabled TCs */ 551 u16 tc_map; /* bitmap of enabled Traffic Classes */ 552 /* Information for each traffic class */ 553 struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS]; 554 555 /* context for per-VSI sysctls */ 556 struct sysctl_ctx_list ctx; 557 struct sysctl_oid *vsi_node; 558 559 /* context for per-txq sysctls */ 560 struct sysctl_ctx_list txqs_ctx; 561 struct sysctl_oid *txqs_node; 562 563 /* context for per-rxq sysctls */ 564 struct sysctl_ctx_list rxqs_ctx; 565 struct sysctl_oid *rxqs_node; 566 567 /* VSI-level stats */ 568 struct ice_vsi_hw_stats hw_stats; 569 }; 570 571 /** 572 * @struct ice_debug_dump_cmd 573 * @brief arguments/return value for debug dump ioctl 574 */ 575 struct ice_debug_dump_cmd { 576 u32 offset; /* offset to read/write from table, in bytes */ 577 u16 cluster_id; 578 u16 table_id; 579 u16 data_size; /* size of data field, in bytes */ 580 u16 reserved1; 581 u32 reserved2; 582 u8 data[]; 583 }; 584 585 /** 586 * @enum ice_state 587 * @brief Driver state flags 588 * 589 * Used to indicate the status of various driver events. Intended to be 590 * modified only using atomic operations, so that we can use it even in places 591 * which aren't locked. 592 */ 593 enum ice_state { 594 ICE_STATE_CONTROLQ_EVENT_PENDING, 595 ICE_STATE_VFLR_PENDING, 596 ICE_STATE_MDD_PENDING, 597 ICE_STATE_RESET_OICR_RECV, 598 ICE_STATE_RESET_PFR_REQ, 599 ICE_STATE_PREPARED_FOR_RESET, 600 ICE_STATE_RESET_FAILED, 601 ICE_STATE_DRIVER_INITIALIZED, 602 ICE_STATE_NO_MEDIA, 603 ICE_STATE_RECOVERY_MODE, 604 ICE_STATE_ROLLBACK_MODE, 605 ICE_STATE_LINK_STATUS_REPORTED, 606 ICE_STATE_ATTACHING, 607 ICE_STATE_DETACHING, 608 ICE_STATE_LINK_DEFAULT_OVERRIDE_PENDING, 609 ICE_STATE_LLDP_RX_FLTR_FROM_DRIVER, 610 ICE_STATE_MULTIPLE_TCS, 611 ICE_STATE_DO_FW_DEBUG_DUMP, 612 /* This entry must be last */ 613 ICE_STATE_LAST, 614 }; 615 616 /* Functions for setting and checking driver state. Note the functions take 617 * bit positions, not bitmasks. The atomic_testandset_32 and 618 * atomic_testandclear_32 operations require bit positions, while the 619 * atomic_set_32 and atomic_clear_32 require bitmasks. This can easily lead to 620 * programming error, so we provide wrapper functions to avoid this. 621 */ 622 623 /** 624 * ice_set_state - Set the specified state 625 * @s: the state bitmap 626 * @bit: the state to set 627 * 628 * Atomically update the state bitmap with the specified bit set. 629 */ 630 static inline void 631 ice_set_state(volatile u32 *s, enum ice_state bit) 632 { 633 /* atomic_set_32 expects a bitmask */ 634 atomic_set_32(s, BIT(bit)); 635 } 636 637 /** 638 * ice_clear_state - Clear the specified state 639 * @s: the state bitmap 640 * @bit: the state to clear 641 * 642 * Atomically update the state bitmap with the specified bit cleared. 643 */ 644 static inline void 645 ice_clear_state(volatile u32 *s, enum ice_state bit) 646 { 647 /* atomic_clear_32 expects a bitmask */ 648 atomic_clear_32(s, BIT(bit)); 649 } 650 651 /** 652 * ice_testandset_state - Test and set the specified state 653 * @s: the state bitmap 654 * @bit: the bit to test 655 * 656 * Atomically update the state bitmap, setting the specified bit. Returns the 657 * previous value of the bit. 658 */ 659 static inline u32 660 ice_testandset_state(volatile u32 *s, enum ice_state bit) 661 { 662 /* atomic_testandset_32 expects a bit position */ 663 return atomic_testandset_32(s, bit); 664 } 665 666 /** 667 * ice_testandclear_state - Test and clear the specified state 668 * @s: the state bitmap 669 * @bit: the bit to test 670 * 671 * Atomically update the state bitmap, clearing the specified bit. Returns the 672 * previous value of the bit. 673 */ 674 static inline u32 675 ice_testandclear_state(volatile u32 *s, enum ice_state bit) 676 { 677 /* atomic_testandclear_32 expects a bit position */ 678 return atomic_testandclear_32(s, bit); 679 } 680 681 /** 682 * ice_test_state - Test the specified state 683 * @s: the state bitmap 684 * @bit: the bit to test 685 * 686 * Return true if the state is set, false otherwise. Use this only if the flow 687 * does not need to update the state. If you must update the state as well, 688 * prefer ice_testandset_state or ice_testandclear_state. 689 */ 690 static inline u32 691 ice_test_state(volatile u32 *s, enum ice_state bit) 692 { 693 return (*s & BIT(bit)) ? true : false; 694 } 695 696 /** 697 * @struct ice_str_buf 698 * @brief static length buffer for string returning 699 * 700 * Structure containing a fixed size string buffer, used to implement 701 * numeric->string conversion functions that may want to return non-constant 702 * strings. 703 * 704 * This allows returning a fixed size string that is generated by a conversion 705 * function, and then copied to the used location without needing to use an 706 * explicit local variable passed by reference. 707 */ 708 struct ice_str_buf { 709 char str[ICE_STR_BUF_LEN]; 710 }; 711 712 struct ice_str_buf _ice_aq_str(enum ice_aq_err aq_err); 713 struct ice_str_buf _ice_status_str(enum ice_status status); 714 struct ice_str_buf _ice_err_str(int err); 715 struct ice_str_buf _ice_fltr_flag_str(u16 flag); 716 struct ice_str_buf _ice_log_sev_str(u8 log_level); 717 struct ice_str_buf _ice_mdd_tx_tclan_str(u8 event); 718 struct ice_str_buf _ice_mdd_tx_pqm_str(u8 event); 719 struct ice_str_buf _ice_mdd_rx_str(u8 event); 720 struct ice_str_buf _ice_fw_lldp_status(u32 lldp_status); 721 722 #define ice_aq_str(err) _ice_aq_str(err).str 723 #define ice_status_str(err) _ice_status_str(err).str 724 #define ice_err_str(err) _ice_err_str(err).str 725 #define ice_fltr_flag_str(flag) _ice_fltr_flag_str(flag).str 726 727 #define ice_mdd_tx_tclan_str(event) _ice_mdd_tx_tclan_str(event).str 728 #define ice_mdd_tx_pqm_str(event) _ice_mdd_tx_pqm_str(event).str 729 #define ice_mdd_rx_str(event) _ice_mdd_rx_str(event).str 730 731 #define ice_log_sev_str(log_level) _ice_log_sev_str(log_level).str 732 #define ice_fw_lldp_status(lldp_status) _ice_fw_lldp_status(lldp_status).str 733 734 /** 735 * ice_enable_intr - Enable interrupts for given vector 736 * @hw: the device private HW structure 737 * @vector: the interrupt index in PF space 738 * 739 * In MSI or Legacy interrupt mode, interrupt 0 is the only valid index. 740 */ 741 static inline void 742 ice_enable_intr(struct ice_hw *hw, int vector) 743 { 744 u32 dyn_ctl; 745 746 /* Use ITR_NONE so that ITR configuration is not changed. */ 747 dyn_ctl = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M | 748 (ICE_ITR_NONE << GLINT_DYN_CTL_ITR_INDX_S); 749 wr32(hw, GLINT_DYN_CTL(vector), dyn_ctl); 750 } 751 752 /** 753 * ice_disable_intr - Disable interrupts for given vector 754 * @hw: the device private HW structure 755 * @vector: the interrupt index in PF space 756 * 757 * In MSI or Legacy interrupt mode, interrupt 0 is the only valid index. 758 */ 759 static inline void 760 ice_disable_intr(struct ice_hw *hw, int vector) 761 { 762 u32 dyn_ctl; 763 764 /* Use ITR_NONE so that ITR configuration is not changed. */ 765 dyn_ctl = ICE_ITR_NONE << GLINT_DYN_CTL_ITR_INDX_S; 766 wr32(hw, GLINT_DYN_CTL(vector), dyn_ctl); 767 } 768 769 /** 770 * ice_is_tx_desc_done - determine if a Tx descriptor is done 771 * @txd: the Tx descriptor to check 772 * 773 * Returns true if hardware is done with a Tx descriptor and software is 774 * capable of re-using it. 775 */ 776 static inline bool 777 ice_is_tx_desc_done(struct ice_tx_desc *txd) 778 { 779 return (((txd->cmd_type_offset_bsz & ICE_TXD_QW1_DTYPE_M) 780 >> ICE_TXD_QW1_DTYPE_S) == ICE_TX_DESC_DTYPE_DESC_DONE); 781 } 782 783 /** 784 * ice_get_pf_id - Get the PF id from the hardware registers 785 * @hw: the ice hardware structure 786 * 787 * Reads the PF_FUNC_RID register and extracts the function number from it. 788 * Intended to be used in cases where hw->pf_id hasn't yet been assigned by 789 * ice_init_hw. 790 * 791 * @pre this function should be called only after PCI register access has been 792 * setup, and prior to ice_init_hw. After hardware has been initialized, the 793 * cached hw->pf_id value can be used. 794 */ 795 static inline u8 796 ice_get_pf_id(struct ice_hw *hw) 797 { 798 return (u8)((rd32(hw, PF_FUNC_RID) & PF_FUNC_RID_FUNCTION_NUMBER_M) >> 799 PF_FUNC_RID_FUNCTION_NUMBER_S); 800 } 801 802 /* Details of how to re-initialize depend on the networking stack */ 803 void ice_request_stack_reinit(struct ice_softc *sc); 804 805 /* Details of how to check if the network stack is detaching us */ 806 bool ice_driver_is_detaching(struct ice_softc *sc); 807 808 const char * ice_fw_module_str(enum ice_aqc_fw_logging_mod module); 809 void ice_add_fw_logging_tunables(struct ice_softc *sc, 810 struct sysctl_oid *parent); 811 void ice_handle_fw_log_event(struct ice_softc *sc, struct ice_aq_desc *desc, 812 void *buf); 813 814 int ice_process_ctrlq(struct ice_softc *sc, enum ice_ctl_q q_type, u16 *pending); 815 int ice_map_bar(device_t dev, struct ice_bar_info *bar, int bar_num); 816 void ice_free_bar(device_t dev, struct ice_bar_info *bar); 817 void ice_set_ctrlq_len(struct ice_hw *hw); 818 void ice_release_vsi(struct ice_vsi *vsi); 819 struct ice_vsi *ice_alloc_vsi(struct ice_softc *sc, enum ice_vsi_type type); 820 int ice_alloc_vsi_qmap(struct ice_vsi *vsi, const int max_tx_queues, 821 const int max_rx_queues); 822 void ice_free_vsi_qmaps(struct ice_vsi *vsi); 823 int ice_initialize_vsi(struct ice_vsi *vsi); 824 void ice_deinit_vsi(struct ice_vsi *vsi); 825 uint64_t ice_aq_speed_to_rate(struct ice_port_info *pi); 826 int ice_get_phy_type_low(uint64_t phy_type_low); 827 int ice_get_phy_type_high(uint64_t phy_type_high); 828 enum ice_status ice_add_media_types(struct ice_softc *sc, struct ifmedia *media); 829 void ice_configure_rxq_interrupts(struct ice_vsi *vsi); 830 void ice_configure_txq_interrupts(struct ice_vsi *vsi); 831 void ice_flush_rxq_interrupts(struct ice_vsi *vsi); 832 void ice_flush_txq_interrupts(struct ice_vsi *vsi); 833 int ice_cfg_vsi_for_tx(struct ice_vsi *vsi); 834 int ice_cfg_vsi_for_rx(struct ice_vsi *vsi); 835 int ice_control_rx_queues(struct ice_vsi *vsi, bool enable); 836 int ice_cfg_pf_default_mac_filters(struct ice_softc *sc); 837 int ice_rm_pf_default_mac_filters(struct ice_softc *sc); 838 void ice_print_nvm_version(struct ice_softc *sc); 839 void ice_update_vsi_hw_stats(struct ice_vsi *vsi); 840 void ice_reset_vsi_stats(struct ice_vsi *vsi); 841 void ice_update_pf_stats(struct ice_softc *sc); 842 void ice_reset_pf_stats(struct ice_softc *sc); 843 void ice_add_device_sysctls(struct ice_softc *sc); 844 void ice_log_hmc_error(struct ice_hw *hw, device_t dev); 845 void ice_add_sysctls_eth_stats(struct sysctl_ctx_list *ctx, 846 struct sysctl_oid *parent, 847 struct ice_eth_stats *stats); 848 void ice_add_vsi_sysctls(struct ice_vsi *vsi); 849 void ice_add_sysctls_mac_stats(struct sysctl_ctx_list *ctx, 850 struct sysctl_oid *parent, 851 struct ice_hw_port_stats *stats); 852 void ice_configure_misc_interrupts(struct ice_softc *sc); 853 int ice_sync_multicast_filters(struct ice_softc *sc); 854 enum ice_status ice_add_vlan_hw_filter(struct ice_vsi *vsi, u16 vid); 855 enum ice_status ice_remove_vlan_hw_filter(struct ice_vsi *vsi, u16 vid); 856 void ice_add_vsi_tunables(struct ice_vsi *vsi, struct sysctl_oid *parent); 857 void ice_del_vsi_sysctl_ctx(struct ice_vsi *vsi); 858 void ice_add_device_tunables(struct ice_softc *sc); 859 int ice_add_vsi_mac_filter(struct ice_vsi *vsi, const u8 *addr); 860 int ice_remove_vsi_mac_filter(struct ice_vsi *vsi, const u8 *addr); 861 int ice_vsi_disable_tx(struct ice_vsi *vsi); 862 void ice_vsi_add_txqs_ctx(struct ice_vsi *vsi); 863 void ice_vsi_add_rxqs_ctx(struct ice_vsi *vsi); 864 void ice_vsi_del_txqs_ctx(struct ice_vsi *vsi); 865 void ice_vsi_del_rxqs_ctx(struct ice_vsi *vsi); 866 void ice_add_txq_sysctls(struct ice_tx_queue *txq); 867 void ice_add_rxq_sysctls(struct ice_rx_queue *rxq); 868 int ice_config_rss(struct ice_vsi *vsi); 869 void ice_clean_all_vsi_rss_cfg(struct ice_softc *sc); 870 enum ice_status ice_load_pkg_file(struct ice_softc *sc); 871 void ice_log_pkg_init(struct ice_softc *sc, enum ice_ddp_state pkg_status); 872 uint64_t ice_get_ifnet_counter(struct ice_vsi *vsi, ift_counter counter); 873 void ice_save_pci_info(struct ice_hw *hw, device_t dev); 874 int ice_replay_all_vsi_cfg(struct ice_softc *sc); 875 void ice_link_up_msg(struct ice_softc *sc); 876 int ice_update_laa_mac(struct ice_softc *sc); 877 void ice_get_and_print_bus_info(struct ice_softc *sc); 878 const char *ice_fec_str(enum ice_fec_mode mode); 879 const char *ice_fc_str(enum ice_fc_mode mode); 880 const char *ice_fwd_act_str(enum ice_sw_fwd_act_type action); 881 const char *ice_state_to_str(enum ice_state state); 882 int ice_init_link_events(struct ice_softc *sc); 883 void ice_configure_rx_itr(struct ice_vsi *vsi); 884 void ice_configure_tx_itr(struct ice_vsi *vsi); 885 void ice_setup_pf_vsi(struct ice_softc *sc); 886 void ice_handle_mdd_event(struct ice_softc *sc); 887 void ice_init_dcb_setup(struct ice_softc *sc); 888 int ice_send_version(struct ice_softc *sc); 889 int ice_cfg_pf_ethertype_filters(struct ice_softc *sc); 890 void ice_init_link_configuration(struct ice_softc *sc); 891 void ice_init_saved_phy_cfg(struct ice_softc *sc); 892 int ice_apply_saved_phy_cfg(struct ice_softc *sc, u8 settings); 893 void ice_set_link_management_mode(struct ice_softc *sc); 894 int ice_module_event_handler(module_t mod, int what, void *arg); 895 int ice_handle_nvm_access_ioctl(struct ice_softc *sc, struct ifdrv *ifd); 896 int ice_handle_i2c_req(struct ice_softc *sc, struct ifi2creq *req); 897 int ice_read_sff_eeprom(struct ice_softc *sc, u16 dev_addr, u16 offset, u8* data, u16 length); 898 int ice_alloc_intr_tracking(struct ice_softc *sc); 899 void ice_free_intr_tracking(struct ice_softc *sc); 900 void ice_set_default_local_lldp_mib(struct ice_softc *sc); 901 void ice_init_health_events(struct ice_softc *sc); 902 void ice_cfg_pba_num(struct ice_softc *sc); 903 int ice_handle_debug_dump_ioctl(struct ice_softc *sc, struct ifdrv *ifd); 904 u8 ice_dcb_get_tc_map(const struct ice_dcbx_cfg *dcbcfg); 905 906 #endif /* _ICE_LIB_H_ */ 907