1 /*- 2 * ichsmb_pci.c 3 * 4 * Author: Archie Cobbs <archie@freebsd.org> 5 * Copyright (c) 2000 Whistle Communications, Inc. 6 * All rights reserved. 7 * Author: Archie Cobbs <archie@freebsd.org> 8 * 9 * Subject to the following obligations and disclaimer of warranty, use and 10 * redistribution of this software, in source or object code forms, with or 11 * without modifications are expressly permitted by Whistle Communications; 12 * provided, however, that: 13 * 1. Any and all reproductions of the source or object code must include the 14 * copyright notice above and the following disclaimer of warranties; and 15 * 2. No rights are granted, in any manner or form, to use Whistle 16 * Communications, Inc. trademarks, including the mark "WHISTLE 17 * COMMUNICATIONS" on advertising, endorsements, or otherwise except as 18 * such appears in the above copyright notice or in the software. 19 * 20 * THIS SOFTWARE IS BEING PROVIDED BY WHISTLE COMMUNICATIONS "AS IS", AND 21 * TO THE MAXIMUM EXTENT PERMITTED BY LAW, WHISTLE COMMUNICATIONS MAKES NO 22 * REPRESENTATIONS OR WARRANTIES, EXPRESS OR IMPLIED, REGARDING THIS SOFTWARE, 23 * INCLUDING WITHOUT LIMITATION, ANY AND ALL IMPLIED WARRANTIES OF 24 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. 25 * WHISTLE COMMUNICATIONS DOES NOT WARRANT, GUARANTEE, OR MAKE ANY 26 * REPRESENTATIONS REGARDING THE USE OF, OR THE RESULTS OF THE USE OF THIS 27 * SOFTWARE IN TERMS OF ITS CORRECTNESS, ACCURACY, RELIABILITY OR OTHERWISE. 28 * IN NO EVENT SHALL WHISTLE COMMUNICATIONS BE LIABLE FOR ANY DAMAGES 29 * RESULTING FROM OR ARISING OUT OF ANY USE OF THIS SOFTWARE, INCLUDING 30 * WITHOUT LIMITATION, ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, 31 * PUNITIVE, OR CONSEQUENTIAL DAMAGES, PROCUREMENT OF SUBSTITUTE GOODS OR 32 * SERVICES, LOSS OF USE, DATA OR PROFITS, HOWEVER CAUSED AND UNDER ANY 33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 35 * THIS SOFTWARE, EVEN IF WHISTLE COMMUNICATIONS IS ADVISED OF THE POSSIBILITY 36 * OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> 40 __FBSDID("$FreeBSD$"); 41 42 /* 43 * Support for the SMBus controller logical device which is part of the 44 * Intel 81801AA/AB/BA/CA/DC/EB (ICH/ICH[02345]) I/O controller hub chips. 45 */ 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/kernel.h> 50 #include <sys/module.h> 51 #include <sys/errno.h> 52 #include <sys/lock.h> 53 #include <sys/mutex.h> 54 #include <sys/syslog.h> 55 #include <sys/bus.h> 56 57 #include <machine/bus.h> 58 #include <sys/rman.h> 59 #include <machine/resource.h> 60 61 #include <dev/pci/pcivar.h> 62 #include <dev/pci/pcireg.h> 63 64 #include <dev/smbus/smbconf.h> 65 66 #include <dev/ichsmb/ichsmb_var.h> 67 #include <dev/ichsmb/ichsmb_reg.h> 68 69 /* PCI unique identifiers */ 70 #define ID_82801AA 0x24138086 71 #define ID_82801AB 0x24238086 72 #define ID_82801BA 0x24438086 73 #define ID_82801CA 0x24838086 74 #define ID_82801DC 0x24C38086 75 #define ID_82801EB 0x24D38086 76 #define ID_82801FB 0x266A8086 77 #define ID_82801GB 0x27da8086 78 #define ID_82801H 0x283e8086 79 #define ID_82801I 0x29308086 80 #define ID_82801JI 0x3a308086 81 #define ID_PCH 0x3b308086 82 #define ID_6300ESB 0x25a48086 83 #define ID_631xESB 0x269b8086 84 #define ID_DH89XXCC 0x23308086 85 #define ID_PATSBURG 0x1d228086 86 #define ID_CPT 0x1c228086 87 #define ID_PPT 0x1e228086 88 #define ID_AVOTON 0x1f3c8086 89 #define ID_COLETOCRK 0x23B08086 90 #define ID_LPT 0x8c228086 91 #define ID_LPTLP 0x9c228086 92 #define ID_WCPT 0x8ca28086 93 #define ID_WCPTLP 0x9ca28086 94 #define ID_WELLSBURG 0x8d228086 95 #define ID_SRPT 0xa1238086 96 #define ID_SRPTLP 0x9d238086 97 98 #define PCIS_SERIALBUS_SMBUS_PROGIF 0x00 99 100 /* Internal functions */ 101 static int ichsmb_pci_probe(device_t dev); 102 static int ichsmb_pci_attach(device_t dev); 103 /*Use generic one for now*/ 104 #if 0 105 static int ichsmb_pci_detach(device_t dev); 106 #endif 107 108 /* Device methods */ 109 static device_method_t ichsmb_pci_methods[] = { 110 /* Device interface */ 111 DEVMETHOD(device_probe, ichsmb_pci_probe), 112 DEVMETHOD(device_attach, ichsmb_pci_attach), 113 DEVMETHOD(device_detach, ichsmb_detach), 114 115 /* SMBus methods */ 116 DEVMETHOD(smbus_callback, ichsmb_callback), 117 DEVMETHOD(smbus_quick, ichsmb_quick), 118 DEVMETHOD(smbus_sendb, ichsmb_sendb), 119 DEVMETHOD(smbus_recvb, ichsmb_recvb), 120 DEVMETHOD(smbus_writeb, ichsmb_writeb), 121 DEVMETHOD(smbus_writew, ichsmb_writew), 122 DEVMETHOD(smbus_readb, ichsmb_readb), 123 DEVMETHOD(smbus_readw, ichsmb_readw), 124 DEVMETHOD(smbus_pcall, ichsmb_pcall), 125 DEVMETHOD(smbus_bwrite, ichsmb_bwrite), 126 DEVMETHOD(smbus_bread, ichsmb_bread), 127 128 DEVMETHOD_END 129 }; 130 131 static driver_t ichsmb_pci_driver = { 132 "ichsmb", 133 ichsmb_pci_methods, 134 sizeof(struct ichsmb_softc) 135 }; 136 137 static devclass_t ichsmb_pci_devclass; 138 139 DRIVER_MODULE(ichsmb, pci, ichsmb_pci_driver, ichsmb_pci_devclass, 0, 0); 140 141 static int 142 ichsmb_pci_probe(device_t dev) 143 { 144 /* Check PCI identifier */ 145 switch (pci_get_devid(dev)) { 146 case ID_82801AA: 147 device_set_desc(dev, "Intel 82801AA (ICH) SMBus controller"); 148 break; 149 case ID_82801AB: 150 device_set_desc(dev, "Intel 82801AB (ICH0) SMBus controller"); 151 break; 152 case ID_82801BA: 153 device_set_desc(dev, "Intel 82801BA (ICH2) SMBus controller"); 154 break; 155 case ID_82801CA: 156 device_set_desc(dev, "Intel 82801CA (ICH3) SMBus controller"); 157 break; 158 case ID_82801DC: 159 device_set_desc(dev, "Intel 82801DC (ICH4) SMBus controller"); 160 break; 161 case ID_82801EB: 162 device_set_desc(dev, "Intel 82801EB (ICH5) SMBus controller"); 163 break; 164 case ID_82801FB: 165 device_set_desc(dev, "Intel 82801FB (ICH6) SMBus controller"); 166 break; 167 case ID_82801GB: 168 device_set_desc(dev, "Intel 82801GB (ICH7) SMBus controller"); 169 break; 170 case ID_82801H: 171 device_set_desc(dev, "Intel 82801H (ICH8) SMBus controller"); 172 break; 173 case ID_82801I: 174 device_set_desc(dev, "Intel 82801I (ICH9) SMBus controller"); 175 break; 176 case ID_82801JI: 177 device_set_desc(dev, "Intel 82801JI (ICH10) SMBus controller"); 178 break; 179 case ID_PCH: 180 device_set_desc(dev, "Intel PCH SMBus controller"); 181 break; 182 case ID_6300ESB: 183 device_set_desc(dev, "Intel 6300ESB (ICH) SMBus controller"); 184 break; 185 case ID_631xESB: 186 device_set_desc(dev, "Intel 631xESB/6321ESB (ESB2) SMBus controller"); 187 break; 188 case ID_DH89XXCC: 189 device_set_desc(dev, "Intel DH89xxCC SMBus controller"); 190 break; 191 case ID_PATSBURG: 192 device_set_desc(dev, "Intel Patsburg SMBus controller"); 193 break; 194 case ID_CPT: 195 device_set_desc(dev, "Intel Cougar Point SMBus controller"); 196 break; 197 case ID_PPT: 198 device_set_desc(dev, "Intel Panther Point SMBus controller"); 199 break; 200 case ID_AVOTON: 201 device_set_desc(dev, "Intel Avoton SMBus controller"); 202 break; 203 case ID_LPT: 204 device_set_desc(dev, "Intel Lynx Point SMBus controller"); 205 break; 206 case ID_LPTLP: 207 device_set_desc(dev, "Intel Lynx Point-LP SMBus controller"); 208 break; 209 case ID_WCPT: 210 device_set_desc(dev, "Intel Wildcat Point SMBus controller"); 211 break; 212 case ID_WCPTLP: 213 device_set_desc(dev, "Intel Wildcat Point-LP SMBus controller"); 214 break; 215 case ID_COLETOCRK: 216 device_set_desc(dev, "Intel Coleto Creek SMBus controller"); 217 break; 218 case ID_WELLSBURG: 219 device_set_desc(dev, "Intel Wellsburg SMBus controller"); 220 break; 221 case ID_SRPT: 222 device_set_desc(dev, "Intel Sunrise Point-H SMBus controller"); 223 break; 224 case ID_SRPTLP: 225 device_set_desc(dev, "Intel Sunrise Point-LP SMBus controller"); 226 break; 227 default: 228 return (ENXIO); 229 } 230 231 /* Done */ 232 return (ichsmb_probe(dev)); 233 } 234 235 static int 236 ichsmb_pci_attach(device_t dev) 237 { 238 const sc_p sc = device_get_softc(dev); 239 int error; 240 241 /* Initialize private state */ 242 bzero(sc, sizeof(*sc)); 243 sc->ich_cmd = -1; 244 sc->dev = dev; 245 246 /* Allocate an I/O range */ 247 sc->io_rid = ICH_SMB_BASE; 248 sc->io_res = bus_alloc_resource_anywhere(dev, SYS_RES_IOPORT, 249 &sc->io_rid, 16, RF_ACTIVE); 250 if (sc->io_res == NULL) 251 sc->io_res = bus_alloc_resource_anywhere(dev, SYS_RES_IOPORT, 252 &sc->io_rid, 32, RF_ACTIVE); 253 if (sc->io_res == NULL) { 254 device_printf(dev, "can't map I/O\n"); 255 error = ENXIO; 256 goto fail; 257 } 258 259 /* Allocate interrupt */ 260 sc->irq_rid = 0; 261 sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, 262 &sc->irq_rid, RF_ACTIVE | RF_SHAREABLE); 263 if (sc->irq_res == NULL) { 264 device_printf(dev, "can't get IRQ\n"); 265 error = ENXIO; 266 goto fail; 267 } 268 269 /* Enable device */ 270 pci_write_config(dev, ICH_HOSTC, ICH_HOSTC_HST_EN, 1); 271 272 /* Done */ 273 error = ichsmb_attach(dev); 274 if (error) 275 goto fail; 276 return (0); 277 278 fail: 279 /* Attach failed, release resources */ 280 ichsmb_release_resources(sc); 281 return (error); 282 } 283 284 285 MODULE_DEPEND(ichsmb, pci, 1, 1, 1); 286 MODULE_DEPEND(ichsmb, smbus, SMBUS_MINVER, SMBUS_PREFVER, SMBUS_MAXVER); 287 MODULE_VERSION(ichsmb, 1); 288