1 /****************************************************************************** 2 SPDX-License-Identifier: BSD-3-Clause 3 4 Copyright (c) 2001-2020, Intel Corporation 5 All rights reserved. 6 7 Redistribution and use in source and binary forms, with or without 8 modification, are permitted provided that the following conditions are met: 9 10 1. Redistributions of source code must retain the above copyright notice, 11 this list of conditions and the following disclaimer. 12 13 2. Redistributions in binary form must reproduce the above copyright 14 notice, this list of conditions and the following disclaimer in the 15 documentation and/or other materials provided with the distribution. 16 17 3. Neither the name of the Intel Corporation nor the names of its 18 contributors may be used to endorse or promote products derived from 19 this software without specific prior written permission. 20 21 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 25 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 POSSIBILITY OF SUCH DAMAGE. 32 33 ******************************************************************************/ 34 /*$FreeBSD$*/ 35 36 37 #include "ixgbe.h" 38 39 #ifndef IXGBE_VFWRITE_REG 40 #define IXGBE_VFWRITE_REG IXGBE_WRITE_REG 41 #endif 42 #ifndef IXGBE_VFREAD_REG 43 #define IXGBE_VFREAD_REG IXGBE_READ_REG 44 #endif 45 46 /** 47 * ixgbe_init_ops_vf - Initialize the pointers for vf 48 * @hw: pointer to hardware structure 49 * 50 * This will assign function pointers, adapter-specific functions can 51 * override the assignment of generic function pointers by assigning 52 * their own adapter-specific function pointers. 53 * Does not touch the hardware. 54 **/ 55 s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw) 56 { 57 /* MAC */ 58 hw->mac.ops.init_hw = ixgbe_init_hw_vf; 59 hw->mac.ops.reset_hw = ixgbe_reset_hw_vf; 60 hw->mac.ops.start_hw = ixgbe_start_hw_vf; 61 /* Cannot clear stats on VF */ 62 hw->mac.ops.clear_hw_cntrs = NULL; 63 hw->mac.ops.get_media_type = NULL; 64 hw->mac.ops.get_mac_addr = ixgbe_get_mac_addr_vf; 65 hw->mac.ops.stop_adapter = ixgbe_stop_adapter_vf; 66 hw->mac.ops.get_bus_info = NULL; 67 hw->mac.ops.negotiate_api_version = ixgbevf_negotiate_api_version; 68 69 /* Link */ 70 hw->mac.ops.setup_link = ixgbe_setup_mac_link_vf; 71 hw->mac.ops.check_link = ixgbe_check_mac_link_vf; 72 hw->mac.ops.get_link_capabilities = NULL; 73 74 /* RAR, Multicast, VLAN */ 75 hw->mac.ops.set_rar = ixgbe_set_rar_vf; 76 hw->mac.ops.set_uc_addr = ixgbevf_set_uc_addr_vf; 77 hw->mac.ops.init_rx_addrs = NULL; 78 hw->mac.ops.update_mc_addr_list = ixgbe_update_mc_addr_list_vf; 79 hw->mac.ops.update_xcast_mode = ixgbevf_update_xcast_mode; 80 hw->mac.ops.enable_mc = NULL; 81 hw->mac.ops.disable_mc = NULL; 82 hw->mac.ops.clear_vfta = NULL; 83 hw->mac.ops.set_vfta = ixgbe_set_vfta_vf; 84 hw->mac.ops.set_rlpml = ixgbevf_rlpml_set_vf; 85 86 hw->mac.max_tx_queues = 1; 87 hw->mac.max_rx_queues = 1; 88 89 hw->mbx.ops.init_params = ixgbe_init_mbx_params_vf; 90 91 return IXGBE_SUCCESS; 92 } 93 94 /* ixgbe_virt_clr_reg - Set register to default (power on) state. 95 * @hw: pointer to hardware structure 96 */ 97 static void ixgbe_virt_clr_reg(struct ixgbe_hw *hw) 98 { 99 int i; 100 u32 vfsrrctl; 101 u32 vfdca_rxctrl; 102 u32 vfdca_txctrl; 103 104 /* VRSRRCTL default values (BSIZEPACKET = 2048, BSIZEHEADER = 256) */ 105 vfsrrctl = 0x100 << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT; 106 vfsrrctl |= 0x800 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; 107 108 /* DCA_RXCTRL default value */ 109 vfdca_rxctrl = IXGBE_DCA_RXCTRL_DESC_RRO_EN | 110 IXGBE_DCA_RXCTRL_DATA_WRO_EN | 111 IXGBE_DCA_RXCTRL_HEAD_WRO_EN; 112 113 /* DCA_TXCTRL default value */ 114 vfdca_txctrl = IXGBE_DCA_TXCTRL_DESC_RRO_EN | 115 IXGBE_DCA_TXCTRL_DESC_WRO_EN | 116 IXGBE_DCA_TXCTRL_DATA_RRO_EN; 117 118 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0); 119 120 for (i = 0; i < 8; i++) { 121 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(i), 0); 122 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(i), 0); 123 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), 0); 124 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(i), vfsrrctl); 125 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(i), 0); 126 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(i), 0); 127 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), 0); 128 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(i), 0); 129 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(i), 0); 130 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(i), vfdca_rxctrl); 131 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(i), vfdca_txctrl); 132 } 133 134 IXGBE_WRITE_FLUSH(hw); 135 } 136 137 /** 138 * ixgbe_start_hw_vf - Prepare hardware for Tx/Rx 139 * @hw: pointer to hardware structure 140 * 141 * Starts the hardware by filling the bus info structure and media type, clears 142 * all on chip counters, initializes receive address registers, multicast 143 * table, VLAN filter table, calls routine to set up link and flow control 144 * settings, and leaves transmit and receive units disabled and uninitialized 145 **/ 146 s32 ixgbe_start_hw_vf(struct ixgbe_hw *hw) 147 { 148 /* Clear adapter stopped flag */ 149 hw->adapter_stopped = false; 150 151 return IXGBE_SUCCESS; 152 } 153 154 /** 155 * ixgbe_init_hw_vf - virtual function hardware initialization 156 * @hw: pointer to hardware structure 157 * 158 * Initialize the hardware by resetting the hardware and then starting 159 * the hardware 160 **/ 161 s32 ixgbe_init_hw_vf(struct ixgbe_hw *hw) 162 { 163 s32 status = hw->mac.ops.start_hw(hw); 164 165 hw->mac.ops.get_mac_addr(hw, hw->mac.addr); 166 167 return status; 168 } 169 170 /** 171 * ixgbe_reset_hw_vf - Performs hardware reset 172 * @hw: pointer to hardware structure 173 * 174 * Resets the hardware by resetting the transmit and receive units, masks and 175 * clears all interrupts. 176 **/ 177 s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw) 178 { 179 struct ixgbe_mbx_info *mbx = &hw->mbx; 180 u32 timeout = IXGBE_VF_INIT_TIMEOUT; 181 s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR; 182 u32 msgbuf[IXGBE_VF_PERMADDR_MSG_LEN]; 183 u8 *addr = (u8 *)(&msgbuf[1]); 184 185 DEBUGFUNC("ixgbevf_reset_hw_vf"); 186 187 /* Call adapter stop to disable tx/rx and clear interrupts */ 188 hw->mac.ops.stop_adapter(hw); 189 190 /* reset the api version */ 191 hw->api_version = ixgbe_mbox_api_10; 192 193 DEBUGOUT("Issuing a function level reset to MAC\n"); 194 195 IXGBE_VFWRITE_REG(hw, IXGBE_VFCTRL, IXGBE_CTRL_RST); 196 IXGBE_WRITE_FLUSH(hw); 197 198 msec_delay(50); 199 200 /* we cannot reset while the RSTI / RSTD bits are asserted */ 201 while (!mbx->ops.check_for_rst(hw, 0) && timeout) { 202 timeout--; 203 usec_delay(5); 204 } 205 206 if (!timeout) 207 return IXGBE_ERR_RESET_FAILED; 208 209 /* Reset VF registers to initial values */ 210 ixgbe_virt_clr_reg(hw); 211 212 /* mailbox timeout can now become active */ 213 mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT; 214 215 msgbuf[0] = IXGBE_VF_RESET; 216 mbx->ops.write_posted(hw, msgbuf, 1, 0); 217 218 msec_delay(10); 219 220 /* 221 * set our "perm_addr" based on info provided by PF 222 * also set up the mc_filter_type which is piggy backed 223 * on the mac address in word 3 224 */ 225 ret_val = mbx->ops.read_posted(hw, msgbuf, 226 IXGBE_VF_PERMADDR_MSG_LEN, 0); 227 if (ret_val) 228 return ret_val; 229 230 if (msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK) && 231 msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_NACK)) 232 return IXGBE_ERR_INVALID_MAC_ADDR; 233 234 if (msgbuf[0] == (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK)) 235 memcpy(hw->mac.perm_addr, addr, IXGBE_ETH_LENGTH_OF_ADDRESS); 236 237 hw->mac.mc_filter_type = msgbuf[IXGBE_VF_MC_TYPE_WORD]; 238 239 return ret_val; 240 } 241 242 /** 243 * ixgbe_stop_adapter_vf - Generic stop Tx/Rx units 244 * @hw: pointer to hardware structure 245 * 246 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts, 247 * disables transmit and receive units. The adapter_stopped flag is used by 248 * the shared code and drivers to determine if the adapter is in a stopped 249 * state and should not touch the hardware. 250 **/ 251 s32 ixgbe_stop_adapter_vf(struct ixgbe_hw *hw) 252 { 253 u32 reg_val; 254 u16 i; 255 256 /* 257 * Set the adapter_stopped flag so other driver functions stop touching 258 * the hardware 259 */ 260 hw->adapter_stopped = true; 261 262 /* Clear interrupt mask to stop from interrupts being generated */ 263 IXGBE_VFWRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK); 264 265 /* Clear any pending interrupts, flush previous writes */ 266 IXGBE_VFREAD_REG(hw, IXGBE_VTEICR); 267 268 /* Disable the transmit unit. Each queue must be disabled. */ 269 for (i = 0; i < hw->mac.max_tx_queues; i++) 270 IXGBE_VFWRITE_REG(hw, IXGBE_VFTXDCTL(i), IXGBE_TXDCTL_SWFLSH); 271 272 /* Disable the receive unit by stopping each queue */ 273 for (i = 0; i < hw->mac.max_rx_queues; i++) { 274 reg_val = IXGBE_VFREAD_REG(hw, IXGBE_VFRXDCTL(i)); 275 reg_val &= ~IXGBE_RXDCTL_ENABLE; 276 IXGBE_VFWRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val); 277 } 278 /* Clear packet split and pool config */ 279 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0); 280 281 /* flush all queues disables */ 282 IXGBE_WRITE_FLUSH(hw); 283 msec_delay(2); 284 285 return IXGBE_SUCCESS; 286 } 287 288 /** 289 * ixgbe_mta_vector - Determines bit-vector in multicast table to set 290 * @hw: pointer to hardware structure 291 * @mc_addr: the multicast address 292 * 293 * Extracts the 12 bits, from a multicast address, to determine which 294 * bit-vector to set in the multicast table. The hardware uses 12 bits, from 295 * incoming rx multicast addresses, to determine the bit-vector to check in 296 * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set 297 * by the MO field of the MCSTCTRL. The MO field is set during initialization 298 * to mc_filter_type. 299 **/ 300 static s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr) 301 { 302 u32 vector = 0; 303 304 switch (hw->mac.mc_filter_type) { 305 case 0: /* use bits [47:36] of the address */ 306 vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4)); 307 break; 308 case 1: /* use bits [46:35] of the address */ 309 vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5)); 310 break; 311 case 2: /* use bits [45:34] of the address */ 312 vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6)); 313 break; 314 case 3: /* use bits [43:32] of the address */ 315 vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8)); 316 break; 317 default: /* Invalid mc_filter_type */ 318 DEBUGOUT("MC filter type param set incorrectly\n"); 319 ASSERT(0); 320 break; 321 } 322 323 /* vector can only be 12-bits or boundary will be exceeded */ 324 vector &= 0xFFF; 325 return vector; 326 } 327 328 static s32 ixgbevf_write_msg_read_ack(struct ixgbe_hw *hw, u32 *msg, 329 u32 *retmsg, u16 size) 330 { 331 struct ixgbe_mbx_info *mbx = &hw->mbx; 332 s32 retval = mbx->ops.write_posted(hw, msg, size, 0); 333 334 if (retval) 335 return retval; 336 337 return mbx->ops.read_posted(hw, retmsg, size, 0); 338 } 339 340 /** 341 * ixgbe_set_rar_vf - set device MAC address 342 * @hw: pointer to hardware structure 343 * @index: Receive address register to write 344 * @addr: Address to put into receive address register 345 * @vmdq: VMDq "set" or "pool" index 346 * @enable_addr: set flag that address is active 347 **/ 348 s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, 349 u32 enable_addr) 350 { 351 u32 msgbuf[3]; 352 u8 *msg_addr = (u8 *)(&msgbuf[1]); 353 s32 ret_val; 354 UNREFERENCED_3PARAMETER(vmdq, enable_addr, index); 355 356 memset(msgbuf, 0, 12); 357 msgbuf[0] = IXGBE_VF_SET_MAC_ADDR; 358 memcpy(msg_addr, addr, 6); 359 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 3); 360 361 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; 362 363 /* if nacked the address was rejected, use "perm_addr" */ 364 if (!ret_val && 365 (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_NACK))) { 366 ixgbe_get_mac_addr_vf(hw, hw->mac.addr); 367 return IXGBE_ERR_MBX; 368 } 369 370 return ret_val; 371 } 372 373 /** 374 * ixgbe_update_mc_addr_list_vf - Update Multicast addresses 375 * @hw: pointer to the HW structure 376 * @mc_addr_list: array of multicast addresses to program 377 * @mc_addr_count: number of multicast addresses to program 378 * @next: caller supplied function to return next address in list 379 * @clear: unused 380 * 381 * Updates the Multicast Table Array. 382 **/ 383 s32 ixgbe_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list, 384 u32 mc_addr_count, ixgbe_mc_addr_itr next, 385 bool clear) 386 { 387 struct ixgbe_mbx_info *mbx = &hw->mbx; 388 u32 msgbuf[IXGBE_VFMAILBOX_SIZE]; 389 u16 *vector_list = (u16 *)&msgbuf[1]; 390 u32 vector; 391 u32 cnt, i; 392 u32 vmdq; 393 394 UNREFERENCED_1PARAMETER(clear); 395 396 DEBUGFUNC("ixgbe_update_mc_addr_list_vf"); 397 398 /* Each entry in the list uses 1 16 bit word. We have 30 399 * 16 bit words available in our HW msg buffer (minus 1 for the 400 * msg type). That's 30 hash values if we pack 'em right. If 401 * there are more than 30 MC addresses to add then punt the 402 * extras for now and then add code to handle more than 30 later. 403 * It would be unusual for a server to request that many multi-cast 404 * addresses except for in large enterprise network environments. 405 */ 406 407 DEBUGOUT1("MC Addr Count = %d\n", mc_addr_count); 408 409 cnt = (mc_addr_count > 30) ? 30 : mc_addr_count; 410 msgbuf[0] = IXGBE_VF_SET_MULTICAST; 411 msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT; 412 413 for (i = 0; i < cnt; i++) { 414 vector = ixgbe_mta_vector(hw, next(hw, &mc_addr_list, &vmdq)); 415 DEBUGOUT1("Hash value = 0x%03X\n", vector); 416 vector_list[i] = (u16)vector; 417 } 418 419 return mbx->ops.write_posted(hw, msgbuf, IXGBE_VFMAILBOX_SIZE, 0); 420 } 421 422 /** 423 * ixgbevf_update_xcast_mode - Update Multicast mode 424 * @hw: pointer to the HW structure 425 * @xcast_mode: new multicast mode 426 * 427 * Updates the Multicast Mode of VF. 428 **/ 429 s32 ixgbevf_update_xcast_mode(struct ixgbe_hw *hw, int xcast_mode) 430 { 431 u32 msgbuf[2]; 432 s32 err; 433 434 switch (hw->api_version) { 435 case ixgbe_mbox_api_12: 436 /* New modes were introduced in 1.3 version */ 437 if (xcast_mode > IXGBEVF_XCAST_MODE_ALLMULTI) 438 return IXGBE_ERR_FEATURE_NOT_SUPPORTED; 439 /* Fall through */ 440 case ixgbe_mbox_api_13: 441 break; 442 default: 443 return IXGBE_ERR_FEATURE_NOT_SUPPORTED; 444 } 445 446 msgbuf[0] = IXGBE_VF_UPDATE_XCAST_MODE; 447 msgbuf[1] = xcast_mode; 448 449 err = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2); 450 if (err) 451 return err; 452 453 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; 454 if (msgbuf[0] == (IXGBE_VF_UPDATE_XCAST_MODE | IXGBE_VT_MSGTYPE_NACK)) 455 return IXGBE_ERR_FEATURE_NOT_SUPPORTED; 456 return IXGBE_SUCCESS; 457 } 458 459 /** 460 * ixgbe_set_vfta_vf - Set/Unset vlan filter table address 461 * @hw: pointer to the HW structure 462 * @vlan: 12 bit VLAN ID 463 * @vind: unused by VF drivers 464 * @vlan_on: if true then set bit, else clear bit 465 * @vlvf_bypass: boolean flag indicating updating default pool is okay 466 * 467 * Turn on/off specified VLAN in the VLAN filter table. 468 **/ 469 s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind, 470 bool vlan_on, bool vlvf_bypass) 471 { 472 u32 msgbuf[2]; 473 s32 ret_val; 474 UNREFERENCED_2PARAMETER(vind, vlvf_bypass); 475 476 msgbuf[0] = IXGBE_VF_SET_VLAN; 477 msgbuf[1] = vlan; 478 /* Setting the 8 bit field MSG INFO to true indicates "add" */ 479 msgbuf[0] |= vlan_on << IXGBE_VT_MSGINFO_SHIFT; 480 481 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2); 482 if (!ret_val && (msgbuf[0] & IXGBE_VT_MSGTYPE_ACK)) 483 return IXGBE_SUCCESS; 484 485 return ret_val | (msgbuf[0] & IXGBE_VT_MSGTYPE_NACK); 486 } 487 488 /** 489 * ixgbe_get_num_of_tx_queues_vf - Get number of TX queues 490 * @hw: pointer to hardware structure 491 * 492 * Returns the number of transmit queues for the given adapter. 493 **/ 494 u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw) 495 { 496 UNREFERENCED_1PARAMETER(hw); 497 return IXGBE_VF_MAX_TX_QUEUES; 498 } 499 500 /** 501 * ixgbe_get_num_of_rx_queues_vf - Get number of RX queues 502 * @hw: pointer to hardware structure 503 * 504 * Returns the number of receive queues for the given adapter. 505 **/ 506 u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw) 507 { 508 UNREFERENCED_1PARAMETER(hw); 509 return IXGBE_VF_MAX_RX_QUEUES; 510 } 511 512 /** 513 * ixgbe_get_mac_addr_vf - Read device MAC address 514 * @hw: pointer to the HW structure 515 * @mac_addr: the MAC address 516 **/ 517 s32 ixgbe_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr) 518 { 519 int i; 520 521 for (i = 0; i < IXGBE_ETH_LENGTH_OF_ADDRESS; i++) 522 mac_addr[i] = hw->mac.perm_addr[i]; 523 524 return IXGBE_SUCCESS; 525 } 526 527 s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr) 528 { 529 u32 msgbuf[3], msgbuf_chk; 530 u8 *msg_addr = (u8 *)(&msgbuf[1]); 531 s32 ret_val; 532 533 memset(msgbuf, 0, sizeof(msgbuf)); 534 /* 535 * If index is one then this is the start of a new list and needs 536 * indication to the PF so it can do it's own list management. 537 * If it is zero then that tells the PF to just clear all of 538 * this VF's macvlans and there is no new list. 539 */ 540 msgbuf[0] |= index << IXGBE_VT_MSGINFO_SHIFT; 541 msgbuf[0] |= IXGBE_VF_SET_MACVLAN; 542 msgbuf_chk = msgbuf[0]; 543 if (addr) 544 memcpy(msg_addr, addr, 6); 545 546 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 3); 547 if (!ret_val) { 548 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; 549 550 if (msgbuf[0] == (msgbuf_chk | IXGBE_VT_MSGTYPE_NACK)) 551 return IXGBE_ERR_OUT_OF_MEM; 552 } 553 554 return ret_val; 555 } 556 557 /** 558 * ixgbe_setup_mac_link_vf - Setup MAC link settings 559 * @hw: pointer to hardware structure 560 * @speed: new link speed 561 * @autoneg_wait_to_complete: true when waiting for completion is needed 562 * 563 * Set the link speed in the AUTOC register and restarts link. 564 **/ 565 s32 ixgbe_setup_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed speed, 566 bool autoneg_wait_to_complete) 567 { 568 UNREFERENCED_3PARAMETER(hw, speed, autoneg_wait_to_complete); 569 return IXGBE_SUCCESS; 570 } 571 572 /** 573 * ixgbe_check_mac_link_vf - Get link/speed status 574 * @hw: pointer to hardware structure 575 * @speed: pointer to link speed 576 * @link_up: true is link is up, false otherwise 577 * @autoneg_wait_to_complete: true when waiting for completion is needed 578 * 579 * Reads the links register to determine if link is up and the current speed 580 **/ 581 s32 ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 582 bool *link_up, bool autoneg_wait_to_complete) 583 { 584 struct ixgbe_mbx_info *mbx = &hw->mbx; 585 struct ixgbe_mac_info *mac = &hw->mac; 586 s32 ret_val = IXGBE_SUCCESS; 587 u32 links_reg; 588 u32 in_msg = 0; 589 UNREFERENCED_1PARAMETER(autoneg_wait_to_complete); 590 591 /* If we were hit with a reset drop the link */ 592 if (!mbx->ops.check_for_rst(hw, 0) || !mbx->timeout) 593 mac->get_link_status = true; 594 595 if (!mac->get_link_status) 596 goto out; 597 598 /* if link status is down no point in checking to see if pf is up */ 599 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS); 600 if (!(links_reg & IXGBE_LINKS_UP)) 601 goto out; 602 603 /* for SFP+ modules and DA cables on 82599 it can take up to 500usecs 604 * before the link status is correct 605 */ 606 if (mac->type == ixgbe_mac_82599_vf) { 607 int i; 608 609 for (i = 0; i < 5; i++) { 610 usec_delay(100); 611 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS); 612 613 if (!(links_reg & IXGBE_LINKS_UP)) 614 goto out; 615 } 616 } 617 618 switch (links_reg & IXGBE_LINKS_SPEED_82599) { 619 case IXGBE_LINKS_SPEED_10G_82599: 620 *speed = IXGBE_LINK_SPEED_10GB_FULL; 621 if (hw->mac.type >= ixgbe_mac_X550) { 622 if (links_reg & IXGBE_LINKS_SPEED_NON_STD) 623 *speed = IXGBE_LINK_SPEED_2_5GB_FULL; 624 } 625 break; 626 case IXGBE_LINKS_SPEED_1G_82599: 627 *speed = IXGBE_LINK_SPEED_1GB_FULL; 628 break; 629 case IXGBE_LINKS_SPEED_100_82599: 630 *speed = IXGBE_LINK_SPEED_100_FULL; 631 if (hw->mac.type == ixgbe_mac_X550) { 632 if (links_reg & IXGBE_LINKS_SPEED_NON_STD) 633 *speed = IXGBE_LINK_SPEED_5GB_FULL; 634 } 635 break; 636 case IXGBE_LINKS_SPEED_10_X550EM_A: 637 *speed = IXGBE_LINK_SPEED_UNKNOWN; 638 /* Since Reserved in older MAC's */ 639 if (hw->mac.type >= ixgbe_mac_X550) 640 *speed = IXGBE_LINK_SPEED_10_FULL; 641 break; 642 default: 643 *speed = IXGBE_LINK_SPEED_UNKNOWN; 644 } 645 646 /* if the read failed it could just be a mailbox collision, best wait 647 * until we are called again and don't report an error 648 */ 649 if (mbx->ops.read(hw, &in_msg, 1, 0)) 650 goto out; 651 652 if (!(in_msg & IXGBE_VT_MSGTYPE_CTS)) { 653 /* msg is not CTS and is NACK we must have lost CTS status */ 654 if (in_msg & IXGBE_VT_MSGTYPE_NACK) 655 ret_val = -1; 656 goto out; 657 } 658 659 /* the pf is talking, if we timed out in the past we reinit */ 660 if (!mbx->timeout) { 661 ret_val = -1; 662 goto out; 663 } 664 665 /* if we passed all the tests above then the link is up and we no 666 * longer need to check for link 667 */ 668 mac->get_link_status = false; 669 670 out: 671 *link_up = !mac->get_link_status; 672 return ret_val; 673 } 674 675 /** 676 * ixgbevf_rlpml_set_vf - Set the maximum receive packet length 677 * @hw: pointer to the HW structure 678 * @max_size: value to assign to max frame size 679 **/ 680 s32 ixgbevf_rlpml_set_vf(struct ixgbe_hw *hw, u16 max_size) 681 { 682 u32 msgbuf[2]; 683 s32 retval; 684 685 msgbuf[0] = IXGBE_VF_SET_LPE; 686 msgbuf[1] = max_size; 687 688 retval = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2); 689 if (retval) 690 return retval; 691 if ((msgbuf[0] & IXGBE_VF_SET_LPE) && 692 (msgbuf[0] & IXGBE_VT_MSGTYPE_NACK)) 693 return IXGBE_ERR_MBX; 694 695 return 0; 696 } 697 698 /** 699 * ixgbevf_negotiate_api_version - Negotiate supported API version 700 * @hw: pointer to the HW structure 701 * @api: integer containing requested API version 702 **/ 703 int ixgbevf_negotiate_api_version(struct ixgbe_hw *hw, int api) 704 { 705 int err; 706 u32 msg[3]; 707 708 /* Negotiate the mailbox API version */ 709 msg[0] = IXGBE_VF_API_NEGOTIATE; 710 msg[1] = api; 711 msg[2] = 0; 712 713 err = ixgbevf_write_msg_read_ack(hw, msg, msg, 3); 714 if (!err) { 715 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS; 716 717 /* Store value and return 0 on success */ 718 if (msg[0] == (IXGBE_VF_API_NEGOTIATE | IXGBE_VT_MSGTYPE_ACK)) { 719 hw->api_version = api; 720 return 0; 721 } 722 723 err = IXGBE_ERR_INVALID_ARGUMENT; 724 } 725 726 return err; 727 } 728 729 int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs, 730 unsigned int *default_tc) 731 { 732 int err; 733 u32 msg[5]; 734 735 /* do nothing if API doesn't support ixgbevf_get_queues */ 736 switch (hw->api_version) { 737 case ixgbe_mbox_api_11: 738 case ixgbe_mbox_api_12: 739 case ixgbe_mbox_api_13: 740 break; 741 default: 742 return 0; 743 } 744 745 /* Fetch queue configuration from the PF */ 746 msg[0] = IXGBE_VF_GET_QUEUES; 747 msg[1] = msg[2] = msg[3] = msg[4] = 0; 748 749 err = ixgbevf_write_msg_read_ack(hw, msg, msg, 5); 750 if (!err) { 751 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS; 752 753 /* 754 * if we we didn't get an ACK there must have been 755 * some sort of mailbox error so we should treat it 756 * as such 757 */ 758 if (msg[0] != (IXGBE_VF_GET_QUEUES | IXGBE_VT_MSGTYPE_ACK)) 759 return IXGBE_ERR_MBX; 760 761 /* record and validate values from message */ 762 hw->mac.max_tx_queues = msg[IXGBE_VF_TX_QUEUES]; 763 if (hw->mac.max_tx_queues == 0 || 764 hw->mac.max_tx_queues > IXGBE_VF_MAX_TX_QUEUES) 765 hw->mac.max_tx_queues = IXGBE_VF_MAX_TX_QUEUES; 766 767 hw->mac.max_rx_queues = msg[IXGBE_VF_RX_QUEUES]; 768 if (hw->mac.max_rx_queues == 0 || 769 hw->mac.max_rx_queues > IXGBE_VF_MAX_RX_QUEUES) 770 hw->mac.max_rx_queues = IXGBE_VF_MAX_RX_QUEUES; 771 772 *num_tcs = msg[IXGBE_VF_TRANS_VLAN]; 773 /* in case of unknown state assume we cannot tag frames */ 774 if (*num_tcs > hw->mac.max_rx_queues) 775 *num_tcs = 1; 776 777 *default_tc = msg[IXGBE_VF_DEF_QUEUE]; 778 /* default to queue 0 on out-of-bounds queue number */ 779 if (*default_tc >= hw->mac.max_tx_queues) 780 *default_tc = 0; 781 } 782 783 return err; 784 } 785