1 /****************************************************************************** 2 3 Copyright (c) 2013-2017, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 ******************************************************************************/ 33 /*$FreeBSD$*/ 34 35 36 #ifndef _IXL_H_ 37 #define _IXL_H_ 38 39 #include "opt_inet.h" 40 #include "opt_inet6.h" 41 #include "opt_rss.h" 42 #include "opt_ixl.h" 43 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/buf_ring.h> 47 #include <sys/mbuf.h> 48 #include <sys/protosw.h> 49 #include <sys/socket.h> 50 #include <sys/malloc.h> 51 #include <sys/kernel.h> 52 #include <sys/module.h> 53 #include <sys/sockio.h> 54 #include <sys/eventhandler.h> 55 #include <sys/syslog.h> 56 57 #include <net/if.h> 58 #include <net/if_var.h> 59 #include <net/if_arp.h> 60 #include <net/bpf.h> 61 #include <net/ethernet.h> 62 #include <net/if_dl.h> 63 #include <net/if_media.h> 64 65 #include <net/bpf.h> 66 #include <net/if_types.h> 67 #include <net/if_vlan_var.h> 68 69 #include <netinet/in_systm.h> 70 #include <netinet/in.h> 71 #include <netinet/if_ether.h> 72 #include <netinet/ip.h> 73 #include <netinet/ip6.h> 74 #include <netinet/tcp.h> 75 #include <netinet/tcp_lro.h> 76 #include <netinet/udp.h> 77 #include <netinet/sctp.h> 78 79 #include <machine/in_cksum.h> 80 81 #include <sys/bus.h> 82 #include <machine/bus.h> 83 #include <sys/rman.h> 84 #include <machine/resource.h> 85 #include <vm/vm.h> 86 #include <vm/pmap.h> 87 #include <machine/clock.h> 88 #include <dev/pci/pcivar.h> 89 #include <dev/pci/pcireg.h> 90 #include <sys/proc.h> 91 #include <sys/sysctl.h> 92 #include <sys/endian.h> 93 #include <sys/taskqueue.h> 94 #include <sys/pcpu.h> 95 #include <sys/smp.h> 96 #include <sys/sbuf.h> 97 #include <machine/smp.h> 98 #include <machine/stdarg.h> 99 100 #ifdef RSS 101 #include <net/rss_config.h> 102 #include <netinet/in_rss.h> 103 #endif 104 105 #include "i40e_type.h" 106 #include "i40e_prototype.h" 107 108 #define MAC_FORMAT "%02x:%02x:%02x:%02x:%02x:%02x" 109 #define MAC_FORMAT_ARGS(mac_addr) \ 110 (mac_addr)[0], (mac_addr)[1], (mac_addr)[2], (mac_addr)[3], \ 111 (mac_addr)[4], (mac_addr)[5] 112 #define ON_OFF_STR(is_set) ((is_set) ? "On" : "Off") 113 114 #ifdef IXL_DEBUG 115 116 #define _DBG_PRINTF(S, ...) printf("%s: " S "\n", __func__, ##__VA_ARGS__) 117 #define _DEV_DBG_PRINTF(dev, S, ...) device_printf(dev, "%s: " S "\n", __func__, ##__VA_ARGS__) 118 #define _IF_DBG_PRINTF(ifp, S, ...) if_printf(ifp, "%s: " S "\n", __func__, ##__VA_ARGS__) 119 120 /* Defines for printing generic debug information */ 121 #define DPRINTF(...) _DBG_PRINTF(__VA_ARGS__) 122 #define DDPRINTF(...) _DEV_DBG_PRINTF(__VA_ARGS__) 123 #define IDPRINTF(...) _IF_DBG_PRINTF(__VA_ARGS__) 124 125 /* Defines for printing specific debug information */ 126 #define DEBUG_INIT 1 127 #define DEBUG_IOCTL 1 128 #define DEBUG_HW 1 129 130 #define INIT_DEBUGOUT(...) if (DEBUG_INIT) _DBG_PRINTF(__VA_ARGS__) 131 #define INIT_DBG_DEV(...) if (DEBUG_INIT) _DEV_DBG_PRINTF(__VA_ARGS__) 132 #define INIT_DBG_IF(...) if (DEBUG_INIT) _IF_DBG_PRINTF(__VA_ARGS__) 133 134 #define IOCTL_DEBUGOUT(...) if (DEBUG_IOCTL) _DBG_PRINTF(__VA_ARGS__) 135 #define IOCTL_DBG_IF2(ifp, S, ...) if (DEBUG_IOCTL) \ 136 if_printf(ifp, S "\n", ##__VA_ARGS__) 137 #define IOCTL_DBG_IF(...) if (DEBUG_IOCTL) _IF_DBG_PRINTF(__VA_ARGS__) 138 139 #define HW_DEBUGOUT(...) if (DEBUG_HW) _DBG_PRINTF(__VA_ARGS__) 140 141 #else /* no IXL_DEBUG */ 142 #define DEBUG_INIT 0 143 #define DEBUG_IOCTL 0 144 #define DEBUG_HW 0 145 146 #define DPRINTF(...) 147 #define DDPRINTF(...) 148 #define IDPRINTF(...) 149 150 #define INIT_DEBUGOUT(...) 151 #define INIT_DBG_DEV(...) 152 #define INIT_DBG_IF(...) 153 #define IOCTL_DEBUGOUT(...) 154 #define IOCTL_DBG_IF2(...) 155 #define IOCTL_DBG_IF(...) 156 #define HW_DEBUGOUT(...) 157 #endif /* IXL_DEBUG */ 158 159 enum ixl_dbg_mask { 160 IXL_DBG_INFO = 0x00000001, 161 IXL_DBG_EN_DIS = 0x00000002, 162 IXL_DBG_AQ = 0x00000004, 163 IXL_DBG_NVMUPD = 0x00000008, 164 165 IXL_DBG_IOCTL_KNOWN = 0x00000010, 166 IXL_DBG_IOCTL_UNKNOWN = 0x00000020, 167 IXL_DBG_IOCTL_ALL = 0x00000030, 168 169 I40E_DEBUG_RSS = 0x00000100, 170 171 IXL_DBG_IOV = 0x00001000, 172 IXL_DBG_IOV_VC = 0x00002000, 173 174 IXL_DBG_SWITCH_INFO = 0x00010000, 175 IXL_DBG_I2C = 0x00020000, 176 177 IXL_DBG_ALL = 0xFFFFFFFF 178 }; 179 180 /* Tunables */ 181 182 /* 183 * Ring Descriptors Valid Range: 32-4096 Default Value: 1024 This value is the 184 * number of tx/rx descriptors allocated by the driver. Increasing this 185 * value allows the driver to queue more operations. 186 * 187 * Tx descriptors are always 16 bytes, but Rx descriptors can be 32 bytes. 188 * The driver currently always uses 32 byte Rx descriptors. 189 */ 190 #define IXL_DEFAULT_RING 1024 191 #define IXL_MAX_RING 4096 192 #define IXL_MIN_RING 64 193 #define IXL_RING_INCREMENT 32 194 195 #define IXL_AQ_LEN 256 196 #define IXL_AQ_LEN_MAX 1024 197 198 /* 199 ** Default number of entries in Tx queue buf_ring. 200 */ 201 #define DEFAULT_TXBRSZ 4096 202 203 /* Alignment for rings */ 204 #define DBA_ALIGN 128 205 206 /* 207 * This is the max watchdog interval, ie. the time that can 208 * pass between any two TX clean operations, such only happening 209 * when the TX hardware is functioning. 210 * 211 * XXX: Watchdog currently counts down in units of (hz) 212 * Set this to just (hz) if you want queues to hang under a little bit of stress 213 */ 214 #define IXL_WATCHDOG (10 * hz) 215 216 /* 217 * This parameters control when the driver calls the routine to reclaim 218 * transmit descriptors. 219 */ 220 #define IXL_TX_CLEANUP_THRESHOLD (que->num_tx_desc / 8) 221 #define IXL_TX_OP_THRESHOLD (que->num_tx_desc / 32) 222 223 #define MAX_MULTICAST_ADDR 128 224 225 #define IXL_MSIX_BAR 3 226 #define IXL_ADM_LIMIT 2 227 #define IXL_TSO_SIZE 65535 228 #define IXL_AQ_BUF_SZ ((u32) 4096) 229 #define IXL_RX_HDR 128 230 #define IXL_RX_LIMIT 512 231 #define IXL_RX_ITR 0 232 #define IXL_TX_ITR 1 233 #define IXL_ITR_NONE 3 234 #define IXL_QUEUE_EOL 0x7FF 235 #define IXL_MAX_FRAME 9728 236 #define IXL_MAX_TX_SEGS 8 237 #define IXL_MAX_TSO_SEGS 128 238 #define IXL_SPARSE_CHAIN 7 239 #define IXL_QUEUE_HUNG 0x80000000 240 #define IXL_MIN_TSO_MSS 64 241 #define IXL_MAX_DMA_SEG_SIZE ((16 * 1024) - 1) 242 243 #define IXL_RSS_KEY_SIZE_REG 13 244 #define IXL_RSS_KEY_SIZE (IXL_RSS_KEY_SIZE_REG * 4) 245 #define IXL_RSS_VSI_LUT_SIZE 64 /* X722 -> VSI, X710 -> VF */ 246 #define IXL_RSS_VSI_LUT_ENTRY_MASK 0x3F 247 #define IXL_RSS_VF_LUT_ENTRY_MASK 0xF 248 249 #define IXL_VF_MAX_BUFFER 0x3F80 250 #define IXL_VF_MAX_HDR_BUFFER 0x840 251 #define IXL_VF_MAX_FRAME 0x3FFF 252 253 /* ERJ: hardware can support ~2k (SW5+) filters between all functions */ 254 #define IXL_MAX_FILTERS 256 255 #define IXL_MAX_TX_BUSY 10 256 257 #define IXL_NVM_VERSION_LO_SHIFT 0 258 #define IXL_NVM_VERSION_LO_MASK (0xff << IXL_NVM_VERSION_LO_SHIFT) 259 #define IXL_NVM_VERSION_HI_SHIFT 12 260 #define IXL_NVM_VERSION_HI_MASK (0xf << IXL_NVM_VERSION_HI_SHIFT) 261 262 /* 263 * Interrupt Moderation parameters 264 * Multiply ITR values by 2 for real ITR value 265 */ 266 #define IXL_MAX_ITR 0x0FF0 267 #define IXL_ITR_100K 0x0005 268 #define IXL_ITR_20K 0x0019 269 #define IXL_ITR_8K 0x003E 270 #define IXL_ITR_4K 0x007A 271 #define IXL_ITR_1K 0x01F4 272 #define IXL_ITR_DYNAMIC 0x8000 273 #define IXL_LOW_LATENCY 0 274 #define IXL_AVE_LATENCY 1 275 #define IXL_BULK_LATENCY 2 276 277 /* MacVlan Flags */ 278 #define IXL_FILTER_USED (u16)(1 << 0) 279 #define IXL_FILTER_VLAN (u16)(1 << 1) 280 #define IXL_FILTER_ADD (u16)(1 << 2) 281 #define IXL_FILTER_DEL (u16)(1 << 3) 282 #define IXL_FILTER_MC (u16)(1 << 4) 283 284 /* used in the vlan field of the filter when not a vlan */ 285 #define IXL_VLAN_ANY -1 286 287 #define CSUM_OFFLOAD_IPV4 (CSUM_IP|CSUM_TCP|CSUM_UDP|CSUM_SCTP) 288 #define CSUM_OFFLOAD_IPV6 (CSUM_TCP_IPV6|CSUM_UDP_IPV6|CSUM_SCTP_IPV6) 289 #define CSUM_OFFLOAD (CSUM_OFFLOAD_IPV4|CSUM_OFFLOAD_IPV6|CSUM_TSO) 290 291 /* Misc flags for ixl_vsi.flags */ 292 #define IXL_FLAGS_KEEP_TSO4 (1 << 0) 293 #define IXL_FLAGS_KEEP_TSO6 (1 << 1) 294 #define IXL_FLAGS_USES_MSIX (1 << 2) 295 #define IXL_FLAGS_IS_VF (1 << 3) 296 297 #define IXL_VF_RESET_TIMEOUT 100 298 299 #define IXL_VSI_DATA_PORT 0x01 300 301 #define IXLV_MAX_QUEUES 16 302 #define IXL_MAX_VSI_QUEUES (2 * (I40E_VSILAN_QTABLE_MAX_INDEX + 1)) 303 304 #define IXL_RX_CTX_BASE_UNITS 128 305 #define IXL_TX_CTX_BASE_UNITS 128 306 307 #define IXL_VPINT_LNKLSTN_REG(hw, vector, vf_num) \ 308 I40E_VPINT_LNKLSTN(((vector) - 1) + \ 309 (((hw)->func_caps.num_msix_vectors_vf - 1) * (vf_num))) 310 311 #define IXL_VFINT_DYN_CTLN_REG(hw, vector, vf_num) \ 312 I40E_VFINT_DYN_CTLN(((vector) - 1) + \ 313 (((hw)->func_caps.num_msix_vectors_vf - 1) * (vf_num))) 314 315 #define IXL_PF_PCI_CIAA_VF_DEVICE_STATUS 0xAA 316 317 #define IXL_PF_PCI_CIAD_VF_TRANS_PENDING_MASK 0x20 318 319 #define IXL_GLGEN_VFLRSTAT_INDEX(glb_vf) ((glb_vf) / 32) 320 #define IXL_GLGEN_VFLRSTAT_MASK(glb_vf) (1 << ((glb_vf) % 32)) 321 322 #define IXL_MAX_ITR_IDX 3 323 324 #define IXL_END_OF_INTR_LNKLST 0x7FF 325 326 #define IXL_DEFAULT_RSS_HENA_BASE (\ 327 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_UDP) | \ 328 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP) | \ 329 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_SCTP) | \ 330 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) | \ 331 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4) | \ 332 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_UDP) | \ 333 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP) | \ 334 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_SCTP) | \ 335 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) | \ 336 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6) | \ 337 BIT_ULL(I40E_FILTER_PCTYPE_L2_PAYLOAD)) 338 339 #define IXL_DEFAULT_RSS_HENA_XL710 IXL_DEFAULT_RSS_HENA_BASE 340 341 #define IXL_DEFAULT_RSS_HENA_X722 (\ 342 IXL_DEFAULT_RSS_HENA_BASE | \ 343 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) | \ 344 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP) | \ 345 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | \ 346 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP) | \ 347 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK) | \ 348 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK)) 349 350 #define IXL_TX_LOCK(_sc) mtx_lock(&(_sc)->mtx) 351 #define IXL_TX_UNLOCK(_sc) mtx_unlock(&(_sc)->mtx) 352 #define IXL_TX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->mtx) 353 #define IXL_TX_TRYLOCK(_sc) mtx_trylock(&(_sc)->mtx) 354 #define IXL_TX_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->mtx, MA_OWNED) 355 356 #define IXL_RX_LOCK(_sc) mtx_lock(&(_sc)->mtx) 357 #define IXL_RX_UNLOCK(_sc) mtx_unlock(&(_sc)->mtx) 358 #define IXL_RX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->mtx) 359 360 /* Pre-11 counter(9) compatibility */ 361 #if __FreeBSD_version >= 1100036 362 #define IXL_SET_IPACKETS(vsi, count) (vsi)->ipackets = (count) 363 #define IXL_SET_IERRORS(vsi, count) (vsi)->ierrors = (count) 364 #define IXL_SET_OPACKETS(vsi, count) (vsi)->opackets = (count) 365 #define IXL_SET_OERRORS(vsi, count) (vsi)->oerrors = (count) 366 #define IXL_SET_COLLISIONS(vsi, count) /* Do nothing; collisions is always 0. */ 367 #define IXL_SET_IBYTES(vsi, count) (vsi)->ibytes = (count) 368 #define IXL_SET_OBYTES(vsi, count) (vsi)->obytes = (count) 369 #define IXL_SET_IMCASTS(vsi, count) (vsi)->imcasts = (count) 370 #define IXL_SET_OMCASTS(vsi, count) (vsi)->omcasts = (count) 371 #define IXL_SET_IQDROPS(vsi, count) (vsi)->iqdrops = (count) 372 #define IXL_SET_OQDROPS(vsi, count) (vsi)->oqdrops = (count) 373 #define IXL_SET_NOPROTO(vsi, count) (vsi)->noproto = (count) 374 #else 375 #define IXL_SET_IPACKETS(vsi, count) (vsi)->ifp->if_ipackets = (count) 376 #define IXL_SET_IERRORS(vsi, count) (vsi)->ifp->if_ierrors = (count) 377 #define IXL_SET_OPACKETS(vsi, count) (vsi)->ifp->if_opackets = (count) 378 #define IXL_SET_OERRORS(vsi, count) (vsi)->ifp->if_oerrors = (count) 379 #define IXL_SET_COLLISIONS(vsi, count) (vsi)->ifp->if_collisions = (count) 380 #define IXL_SET_IBYTES(vsi, count) (vsi)->ifp->if_ibytes = (count) 381 #define IXL_SET_OBYTES(vsi, count) (vsi)->ifp->if_obytes = (count) 382 #define IXL_SET_IMCASTS(vsi, count) (vsi)->ifp->if_imcasts = (count) 383 #define IXL_SET_OMCASTS(vsi, count) (vsi)->ifp->if_omcasts = (count) 384 #define IXL_SET_IQDROPS(vsi, count) (vsi)->ifp->if_iqdrops = (count) 385 #define IXL_SET_OQDROPS(vsi, odrops) (vsi)->ifp->if_snd.ifq_drops = (odrops) 386 #define IXL_SET_NOPROTO(vsi, count) (vsi)->noproto = (count) 387 #endif 388 389 /* 390 ***************************************************************************** 391 * vendor_info_array 392 * 393 * This array contains the list of Subvendor/Subdevice IDs on which the driver 394 * should load. 395 * 396 ***************************************************************************** 397 */ 398 typedef struct _ixl_vendor_info_t { 399 unsigned int vendor_id; 400 unsigned int device_id; 401 unsigned int subvendor_id; 402 unsigned int subdevice_id; 403 unsigned int index; 404 } ixl_vendor_info_t; 405 406 407 struct ixl_tx_buf { 408 u32 eop_index; 409 struct mbuf *m_head; 410 bus_dmamap_t map; 411 bus_dma_tag_t tag; 412 }; 413 414 struct ixl_rx_buf { 415 struct mbuf *m_head; 416 struct mbuf *m_pack; 417 struct mbuf *fmp; 418 bus_dmamap_t hmap; 419 bus_dmamap_t pmap; 420 }; 421 422 /* 423 ** This struct has multiple uses, multicast 424 ** addresses, vlans, and mac filters all use it. 425 */ 426 struct ixl_mac_filter { 427 SLIST_ENTRY(ixl_mac_filter) next; 428 u8 macaddr[ETHER_ADDR_LEN]; 429 s16 vlan; 430 u16 flags; 431 }; 432 433 /* 434 * The Transmit ring control struct 435 */ 436 struct tx_ring { 437 struct ixl_queue *que; 438 struct mtx mtx; 439 u32 tail; 440 struct i40e_tx_desc *base; 441 struct i40e_dma_mem dma; 442 u16 next_avail; 443 u16 next_to_clean; 444 u16 atr_rate; 445 u16 atr_count; 446 u32 itr; 447 u32 latency; 448 struct ixl_tx_buf *buffers; 449 volatile u16 avail; 450 u32 cmd; 451 bus_dma_tag_t tx_tag; 452 bus_dma_tag_t tso_tag; 453 char mtx_name[16]; 454 struct buf_ring *br; 455 s32 watchdog_timer; 456 457 /* Used for Dynamic ITR calculation */ 458 u32 packets; 459 u32 bytes; 460 461 /* Soft Stats */ 462 u64 tx_bytes; 463 u64 no_desc; 464 u64 total_packets; 465 }; 466 467 468 /* 469 * The Receive ring control struct 470 */ 471 struct rx_ring { 472 struct ixl_queue *que; 473 struct mtx mtx; 474 union i40e_rx_desc *base; 475 struct i40e_dma_mem dma; 476 struct lro_ctrl lro; 477 bool lro_enabled; 478 bool hdr_split; 479 bool discard; 480 u32 next_refresh; 481 u32 next_check; 482 u32 itr; 483 u32 latency; 484 char mtx_name[16]; 485 struct ixl_rx_buf *buffers; 486 u32 mbuf_sz; 487 u32 tail; 488 bus_dma_tag_t htag; 489 bus_dma_tag_t ptag; 490 491 /* Used for Dynamic ITR calculation */ 492 u32 packets; 493 u32 bytes; 494 495 /* Soft stats */ 496 u64 split; 497 u64 rx_packets; 498 u64 rx_bytes; 499 u64 desc_errs; 500 u64 not_done; 501 }; 502 503 /* 504 ** Driver queue struct: this is the interrupt container 505 ** for the associated tx and rx ring pair. 506 */ 507 struct ixl_queue { 508 struct ixl_vsi *vsi; 509 u32 me; 510 u32 msix; /* This queue's MSIX vector */ 511 u32 eims; /* This queue's EIMS bit */ 512 struct resource *res; 513 void *tag; 514 int num_tx_desc; /* both tx and rx */ 515 int num_rx_desc; /* both tx and rx */ 516 #ifdef DEV_NETMAP 517 int num_desc; /* for compatibility with current netmap code in kernel */ 518 #endif 519 struct tx_ring txr; 520 struct rx_ring rxr; 521 struct task task; 522 struct task tx_task; 523 struct taskqueue *tq; 524 525 /* Queue stats */ 526 u64 irqs; 527 u64 tso; 528 u64 mbuf_defrag_failed; 529 u64 mbuf_hdr_failed; 530 u64 mbuf_pkt_failed; 531 u64 tx_dmamap_failed; 532 u64 dropped_pkts; 533 u64 mss_too_small; 534 }; 535 536 /* 537 ** Virtual Station Interface 538 */ 539 SLIST_HEAD(ixl_ftl_head, ixl_mac_filter); 540 struct ixl_vsi { 541 void *back; 542 struct ifnet *ifp; 543 device_t dev; 544 struct i40e_hw *hw; 545 struct ifmedia media; 546 enum i40e_vsi_type type; 547 int id; 548 u16 num_queues; 549 int num_tx_desc; 550 int num_rx_desc; 551 u32 rx_itr_setting; 552 u32 tx_itr_setting; 553 u16 max_frame_size; 554 bool enable_head_writeback; 555 556 struct ixl_queue *queues; /* head of queues */ 557 558 u16 vsi_num; 559 bool link_active; 560 u16 seid; 561 u16 uplink_seid; 562 u16 downlink_seid; 563 564 /* MAC/VLAN Filter list */ 565 struct ixl_ftl_head ftl; 566 u16 num_macs; 567 568 /* Contains readylist & stat counter id */ 569 struct i40e_aqc_vsi_properties_data info; 570 571 eventhandler_tag vlan_attach; 572 eventhandler_tag vlan_detach; 573 u16 num_vlans; 574 575 /* Per-VSI stats from hardware */ 576 struct i40e_eth_stats eth_stats; 577 struct i40e_eth_stats eth_stats_offsets; 578 bool stat_offsets_loaded; 579 /* VSI stat counters */ 580 u64 ipackets; 581 u64 ierrors; 582 u64 opackets; 583 u64 oerrors; 584 u64 ibytes; 585 u64 obytes; 586 u64 imcasts; 587 u64 omcasts; 588 u64 iqdrops; 589 u64 oqdrops; 590 u64 noproto; 591 592 /* Driver statistics */ 593 u64 hw_filters_del; 594 u64 hw_filters_add; 595 596 /* Misc. */ 597 u64 flags; 598 struct sysctl_oid *vsi_node; 599 }; 600 601 /* 602 ** Find the number of unrefreshed RX descriptors 603 */ 604 static inline u16 605 ixl_rx_unrefreshed(struct ixl_queue *que) 606 { 607 struct rx_ring *rxr = &que->rxr; 608 609 if (rxr->next_check > rxr->next_refresh) 610 return (rxr->next_check - rxr->next_refresh - 1); 611 else 612 return ((que->num_rx_desc + rxr->next_check) - 613 rxr->next_refresh - 1); 614 } 615 616 /* 617 ** Find the next available unused filter 618 */ 619 static inline struct ixl_mac_filter * 620 ixl_get_filter(struct ixl_vsi *vsi) 621 { 622 struct ixl_mac_filter *f; 623 624 /* create a new empty filter */ 625 f = malloc(sizeof(struct ixl_mac_filter), 626 M_DEVBUF, M_NOWAIT | M_ZERO); 627 if (f) 628 SLIST_INSERT_HEAD(&vsi->ftl, f, next); 629 630 return (f); 631 } 632 633 /* 634 ** Compare two ethernet addresses 635 */ 636 static inline bool 637 cmp_etheraddr(const u8 *ea1, const u8 *ea2) 638 { 639 bool cmp = FALSE; 640 641 if ((ea1[0] == ea2[0]) && (ea1[1] == ea2[1]) && 642 (ea1[2] == ea2[2]) && (ea1[3] == ea2[3]) && 643 (ea1[4] == ea2[4]) && (ea1[5] == ea2[5])) 644 cmp = TRUE; 645 646 return (cmp); 647 } 648 649 /* 650 * Return next largest power of 2, unsigned 651 * 652 * Public domain, from Bit Twiddling Hacks 653 */ 654 static inline u32 655 next_power_of_two(u32 n) 656 { 657 n--; 658 n |= n >> 1; 659 n |= n >> 2; 660 n |= n >> 4; 661 n |= n >> 8; 662 n |= n >> 16; 663 n++; 664 665 /* Next power of two > 0 is 1 */ 666 n += (n == 0); 667 668 return (n); 669 } 670 671 /* 672 * Info for stats sysctls 673 */ 674 struct ixl_sysctl_info { 675 u64 *stat; 676 char *name; 677 char *description; 678 }; 679 680 extern const uint8_t ixl_bcast_addr[ETHER_ADDR_LEN]; 681 682 /********************************************************************* 683 * TXRX Function prototypes 684 *********************************************************************/ 685 int ixl_allocate_tx_data(struct ixl_queue *); 686 int ixl_allocate_rx_data(struct ixl_queue *); 687 void ixl_init_tx_ring(struct ixl_queue *); 688 int ixl_init_rx_ring(struct ixl_queue *); 689 bool ixl_rxeof(struct ixl_queue *, int); 690 bool ixl_txeof(struct ixl_queue *); 691 void ixl_free_que_tx(struct ixl_queue *); 692 void ixl_free_que_rx(struct ixl_queue *); 693 694 int ixl_mq_start(struct ifnet *, struct mbuf *); 695 int ixl_mq_start_locked(struct ifnet *, struct tx_ring *); 696 void ixl_deferred_mq_start(void *, int); 697 698 void ixl_vsi_setup_rings_size(struct ixl_vsi *, int, int); 699 int ixl_queue_hang_check(struct ixl_vsi *); 700 void ixl_free_vsi(struct ixl_vsi *); 701 void ixl_qflush(struct ifnet *); 702 703 /* Common function prototypes between PF/VF driver */ 704 #if __FreeBSD_version >= 1100000 705 uint64_t ixl_get_counter(if_t ifp, ift_counter cnt); 706 #endif 707 void ixl_get_default_rss_key(u32 *); 708 const char * i40e_vc_stat_str(struct i40e_hw *hw, 709 enum virtchnl_status_code stat_err); 710 void ixl_set_busmaster(device_t); 711 void ixl_set_msix_enable(device_t); 712 #endif /* _IXL_H_ */ 713