1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2006 Bernd Walter. All rights reserved. 5 * Copyright (c) 2006 M. Warner Losh <imp@FreeBSD.org> 6 * Copyright (c) 2017 Marius Strobl <marius@FreeBSD.org> 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Portions of this software may have been developed with reference to 29 * the SD Simplified Specification. The following disclaimer may apply: 30 * 31 * The following conditions apply to the release of the simplified 32 * specification ("Simplified Specification") by the SD Card Association and 33 * the SD Group. The Simplified Specification is a subset of the complete SD 34 * Specification which is owned by the SD Card Association and the SD 35 * Group. This Simplified Specification is provided on a non-confidential 36 * basis subject to the disclaimers below. Any implementation of the 37 * Simplified Specification may require a license from the SD Card 38 * Association, SD Group, SD-3C LLC or other third parties. 39 * 40 * Disclaimers: 41 * 42 * The information contained in the Simplified Specification is presented only 43 * as a standard specification for SD Cards and SD Host/Ancillary products and 44 * is provided "AS-IS" without any representations or warranties of any 45 * kind. No responsibility is assumed by the SD Group, SD-3C LLC or the SD 46 * Card Association for any damages, any infringements of patents or other 47 * right of the SD Group, SD-3C LLC, the SD Card Association or any third 48 * parties, which may result from its use. No license is granted by 49 * implication, estoppel or otherwise under any patent or other rights of the 50 * SD Group, SD-3C LLC, the SD Card Association or any third party. Nothing 51 * herein shall be construed as an obligation by the SD Group, the SD-3C LLC 52 * or the SD Card Association to disclose or distribute any technical 53 * information, know-how or other confidential information to any third party. 54 */ 55 56 #include <sys/cdefs.h> 57 __FBSDID("$FreeBSD$"); 58 59 #include <sys/param.h> 60 #include <sys/systm.h> 61 #include <sys/kernel.h> 62 #include <sys/malloc.h> 63 #include <sys/lock.h> 64 #include <sys/module.h> 65 #include <sys/mutex.h> 66 #include <sys/bus.h> 67 #include <sys/endian.h> 68 #include <sys/sbuf.h> 69 #include <sys/sysctl.h> 70 #include <sys/time.h> 71 72 #include <dev/mmc/bridge.h> 73 #include <dev/mmc/mmc_private.h> 74 #include <dev/mmc/mmc_subr.h> 75 #include <dev/mmc/mmcreg.h> 76 #include <dev/mmc/mmcbrvar.h> 77 #include <dev/mmc/mmcvar.h> 78 79 #include "mmcbr_if.h" 80 #include "mmcbus_if.h" 81 82 CTASSERT(bus_timing_max <= sizeof(uint32_t) * NBBY); 83 84 /* 85 * Per-card data 86 */ 87 struct mmc_ivars { 88 uint32_t raw_cid[4]; /* Raw bits of the CID */ 89 uint32_t raw_csd[4]; /* Raw bits of the CSD */ 90 uint32_t raw_scr[2]; /* Raw bits of the SCR */ 91 uint8_t raw_ext_csd[MMC_EXTCSD_SIZE]; /* Raw bits of the EXT_CSD */ 92 uint32_t raw_sd_status[16]; /* Raw bits of the SD_STATUS */ 93 uint16_t rca; 94 u_char read_only; /* True when the device is read-only */ 95 u_char high_cap; /* High Capacity device (block addressed) */ 96 enum mmc_card_mode mode; 97 enum mmc_bus_width bus_width; /* Bus width to use */ 98 struct mmc_cid cid; /* cid decoded */ 99 struct mmc_csd csd; /* csd decoded */ 100 struct mmc_scr scr; /* scr decoded */ 101 struct mmc_sd_status sd_status; /* SD_STATUS decoded */ 102 uint32_t sec_count; /* Card capacity in 512byte blocks */ 103 uint32_t timings; /* Mask of bus timings supported */ 104 uint32_t vccq_120; /* Mask of bus timings at VCCQ of 1.2 V */ 105 uint32_t vccq_180; /* Mask of bus timings at VCCQ of 1.8 V */ 106 uint32_t tran_speed; /* Max speed in normal mode */ 107 uint32_t hs_tran_speed; /* Max speed in high speed mode */ 108 uint32_t erase_sector; /* Card native erase sector size */ 109 uint32_t cmd6_time; /* Generic switch timeout [us] */ 110 uint32_t quirks; /* Quirks as per mmc_quirk->quirks */ 111 char card_id_string[64];/* Formatted CID info (serial, MFG, etc) */ 112 char card_sn_string[16];/* Formatted serial # for disk->d_ident */ 113 }; 114 115 #define CMD_RETRIES 3 116 117 static const struct mmc_quirk mmc_quirks[] = { 118 /* 119 * For some SanDisk iNAND devices, the CMD38 argument needs to be 120 * provided in EXT_CSD[113]. 121 */ 122 { 0x2, 0x100, "SEM02G", MMC_QUIRK_INAND_CMD38 }, 123 { 0x2, 0x100, "SEM04G", MMC_QUIRK_INAND_CMD38 }, 124 { 0x2, 0x100, "SEM08G", MMC_QUIRK_INAND_CMD38 }, 125 { 0x2, 0x100, "SEM16G", MMC_QUIRK_INAND_CMD38 }, 126 { 0x2, 0x100, "SEM32G", MMC_QUIRK_INAND_CMD38 }, 127 128 /* 129 * Disable TRIM for Kingston eMMCs where a firmware bug can lead to 130 * unrecoverable data corruption. 131 */ 132 { 0x70, MMC_QUIRK_OID_ANY, "V10008", MMC_QUIRK_BROKEN_TRIM }, 133 { 0x70, MMC_QUIRK_OID_ANY, "V10016", MMC_QUIRK_BROKEN_TRIM }, 134 { 0x0, 0x0, NULL, 0x0 } 135 }; 136 137 static SYSCTL_NODE(_hw, OID_AUTO, mmc, CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, 138 "mmc driver"); 139 140 static int mmc_debug; 141 SYSCTL_INT(_hw_mmc, OID_AUTO, debug, CTLFLAG_RWTUN, &mmc_debug, 0, 142 "Debug level"); 143 144 /* bus entry points */ 145 static int mmc_acquire_bus(device_t busdev, device_t dev); 146 static int mmc_attach(device_t dev); 147 static int mmc_child_location(device_t dev, device_t child, struct sbuf *sb); 148 static int mmc_detach(device_t dev); 149 static int mmc_probe(device_t dev); 150 static int mmc_read_ivar(device_t bus, device_t child, int which, 151 uintptr_t *result); 152 static int mmc_release_bus(device_t busdev, device_t dev); 153 static int mmc_resume(device_t dev); 154 static void mmc_retune_pause(device_t busdev, device_t dev, bool retune); 155 static void mmc_retune_unpause(device_t busdev, device_t dev); 156 static int mmc_suspend(device_t dev); 157 static int mmc_wait_for_request(device_t busdev, device_t dev, 158 struct mmc_request *req); 159 static int mmc_write_ivar(device_t bus, device_t child, int which, 160 uintptr_t value); 161 162 #define MMC_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 163 #define MMC_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 164 #define MMC_LOCK_INIT(_sc) \ 165 mtx_init(&(_sc)->sc_mtx, device_get_nameunit((_sc)->dev), \ 166 "mmc", MTX_DEF) 167 #define MMC_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_mtx); 168 #define MMC_ASSERT_LOCKED(_sc) mtx_assert(&(_sc)->sc_mtx, MA_OWNED); 169 #define MMC_ASSERT_UNLOCKED(_sc) mtx_assert(&(_sc)->sc_mtx, MA_NOTOWNED); 170 171 static int mmc_all_send_cid(struct mmc_softc *sc, uint32_t *rawcid); 172 static void mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr); 173 static void mmc_app_decode_sd_status(uint32_t *raw_sd_status, 174 struct mmc_sd_status *sd_status); 175 static int mmc_app_sd_status(struct mmc_softc *sc, uint16_t rca, 176 uint32_t *rawsdstatus); 177 static int mmc_app_send_scr(struct mmc_softc *sc, uint16_t rca, 178 uint32_t *rawscr); 179 static int mmc_calculate_clock(struct mmc_softc *sc); 180 static void mmc_decode_cid_mmc(uint32_t *raw_cid, struct mmc_cid *cid, 181 bool is_4_41p); 182 static void mmc_decode_cid_sd(uint32_t *raw_cid, struct mmc_cid *cid); 183 static void mmc_decode_csd_mmc(uint32_t *raw_csd, struct mmc_csd *csd); 184 static int mmc_decode_csd_sd(uint32_t *raw_csd, struct mmc_csd *csd); 185 static void mmc_delayed_attach(void *xsc); 186 static int mmc_delete_cards(struct mmc_softc *sc, bool final); 187 static void mmc_discover_cards(struct mmc_softc *sc); 188 static void mmc_format_card_id_string(struct mmc_ivars *ivar); 189 static void mmc_go_discovery(struct mmc_softc *sc); 190 static uint32_t mmc_get_bits(uint32_t *bits, int bit_len, int start, 191 int size); 192 static int mmc_highest_voltage(uint32_t ocr); 193 static bool mmc_host_timing(device_t dev, enum mmc_bus_timing timing); 194 static void mmc_idle_cards(struct mmc_softc *sc); 195 static void mmc_ms_delay(int ms); 196 static void mmc_log_card(device_t dev, struct mmc_ivars *ivar, int newcard); 197 static void mmc_power_down(struct mmc_softc *sc); 198 static void mmc_power_up(struct mmc_softc *sc); 199 static void mmc_rescan_cards(struct mmc_softc *sc); 200 static int mmc_retune(device_t busdev, device_t dev, bool reset); 201 static void mmc_scan(struct mmc_softc *sc); 202 static int mmc_sd_switch(struct mmc_softc *sc, uint8_t mode, uint8_t grp, 203 uint8_t value, uint8_t *res); 204 static int mmc_select_card(struct mmc_softc *sc, uint16_t rca); 205 static uint32_t mmc_select_vdd(struct mmc_softc *sc, uint32_t ocr); 206 static int mmc_send_app_op_cond(struct mmc_softc *sc, uint32_t ocr, 207 uint32_t *rocr); 208 static int mmc_send_csd(struct mmc_softc *sc, uint16_t rca, uint32_t *rawcsd); 209 static int mmc_send_if_cond(struct mmc_softc *sc, uint8_t vhs); 210 static int mmc_send_op_cond(struct mmc_softc *sc, uint32_t ocr, 211 uint32_t *rocr); 212 static int mmc_send_relative_addr(struct mmc_softc *sc, uint32_t *resp); 213 static int mmc_set_blocklen(struct mmc_softc *sc, uint32_t len); 214 static int mmc_set_card_bus_width(struct mmc_softc *sc, struct mmc_ivars *ivar, 215 enum mmc_bus_timing timing); 216 static int mmc_set_power_class(struct mmc_softc *sc, struct mmc_ivars *ivar); 217 static int mmc_set_relative_addr(struct mmc_softc *sc, uint16_t resp); 218 static int mmc_set_timing(struct mmc_softc *sc, struct mmc_ivars *ivar, 219 enum mmc_bus_timing timing); 220 static int mmc_set_vccq(struct mmc_softc *sc, struct mmc_ivars *ivar, 221 enum mmc_bus_timing timing); 222 static int mmc_switch_to_hs200(struct mmc_softc *sc, struct mmc_ivars *ivar, 223 uint32_t clock); 224 static int mmc_switch_to_hs400(struct mmc_softc *sc, struct mmc_ivars *ivar, 225 uint32_t max_dtr, enum mmc_bus_timing max_timing); 226 static int mmc_test_bus_width(struct mmc_softc *sc); 227 static uint32_t mmc_timing_to_dtr(struct mmc_ivars *ivar, 228 enum mmc_bus_timing timing); 229 static const char *mmc_timing_to_string(enum mmc_bus_timing timing); 230 static void mmc_update_child_list(struct mmc_softc *sc); 231 static int mmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode, 232 uint32_t arg, uint32_t flags, uint32_t *resp, int retries); 233 static int mmc_wait_for_req(struct mmc_softc *sc, struct mmc_request *req); 234 static void mmc_wakeup(struct mmc_request *req); 235 236 static void 237 mmc_ms_delay(int ms) 238 { 239 240 DELAY(1000 * ms); /* XXX BAD */ 241 } 242 243 static int 244 mmc_probe(device_t dev) 245 { 246 247 device_set_desc(dev, "MMC/SD bus"); 248 return (0); 249 } 250 251 static int 252 mmc_attach(device_t dev) 253 { 254 struct mmc_softc *sc; 255 256 sc = device_get_softc(dev); 257 sc->dev = dev; 258 MMC_LOCK_INIT(sc); 259 260 /* We'll probe and attach our children later, but before / mount */ 261 sc->config_intrhook.ich_func = mmc_delayed_attach; 262 sc->config_intrhook.ich_arg = sc; 263 if (config_intrhook_establish(&sc->config_intrhook) != 0) 264 device_printf(dev, "config_intrhook_establish failed\n"); 265 return (0); 266 } 267 268 static int 269 mmc_detach(device_t dev) 270 { 271 struct mmc_softc *sc = device_get_softc(dev); 272 int err; 273 274 config_intrhook_drain(&sc->config_intrhook); 275 err = mmc_delete_cards(sc, true); 276 if (err != 0) 277 return (err); 278 mmc_power_down(sc); 279 MMC_LOCK_DESTROY(sc); 280 281 return (0); 282 } 283 284 static int 285 mmc_suspend(device_t dev) 286 { 287 struct mmc_softc *sc = device_get_softc(dev); 288 int err; 289 290 err = bus_generic_suspend(dev); 291 if (err != 0) 292 return (err); 293 /* 294 * We power down with the bus acquired here, mainly so that no device 295 * is selected any longer and sc->last_rca gets set to 0. Otherwise, 296 * the deselect as part of the bus acquisition in mmc_scan() may fail 297 * during resume, as the bus isn't powered up again before later in 298 * mmc_go_discovery(). 299 */ 300 err = mmc_acquire_bus(dev, dev); 301 if (err != 0) 302 return (err); 303 mmc_power_down(sc); 304 err = mmc_release_bus(dev, dev); 305 return (err); 306 } 307 308 static int 309 mmc_resume(device_t dev) 310 { 311 struct mmc_softc *sc = device_get_softc(dev); 312 313 mmc_scan(sc); 314 return (bus_generic_resume(dev)); 315 } 316 317 static int 318 mmc_acquire_bus(device_t busdev, device_t dev) 319 { 320 struct mmc_softc *sc; 321 struct mmc_ivars *ivar; 322 int err; 323 uint16_t rca; 324 enum mmc_bus_timing timing; 325 326 err = MMCBR_ACQUIRE_HOST(device_get_parent(busdev), busdev); 327 if (err) 328 return (err); 329 sc = device_get_softc(busdev); 330 MMC_LOCK(sc); 331 if (sc->owner) 332 panic("mmc: host bridge didn't serialize us."); 333 sc->owner = dev; 334 MMC_UNLOCK(sc); 335 336 if (busdev != dev) { 337 /* 338 * Keep track of the last rca that we've selected. If 339 * we're asked to do it again, don't. We never 340 * unselect unless the bus code itself wants the mmc 341 * bus, and constantly reselecting causes problems. 342 */ 343 ivar = device_get_ivars(dev); 344 rca = ivar->rca; 345 if (sc->last_rca != rca) { 346 if (mmc_select_card(sc, rca) != MMC_ERR_NONE) { 347 device_printf(busdev, "Card at relative " 348 "address %d failed to select\n", rca); 349 return (ENXIO); 350 } 351 sc->last_rca = rca; 352 timing = mmcbr_get_timing(busdev); 353 /* 354 * For eMMC modes, setting/updating bus width and VCCQ 355 * only really is necessary if there actually is more 356 * than one device on the bus as generally that already 357 * had to be done by mmc_calculate_clock() or one of 358 * its calees. Moreover, setting the bus width anew 359 * can trigger re-tuning (via a CRC error on the next 360 * CMD), even if not switching between devices an the 361 * previously selected one is still tuned. Obviously, 362 * we need to re-tune the host controller if devices 363 * are actually switched, though. 364 */ 365 if (timing >= bus_timing_mmc_ddr52 && 366 sc->child_count == 1) 367 return (0); 368 /* Prepare bus width for the new card. */ 369 if (bootverbose || mmc_debug) { 370 device_printf(busdev, 371 "setting bus width to %d bits %s timing\n", 372 (ivar->bus_width == bus_width_4) ? 4 : 373 (ivar->bus_width == bus_width_8) ? 8 : 1, 374 mmc_timing_to_string(timing)); 375 } 376 if (mmc_set_card_bus_width(sc, ivar, timing) != 377 MMC_ERR_NONE) { 378 device_printf(busdev, "Card at relative " 379 "address %d failed to set bus width\n", 380 rca); 381 return (ENXIO); 382 } 383 mmcbr_set_bus_width(busdev, ivar->bus_width); 384 mmcbr_update_ios(busdev); 385 if (mmc_set_vccq(sc, ivar, timing) != MMC_ERR_NONE) { 386 device_printf(busdev, "Failed to set VCCQ " 387 "for card at relative address %d\n", rca); 388 return (ENXIO); 389 } 390 if (timing >= bus_timing_mmc_hs200 && 391 mmc_retune(busdev, dev, true) != 0) { 392 device_printf(busdev, "Card at relative " 393 "address %d failed to re-tune\n", rca); 394 return (ENXIO); 395 } 396 } 397 } else { 398 /* 399 * If there's a card selected, stand down. 400 */ 401 if (sc->last_rca != 0) { 402 if (mmc_select_card(sc, 0) != MMC_ERR_NONE) 403 return (ENXIO); 404 sc->last_rca = 0; 405 } 406 } 407 408 return (0); 409 } 410 411 static int 412 mmc_release_bus(device_t busdev, device_t dev) 413 { 414 struct mmc_softc *sc; 415 416 sc = device_get_softc(busdev); 417 418 MMC_LOCK(sc); 419 if (!sc->owner) 420 panic("mmc: releasing unowned bus."); 421 if (sc->owner != dev) 422 panic("mmc: you don't own the bus. game over."); 423 sc->owner = NULL; 424 MMC_UNLOCK(sc); 425 return (MMCBR_RELEASE_HOST(device_get_parent(busdev), busdev)); 426 } 427 428 static uint32_t 429 mmc_select_vdd(struct mmc_softc *sc, uint32_t ocr) 430 { 431 432 return (ocr & MMC_OCR_VOLTAGE); 433 } 434 435 static int 436 mmc_highest_voltage(uint32_t ocr) 437 { 438 int i; 439 440 for (i = MMC_OCR_MAX_VOLTAGE_SHIFT; 441 i >= MMC_OCR_MIN_VOLTAGE_SHIFT; i--) 442 if (ocr & (1 << i)) 443 return (i); 444 return (-1); 445 } 446 447 static void 448 mmc_wakeup(struct mmc_request *req) 449 { 450 struct mmc_softc *sc; 451 452 sc = (struct mmc_softc *)req->done_data; 453 MMC_LOCK(sc); 454 req->flags |= MMC_REQ_DONE; 455 MMC_UNLOCK(sc); 456 wakeup(req); 457 } 458 459 static int 460 mmc_wait_for_req(struct mmc_softc *sc, struct mmc_request *req) 461 { 462 463 req->done = mmc_wakeup; 464 req->done_data = sc; 465 if (__predict_false(mmc_debug > 1)) { 466 device_printf(sc->dev, "REQUEST: CMD%d arg %#x flags %#x", 467 req->cmd->opcode, req->cmd->arg, req->cmd->flags); 468 if (req->cmd->data) { 469 printf(" data %d\n", (int)req->cmd->data->len); 470 } else 471 printf("\n"); 472 } 473 MMCBR_REQUEST(device_get_parent(sc->dev), sc->dev, req); 474 MMC_LOCK(sc); 475 while ((req->flags & MMC_REQ_DONE) == 0) 476 msleep(req, &sc->sc_mtx, 0, "mmcreq", 0); 477 MMC_UNLOCK(sc); 478 if (__predict_false(mmc_debug > 2 || (mmc_debug > 0 && 479 req->cmd->error != MMC_ERR_NONE))) 480 device_printf(sc->dev, "CMD%d RESULT: %d\n", 481 req->cmd->opcode, req->cmd->error); 482 return (0); 483 } 484 485 static int 486 mmc_wait_for_request(device_t busdev, device_t dev, struct mmc_request *req) 487 { 488 struct mmc_softc *sc; 489 struct mmc_ivars *ivar; 490 int err, i; 491 enum mmc_retune_req retune_req; 492 493 sc = device_get_softc(busdev); 494 KASSERT(sc->owner != NULL, 495 ("%s: Request from %s without bus being acquired.", __func__, 496 device_get_nameunit(dev))); 497 498 /* 499 * Unless no device is selected or re-tuning is already ongoing, 500 * execute re-tuning if a) the bridge is requesting to do so and 501 * re-tuning hasn't been otherwise paused, or b) if a child asked 502 * to be re-tuned prior to pausing (see also mmc_retune_pause()). 503 */ 504 if (__predict_false(sc->last_rca != 0 && sc->retune_ongoing == 0 && 505 (((retune_req = mmcbr_get_retune_req(busdev)) != retune_req_none && 506 sc->retune_paused == 0) || sc->retune_needed == 1))) { 507 if (__predict_false(mmc_debug > 1)) { 508 device_printf(busdev, 509 "Re-tuning with%s circuit reset required\n", 510 retune_req == retune_req_reset ? "" : "out"); 511 } 512 if (device_get_parent(dev) == busdev) 513 ivar = device_get_ivars(dev); 514 else { 515 for (i = 0; i < sc->child_count; i++) { 516 ivar = device_get_ivars(sc->child_list[i]); 517 if (ivar->rca == sc->last_rca) 518 break; 519 } 520 if (ivar->rca != sc->last_rca) 521 return (EINVAL); 522 } 523 sc->retune_ongoing = 1; 524 err = mmc_retune(busdev, dev, retune_req == retune_req_reset); 525 sc->retune_ongoing = 0; 526 switch (err) { 527 case MMC_ERR_NONE: 528 case MMC_ERR_FAILED: /* Re-tune error but still might work */ 529 break; 530 case MMC_ERR_BADCRC: /* Switch failure on HS400 recovery */ 531 return (ENXIO); 532 case MMC_ERR_INVALID: /* Driver implementation b0rken */ 533 default: /* Unknown error, should not happen */ 534 return (EINVAL); 535 } 536 sc->retune_needed = 0; 537 } 538 return (mmc_wait_for_req(sc, req)); 539 } 540 541 static int 542 mmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode, 543 uint32_t arg, uint32_t flags, uint32_t *resp, int retries) 544 { 545 struct mmc_command cmd; 546 int err; 547 548 memset(&cmd, 0, sizeof(cmd)); 549 cmd.opcode = opcode; 550 cmd.arg = arg; 551 cmd.flags = flags; 552 cmd.data = NULL; 553 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, retries); 554 if (err) 555 return (err); 556 if (resp) { 557 if (flags & MMC_RSP_136) 558 memcpy(resp, cmd.resp, 4 * sizeof(uint32_t)); 559 else 560 *resp = cmd.resp[0]; 561 } 562 return (0); 563 } 564 565 static void 566 mmc_idle_cards(struct mmc_softc *sc) 567 { 568 device_t dev; 569 struct mmc_command cmd; 570 571 dev = sc->dev; 572 mmcbr_set_chip_select(dev, cs_high); 573 mmcbr_update_ios(dev); 574 mmc_ms_delay(1); 575 576 memset(&cmd, 0, sizeof(cmd)); 577 cmd.opcode = MMC_GO_IDLE_STATE; 578 cmd.arg = 0; 579 cmd.flags = MMC_RSP_NONE | MMC_CMD_BC; 580 cmd.data = NULL; 581 mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 582 mmc_ms_delay(1); 583 584 mmcbr_set_chip_select(dev, cs_dontcare); 585 mmcbr_update_ios(dev); 586 mmc_ms_delay(1); 587 } 588 589 static int 590 mmc_send_app_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr) 591 { 592 struct mmc_command cmd; 593 int err = MMC_ERR_NONE, i; 594 595 memset(&cmd, 0, sizeof(cmd)); 596 cmd.opcode = ACMD_SD_SEND_OP_COND; 597 cmd.arg = ocr; 598 cmd.flags = MMC_RSP_R3 | MMC_CMD_BCR; 599 cmd.data = NULL; 600 601 for (i = 0; i < 1000; i++) { 602 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, 0, &cmd, 603 CMD_RETRIES); 604 if (err != MMC_ERR_NONE) 605 break; 606 if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) || 607 (ocr & MMC_OCR_VOLTAGE) == 0) 608 break; 609 err = MMC_ERR_TIMEOUT; 610 mmc_ms_delay(10); 611 } 612 if (rocr && err == MMC_ERR_NONE) 613 *rocr = cmd.resp[0]; 614 return (err); 615 } 616 617 static int 618 mmc_send_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr) 619 { 620 struct mmc_command cmd; 621 int err = MMC_ERR_NONE, i; 622 623 memset(&cmd, 0, sizeof(cmd)); 624 cmd.opcode = MMC_SEND_OP_COND; 625 cmd.arg = ocr; 626 cmd.flags = MMC_RSP_R3 | MMC_CMD_BCR; 627 cmd.data = NULL; 628 629 for (i = 0; i < 1000; i++) { 630 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 631 if (err != MMC_ERR_NONE) 632 break; 633 if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) || 634 (ocr & MMC_OCR_VOLTAGE) == 0) 635 break; 636 err = MMC_ERR_TIMEOUT; 637 mmc_ms_delay(10); 638 } 639 if (rocr && err == MMC_ERR_NONE) 640 *rocr = cmd.resp[0]; 641 return (err); 642 } 643 644 static int 645 mmc_send_if_cond(struct mmc_softc *sc, uint8_t vhs) 646 { 647 struct mmc_command cmd; 648 int err; 649 650 memset(&cmd, 0, sizeof(cmd)); 651 cmd.opcode = SD_SEND_IF_COND; 652 cmd.arg = (vhs << 8) + 0xAA; 653 cmd.flags = MMC_RSP_R7 | MMC_CMD_BCR; 654 cmd.data = NULL; 655 656 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 657 return (err); 658 } 659 660 static void 661 mmc_power_up(struct mmc_softc *sc) 662 { 663 device_t dev; 664 enum mmc_vccq vccq; 665 666 dev = sc->dev; 667 mmcbr_set_vdd(dev, mmc_highest_voltage(mmcbr_get_host_ocr(dev))); 668 mmcbr_set_bus_mode(dev, opendrain); 669 mmcbr_set_chip_select(dev, cs_dontcare); 670 mmcbr_set_bus_width(dev, bus_width_1); 671 mmcbr_set_power_mode(dev, power_up); 672 mmcbr_set_clock(dev, 0); 673 mmcbr_update_ios(dev); 674 for (vccq = vccq_330; ; vccq--) { 675 mmcbr_set_vccq(dev, vccq); 676 if (mmcbr_switch_vccq(dev) == 0 || vccq == vccq_120) 677 break; 678 } 679 mmc_ms_delay(1); 680 681 mmcbr_set_clock(dev, SD_MMC_CARD_ID_FREQUENCY); 682 mmcbr_set_timing(dev, bus_timing_normal); 683 mmcbr_set_power_mode(dev, power_on); 684 mmcbr_update_ios(dev); 685 mmc_ms_delay(2); 686 } 687 688 static void 689 mmc_power_down(struct mmc_softc *sc) 690 { 691 device_t dev = sc->dev; 692 693 mmcbr_set_bus_mode(dev, opendrain); 694 mmcbr_set_chip_select(dev, cs_dontcare); 695 mmcbr_set_bus_width(dev, bus_width_1); 696 mmcbr_set_power_mode(dev, power_off); 697 mmcbr_set_clock(dev, 0); 698 mmcbr_set_timing(dev, bus_timing_normal); 699 mmcbr_update_ios(dev); 700 } 701 702 static int 703 mmc_select_card(struct mmc_softc *sc, uint16_t rca) 704 { 705 int err, flags; 706 707 flags = (rca ? MMC_RSP_R1B : MMC_RSP_NONE) | MMC_CMD_AC; 708 sc->retune_paused++; 709 err = mmc_wait_for_command(sc, MMC_SELECT_CARD, (uint32_t)rca << 16, 710 flags, NULL, CMD_RETRIES); 711 sc->retune_paused--; 712 return (err); 713 } 714 715 static int 716 mmc_sd_switch(struct mmc_softc *sc, uint8_t mode, uint8_t grp, uint8_t value, 717 uint8_t *res) 718 { 719 int err; 720 struct mmc_command cmd; 721 struct mmc_data data; 722 723 memset(&cmd, 0, sizeof(cmd)); 724 memset(&data, 0, sizeof(data)); 725 memset(res, 0, 64); 726 727 cmd.opcode = SD_SWITCH_FUNC; 728 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 729 cmd.arg = mode << 31; /* 0 - check, 1 - set */ 730 cmd.arg |= 0x00FFFFFF; 731 cmd.arg &= ~(0xF << (grp * 4)); 732 cmd.arg |= value << (grp * 4); 733 cmd.data = &data; 734 735 data.data = res; 736 data.len = 64; 737 data.flags = MMC_DATA_READ; 738 739 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 740 return (err); 741 } 742 743 static int 744 mmc_set_card_bus_width(struct mmc_softc *sc, struct mmc_ivars *ivar, 745 enum mmc_bus_timing timing) 746 { 747 struct mmc_command cmd; 748 int err; 749 uint8_t value; 750 751 if (mmcbr_get_mode(sc->dev) == mode_sd) { 752 memset(&cmd, 0, sizeof(cmd)); 753 cmd.opcode = ACMD_SET_CLR_CARD_DETECT; 754 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC; 755 cmd.arg = SD_CLR_CARD_DETECT; 756 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, ivar->rca, &cmd, 757 CMD_RETRIES); 758 if (err != 0) 759 return (err); 760 memset(&cmd, 0, sizeof(cmd)); 761 cmd.opcode = ACMD_SET_BUS_WIDTH; 762 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC; 763 switch (ivar->bus_width) { 764 case bus_width_1: 765 cmd.arg = SD_BUS_WIDTH_1; 766 break; 767 case bus_width_4: 768 cmd.arg = SD_BUS_WIDTH_4; 769 break; 770 default: 771 return (MMC_ERR_INVALID); 772 } 773 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, ivar->rca, &cmd, 774 CMD_RETRIES); 775 } else { 776 switch (ivar->bus_width) { 777 case bus_width_1: 778 if (timing == bus_timing_mmc_hs400 || 779 timing == bus_timing_mmc_hs400es) 780 return (MMC_ERR_INVALID); 781 value = EXT_CSD_BUS_WIDTH_1; 782 break; 783 case bus_width_4: 784 switch (timing) { 785 case bus_timing_mmc_ddr52: 786 value = EXT_CSD_BUS_WIDTH_4_DDR; 787 break; 788 case bus_timing_mmc_hs400: 789 case bus_timing_mmc_hs400es: 790 return (MMC_ERR_INVALID); 791 default: 792 value = EXT_CSD_BUS_WIDTH_4; 793 break; 794 } 795 break; 796 case bus_width_8: 797 value = 0; 798 switch (timing) { 799 case bus_timing_mmc_hs400es: 800 value = EXT_CSD_BUS_WIDTH_ES; 801 /* FALLTHROUGH */ 802 case bus_timing_mmc_ddr52: 803 case bus_timing_mmc_hs400: 804 value |= EXT_CSD_BUS_WIDTH_8_DDR; 805 break; 806 default: 807 value = EXT_CSD_BUS_WIDTH_8; 808 break; 809 } 810 break; 811 default: 812 return (MMC_ERR_INVALID); 813 } 814 err = mmc_switch(sc->dev, sc->dev, ivar->rca, 815 EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH, value, 816 ivar->cmd6_time, true); 817 } 818 return (err); 819 } 820 821 static int 822 mmc_set_power_class(struct mmc_softc *sc, struct mmc_ivars *ivar) 823 { 824 device_t dev; 825 const uint8_t *ext_csd; 826 uint32_t clock; 827 uint8_t value; 828 enum mmc_bus_timing timing; 829 enum mmc_bus_width bus_width; 830 831 dev = sc->dev; 832 timing = mmcbr_get_timing(dev); 833 bus_width = ivar->bus_width; 834 if (mmcbr_get_mode(dev) != mode_mmc || ivar->csd.spec_vers < 4 || 835 timing == bus_timing_normal || bus_width == bus_width_1) 836 return (MMC_ERR_NONE); 837 838 value = 0; 839 ext_csd = ivar->raw_ext_csd; 840 clock = mmcbr_get_clock(dev); 841 switch (1 << mmcbr_get_vdd(dev)) { 842 case MMC_OCR_LOW_VOLTAGE: 843 if (clock <= MMC_TYPE_HS_26_MAX) 844 value = ext_csd[EXT_CSD_PWR_CL_26_195]; 845 else if (clock <= MMC_TYPE_HS_52_MAX) { 846 if (timing >= bus_timing_mmc_ddr52 && 847 bus_width >= bus_width_4) 848 value = ext_csd[EXT_CSD_PWR_CL_52_195_DDR]; 849 else 850 value = ext_csd[EXT_CSD_PWR_CL_52_195]; 851 } else if (clock <= MMC_TYPE_HS200_HS400ES_MAX) 852 value = ext_csd[EXT_CSD_PWR_CL_200_195]; 853 break; 854 case MMC_OCR_270_280: 855 case MMC_OCR_280_290: 856 case MMC_OCR_290_300: 857 case MMC_OCR_300_310: 858 case MMC_OCR_310_320: 859 case MMC_OCR_320_330: 860 case MMC_OCR_330_340: 861 case MMC_OCR_340_350: 862 case MMC_OCR_350_360: 863 if (clock <= MMC_TYPE_HS_26_MAX) 864 value = ext_csd[EXT_CSD_PWR_CL_26_360]; 865 else if (clock <= MMC_TYPE_HS_52_MAX) { 866 if (timing == bus_timing_mmc_ddr52 && 867 bus_width >= bus_width_4) 868 value = ext_csd[EXT_CSD_PWR_CL_52_360_DDR]; 869 else 870 value = ext_csd[EXT_CSD_PWR_CL_52_360]; 871 } else if (clock <= MMC_TYPE_HS200_HS400ES_MAX) { 872 if (bus_width == bus_width_8) 873 value = ext_csd[EXT_CSD_PWR_CL_200_360_DDR]; 874 else 875 value = ext_csd[EXT_CSD_PWR_CL_200_360]; 876 } 877 break; 878 default: 879 device_printf(dev, "No power class support for VDD 0x%x\n", 880 1 << mmcbr_get_vdd(dev)); 881 return (MMC_ERR_INVALID); 882 } 883 884 if (bus_width == bus_width_8) 885 value = (value & EXT_CSD_POWER_CLASS_8BIT_MASK) >> 886 EXT_CSD_POWER_CLASS_8BIT_SHIFT; 887 else 888 value = (value & EXT_CSD_POWER_CLASS_4BIT_MASK) >> 889 EXT_CSD_POWER_CLASS_4BIT_SHIFT; 890 891 if (value == 0) 892 return (MMC_ERR_NONE); 893 894 return (mmc_switch(dev, dev, ivar->rca, EXT_CSD_CMD_SET_NORMAL, 895 EXT_CSD_POWER_CLASS, value, ivar->cmd6_time, true)); 896 } 897 898 static int 899 mmc_set_timing(struct mmc_softc *sc, struct mmc_ivars *ivar, 900 enum mmc_bus_timing timing) 901 { 902 u_char switch_res[64]; 903 uint8_t value; 904 int err; 905 906 if (mmcbr_get_mode(sc->dev) == mode_sd) { 907 switch (timing) { 908 case bus_timing_normal: 909 value = SD_SWITCH_NORMAL_MODE; 910 break; 911 case bus_timing_hs: 912 value = SD_SWITCH_HS_MODE; 913 break; 914 default: 915 return (MMC_ERR_INVALID); 916 } 917 err = mmc_sd_switch(sc, SD_SWITCH_MODE_SET, SD_SWITCH_GROUP1, 918 value, switch_res); 919 if (err != MMC_ERR_NONE) 920 return (err); 921 if ((switch_res[16] & 0xf) != value) 922 return (MMC_ERR_FAILED); 923 mmcbr_set_timing(sc->dev, timing); 924 mmcbr_update_ios(sc->dev); 925 } else { 926 switch (timing) { 927 case bus_timing_normal: 928 value = EXT_CSD_HS_TIMING_BC; 929 break; 930 case bus_timing_hs: 931 case bus_timing_mmc_ddr52: 932 value = EXT_CSD_HS_TIMING_HS; 933 break; 934 case bus_timing_mmc_hs200: 935 value = EXT_CSD_HS_TIMING_HS200; 936 break; 937 case bus_timing_mmc_hs400: 938 case bus_timing_mmc_hs400es: 939 value = EXT_CSD_HS_TIMING_HS400; 940 break; 941 default: 942 return (MMC_ERR_INVALID); 943 } 944 err = mmc_switch(sc->dev, sc->dev, ivar->rca, 945 EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, value, 946 ivar->cmd6_time, false); 947 if (err != MMC_ERR_NONE) 948 return (err); 949 mmcbr_set_timing(sc->dev, timing); 950 mmcbr_update_ios(sc->dev); 951 err = mmc_switch_status(sc->dev, sc->dev, ivar->rca, 952 ivar->cmd6_time); 953 } 954 return (err); 955 } 956 957 static int 958 mmc_set_vccq(struct mmc_softc *sc, struct mmc_ivars *ivar, 959 enum mmc_bus_timing timing) 960 { 961 962 if (isset(&ivar->vccq_120, timing)) 963 mmcbr_set_vccq(sc->dev, vccq_120); 964 else if (isset(&ivar->vccq_180, timing)) 965 mmcbr_set_vccq(sc->dev, vccq_180); 966 else 967 mmcbr_set_vccq(sc->dev, vccq_330); 968 if (mmcbr_switch_vccq(sc->dev) != 0) 969 return (MMC_ERR_INVALID); 970 else 971 return (MMC_ERR_NONE); 972 } 973 974 static const uint8_t p8[8] = { 975 0x55, 0xAA, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 976 }; 977 978 static const uint8_t p8ok[8] = { 979 0xAA, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 980 }; 981 982 static const uint8_t p4[4] = { 983 0x5A, 0x00, 0x00, 0x00 984 }; 985 986 static const uint8_t p4ok[4] = { 987 0xA5, 0x00, 0x00, 0x00 988 }; 989 990 static int 991 mmc_test_bus_width(struct mmc_softc *sc) 992 { 993 struct mmc_command cmd; 994 struct mmc_data data; 995 uint8_t buf[8]; 996 int err; 997 998 if (mmcbr_get_caps(sc->dev) & MMC_CAP_8_BIT_DATA) { 999 mmcbr_set_bus_width(sc->dev, bus_width_8); 1000 mmcbr_update_ios(sc->dev); 1001 1002 sc->squelched++; /* Errors are expected, squelch reporting. */ 1003 memset(&cmd, 0, sizeof(cmd)); 1004 memset(&data, 0, sizeof(data)); 1005 cmd.opcode = MMC_BUSTEST_W; 1006 cmd.arg = 0; 1007 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 1008 cmd.data = &data; 1009 1010 data.data = __DECONST(void *, p8); 1011 data.len = 8; 1012 data.flags = MMC_DATA_WRITE; 1013 mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0); 1014 1015 memset(&cmd, 0, sizeof(cmd)); 1016 memset(&data, 0, sizeof(data)); 1017 cmd.opcode = MMC_BUSTEST_R; 1018 cmd.arg = 0; 1019 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 1020 cmd.data = &data; 1021 1022 data.data = buf; 1023 data.len = 8; 1024 data.flags = MMC_DATA_READ; 1025 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0); 1026 sc->squelched--; 1027 1028 mmcbr_set_bus_width(sc->dev, bus_width_1); 1029 mmcbr_update_ios(sc->dev); 1030 1031 if (err == MMC_ERR_NONE && memcmp(buf, p8ok, 8) == 0) 1032 return (bus_width_8); 1033 } 1034 1035 if (mmcbr_get_caps(sc->dev) & MMC_CAP_4_BIT_DATA) { 1036 mmcbr_set_bus_width(sc->dev, bus_width_4); 1037 mmcbr_update_ios(sc->dev); 1038 1039 sc->squelched++; /* Errors are expected, squelch reporting. */ 1040 memset(&cmd, 0, sizeof(cmd)); 1041 memset(&data, 0, sizeof(data)); 1042 cmd.opcode = MMC_BUSTEST_W; 1043 cmd.arg = 0; 1044 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 1045 cmd.data = &data; 1046 1047 data.data = __DECONST(void *, p4); 1048 data.len = 4; 1049 data.flags = MMC_DATA_WRITE; 1050 mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0); 1051 1052 memset(&cmd, 0, sizeof(cmd)); 1053 memset(&data, 0, sizeof(data)); 1054 cmd.opcode = MMC_BUSTEST_R; 1055 cmd.arg = 0; 1056 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 1057 cmd.data = &data; 1058 1059 data.data = buf; 1060 data.len = 4; 1061 data.flags = MMC_DATA_READ; 1062 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0); 1063 sc->squelched--; 1064 1065 mmcbr_set_bus_width(sc->dev, bus_width_1); 1066 mmcbr_update_ios(sc->dev); 1067 1068 if (err == MMC_ERR_NONE && memcmp(buf, p4ok, 4) == 0) 1069 return (bus_width_4); 1070 } 1071 return (bus_width_1); 1072 } 1073 1074 static uint32_t 1075 mmc_get_bits(uint32_t *bits, int bit_len, int start, int size) 1076 { 1077 const int i = (bit_len / 32) - (start / 32) - 1; 1078 const int shift = start & 31; 1079 uint32_t retval = bits[i] >> shift; 1080 1081 if (size + shift > 32) 1082 retval |= bits[i - 1] << (32 - shift); 1083 return (retval & ((1llu << size) - 1)); 1084 } 1085 1086 static void 1087 mmc_decode_cid_sd(uint32_t *raw_cid, struct mmc_cid *cid) 1088 { 1089 int i; 1090 1091 /* There's no version info, so we take it on faith */ 1092 memset(cid, 0, sizeof(*cid)); 1093 cid->mid = mmc_get_bits(raw_cid, 128, 120, 8); 1094 cid->oid = mmc_get_bits(raw_cid, 128, 104, 16); 1095 for (i = 0; i < 5; i++) 1096 cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8); 1097 cid->pnm[5] = 0; 1098 cid->prv = mmc_get_bits(raw_cid, 128, 56, 8); 1099 cid->psn = mmc_get_bits(raw_cid, 128, 24, 32); 1100 cid->mdt_year = mmc_get_bits(raw_cid, 128, 12, 8) + 2000; 1101 cid->mdt_month = mmc_get_bits(raw_cid, 128, 8, 4); 1102 } 1103 1104 static void 1105 mmc_decode_cid_mmc(uint32_t *raw_cid, struct mmc_cid *cid, bool is_4_41p) 1106 { 1107 int i; 1108 1109 /* There's no version info, so we take it on faith */ 1110 memset(cid, 0, sizeof(*cid)); 1111 cid->mid = mmc_get_bits(raw_cid, 128, 120, 8); 1112 cid->oid = mmc_get_bits(raw_cid, 128, 104, 8); 1113 for (i = 0; i < 6; i++) 1114 cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8); 1115 cid->pnm[6] = 0; 1116 cid->prv = mmc_get_bits(raw_cid, 128, 48, 8); 1117 cid->psn = mmc_get_bits(raw_cid, 128, 16, 32); 1118 cid->mdt_month = mmc_get_bits(raw_cid, 128, 12, 4); 1119 cid->mdt_year = mmc_get_bits(raw_cid, 128, 8, 4); 1120 if (is_4_41p) 1121 cid->mdt_year += 2013; 1122 else 1123 cid->mdt_year += 1997; 1124 } 1125 1126 static void 1127 mmc_format_card_id_string(struct mmc_ivars *ivar) 1128 { 1129 char oidstr[8]; 1130 uint8_t c1; 1131 uint8_t c2; 1132 1133 /* 1134 * Format a card ID string for use by the mmcsd driver, it's what 1135 * appears between the <> in the following: 1136 * mmcsd0: 968MB <SD SD01G 8.0 SN 2686905 MFG 08/2008 by 3 TN> at mmc0 1137 * 22.5MHz/4bit/128-block 1138 * 1139 * Also format just the card serial number, which the mmcsd driver will 1140 * use as the disk->d_ident string. 1141 * 1142 * The card_id_string in mmc_ivars is currently allocated as 64 bytes, 1143 * and our max formatted length is currently 55 bytes if every field 1144 * contains the largest value. 1145 * 1146 * Sometimes the oid is two printable ascii chars; when it's not, 1147 * format it as 0xnnnn instead. 1148 */ 1149 c1 = (ivar->cid.oid >> 8) & 0x0ff; 1150 c2 = ivar->cid.oid & 0x0ff; 1151 if (c1 > 0x1f && c1 < 0x7f && c2 > 0x1f && c2 < 0x7f) 1152 snprintf(oidstr, sizeof(oidstr), "%c%c", c1, c2); 1153 else 1154 snprintf(oidstr, sizeof(oidstr), "0x%04x", ivar->cid.oid); 1155 snprintf(ivar->card_sn_string, sizeof(ivar->card_sn_string), 1156 "%08X", ivar->cid.psn); 1157 snprintf(ivar->card_id_string, sizeof(ivar->card_id_string), 1158 "%s%s %s %d.%d SN %08X MFG %02d/%04d by %d %s", 1159 ivar->mode == mode_sd ? "SD" : "MMC", ivar->high_cap ? "HC" : "", 1160 ivar->cid.pnm, ivar->cid.prv >> 4, ivar->cid.prv & 0x0f, 1161 ivar->cid.psn, ivar->cid.mdt_month, ivar->cid.mdt_year, 1162 ivar->cid.mid, oidstr); 1163 } 1164 1165 static const int exp[8] = { 1166 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000 1167 }; 1168 1169 static const int mant[16] = { 1170 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80 1171 }; 1172 1173 static const int cur_min[8] = { 1174 500, 1000, 5000, 10000, 25000, 35000, 60000, 100000 1175 }; 1176 1177 static const int cur_max[8] = { 1178 1000, 5000, 10000, 25000, 35000, 45000, 800000, 200000 1179 }; 1180 1181 static int 1182 mmc_decode_csd_sd(uint32_t *raw_csd, struct mmc_csd *csd) 1183 { 1184 int v; 1185 int m; 1186 int e; 1187 1188 memset(csd, 0, sizeof(*csd)); 1189 csd->csd_structure = v = mmc_get_bits(raw_csd, 128, 126, 2); 1190 if (v == 0) { 1191 m = mmc_get_bits(raw_csd, 128, 115, 4); 1192 e = mmc_get_bits(raw_csd, 128, 112, 3); 1193 csd->tacc = (exp[e] * mant[m] + 9) / 10; 1194 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100; 1195 m = mmc_get_bits(raw_csd, 128, 99, 4); 1196 e = mmc_get_bits(raw_csd, 128, 96, 3); 1197 csd->tran_speed = exp[e] * 10000 * mant[m]; 1198 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12); 1199 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4); 1200 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1); 1201 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1); 1202 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1); 1203 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1); 1204 csd->vdd_r_curr_min = 1205 cur_min[mmc_get_bits(raw_csd, 128, 59, 3)]; 1206 csd->vdd_r_curr_max = 1207 cur_max[mmc_get_bits(raw_csd, 128, 56, 3)]; 1208 csd->vdd_w_curr_min = 1209 cur_min[mmc_get_bits(raw_csd, 128, 53, 3)]; 1210 csd->vdd_w_curr_max = 1211 cur_max[mmc_get_bits(raw_csd, 128, 50, 3)]; 1212 m = mmc_get_bits(raw_csd, 128, 62, 12); 1213 e = mmc_get_bits(raw_csd, 128, 47, 3); 1214 csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len; 1215 csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1); 1216 csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1; 1217 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7); 1218 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1); 1219 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3); 1220 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4); 1221 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1); 1222 return (MMC_ERR_NONE); 1223 } else if (v == 1) { 1224 m = mmc_get_bits(raw_csd, 128, 115, 4); 1225 e = mmc_get_bits(raw_csd, 128, 112, 3); 1226 csd->tacc = (exp[e] * mant[m] + 9) / 10; 1227 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100; 1228 m = mmc_get_bits(raw_csd, 128, 99, 4); 1229 e = mmc_get_bits(raw_csd, 128, 96, 3); 1230 csd->tran_speed = exp[e] * 10000 * mant[m]; 1231 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12); 1232 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4); 1233 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1); 1234 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1); 1235 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1); 1236 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1); 1237 csd->capacity = ((uint64_t)mmc_get_bits(raw_csd, 128, 48, 22) + 1238 1) * 512 * 1024; 1239 csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1); 1240 csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1; 1241 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7); 1242 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1); 1243 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3); 1244 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4); 1245 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1); 1246 return (MMC_ERR_NONE); 1247 } 1248 return (MMC_ERR_INVALID); 1249 } 1250 1251 static void 1252 mmc_decode_csd_mmc(uint32_t *raw_csd, struct mmc_csd *csd) 1253 { 1254 int m; 1255 int e; 1256 1257 memset(csd, 0, sizeof(*csd)); 1258 csd->csd_structure = mmc_get_bits(raw_csd, 128, 126, 2); 1259 csd->spec_vers = mmc_get_bits(raw_csd, 128, 122, 4); 1260 m = mmc_get_bits(raw_csd, 128, 115, 4); 1261 e = mmc_get_bits(raw_csd, 128, 112, 3); 1262 csd->tacc = exp[e] * mant[m] + 9 / 10; 1263 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100; 1264 m = mmc_get_bits(raw_csd, 128, 99, 4); 1265 e = mmc_get_bits(raw_csd, 128, 96, 3); 1266 csd->tran_speed = exp[e] * 10000 * mant[m]; 1267 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12); 1268 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4); 1269 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1); 1270 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1); 1271 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1); 1272 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1); 1273 csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 59, 3)]; 1274 csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 56, 3)]; 1275 csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 53, 3)]; 1276 csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 50, 3)]; 1277 m = mmc_get_bits(raw_csd, 128, 62, 12); 1278 e = mmc_get_bits(raw_csd, 128, 47, 3); 1279 csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len; 1280 csd->erase_blk_en = 0; 1281 csd->erase_sector = (mmc_get_bits(raw_csd, 128, 42, 5) + 1) * 1282 (mmc_get_bits(raw_csd, 128, 37, 5) + 1); 1283 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 5); 1284 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1); 1285 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3); 1286 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4); 1287 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1); 1288 } 1289 1290 static void 1291 mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr) 1292 { 1293 unsigned int scr_struct; 1294 1295 memset(scr, 0, sizeof(*scr)); 1296 1297 scr_struct = mmc_get_bits(raw_scr, 64, 60, 4); 1298 if (scr_struct != 0) { 1299 printf("Unrecognised SCR structure version %d\n", 1300 scr_struct); 1301 return; 1302 } 1303 scr->sda_vsn = mmc_get_bits(raw_scr, 64, 56, 4); 1304 scr->bus_widths = mmc_get_bits(raw_scr, 64, 48, 4); 1305 } 1306 1307 static void 1308 mmc_app_decode_sd_status(uint32_t *raw_sd_status, 1309 struct mmc_sd_status *sd_status) 1310 { 1311 1312 memset(sd_status, 0, sizeof(*sd_status)); 1313 1314 sd_status->bus_width = mmc_get_bits(raw_sd_status, 512, 510, 2); 1315 sd_status->secured_mode = mmc_get_bits(raw_sd_status, 512, 509, 1); 1316 sd_status->card_type = mmc_get_bits(raw_sd_status, 512, 480, 16); 1317 sd_status->prot_area = mmc_get_bits(raw_sd_status, 512, 448, 12); 1318 sd_status->speed_class = mmc_get_bits(raw_sd_status, 512, 440, 8); 1319 sd_status->perf_move = mmc_get_bits(raw_sd_status, 512, 432, 8); 1320 sd_status->au_size = mmc_get_bits(raw_sd_status, 512, 428, 4); 1321 sd_status->erase_size = mmc_get_bits(raw_sd_status, 512, 408, 16); 1322 sd_status->erase_timeout = mmc_get_bits(raw_sd_status, 512, 402, 6); 1323 sd_status->erase_offset = mmc_get_bits(raw_sd_status, 512, 400, 2); 1324 } 1325 1326 static int 1327 mmc_all_send_cid(struct mmc_softc *sc, uint32_t *rawcid) 1328 { 1329 struct mmc_command cmd; 1330 int err; 1331 1332 memset(&cmd, 0, sizeof(cmd)); 1333 cmd.opcode = MMC_ALL_SEND_CID; 1334 cmd.arg = 0; 1335 cmd.flags = MMC_RSP_R2 | MMC_CMD_BCR; 1336 cmd.data = NULL; 1337 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 1338 memcpy(rawcid, cmd.resp, 4 * sizeof(uint32_t)); 1339 return (err); 1340 } 1341 1342 static int 1343 mmc_send_csd(struct mmc_softc *sc, uint16_t rca, uint32_t *rawcsd) 1344 { 1345 struct mmc_command cmd; 1346 int err; 1347 1348 memset(&cmd, 0, sizeof(cmd)); 1349 cmd.opcode = MMC_SEND_CSD; 1350 cmd.arg = rca << 16; 1351 cmd.flags = MMC_RSP_R2 | MMC_CMD_BCR; 1352 cmd.data = NULL; 1353 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 1354 memcpy(rawcsd, cmd.resp, 4 * sizeof(uint32_t)); 1355 return (err); 1356 } 1357 1358 static int 1359 mmc_app_send_scr(struct mmc_softc *sc, uint16_t rca, uint32_t *rawscr) 1360 { 1361 int err; 1362 struct mmc_command cmd; 1363 struct mmc_data data; 1364 1365 memset(&cmd, 0, sizeof(cmd)); 1366 memset(&data, 0, sizeof(data)); 1367 1368 memset(rawscr, 0, 8); 1369 cmd.opcode = ACMD_SEND_SCR; 1370 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 1371 cmd.arg = 0; 1372 cmd.data = &data; 1373 1374 data.data = rawscr; 1375 data.len = 8; 1376 data.flags = MMC_DATA_READ; 1377 1378 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, rca, &cmd, CMD_RETRIES); 1379 rawscr[0] = be32toh(rawscr[0]); 1380 rawscr[1] = be32toh(rawscr[1]); 1381 return (err); 1382 } 1383 1384 static int 1385 mmc_app_sd_status(struct mmc_softc *sc, uint16_t rca, uint32_t *rawsdstatus) 1386 { 1387 struct mmc_command cmd; 1388 struct mmc_data data; 1389 int err, i; 1390 1391 memset(&cmd, 0, sizeof(cmd)); 1392 memset(&data, 0, sizeof(data)); 1393 1394 memset(rawsdstatus, 0, 64); 1395 cmd.opcode = ACMD_SD_STATUS; 1396 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 1397 cmd.arg = 0; 1398 cmd.data = &data; 1399 1400 data.data = rawsdstatus; 1401 data.len = 64; 1402 data.flags = MMC_DATA_READ; 1403 1404 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, rca, &cmd, CMD_RETRIES); 1405 for (i = 0; i < 16; i++) 1406 rawsdstatus[i] = be32toh(rawsdstatus[i]); 1407 return (err); 1408 } 1409 1410 static int 1411 mmc_set_relative_addr(struct mmc_softc *sc, uint16_t resp) 1412 { 1413 struct mmc_command cmd; 1414 int err; 1415 1416 memset(&cmd, 0, sizeof(cmd)); 1417 cmd.opcode = MMC_SET_RELATIVE_ADDR; 1418 cmd.arg = resp << 16; 1419 cmd.flags = MMC_RSP_R6 | MMC_CMD_BCR; 1420 cmd.data = NULL; 1421 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 1422 return (err); 1423 } 1424 1425 static int 1426 mmc_send_relative_addr(struct mmc_softc *sc, uint32_t *resp) 1427 { 1428 struct mmc_command cmd; 1429 int err; 1430 1431 memset(&cmd, 0, sizeof(cmd)); 1432 cmd.opcode = SD_SEND_RELATIVE_ADDR; 1433 cmd.arg = 0; 1434 cmd.flags = MMC_RSP_R6 | MMC_CMD_BCR; 1435 cmd.data = NULL; 1436 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 1437 *resp = cmd.resp[0]; 1438 return (err); 1439 } 1440 1441 static int 1442 mmc_set_blocklen(struct mmc_softc *sc, uint32_t len) 1443 { 1444 struct mmc_command cmd; 1445 int err; 1446 1447 memset(&cmd, 0, sizeof(cmd)); 1448 cmd.opcode = MMC_SET_BLOCKLEN; 1449 cmd.arg = len; 1450 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC; 1451 cmd.data = NULL; 1452 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 1453 return (err); 1454 } 1455 1456 static uint32_t 1457 mmc_timing_to_dtr(struct mmc_ivars *ivar, enum mmc_bus_timing timing) 1458 { 1459 1460 switch (timing) { 1461 case bus_timing_normal: 1462 return (ivar->tran_speed); 1463 case bus_timing_hs: 1464 return (ivar->hs_tran_speed); 1465 case bus_timing_uhs_sdr12: 1466 return (SD_SDR12_MAX); 1467 case bus_timing_uhs_sdr25: 1468 return (SD_SDR25_MAX); 1469 case bus_timing_uhs_ddr50: 1470 return (SD_DDR50_MAX); 1471 case bus_timing_uhs_sdr50: 1472 return (SD_SDR50_MAX); 1473 case bus_timing_uhs_sdr104: 1474 return (SD_SDR104_MAX); 1475 case bus_timing_mmc_ddr52: 1476 return (MMC_TYPE_DDR52_MAX); 1477 case bus_timing_mmc_hs200: 1478 case bus_timing_mmc_hs400: 1479 case bus_timing_mmc_hs400es: 1480 return (MMC_TYPE_HS200_HS400ES_MAX); 1481 } 1482 return (0); 1483 } 1484 1485 static const char * 1486 mmc_timing_to_string(enum mmc_bus_timing timing) 1487 { 1488 1489 switch (timing) { 1490 case bus_timing_normal: 1491 return ("normal speed"); 1492 case bus_timing_hs: 1493 return ("high speed"); 1494 case bus_timing_uhs_sdr12: 1495 case bus_timing_uhs_sdr25: 1496 case bus_timing_uhs_sdr50: 1497 case bus_timing_uhs_sdr104: 1498 return ("single data rate"); 1499 case bus_timing_uhs_ddr50: 1500 case bus_timing_mmc_ddr52: 1501 return ("dual data rate"); 1502 case bus_timing_mmc_hs200: 1503 return ("HS200"); 1504 case bus_timing_mmc_hs400: 1505 return ("HS400"); 1506 case bus_timing_mmc_hs400es: 1507 return ("HS400 with enhanced strobe"); 1508 } 1509 return (""); 1510 } 1511 1512 static bool 1513 mmc_host_timing(device_t dev, enum mmc_bus_timing timing) 1514 { 1515 int host_caps; 1516 1517 host_caps = mmcbr_get_caps(dev); 1518 1519 #define HOST_TIMING_CAP(host_caps, cap) ({ \ 1520 bool retval; \ 1521 if (((host_caps) & (cap)) == (cap)) \ 1522 retval = true; \ 1523 else \ 1524 retval = false; \ 1525 retval; \ 1526 }) 1527 1528 switch (timing) { 1529 case bus_timing_normal: 1530 return (true); 1531 case bus_timing_hs: 1532 return (HOST_TIMING_CAP(host_caps, MMC_CAP_HSPEED)); 1533 case bus_timing_uhs_sdr12: 1534 return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_SDR12)); 1535 case bus_timing_uhs_sdr25: 1536 return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_SDR25)); 1537 case bus_timing_uhs_ddr50: 1538 return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_DDR50)); 1539 case bus_timing_uhs_sdr50: 1540 return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_SDR50)); 1541 case bus_timing_uhs_sdr104: 1542 return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_SDR104)); 1543 case bus_timing_mmc_ddr52: 1544 return (HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_DDR52)); 1545 case bus_timing_mmc_hs200: 1546 return (HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_HS200)); 1547 case bus_timing_mmc_hs400: 1548 return (HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_HS400)); 1549 case bus_timing_mmc_hs400es: 1550 return (HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_HS400 | 1551 MMC_CAP_MMC_ENH_STROBE)); 1552 } 1553 1554 #undef HOST_TIMING_CAP 1555 1556 return (false); 1557 } 1558 1559 static void 1560 mmc_log_card(device_t dev, struct mmc_ivars *ivar, int newcard) 1561 { 1562 enum mmc_bus_timing timing; 1563 1564 device_printf(dev, "Card at relative address 0x%04x%s:\n", 1565 ivar->rca, newcard ? " added" : ""); 1566 device_printf(dev, " card: %s\n", ivar->card_id_string); 1567 for (timing = bus_timing_max; timing > bus_timing_normal; timing--) { 1568 if (isset(&ivar->timings, timing)) 1569 break; 1570 } 1571 device_printf(dev, " quirks: %b\n", ivar->quirks, MMC_QUIRKS_FMT); 1572 device_printf(dev, " bus: %ubit, %uMHz (%s timing)\n", 1573 (ivar->bus_width == bus_width_1 ? 1 : 1574 (ivar->bus_width == bus_width_4 ? 4 : 8)), 1575 mmc_timing_to_dtr(ivar, timing) / 1000000, 1576 mmc_timing_to_string(timing)); 1577 device_printf(dev, " memory: %u blocks, erase sector %u blocks%s\n", 1578 ivar->sec_count, ivar->erase_sector, 1579 ivar->read_only ? ", read-only" : ""); 1580 } 1581 1582 static void 1583 mmc_discover_cards(struct mmc_softc *sc) 1584 { 1585 u_char switch_res[64]; 1586 uint32_t raw_cid[4]; 1587 struct mmc_ivars *ivar = NULL; 1588 const struct mmc_quirk *quirk; 1589 const uint8_t *ext_csd; 1590 device_t child; 1591 int err, host_caps, i, newcard; 1592 uint32_t resp, sec_count, status; 1593 uint16_t rca = 2; 1594 int16_t rev; 1595 uint8_t card_type; 1596 1597 host_caps = mmcbr_get_caps(sc->dev); 1598 if (bootverbose || mmc_debug) 1599 device_printf(sc->dev, "Probing cards\n"); 1600 while (1) { 1601 child = NULL; 1602 sc->squelched++; /* Errors are expected, squelch reporting. */ 1603 err = mmc_all_send_cid(sc, raw_cid); 1604 sc->squelched--; 1605 if (err == MMC_ERR_TIMEOUT) 1606 break; 1607 if (err != MMC_ERR_NONE) { 1608 device_printf(sc->dev, "Error reading CID %d\n", err); 1609 break; 1610 } 1611 newcard = 1; 1612 for (i = 0; i < sc->child_count; i++) { 1613 ivar = device_get_ivars(sc->child_list[i]); 1614 if (memcmp(ivar->raw_cid, raw_cid, sizeof(raw_cid)) == 1615 0) { 1616 newcard = 0; 1617 break; 1618 } 1619 } 1620 if (bootverbose || mmc_debug) { 1621 device_printf(sc->dev, 1622 "%sard detected (CID %08x%08x%08x%08x)\n", 1623 newcard ? "New c" : "C", 1624 raw_cid[0], raw_cid[1], raw_cid[2], raw_cid[3]); 1625 } 1626 if (newcard) { 1627 ivar = malloc(sizeof(struct mmc_ivars), M_DEVBUF, 1628 M_WAITOK | M_ZERO); 1629 memcpy(ivar->raw_cid, raw_cid, sizeof(raw_cid)); 1630 } 1631 if (mmcbr_get_ro(sc->dev)) 1632 ivar->read_only = 1; 1633 ivar->bus_width = bus_width_1; 1634 setbit(&ivar->timings, bus_timing_normal); 1635 ivar->mode = mmcbr_get_mode(sc->dev); 1636 if (ivar->mode == mode_sd) { 1637 mmc_decode_cid_sd(ivar->raw_cid, &ivar->cid); 1638 err = mmc_send_relative_addr(sc, &resp); 1639 if (err != MMC_ERR_NONE) { 1640 device_printf(sc->dev, 1641 "Error getting RCA %d\n", err); 1642 goto free_ivar; 1643 } 1644 ivar->rca = resp >> 16; 1645 /* Get card CSD. */ 1646 err = mmc_send_csd(sc, ivar->rca, ivar->raw_csd); 1647 if (err != MMC_ERR_NONE) { 1648 device_printf(sc->dev, 1649 "Error getting CSD %d\n", err); 1650 goto free_ivar; 1651 } 1652 if (bootverbose || mmc_debug) 1653 device_printf(sc->dev, 1654 "%sard detected (CSD %08x%08x%08x%08x)\n", 1655 newcard ? "New c" : "C", ivar->raw_csd[0], 1656 ivar->raw_csd[1], ivar->raw_csd[2], 1657 ivar->raw_csd[3]); 1658 err = mmc_decode_csd_sd(ivar->raw_csd, &ivar->csd); 1659 if (err != MMC_ERR_NONE) { 1660 device_printf(sc->dev, "Error decoding CSD\n"); 1661 goto free_ivar; 1662 } 1663 ivar->sec_count = ivar->csd.capacity / MMC_SECTOR_SIZE; 1664 if (ivar->csd.csd_structure > 0) 1665 ivar->high_cap = 1; 1666 ivar->tran_speed = ivar->csd.tran_speed; 1667 ivar->erase_sector = ivar->csd.erase_sector * 1668 ivar->csd.write_bl_len / MMC_SECTOR_SIZE; 1669 1670 err = mmc_send_status(sc->dev, sc->dev, ivar->rca, 1671 &status); 1672 if (err != MMC_ERR_NONE) { 1673 device_printf(sc->dev, 1674 "Error reading card status %d\n", err); 1675 goto free_ivar; 1676 } 1677 if ((status & R1_CARD_IS_LOCKED) != 0) { 1678 device_printf(sc->dev, 1679 "Card is password protected, skipping\n"); 1680 goto free_ivar; 1681 } 1682 1683 /* Get card SCR. Card must be selected to fetch it. */ 1684 err = mmc_select_card(sc, ivar->rca); 1685 if (err != MMC_ERR_NONE) { 1686 device_printf(sc->dev, 1687 "Error selecting card %d\n", err); 1688 goto free_ivar; 1689 } 1690 err = mmc_app_send_scr(sc, ivar->rca, ivar->raw_scr); 1691 if (err != MMC_ERR_NONE) { 1692 device_printf(sc->dev, 1693 "Error reading SCR %d\n", err); 1694 goto free_ivar; 1695 } 1696 mmc_app_decode_scr(ivar->raw_scr, &ivar->scr); 1697 /* Get card switch capabilities (command class 10). */ 1698 if ((ivar->scr.sda_vsn >= 1) && 1699 (ivar->csd.ccc & (1 << 10))) { 1700 err = mmc_sd_switch(sc, SD_SWITCH_MODE_CHECK, 1701 SD_SWITCH_GROUP1, SD_SWITCH_NOCHANGE, 1702 switch_res); 1703 if (err == MMC_ERR_NONE && 1704 switch_res[13] & (1 << SD_SWITCH_HS_MODE)) { 1705 setbit(&ivar->timings, bus_timing_hs); 1706 ivar->hs_tran_speed = SD_HS_MAX; 1707 } 1708 } 1709 1710 /* 1711 * We deselect then reselect the card here. Some cards 1712 * become unselected and timeout with the above two 1713 * commands, although the state tables / diagrams in the 1714 * standard suggest they go back to the transfer state. 1715 * Other cards don't become deselected, and if we 1716 * attempt to blindly re-select them, we get timeout 1717 * errors from some controllers. So we deselect then 1718 * reselect to handle all situations. The only thing we 1719 * use from the sd_status is the erase sector size, but 1720 * it is still nice to get that right. 1721 */ 1722 (void)mmc_select_card(sc, 0); 1723 (void)mmc_select_card(sc, ivar->rca); 1724 (void)mmc_app_sd_status(sc, ivar->rca, 1725 ivar->raw_sd_status); 1726 mmc_app_decode_sd_status(ivar->raw_sd_status, 1727 &ivar->sd_status); 1728 if (ivar->sd_status.au_size != 0) { 1729 ivar->erase_sector = 1730 16 << ivar->sd_status.au_size; 1731 } 1732 /* Find maximum supported bus width. */ 1733 if ((host_caps & MMC_CAP_4_BIT_DATA) && 1734 (ivar->scr.bus_widths & SD_SCR_BUS_WIDTH_4)) 1735 ivar->bus_width = bus_width_4; 1736 1737 goto child_common; 1738 } 1739 ivar->rca = rca++; 1740 err = mmc_set_relative_addr(sc, ivar->rca); 1741 if (err != MMC_ERR_NONE) { 1742 device_printf(sc->dev, "Error setting RCA %d\n", err); 1743 goto free_ivar; 1744 } 1745 /* Get card CSD. */ 1746 err = mmc_send_csd(sc, ivar->rca, ivar->raw_csd); 1747 if (err != MMC_ERR_NONE) { 1748 device_printf(sc->dev, "Error getting CSD %d\n", err); 1749 goto free_ivar; 1750 } 1751 if (bootverbose || mmc_debug) 1752 device_printf(sc->dev, 1753 "%sard detected (CSD %08x%08x%08x%08x)\n", 1754 newcard ? "New c" : "C", ivar->raw_csd[0], 1755 ivar->raw_csd[1], ivar->raw_csd[2], 1756 ivar->raw_csd[3]); 1757 1758 mmc_decode_csd_mmc(ivar->raw_csd, &ivar->csd); 1759 ivar->sec_count = ivar->csd.capacity / MMC_SECTOR_SIZE; 1760 ivar->tran_speed = ivar->csd.tran_speed; 1761 ivar->erase_sector = ivar->csd.erase_sector * 1762 ivar->csd.write_bl_len / MMC_SECTOR_SIZE; 1763 1764 err = mmc_send_status(sc->dev, sc->dev, ivar->rca, &status); 1765 if (err != MMC_ERR_NONE) { 1766 device_printf(sc->dev, 1767 "Error reading card status %d\n", err); 1768 goto free_ivar; 1769 } 1770 if ((status & R1_CARD_IS_LOCKED) != 0) { 1771 device_printf(sc->dev, 1772 "Card is password protected, skipping\n"); 1773 goto free_ivar; 1774 } 1775 1776 err = mmc_select_card(sc, ivar->rca); 1777 if (err != MMC_ERR_NONE) { 1778 device_printf(sc->dev, "Error selecting card %d\n", 1779 err); 1780 goto free_ivar; 1781 } 1782 1783 rev = -1; 1784 /* Only MMC >= 4.x devices support EXT_CSD. */ 1785 if (ivar->csd.spec_vers >= 4) { 1786 err = mmc_send_ext_csd(sc->dev, sc->dev, 1787 ivar->raw_ext_csd); 1788 if (err != MMC_ERR_NONE) { 1789 device_printf(sc->dev, 1790 "Error reading EXT_CSD %d\n", err); 1791 goto free_ivar; 1792 } 1793 ext_csd = ivar->raw_ext_csd; 1794 rev = ext_csd[EXT_CSD_REV]; 1795 /* Handle extended capacity from EXT_CSD */ 1796 sec_count = le32dec(&ext_csd[EXT_CSD_SEC_CNT]); 1797 if (sec_count != 0) { 1798 ivar->sec_count = sec_count; 1799 ivar->high_cap = 1; 1800 } 1801 /* Find maximum supported bus width. */ 1802 ivar->bus_width = mmc_test_bus_width(sc); 1803 /* Get device speeds beyond normal mode. */ 1804 card_type = ext_csd[EXT_CSD_CARD_TYPE]; 1805 if ((card_type & EXT_CSD_CARD_TYPE_HS_52) != 0) { 1806 setbit(&ivar->timings, bus_timing_hs); 1807 ivar->hs_tran_speed = MMC_TYPE_HS_52_MAX; 1808 } else if ((card_type & EXT_CSD_CARD_TYPE_HS_26) != 0) { 1809 setbit(&ivar->timings, bus_timing_hs); 1810 ivar->hs_tran_speed = MMC_TYPE_HS_26_MAX; 1811 } 1812 if ((card_type & EXT_CSD_CARD_TYPE_DDR_52_1_2V) != 0 && 1813 (host_caps & MMC_CAP_SIGNALING_120) != 0) { 1814 setbit(&ivar->timings, bus_timing_mmc_ddr52); 1815 setbit(&ivar->vccq_120, bus_timing_mmc_ddr52); 1816 } 1817 if ((card_type & EXT_CSD_CARD_TYPE_DDR_52_1_8V) != 0 && 1818 (host_caps & MMC_CAP_SIGNALING_180) != 0) { 1819 setbit(&ivar->timings, bus_timing_mmc_ddr52); 1820 setbit(&ivar->vccq_180, bus_timing_mmc_ddr52); 1821 } 1822 if ((card_type & EXT_CSD_CARD_TYPE_HS200_1_2V) != 0 && 1823 (host_caps & MMC_CAP_SIGNALING_120) != 0) { 1824 setbit(&ivar->timings, bus_timing_mmc_hs200); 1825 setbit(&ivar->vccq_120, bus_timing_mmc_hs200); 1826 } 1827 if ((card_type & EXT_CSD_CARD_TYPE_HS200_1_8V) != 0 && 1828 (host_caps & MMC_CAP_SIGNALING_180) != 0) { 1829 setbit(&ivar->timings, bus_timing_mmc_hs200); 1830 setbit(&ivar->vccq_180, bus_timing_mmc_hs200); 1831 } 1832 if ((card_type & EXT_CSD_CARD_TYPE_HS400_1_2V) != 0 && 1833 (host_caps & MMC_CAP_SIGNALING_120) != 0 && 1834 ivar->bus_width == bus_width_8) { 1835 setbit(&ivar->timings, bus_timing_mmc_hs400); 1836 setbit(&ivar->vccq_120, bus_timing_mmc_hs400); 1837 } 1838 if ((card_type & EXT_CSD_CARD_TYPE_HS400_1_8V) != 0 && 1839 (host_caps & MMC_CAP_SIGNALING_180) != 0 && 1840 ivar->bus_width == bus_width_8) { 1841 setbit(&ivar->timings, bus_timing_mmc_hs400); 1842 setbit(&ivar->vccq_180, bus_timing_mmc_hs400); 1843 } 1844 if ((card_type & EXT_CSD_CARD_TYPE_HS400_1_2V) != 0 && 1845 (ext_csd[EXT_CSD_STROBE_SUPPORT] & 1846 EXT_CSD_STROBE_SUPPORT_EN) != 0 && 1847 (host_caps & MMC_CAP_SIGNALING_120) != 0 && 1848 ivar->bus_width == bus_width_8) { 1849 setbit(&ivar->timings, bus_timing_mmc_hs400es); 1850 setbit(&ivar->vccq_120, bus_timing_mmc_hs400es); 1851 } 1852 if ((card_type & EXT_CSD_CARD_TYPE_HS400_1_8V) != 0 && 1853 (ext_csd[EXT_CSD_STROBE_SUPPORT] & 1854 EXT_CSD_STROBE_SUPPORT_EN) != 0 && 1855 (host_caps & MMC_CAP_SIGNALING_180) != 0 && 1856 ivar->bus_width == bus_width_8) { 1857 setbit(&ivar->timings, bus_timing_mmc_hs400es); 1858 setbit(&ivar->vccq_180, bus_timing_mmc_hs400es); 1859 } 1860 /* 1861 * Determine generic switch timeout (provided in 1862 * units of 10 ms), defaulting to 500 ms. 1863 */ 1864 ivar->cmd6_time = 500 * 1000; 1865 if (rev >= 6) 1866 ivar->cmd6_time = 10 * 1867 ext_csd[EXT_CSD_GEN_CMD6_TIME]; 1868 /* Handle HC erase sector size. */ 1869 if (ext_csd[EXT_CSD_ERASE_GRP_SIZE] != 0) { 1870 ivar->erase_sector = 1024 * 1871 ext_csd[EXT_CSD_ERASE_GRP_SIZE]; 1872 err = mmc_switch(sc->dev, sc->dev, ivar->rca, 1873 EXT_CSD_CMD_SET_NORMAL, 1874 EXT_CSD_ERASE_GRP_DEF, 1875 EXT_CSD_ERASE_GRP_DEF_EN, 1876 ivar->cmd6_time, true); 1877 if (err != MMC_ERR_NONE) { 1878 device_printf(sc->dev, 1879 "Error setting erase group %d\n", 1880 err); 1881 goto free_ivar; 1882 } 1883 } 1884 } 1885 1886 mmc_decode_cid_mmc(ivar->raw_cid, &ivar->cid, rev >= 5); 1887 1888 child_common: 1889 for (quirk = &mmc_quirks[0]; quirk->mid != 0x0; quirk++) { 1890 if ((quirk->mid == MMC_QUIRK_MID_ANY || 1891 quirk->mid == ivar->cid.mid) && 1892 (quirk->oid == MMC_QUIRK_OID_ANY || 1893 quirk->oid == ivar->cid.oid) && 1894 strncmp(quirk->pnm, ivar->cid.pnm, 1895 sizeof(ivar->cid.pnm)) == 0) { 1896 ivar->quirks = quirk->quirks; 1897 break; 1898 } 1899 } 1900 1901 /* 1902 * Some cards that report maximum I/O block sizes greater 1903 * than 512 require the block length to be set to 512, even 1904 * though that is supposed to be the default. Example: 1905 * 1906 * Transcend 2GB SDSC card, CID: 1907 * mid=0x1b oid=0x534d pnm="00000" prv=1.0 mdt=00.2000 1908 */ 1909 if (ivar->csd.read_bl_len != MMC_SECTOR_SIZE || 1910 ivar->csd.write_bl_len != MMC_SECTOR_SIZE) 1911 mmc_set_blocklen(sc, MMC_SECTOR_SIZE); 1912 1913 mmc_format_card_id_string(ivar); 1914 1915 if (bootverbose || mmc_debug) 1916 mmc_log_card(sc->dev, ivar, newcard); 1917 if (newcard) { 1918 /* Add device. */ 1919 child = device_add_child(sc->dev, NULL, -1); 1920 if (child != NULL) { 1921 device_set_ivars(child, ivar); 1922 sc->child_list = realloc(sc->child_list, 1923 sizeof(device_t) * sc->child_count + 1, 1924 M_DEVBUF, M_WAITOK); 1925 sc->child_list[sc->child_count++] = child; 1926 } else 1927 device_printf(sc->dev, "Error adding child\n"); 1928 } 1929 1930 free_ivar: 1931 if (newcard && child == NULL) 1932 free(ivar, M_DEVBUF); 1933 (void)mmc_select_card(sc, 0); 1934 /* 1935 * Not returning here when one MMC device could no be added 1936 * potentially would mean looping forever when that device 1937 * is broken (in which case it also may impact the remainder 1938 * of the bus anyway, though). 1939 */ 1940 if ((newcard && child == NULL) || 1941 mmcbr_get_mode(sc->dev) == mode_sd) 1942 return; 1943 } 1944 } 1945 1946 static void 1947 mmc_update_child_list(struct mmc_softc *sc) 1948 { 1949 device_t child; 1950 int i, j; 1951 1952 if (sc->child_count == 0) { 1953 free(sc->child_list, M_DEVBUF); 1954 return; 1955 } 1956 for (i = j = 0; i < sc->child_count; i++) { 1957 for (;;) { 1958 child = sc->child_list[j++]; 1959 if (child != NULL) 1960 break; 1961 } 1962 if (i != j) 1963 sc->child_list[i] = child; 1964 } 1965 sc->child_list = realloc(sc->child_list, sizeof(device_t) * 1966 sc->child_count, M_DEVBUF, M_WAITOK); 1967 } 1968 1969 static void 1970 mmc_rescan_cards(struct mmc_softc *sc) 1971 { 1972 struct mmc_ivars *ivar; 1973 int err, i, j; 1974 1975 for (i = j = 0; i < sc->child_count; i++) { 1976 ivar = device_get_ivars(sc->child_list[i]); 1977 if (mmc_select_card(sc, ivar->rca) != MMC_ERR_NONE) { 1978 if (bootverbose || mmc_debug) 1979 device_printf(sc->dev, 1980 "Card at relative address %d lost\n", 1981 ivar->rca); 1982 err = device_delete_child(sc->dev, sc->child_list[i]); 1983 if (err != 0) { 1984 j++; 1985 continue; 1986 } 1987 free(ivar, M_DEVBUF); 1988 } else 1989 j++; 1990 } 1991 if (sc->child_count == j) 1992 goto out; 1993 sc->child_count = j; 1994 mmc_update_child_list(sc); 1995 out: 1996 (void)mmc_select_card(sc, 0); 1997 } 1998 1999 static int 2000 mmc_delete_cards(struct mmc_softc *sc, bool final) 2001 { 2002 struct mmc_ivars *ivar; 2003 int err, i, j; 2004 2005 err = 0; 2006 for (i = j = 0; i < sc->child_count; i++) { 2007 ivar = device_get_ivars(sc->child_list[i]); 2008 if (bootverbose || mmc_debug) 2009 device_printf(sc->dev, 2010 "Card at relative address %d deleted\n", 2011 ivar->rca); 2012 err = device_delete_child(sc->dev, sc->child_list[i]); 2013 if (err != 0) { 2014 j++; 2015 if (final == false) 2016 continue; 2017 else 2018 break; 2019 } 2020 free(ivar, M_DEVBUF); 2021 } 2022 sc->child_count = j; 2023 mmc_update_child_list(sc); 2024 return (err); 2025 } 2026 2027 static void 2028 mmc_go_discovery(struct mmc_softc *sc) 2029 { 2030 uint32_t ocr; 2031 device_t dev; 2032 int err; 2033 2034 dev = sc->dev; 2035 if (mmcbr_get_power_mode(dev) != power_on) { 2036 /* 2037 * First, try SD modes 2038 */ 2039 sc->squelched++; /* Errors are expected, squelch reporting. */ 2040 mmcbr_set_mode(dev, mode_sd); 2041 mmc_power_up(sc); 2042 mmcbr_set_bus_mode(dev, pushpull); 2043 if (bootverbose || mmc_debug) 2044 device_printf(sc->dev, "Probing bus\n"); 2045 mmc_idle_cards(sc); 2046 err = mmc_send_if_cond(sc, 1); 2047 if ((bootverbose || mmc_debug) && err == 0) 2048 device_printf(sc->dev, 2049 "SD 2.0 interface conditions: OK\n"); 2050 if (mmc_send_app_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) { 2051 if (bootverbose || mmc_debug) 2052 device_printf(sc->dev, "SD probe: failed\n"); 2053 /* 2054 * Failed, try MMC 2055 */ 2056 mmcbr_set_mode(dev, mode_mmc); 2057 if (mmc_send_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) { 2058 if (bootverbose || mmc_debug) 2059 device_printf(sc->dev, 2060 "MMC probe: failed\n"); 2061 ocr = 0; /* Failed both, powerdown. */ 2062 } else if (bootverbose || mmc_debug) 2063 device_printf(sc->dev, 2064 "MMC probe: OK (OCR: 0x%08x)\n", ocr); 2065 } else if (bootverbose || mmc_debug) 2066 device_printf(sc->dev, "SD probe: OK (OCR: 0x%08x)\n", 2067 ocr); 2068 sc->squelched--; 2069 2070 mmcbr_set_ocr(dev, mmc_select_vdd(sc, ocr)); 2071 if (mmcbr_get_ocr(dev) != 0) 2072 mmc_idle_cards(sc); 2073 } else { 2074 mmcbr_set_bus_mode(dev, opendrain); 2075 mmcbr_set_clock(dev, SD_MMC_CARD_ID_FREQUENCY); 2076 mmcbr_update_ios(dev); 2077 /* XXX recompute vdd based on new cards? */ 2078 } 2079 /* 2080 * Make sure that we have a mutually agreeable voltage to at least 2081 * one card on the bus. 2082 */ 2083 if (bootverbose || mmc_debug) 2084 device_printf(sc->dev, "Current OCR: 0x%08x\n", 2085 mmcbr_get_ocr(dev)); 2086 if (mmcbr_get_ocr(dev) == 0) { 2087 device_printf(sc->dev, "No compatible cards found on bus\n"); 2088 (void)mmc_delete_cards(sc, false); 2089 mmc_power_down(sc); 2090 return; 2091 } 2092 /* 2093 * Reselect the cards after we've idled them above. 2094 */ 2095 if (mmcbr_get_mode(dev) == mode_sd) { 2096 err = mmc_send_if_cond(sc, 1); 2097 mmc_send_app_op_cond(sc, 2098 (err ? 0 : MMC_OCR_CCS) | mmcbr_get_ocr(dev), NULL); 2099 } else 2100 mmc_send_op_cond(sc, MMC_OCR_CCS | mmcbr_get_ocr(dev), NULL); 2101 mmc_discover_cards(sc); 2102 mmc_rescan_cards(sc); 2103 2104 mmcbr_set_bus_mode(dev, pushpull); 2105 mmcbr_update_ios(dev); 2106 mmc_calculate_clock(sc); 2107 } 2108 2109 static int 2110 mmc_calculate_clock(struct mmc_softc *sc) 2111 { 2112 device_t dev; 2113 struct mmc_ivars *ivar; 2114 int i; 2115 uint32_t dtr, max_dtr; 2116 uint16_t rca; 2117 enum mmc_bus_timing max_timing, timing; 2118 bool changed, hs400; 2119 2120 dev = sc->dev; 2121 max_dtr = mmcbr_get_f_max(dev); 2122 max_timing = bus_timing_max; 2123 do { 2124 changed = false; 2125 for (i = 0; i < sc->child_count; i++) { 2126 ivar = device_get_ivars(sc->child_list[i]); 2127 if (isclr(&ivar->timings, max_timing) || 2128 !mmc_host_timing(dev, max_timing)) { 2129 for (timing = max_timing - 1; timing >= 2130 bus_timing_normal; timing--) { 2131 if (isset(&ivar->timings, timing) && 2132 mmc_host_timing(dev, timing)) { 2133 max_timing = timing; 2134 break; 2135 } 2136 } 2137 changed = true; 2138 } 2139 dtr = mmc_timing_to_dtr(ivar, max_timing); 2140 if (dtr < max_dtr) { 2141 max_dtr = dtr; 2142 changed = true; 2143 } 2144 } 2145 } while (changed == true); 2146 2147 if (bootverbose || mmc_debug) { 2148 device_printf(dev, 2149 "setting transfer rate to %d.%03dMHz (%s timing)\n", 2150 max_dtr / 1000000, (max_dtr / 1000) % 1000, 2151 mmc_timing_to_string(max_timing)); 2152 } 2153 2154 /* 2155 * HS400 must be tuned in HS200 mode, so in case of HS400 we begin 2156 * with HS200 following the sequence as described in "6.6.2.2 HS200 2157 * timing mode selection" of the eMMC specification v5.1, too, and 2158 * switch to max_timing later. HS400ES requires no tuning and, thus, 2159 * can be switch to directly, but requires the same detour via high 2160 * speed mode as does HS400 (see mmc_switch_to_hs400()). 2161 */ 2162 hs400 = max_timing == bus_timing_mmc_hs400; 2163 timing = hs400 == true ? bus_timing_mmc_hs200 : max_timing; 2164 for (i = 0; i < sc->child_count; i++) { 2165 ivar = device_get_ivars(sc->child_list[i]); 2166 if ((ivar->timings & ~(1 << bus_timing_normal)) == 0) 2167 goto clock; 2168 2169 rca = ivar->rca; 2170 if (mmc_select_card(sc, rca) != MMC_ERR_NONE) { 2171 device_printf(dev, "Card at relative address %d " 2172 "failed to select\n", rca); 2173 continue; 2174 } 2175 2176 if (timing == bus_timing_mmc_hs200 || /* includes HS400 */ 2177 timing == bus_timing_mmc_hs400es) { 2178 if (mmc_set_vccq(sc, ivar, timing) != MMC_ERR_NONE) { 2179 device_printf(dev, "Failed to set VCCQ for " 2180 "card at relative address %d\n", rca); 2181 continue; 2182 } 2183 } 2184 2185 if (timing == bus_timing_mmc_hs200) { /* includes HS400 */ 2186 /* Set bus width (required for initial tuning). */ 2187 if (mmc_set_card_bus_width(sc, ivar, timing) != 2188 MMC_ERR_NONE) { 2189 device_printf(dev, "Card at relative address " 2190 "%d failed to set bus width\n", rca); 2191 continue; 2192 } 2193 mmcbr_set_bus_width(dev, ivar->bus_width); 2194 mmcbr_update_ios(dev); 2195 } else if (timing == bus_timing_mmc_hs400es) { 2196 if (mmc_switch_to_hs400(sc, ivar, max_dtr, timing) != 2197 MMC_ERR_NONE) { 2198 device_printf(dev, "Card at relative address " 2199 "%d failed to set %s timing\n", rca, 2200 mmc_timing_to_string(timing)); 2201 continue; 2202 } 2203 goto power_class; 2204 } 2205 2206 if (mmc_set_timing(sc, ivar, timing) != MMC_ERR_NONE) { 2207 device_printf(dev, "Card at relative address %d " 2208 "failed to set %s timing\n", rca, 2209 mmc_timing_to_string(timing)); 2210 continue; 2211 } 2212 2213 if (timing == bus_timing_mmc_ddr52) { 2214 /* 2215 * Set EXT_CSD_BUS_WIDTH_n_DDR in EXT_CSD_BUS_WIDTH 2216 * (must be done after switching to EXT_CSD_HS_TIMING). 2217 */ 2218 if (mmc_set_card_bus_width(sc, ivar, timing) != 2219 MMC_ERR_NONE) { 2220 device_printf(dev, "Card at relative address " 2221 "%d failed to set bus width\n", rca); 2222 continue; 2223 } 2224 mmcbr_set_bus_width(dev, ivar->bus_width); 2225 mmcbr_update_ios(dev); 2226 if (mmc_set_vccq(sc, ivar, timing) != MMC_ERR_NONE) { 2227 device_printf(dev, "Failed to set VCCQ for " 2228 "card at relative address %d\n", rca); 2229 continue; 2230 } 2231 } 2232 2233 clock: 2234 /* Set clock (must be done before initial tuning). */ 2235 mmcbr_set_clock(dev, max_dtr); 2236 mmcbr_update_ios(dev); 2237 2238 if (mmcbr_tune(dev, hs400) != 0) { 2239 device_printf(dev, "Card at relative address %d " 2240 "failed to execute initial tuning\n", rca); 2241 continue; 2242 } 2243 2244 if (hs400 == true && mmc_switch_to_hs400(sc, ivar, max_dtr, 2245 max_timing) != MMC_ERR_NONE) { 2246 device_printf(dev, "Card at relative address %d " 2247 "failed to set %s timing\n", rca, 2248 mmc_timing_to_string(max_timing)); 2249 continue; 2250 } 2251 2252 power_class: 2253 if (mmc_set_power_class(sc, ivar) != MMC_ERR_NONE) { 2254 device_printf(dev, "Card at relative address %d " 2255 "failed to set power class\n", rca); 2256 } 2257 } 2258 (void)mmc_select_card(sc, 0); 2259 return (max_dtr); 2260 } 2261 2262 /* 2263 * Switch from HS200 to HS400 (either initially or for re-tuning) or directly 2264 * to HS400ES. This follows the sequences described in "6.6.2.3 HS400 timing 2265 * mode selection" of the eMMC specification v5.1. 2266 */ 2267 static int 2268 mmc_switch_to_hs400(struct mmc_softc *sc, struct mmc_ivars *ivar, 2269 uint32_t clock, enum mmc_bus_timing max_timing) 2270 { 2271 device_t dev; 2272 int err; 2273 uint16_t rca; 2274 2275 dev = sc->dev; 2276 rca = ivar->rca; 2277 2278 /* 2279 * Both clock and timing must be set as appropriate for high speed 2280 * before eventually switching to HS400/HS400ES; mmc_set_timing() 2281 * will issue mmcbr_update_ios(). 2282 */ 2283 mmcbr_set_clock(dev, ivar->hs_tran_speed); 2284 err = mmc_set_timing(sc, ivar, bus_timing_hs); 2285 if (err != MMC_ERR_NONE) 2286 return (err); 2287 2288 /* 2289 * Set EXT_CSD_BUS_WIDTH_8_DDR in EXT_CSD_BUS_WIDTH (and additionally 2290 * EXT_CSD_BUS_WIDTH_ES for HS400ES). 2291 */ 2292 err = mmc_set_card_bus_width(sc, ivar, max_timing); 2293 if (err != MMC_ERR_NONE) 2294 return (err); 2295 mmcbr_set_bus_width(dev, ivar->bus_width); 2296 mmcbr_update_ios(dev); 2297 2298 /* Finally, switch to HS400/HS400ES mode. */ 2299 err = mmc_set_timing(sc, ivar, max_timing); 2300 if (err != MMC_ERR_NONE) 2301 return (err); 2302 mmcbr_set_clock(dev, clock); 2303 mmcbr_update_ios(dev); 2304 return (MMC_ERR_NONE); 2305 } 2306 2307 /* 2308 * Switch from HS400 to HS200 (for re-tuning). 2309 */ 2310 static int 2311 mmc_switch_to_hs200(struct mmc_softc *sc, struct mmc_ivars *ivar, 2312 uint32_t clock) 2313 { 2314 device_t dev; 2315 int err; 2316 uint16_t rca; 2317 2318 dev = sc->dev; 2319 rca = ivar->rca; 2320 2321 /* 2322 * Both clock and timing must initially be set as appropriate for 2323 * DDR52 before eventually switching to HS200; mmc_set_timing() 2324 * will issue mmcbr_update_ios(). 2325 */ 2326 mmcbr_set_clock(dev, ivar->hs_tran_speed); 2327 err = mmc_set_timing(sc, ivar, bus_timing_mmc_ddr52); 2328 if (err != MMC_ERR_NONE) 2329 return (err); 2330 2331 /* 2332 * Next, switch to high speed. Thus, clear EXT_CSD_BUS_WIDTH_n_DDR 2333 * in EXT_CSD_BUS_WIDTH and update bus width and timing in ios. 2334 */ 2335 err = mmc_set_card_bus_width(sc, ivar, bus_timing_hs); 2336 if (err != MMC_ERR_NONE) 2337 return (err); 2338 mmcbr_set_bus_width(dev, ivar->bus_width); 2339 mmcbr_set_timing(sc->dev, bus_timing_hs); 2340 mmcbr_update_ios(dev); 2341 2342 /* Finally, switch to HS200 mode. */ 2343 err = mmc_set_timing(sc, ivar, bus_timing_mmc_hs200); 2344 if (err != MMC_ERR_NONE) 2345 return (err); 2346 mmcbr_set_clock(dev, clock); 2347 mmcbr_update_ios(dev); 2348 return (MMC_ERR_NONE); 2349 } 2350 2351 static int 2352 mmc_retune(device_t busdev, device_t dev, bool reset) 2353 { 2354 struct mmc_softc *sc; 2355 struct mmc_ivars *ivar; 2356 int err; 2357 uint32_t clock; 2358 enum mmc_bus_timing timing; 2359 2360 if (device_get_parent(dev) != busdev) 2361 return (MMC_ERR_INVALID); 2362 2363 sc = device_get_softc(busdev); 2364 if (sc->retune_needed != 1 && sc->retune_paused != 0) 2365 return (MMC_ERR_INVALID); 2366 2367 timing = mmcbr_get_timing(busdev); 2368 if (timing == bus_timing_mmc_hs400) { 2369 /* 2370 * Controllers use the data strobe line to latch data from 2371 * the devices in HS400 mode so periodic re-tuning isn't 2372 * expected to be required, i. e. only if a CRC or tuning 2373 * error is signaled to the bridge. In these latter cases 2374 * we are asked to reset the tuning circuit and need to do 2375 * the switch timing dance. 2376 */ 2377 if (reset == false) 2378 return (0); 2379 ivar = device_get_ivars(dev); 2380 clock = mmcbr_get_clock(busdev); 2381 if (mmc_switch_to_hs200(sc, ivar, clock) != MMC_ERR_NONE) 2382 return (MMC_ERR_BADCRC); 2383 } 2384 err = mmcbr_retune(busdev, reset); 2385 if (err != 0 && timing == bus_timing_mmc_hs400) 2386 return (MMC_ERR_BADCRC); 2387 switch (err) { 2388 case 0: 2389 break; 2390 case EIO: 2391 return (MMC_ERR_FAILED); 2392 default: 2393 return (MMC_ERR_INVALID); 2394 } 2395 if (timing == bus_timing_mmc_hs400) { 2396 if (mmc_switch_to_hs400(sc, ivar, clock, timing) != 2397 MMC_ERR_NONE) 2398 return (MMC_ERR_BADCRC); 2399 } 2400 return (MMC_ERR_NONE); 2401 } 2402 2403 static void 2404 mmc_retune_pause(device_t busdev, device_t dev, bool retune) 2405 { 2406 struct mmc_softc *sc; 2407 2408 sc = device_get_softc(busdev); 2409 KASSERT(device_get_parent(dev) == busdev, 2410 ("%s: %s is not a child of %s", __func__, device_get_nameunit(dev), 2411 device_get_nameunit(busdev))); 2412 KASSERT(sc->owner != NULL, 2413 ("%s: Request from %s without bus being acquired.", __func__, 2414 device_get_nameunit(dev))); 2415 2416 if (retune == true && sc->retune_paused == 0) 2417 sc->retune_needed = 1; 2418 sc->retune_paused++; 2419 } 2420 2421 static void 2422 mmc_retune_unpause(device_t busdev, device_t dev) 2423 { 2424 struct mmc_softc *sc; 2425 2426 sc = device_get_softc(busdev); 2427 KASSERT(device_get_parent(dev) == busdev, 2428 ("%s: %s is not a child of %s", __func__, device_get_nameunit(dev), 2429 device_get_nameunit(busdev))); 2430 KASSERT(sc->owner != NULL, 2431 ("%s: Request from %s without bus being acquired.", __func__, 2432 device_get_nameunit(dev))); 2433 KASSERT(sc->retune_paused != 0, 2434 ("%s: Re-tune pause count already at 0", __func__)); 2435 2436 sc->retune_paused--; 2437 } 2438 2439 static void 2440 mmc_scan(struct mmc_softc *sc) 2441 { 2442 device_t dev = sc->dev; 2443 int err; 2444 2445 err = mmc_acquire_bus(dev, dev); 2446 if (err != 0) { 2447 device_printf(dev, "Failed to acquire bus for scanning\n"); 2448 return; 2449 } 2450 mmc_go_discovery(sc); 2451 err = mmc_release_bus(dev, dev); 2452 if (err != 0) { 2453 device_printf(dev, "Failed to release bus after scanning\n"); 2454 return; 2455 } 2456 (void)bus_generic_attach(dev); 2457 } 2458 2459 static int 2460 mmc_read_ivar(device_t bus, device_t child, int which, uintptr_t *result) 2461 { 2462 struct mmc_ivars *ivar = device_get_ivars(child); 2463 2464 switch (which) { 2465 default: 2466 return (EINVAL); 2467 case MMC_IVAR_SPEC_VERS: 2468 *result = ivar->csd.spec_vers; 2469 break; 2470 case MMC_IVAR_DSR_IMP: 2471 *result = ivar->csd.dsr_imp; 2472 break; 2473 case MMC_IVAR_MEDIA_SIZE: 2474 *result = ivar->sec_count; 2475 break; 2476 case MMC_IVAR_RCA: 2477 *result = ivar->rca; 2478 break; 2479 case MMC_IVAR_SECTOR_SIZE: 2480 *result = MMC_SECTOR_SIZE; 2481 break; 2482 case MMC_IVAR_TRAN_SPEED: 2483 *result = mmcbr_get_clock(bus); 2484 break; 2485 case MMC_IVAR_READ_ONLY: 2486 *result = ivar->read_only; 2487 break; 2488 case MMC_IVAR_HIGH_CAP: 2489 *result = ivar->high_cap; 2490 break; 2491 case MMC_IVAR_CARD_TYPE: 2492 *result = ivar->mode; 2493 break; 2494 case MMC_IVAR_BUS_WIDTH: 2495 *result = ivar->bus_width; 2496 break; 2497 case MMC_IVAR_ERASE_SECTOR: 2498 *result = ivar->erase_sector; 2499 break; 2500 case MMC_IVAR_MAX_DATA: 2501 *result = mmcbr_get_max_data(bus); 2502 break; 2503 case MMC_IVAR_CMD6_TIMEOUT: 2504 *result = ivar->cmd6_time; 2505 break; 2506 case MMC_IVAR_QUIRKS: 2507 *result = ivar->quirks; 2508 break; 2509 case MMC_IVAR_CARD_ID_STRING: 2510 *(char **)result = ivar->card_id_string; 2511 break; 2512 case MMC_IVAR_CARD_SN_STRING: 2513 *(char **)result = ivar->card_sn_string; 2514 break; 2515 } 2516 return (0); 2517 } 2518 2519 static int 2520 mmc_write_ivar(device_t bus, device_t child, int which, uintptr_t value) 2521 { 2522 2523 /* 2524 * None are writable ATM 2525 */ 2526 return (EINVAL); 2527 } 2528 2529 static void 2530 mmc_delayed_attach(void *xsc) 2531 { 2532 struct mmc_softc *sc = xsc; 2533 2534 mmc_scan(sc); 2535 config_intrhook_disestablish(&sc->config_intrhook); 2536 } 2537 2538 static int 2539 mmc_child_location(device_t dev, device_t child, struct sbuf *sb) 2540 { 2541 2542 sbuf_printf(sb, "rca=0x%04x", mmc_get_rca(child)); 2543 return (0); 2544 } 2545 2546 static device_method_t mmc_methods[] = { 2547 /* device_if */ 2548 DEVMETHOD(device_probe, mmc_probe), 2549 DEVMETHOD(device_attach, mmc_attach), 2550 DEVMETHOD(device_detach, mmc_detach), 2551 DEVMETHOD(device_suspend, mmc_suspend), 2552 DEVMETHOD(device_resume, mmc_resume), 2553 2554 /* Bus interface */ 2555 DEVMETHOD(bus_read_ivar, mmc_read_ivar), 2556 DEVMETHOD(bus_write_ivar, mmc_write_ivar), 2557 DEVMETHOD(bus_child_location, mmc_child_location), 2558 2559 /* MMC Bus interface */ 2560 DEVMETHOD(mmcbus_retune_pause, mmc_retune_pause), 2561 DEVMETHOD(mmcbus_retune_unpause, mmc_retune_unpause), 2562 DEVMETHOD(mmcbus_wait_for_request, mmc_wait_for_request), 2563 DEVMETHOD(mmcbus_acquire_bus, mmc_acquire_bus), 2564 DEVMETHOD(mmcbus_release_bus, mmc_release_bus), 2565 2566 DEVMETHOD_END 2567 }; 2568 2569 driver_t mmc_driver = { 2570 "mmc", 2571 mmc_methods, 2572 sizeof(struct mmc_softc), 2573 }; 2574 devclass_t mmc_devclass; 2575 2576 MODULE_VERSION(mmc, MMC_VERSION); 2577