1 /*- 2 * Copyright (c) 2009 Yahoo! Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 /* PCI/PCI-X/PCIe bus interface for the LSI MPT2 controllers */ 31 32 /* TODO Move headers to mpsvar */ 33 #include <sys/types.h> 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/kernel.h> 37 #include <sys/module.h> 38 #include <sys/bus.h> 39 #include <sys/conf.h> 40 #include <sys/malloc.h> 41 #include <sys/sysctl.h> 42 #include <sys/uio.h> 43 44 #include <machine/bus.h> 45 #include <machine/resource.h> 46 #include <sys/rman.h> 47 48 #include <dev/pci/pcireg.h> 49 #include <dev/pci/pcivar.h> 50 #include <dev/pci/pci_private.h> 51 52 #include <dev/mps/mpi/mpi2_type.h> 53 #include <dev/mps/mpi/mpi2.h> 54 #include <dev/mps/mpi/mpi2_ioc.h> 55 #include <dev/mps/mpi/mpi2_cnfg.h> 56 #include <dev/mps/mpi/mpi2_tool.h> 57 58 #include <sys/queue.h> 59 #include <sys/kthread.h> 60 #include <dev/mps/mps_ioctl.h> 61 #include <dev/mps/mpsvar.h> 62 63 static int mps_pci_probe(device_t); 64 static int mps_pci_attach(device_t); 65 static int mps_pci_detach(device_t); 66 static int mps_pci_suspend(device_t); 67 static int mps_pci_resume(device_t); 68 static void mps_pci_free(struct mps_softc *); 69 static int mps_alloc_msix(struct mps_softc *sc, int msgs); 70 static int mps_alloc_msi(struct mps_softc *sc, int msgs); 71 72 static device_method_t mps_methods[] = { 73 DEVMETHOD(device_probe, mps_pci_probe), 74 DEVMETHOD(device_attach, mps_pci_attach), 75 DEVMETHOD(device_detach, mps_pci_detach), 76 DEVMETHOD(device_suspend, mps_pci_suspend), 77 DEVMETHOD(device_resume, mps_pci_resume), 78 79 DEVMETHOD_END 80 }; 81 82 static driver_t mps_pci_driver = { 83 "mps", 84 mps_methods, 85 sizeof(struct mps_softc) 86 }; 87 88 static devclass_t mps_devclass; 89 DRIVER_MODULE(mps, pci, mps_pci_driver, mps_devclass, 0, 0); 90 MODULE_DEPEND(mps, cam, 1, 1, 1); 91 92 struct mps_ident { 93 uint16_t vendor; 94 uint16_t device; 95 uint16_t subvendor; 96 uint16_t subdevice; 97 u_int flags; 98 const char *desc; 99 } mps_identifiers[] = { 100 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2004, 101 0xffff, 0xffff, 0, "LSI SAS2004" }, 102 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2008, 103 0xffff, 0xffff, 0, "LSI SAS2008" }, 104 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_1, 105 0xffff, 0xffff, 0, "LSI SAS2108" }, 106 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_2, 107 0xffff, 0xffff, 0, "LSI SAS2108" }, 108 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_3, 109 0xffff, 0xffff, 0, "LSI SAS2108" }, 110 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2116_1, 111 0xffff, 0xffff, 0, "LSI SAS2116" }, 112 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2116_2, 113 0xffff, 0xffff, 0, "LSI SAS2116" }, 114 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_1, 115 0xffff, 0xffff, 0, "LSI SAS2208" }, 116 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_2, 117 0xffff, 0xffff, 0, "LSI SAS2208" }, 118 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_3, 119 0xffff, 0xffff, 0, "LSI SAS2208" }, 120 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_4, 121 0xffff, 0xffff, 0, "LSI SAS2208" }, 122 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_5, 123 0xffff, 0xffff, 0, "LSI SAS2208" }, 124 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_6, 125 0xffff, 0xffff, 0, "LSI SAS2208" }, 126 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_1, 127 0xffff, 0xffff, 0, "LSI SAS2308" }, 128 // Add Customer specific vender/subdevice id before generic 129 // (0xffff) vender/subdevice id. 130 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2, 131 0x8086, 0x3516, 0, "Intel(R) Integrated RAID Module RMS25JB080" }, 132 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2, 133 0x8086, 0x3517, 0, "Intel(R) Integrated RAID Module RMS25JB040" }, 134 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2, 135 0x8086, 0x3518, 0, "Intel(R) Integrated RAID Module RMS25KB080" }, 136 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2, 137 0x8086, 0x3519, 0, "Intel(R) Integrated RAID Module RMS25KB040" }, 138 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2, 139 0xffff, 0xffff, 0, "LSI SAS2308" }, 140 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_3, 141 0xffff, 0xffff, 0, "LSI SAS2308" }, 142 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SSS6200, 143 0xffff, 0xffff, MPS_FLAGS_WD_AVAILABLE, "LSI SSS6200" }, 144 { 0, 0, 0, 0, 0, NULL } 145 }; 146 147 static struct mps_ident * 148 mps_find_ident(device_t dev) 149 { 150 struct mps_ident *m; 151 152 for (m = mps_identifiers; m->vendor != 0; m++) { 153 if (m->vendor != pci_get_vendor(dev)) 154 continue; 155 if (m->device != pci_get_device(dev)) 156 continue; 157 if ((m->subvendor != 0xffff) && 158 (m->subvendor != pci_get_subvendor(dev))) 159 continue; 160 if ((m->subdevice != 0xffff) && 161 (m->subdevice != pci_get_subdevice(dev))) 162 continue; 163 return (m); 164 } 165 166 return (NULL); 167 } 168 169 static int 170 mps_pci_probe(device_t dev) 171 { 172 struct mps_ident *id; 173 174 if ((id = mps_find_ident(dev)) != NULL) { 175 device_set_desc(dev, id->desc); 176 return (BUS_PROBE_DEFAULT); 177 } 178 return (ENXIO); 179 } 180 181 static int 182 mps_pci_attach(device_t dev) 183 { 184 struct mps_softc *sc; 185 struct mps_ident *m; 186 uint16_t command; 187 int error; 188 189 sc = device_get_softc(dev); 190 bzero(sc, sizeof(*sc)); 191 sc->mps_dev = dev; 192 m = mps_find_ident(dev); 193 sc->mps_flags = m->flags; 194 195 /* Twiddle basic PCI config bits for a sanity check */ 196 command = pci_read_config(dev, PCIR_COMMAND, 2); 197 command |= PCIM_CMD_BUSMASTEREN; 198 pci_write_config(dev, PCIR_COMMAND, command, 2); 199 command = pci_read_config(dev, PCIR_COMMAND, 2); 200 if ((command & PCIM_CMD_BUSMASTEREN) == 0) { 201 mps_printf(sc, "Cannot enable PCI busmaster\n"); 202 return (ENXIO); 203 } 204 if ((command & PCIM_CMD_MEMEN) == 0) { 205 mps_printf(sc, "PCI memory window not available\n"); 206 return (ENXIO); 207 } 208 209 /* Allocate the System Interface Register Set */ 210 sc->mps_regs_rid = PCIR_BAR(1); 211 if ((sc->mps_regs_resource = bus_alloc_resource_any(dev, 212 SYS_RES_MEMORY, &sc->mps_regs_rid, RF_ACTIVE)) == NULL) { 213 mps_printf(sc, "Cannot allocate PCI registers\n"); 214 return (ENXIO); 215 } 216 sc->mps_btag = rman_get_bustag(sc->mps_regs_resource); 217 sc->mps_bhandle = rman_get_bushandle(sc->mps_regs_resource); 218 219 /* Allocate the parent DMA tag */ 220 if (bus_dma_tag_create( bus_get_dma_tag(dev), /* parent */ 221 1, 0, /* algnmnt, boundary */ 222 BUS_SPACE_MAXADDR, /* lowaddr */ 223 BUS_SPACE_MAXADDR, /* highaddr */ 224 NULL, NULL, /* filter, filterarg */ 225 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 226 BUS_SPACE_UNRESTRICTED, /* nsegments */ 227 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */ 228 0, /* flags */ 229 NULL, NULL, /* lockfunc, lockarg */ 230 &sc->mps_parent_dmat)) { 231 mps_printf(sc, "Cannot allocate parent DMA tag\n"); 232 mps_pci_free(sc); 233 return (ENOMEM); 234 } 235 236 if ((error = mps_attach(sc)) != 0) 237 mps_pci_free(sc); 238 239 return (error); 240 } 241 242 int 243 mps_pci_setup_interrupts(struct mps_softc *sc) 244 { 245 device_t dev; 246 int i, error, msgs; 247 248 dev = sc->mps_dev; 249 error = ENXIO; 250 if ((sc->disable_msix == 0) && 251 ((msgs = pci_msix_count(dev)) >= MPS_MSI_COUNT)) 252 error = mps_alloc_msix(sc, MPS_MSI_COUNT); 253 if ((error != 0) && (sc->disable_msi == 0) && 254 ((msgs = pci_msi_count(dev)) >= MPS_MSI_COUNT)) 255 error = mps_alloc_msi(sc, MPS_MSI_COUNT); 256 257 if (error != 0) { 258 sc->mps_flags |= MPS_FLAGS_INTX; 259 sc->mps_irq_rid[0] = 0; 260 sc->mps_irq[0] = bus_alloc_resource_any(dev, SYS_RES_IRQ, 261 &sc->mps_irq_rid[0], RF_SHAREABLE | RF_ACTIVE); 262 if (sc->mps_irq[0] == NULL) { 263 mps_printf(sc, "Cannot allocate INTx interrupt\n"); 264 return (ENXIO); 265 } 266 error = bus_setup_intr(dev, sc->mps_irq[0], 267 INTR_TYPE_BIO | INTR_MPSAFE, NULL, mps_intr, sc, 268 &sc->mps_intrhand[0]); 269 if (error) 270 mps_printf(sc, "Cannot setup INTx interrupt\n"); 271 } else { 272 sc->mps_flags |= MPS_FLAGS_MSI; 273 for (i = 0; i < MPS_MSI_COUNT; i++) { 274 sc->mps_irq_rid[i] = i + 1; 275 sc->mps_irq[i] = bus_alloc_resource_any(dev, 276 SYS_RES_IRQ, &sc->mps_irq_rid[i], RF_ACTIVE); 277 if (sc->mps_irq[i] == NULL) { 278 mps_printf(sc, 279 "Cannot allocate MSI interrupt\n"); 280 return (ENXIO); 281 } 282 error = bus_setup_intr(dev, sc->mps_irq[i], 283 INTR_TYPE_BIO | INTR_MPSAFE, NULL, mps_intr_msi, 284 sc, &sc->mps_intrhand[i]); 285 if (error) { 286 mps_printf(sc, 287 "Cannot setup MSI interrupt %d\n", i); 288 break; 289 } 290 } 291 } 292 293 return (error); 294 } 295 296 static int 297 mps_pci_detach(device_t dev) 298 { 299 struct mps_softc *sc; 300 int error; 301 302 sc = device_get_softc(dev); 303 304 if ((error = mps_free(sc)) != 0) 305 return (error); 306 307 mps_pci_free(sc); 308 return (0); 309 } 310 311 static void 312 mps_pci_free(struct mps_softc *sc) 313 { 314 int i; 315 316 if (sc->mps_parent_dmat != NULL) { 317 bus_dma_tag_destroy(sc->mps_parent_dmat); 318 } 319 320 if (sc->mps_flags & MPS_FLAGS_MSI) { 321 for (i = 0; i < MPS_MSI_COUNT; i++) { 322 if (sc->mps_irq[i] != NULL) { 323 bus_teardown_intr(sc->mps_dev, sc->mps_irq[i], 324 sc->mps_intrhand[i]); 325 bus_release_resource(sc->mps_dev, SYS_RES_IRQ, 326 sc->mps_irq_rid[i], sc->mps_irq[i]); 327 } 328 } 329 pci_release_msi(sc->mps_dev); 330 } 331 332 if (sc->mps_flags & MPS_FLAGS_INTX) { 333 bus_teardown_intr(sc->mps_dev, sc->mps_irq[0], 334 sc->mps_intrhand[0]); 335 bus_release_resource(sc->mps_dev, SYS_RES_IRQ, 336 sc->mps_irq_rid[0], sc->mps_irq[0]); 337 } 338 339 if (sc->mps_regs_resource != NULL) { 340 bus_release_resource(sc->mps_dev, SYS_RES_MEMORY, 341 sc->mps_regs_rid, sc->mps_regs_resource); 342 } 343 344 return; 345 } 346 347 static int 348 mps_pci_suspend(device_t dev) 349 { 350 return (EINVAL); 351 } 352 353 static int 354 mps_pci_resume(device_t dev) 355 { 356 return (EINVAL); 357 } 358 359 static int 360 mps_alloc_msix(struct mps_softc *sc, int msgs) 361 { 362 int error; 363 364 error = pci_alloc_msix(sc->mps_dev, &msgs); 365 return (error); 366 } 367 368 static int 369 mps_alloc_msi(struct mps_softc *sc, int msgs) 370 { 371 int error; 372 373 error = pci_alloc_msi(sc->mps_dev, &msgs); 374 return (error); 375 } 376 377 int 378 mps_pci_restore(struct mps_softc *sc) 379 { 380 struct pci_devinfo *dinfo; 381 382 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 383 384 dinfo = device_get_ivars(sc->mps_dev); 385 if (dinfo == NULL) { 386 mps_dprint(sc, MPS_FAULT, "%s: NULL dinfo\n", __func__); 387 return (EINVAL); 388 } 389 390 pci_cfg_restore(sc->mps_dev, dinfo); 391 return (0); 392 } 393 394