1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2000-2001 Jonathan Chen All rights reserved. 5 * Copyright (c) 2002-2004 M. Warner Losh <imp@FreeBSD.org> 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 */ 29 30 /*- 31 * Copyright (c) 1998, 1999 and 2000 32 * HAYAKAWA Koichi. All rights reserved. 33 * 34 * Redistribution and use in source and binary forms, with or without 35 * modification, are permitted provided that the following conditions 36 * are met: 37 * 1. Redistributions of source code must retain the above copyright 38 * notice, this list of conditions and the following disclaimer. 39 * 2. Redistributions in binary form must reproduce the above copyright 40 * notice, this list of conditions and the following disclaimer in the 41 * documentation and/or other materials provided with the distribution. 42 * 3. All advertising materials mentioning features or use of this software 43 * must display the following acknowledgement: 44 * This product includes software developed by HAYAKAWA Koichi. 45 * 4. The name of the author may not be used to endorse or promote products 46 * derived from this software without specific prior written permission. 47 * 48 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 49 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 50 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 51 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 52 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 53 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 54 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 55 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 56 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 57 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 58 */ 59 60 /* 61 * Driver for PCI to CardBus Bridge chips 62 * 63 * References: 64 * TI Datasheets: 65 * http://www-s.ti.com/cgi-bin/sc/generic2.cgi?family=PCI+CARDBUS+CONTROLLERS 66 * 67 * Written by Jonathan Chen <jon@freebsd.org> 68 * The author would like to acknowledge: 69 * * HAYAKAWA Koichi: Author of the NetBSD code for the same thing 70 * * Warner Losh: Newbus/newcard guru and author of the pccard side of things 71 * * YAMAMOTO Shigeru: Author of another FreeBSD cardbus driver 72 * * David Cross: Author of the initial ugly hack for a specific cardbus card 73 */ 74 75 #include <sys/param.h> 76 #include <sys/bus.h> 77 #include <sys/condvar.h> 78 #include <sys/errno.h> 79 #include <sys/kernel.h> 80 #include <sys/module.h> 81 #include <sys/kthread.h> 82 #include <sys/lock.h> 83 #include <sys/malloc.h> 84 #include <sys/mutex.h> 85 #include <sys/proc.h> 86 #include <sys/rman.h> 87 #include <sys/sysctl.h> 88 #include <sys/systm.h> 89 #include <machine/bus.h> 90 #include <machine/resource.h> 91 92 #include <dev/pci/pcireg.h> 93 #include <dev/pci/pcivar.h> 94 #include <dev/pci/pcib_private.h> 95 96 #include <dev/pccard/pccardreg.h> 97 #include <dev/pccard/pccardvar.h> 98 99 #include <dev/exca/excareg.h> 100 #include <dev/exca/excavar.h> 101 102 #include <dev/pccbb/pccbbreg.h> 103 #include <dev/pccbb/pccbbvar.h> 104 105 #include "power_if.h" 106 #include "card_if.h" 107 #include "pcib_if.h" 108 109 #define DPRINTF(x) do { if (cbb_debug) printf x; } while (0) 110 #define DEVPRINTF(x) do { if (cbb_debug) device_printf x; } while (0) 111 112 #define PCI_MASK_CONFIG(DEV,REG,MASK,SIZE) \ 113 pci_write_config(DEV, REG, pci_read_config(DEV, REG, SIZE) MASK, SIZE) 114 #define PCI_MASK2_CONFIG(DEV,REG,MASK1,MASK2,SIZE) \ 115 pci_write_config(DEV, REG, ( \ 116 pci_read_config(DEV, REG, SIZE) MASK1) MASK2, SIZE) 117 118 #define CBB_CARD_PRESENT(s) ((s & CBB_STATE_CD) == 0) 119 120 #define CBB_START_MEM 0x88000000 121 #define CBB_START_32_IO 0x1000 122 #define CBB_START_16_IO 0x100 123 124 /* sysctl vars */ 125 static SYSCTL_NODE(_hw, OID_AUTO, cbb, CTLFLAG_RD | CTLFLAG_MPSAFE, 0, 126 "CBB parameters"); 127 128 /* There's no way to say TUNEABLE_LONG to get the right types */ 129 u_long cbb_start_mem = CBB_START_MEM; 130 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_memory, CTLFLAG_RWTUN, 131 &cbb_start_mem, CBB_START_MEM, 132 "Starting address for memory allocations"); 133 134 u_long cbb_start_16_io = CBB_START_16_IO; 135 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_16_io, CTLFLAG_RWTUN, 136 &cbb_start_16_io, CBB_START_16_IO, 137 "Starting ioport for 16-bit cards"); 138 139 u_long cbb_start_32_io = CBB_START_32_IO; 140 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_32_io, CTLFLAG_RWTUN, 141 &cbb_start_32_io, CBB_START_32_IO, 142 "Starting ioport for 32-bit cards"); 143 144 int cbb_debug = 0; 145 SYSCTL_INT(_hw_cbb, OID_AUTO, debug, CTLFLAG_RWTUN, &cbb_debug, 0, 146 "Verbose cardbus bridge debugging"); 147 148 static void cbb_insert(struct cbb_softc *sc); 149 static void cbb_removal(struct cbb_softc *sc); 150 static uint32_t cbb_detect_voltage(device_t brdev); 151 static int cbb_cardbus_reset_power(device_t brdev, device_t child, int on); 152 static int cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, 153 uint32_t end); 154 static int cbb_cardbus_mem_open(device_t brdev, int win, 155 uint32_t start, uint32_t end); 156 static void cbb_cardbus_auto_open(struct cbb_softc *sc, int type); 157 static int cbb_cardbus_activate_resource(device_t brdev, device_t child, 158 int type, int rid, struct resource *res); 159 static int cbb_cardbus_deactivate_resource(device_t brdev, 160 device_t child, int type, int rid, struct resource *res); 161 static struct resource *cbb_cardbus_alloc_resource(device_t brdev, 162 device_t child, int type, int *rid, rman_res_t start, 163 rman_res_t end, rman_res_t count, u_int flags); 164 static int cbb_cardbus_release_resource(device_t brdev, device_t child, 165 int type, int rid, struct resource *res); 166 static int cbb_cardbus_power_enable_socket(device_t brdev, 167 device_t child); 168 static int cbb_cardbus_power_disable_socket(device_t brdev, 169 device_t child); 170 static int cbb_func_filt(void *arg); 171 static void cbb_func_intr(void *arg); 172 173 static void 174 cbb_remove_res(struct cbb_softc *sc, struct resource *res) 175 { 176 struct cbb_reslist *rle; 177 178 SLIST_FOREACH(rle, &sc->rl, link) { 179 if (rle->res == res) { 180 SLIST_REMOVE(&sc->rl, rle, cbb_reslist, link); 181 free(rle, M_DEVBUF); 182 return; 183 } 184 } 185 } 186 187 static struct resource * 188 cbb_find_res(struct cbb_softc *sc, int type, int rid) 189 { 190 struct cbb_reslist *rle; 191 192 SLIST_FOREACH(rle, &sc->rl, link) 193 if (SYS_RES_MEMORY == rle->type && rid == rle->rid) 194 return (rle->res); 195 return (NULL); 196 } 197 198 static void 199 cbb_insert_res(struct cbb_softc *sc, struct resource *res, int type, 200 int rid) 201 { 202 struct cbb_reslist *rle; 203 204 /* 205 * Need to record allocated resource so we can iterate through 206 * it later. 207 */ 208 rle = malloc(sizeof(struct cbb_reslist), M_DEVBUF, M_NOWAIT); 209 if (rle == NULL) 210 panic("cbb_cardbus_alloc_resource: can't record entry!"); 211 rle->res = res; 212 rle->type = type; 213 rle->rid = rid; 214 SLIST_INSERT_HEAD(&sc->rl, rle, link); 215 } 216 217 static void 218 cbb_destroy_res(struct cbb_softc *sc) 219 { 220 struct cbb_reslist *rle; 221 222 while ((rle = SLIST_FIRST(&sc->rl)) != NULL) { 223 device_printf(sc->dev, "Danger Will Robinson: Resource " 224 "left allocated! This is a bug... " 225 "(rid=%x, type=%d, addr=%jx)\n", rle->rid, rle->type, 226 rman_get_start(rle->res)); 227 SLIST_REMOVE_HEAD(&sc->rl, link); 228 free(rle, M_DEVBUF); 229 } 230 } 231 232 /* 233 * Disable function interrupts by telling the bridge to generate IRQ1 234 * interrupts. These interrupts aren't really generated by the chip, since 235 * IRQ1 is reserved. Some chipsets assert INTA# inappropriately during 236 * initialization, so this helps to work around the problem. 237 * 238 * XXX We can't do this workaround for all chipsets, because this 239 * XXX causes interference with the keyboard because somechipsets will 240 * XXX actually signal IRQ1 over their serial interrupt connections to 241 * XXX the south bridge. Disable it it for now. 242 */ 243 void 244 cbb_disable_func_intr(struct cbb_softc *sc) 245 { 246 #if 0 247 uint8_t reg; 248 249 reg = (exca_getb(&sc->exca, EXCA_INTR) & ~EXCA_INTR_IRQ_MASK) | 250 EXCA_INTR_IRQ_RESERVED1; 251 exca_putb(&sc->exca, EXCA_INTR, reg); 252 #endif 253 } 254 255 /* 256 * Enable function interrupts. We turn on function interrupts when the card 257 * requests an interrupt. The PCMCIA standard says that we should set 258 * the lower 4 bits to 0 to route via PCI. Note: we call this for both 259 * CardBus and R2 (PC Card) cases, but it should have no effect on CardBus 260 * cards. 261 */ 262 static void 263 cbb_enable_func_intr(struct cbb_softc *sc) 264 { 265 uint8_t reg; 266 267 reg = (exca_getb(&sc->exca, EXCA_INTR) & ~EXCA_INTR_IRQ_MASK) | 268 EXCA_INTR_IRQ_NONE; 269 PCI_MASK_CONFIG(sc->dev, CBBR_BRIDGECTRL, 270 & ~CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN, 2); 271 exca_putb(&sc->exca, EXCA_INTR, reg); 272 } 273 274 int 275 cbb_detach(device_t brdev) 276 { 277 struct cbb_softc *sc = device_get_softc(brdev); 278 device_t *devlist; 279 int tmp, tries, error, numdevs; 280 281 /* 282 * Before we delete the children (which we have to do because 283 * attach doesn't check for children busses correctly), we have 284 * to detach the children. Even if we didn't need to delete the 285 * children, we have to detach them. 286 */ 287 error = bus_generic_detach(brdev); 288 if (error != 0) 289 return (error); 290 291 /* 292 * Since the attach routine doesn't search for children before it 293 * attaches them to this device, we must delete them here in order 294 * for the kldload/unload case to work. If we failed to do that, then 295 * we'd get duplicate devices when cbb.ko was reloaded. 296 */ 297 tries = 10; 298 do { 299 error = device_get_children(brdev, &devlist, &numdevs); 300 if (error == 0) 301 break; 302 /* 303 * Try hard to cope with low memory. 304 */ 305 if (error == ENOMEM) { 306 pause("cbbnomem", 1); 307 continue; 308 } 309 } while (tries-- > 0); 310 for (tmp = 0; tmp < numdevs; tmp++) 311 device_delete_child(brdev, devlist[tmp]); 312 free(devlist, M_TEMP); 313 314 /* Turn off the interrupts */ 315 cbb_set(sc, CBB_SOCKET_MASK, 0); 316 317 /* reset 16-bit pcmcia bus */ 318 exca_clrb(&sc->exca, EXCA_INTR, EXCA_INTR_RESET); 319 320 /* turn off power */ 321 cbb_power(brdev, CARD_OFF); 322 323 /* Ack the interrupt */ 324 cbb_set(sc, CBB_SOCKET_EVENT, 0xffffffff); 325 326 /* 327 * Wait for the thread to die. kproc_exit will do a wakeup 328 * on the event thread's struct proc * so that we know it is 329 * safe to proceed. IF the thread is running, set the please 330 * die flag and wait for it to comply. Since the wakeup on 331 * the event thread happens only in kproc_exit, we don't 332 * need to loop here. 333 */ 334 bus_teardown_intr(brdev, sc->irq_res, sc->intrhand); 335 mtx_lock(&sc->mtx); 336 sc->flags |= CBB_KTHREAD_DONE; 337 while (sc->flags & CBB_KTHREAD_RUNNING) { 338 DEVPRINTF((sc->dev, "Waiting for thread to die\n")); 339 wakeup(&sc->intrhand); 340 msleep(sc->event_thread, &sc->mtx, PWAIT, "cbbun", 0); 341 } 342 mtx_unlock(&sc->mtx); 343 344 bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res); 345 bus_release_resource(brdev, SYS_RES_MEMORY, CBBR_SOCKBASE, 346 sc->base_res); 347 mtx_destroy(&sc->mtx); 348 return (0); 349 } 350 351 int 352 cbb_setup_intr(device_t dev, device_t child, struct resource *irq, 353 int flags, driver_filter_t *filt, driver_intr_t *intr, void *arg, 354 void **cookiep) 355 { 356 struct cbb_intrhand *ih; 357 struct cbb_softc *sc = device_get_softc(dev); 358 int err; 359 360 if (filt == NULL && intr == NULL) 361 return (EINVAL); 362 ih = malloc(sizeof(struct cbb_intrhand), M_DEVBUF, M_NOWAIT); 363 if (ih == NULL) 364 return (ENOMEM); 365 *cookiep = ih; 366 ih->filt = filt; 367 ih->intr = intr; 368 ih->arg = arg; 369 ih->sc = sc; 370 /* 371 * XXX need to turn on ISA interrupts, if we ever support them, but 372 * XXX for now that's all we need to do. 373 */ 374 err = BUS_SETUP_INTR(device_get_parent(dev), child, irq, flags, 375 filt ? cbb_func_filt : NULL, intr ? cbb_func_intr : NULL, ih, 376 &ih->cookie); 377 if (err != 0) { 378 free(ih, M_DEVBUF); 379 return (err); 380 } 381 cbb_enable_func_intr(sc); 382 sc->cardok = 1; 383 return 0; 384 } 385 386 int 387 cbb_teardown_intr(device_t dev, device_t child, struct resource *irq, 388 void *cookie) 389 { 390 struct cbb_intrhand *ih; 391 int err; 392 393 /* XXX Need to do different things for ISA interrupts. */ 394 ih = (struct cbb_intrhand *) cookie; 395 err = BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, 396 ih->cookie); 397 if (err != 0) 398 return (err); 399 free(ih, M_DEVBUF); 400 return (0); 401 } 402 403 void 404 cbb_driver_added(device_t brdev, driver_t *driver) 405 { 406 struct cbb_softc *sc = device_get_softc(brdev); 407 device_t *devlist; 408 device_t dev; 409 int tmp; 410 int numdevs; 411 int wake = 0; 412 413 DEVICE_IDENTIFY(driver, brdev); 414 tmp = device_get_children(brdev, &devlist, &numdevs); 415 if (tmp != 0) { 416 device_printf(brdev, "Cannot get children list, no reprobe\n"); 417 return; 418 } 419 for (tmp = 0; tmp < numdevs; tmp++) { 420 dev = devlist[tmp]; 421 if (device_get_state(dev) == DS_NOTPRESENT && 422 device_probe_and_attach(dev) == 0) 423 wake++; 424 } 425 free(devlist, M_TEMP); 426 427 if (wake > 0) 428 wakeup(&sc->intrhand); 429 } 430 431 void 432 cbb_child_detached(device_t brdev, device_t child) 433 { 434 struct cbb_softc *sc = device_get_softc(brdev); 435 436 /* I'm not sure we even need this */ 437 if (child != sc->cbdev && child != sc->exca.pccarddev) 438 device_printf(brdev, "Unknown child detached: %s\n", 439 device_get_nameunit(child)); 440 } 441 442 /************************************************************************/ 443 /* Kthreads */ 444 /************************************************************************/ 445 446 void 447 cbb_event_thread(void *arg) 448 { 449 struct cbb_softc *sc = arg; 450 uint32_t status; 451 int err; 452 int not_a_card = 0; 453 454 /* 455 * We need to act as a power sequencer on startup. Delay 2s/channel 456 * to ensure the other channels have had a chance to come up. We likely 457 * should add a lock that's shared on a per-slot basis so that only 458 * one power event can happen per slot at a time. 459 */ 460 pause("cbbstart", hz * device_get_unit(sc->dev) * 2); 461 mtx_lock(&sc->mtx); 462 sc->flags |= CBB_KTHREAD_RUNNING; 463 while ((sc->flags & CBB_KTHREAD_DONE) == 0) { 464 mtx_unlock(&sc->mtx); 465 status = cbb_get(sc, CBB_SOCKET_STATE); 466 DPRINTF(("Status is 0x%x\n", status)); 467 if (!CBB_CARD_PRESENT(status)) { 468 not_a_card = 0; /* We know card type */ 469 cbb_removal(sc); 470 } else if (status & CBB_STATE_NOT_A_CARD) { 471 /* 472 * Up to 10 times, try to rescan the card when we see 473 * NOT_A_CARD. 10 is somehwat arbitrary. When this 474 * pathology hits, there's a ~40% chance each try will 475 * fail. 10 tries takes about 5s and results in a 476 * 99.99% certainty of the results. 477 */ 478 if (not_a_card++ < 10) { 479 DEVPRINTF((sc->dev, 480 "Not a card bit set, rescanning\n")); 481 cbb_setb(sc, CBB_SOCKET_FORCE, CBB_FORCE_CV_TEST); 482 } else { 483 device_printf(sc->dev, 484 "Can't determine card type\n"); 485 } 486 } else { 487 not_a_card = 0; /* We know card type */ 488 cbb_insert(sc); 489 } 490 491 /* 492 * First time through we need to tell mountroot that we're 493 * done. 494 */ 495 if (sc->sc_root_token) { 496 root_mount_rel(sc->sc_root_token); 497 sc->sc_root_token = NULL; 498 } 499 500 /* 501 * Wait until it has been 250ms since the last time we 502 * get an interrupt. We handle the rest of the interrupt 503 * at the top of the loop. Although we clear the bit in the 504 * ISR, we signal sc->cv from the detach path after we've 505 * set the CBB_KTHREAD_DONE bit, so we can't do a simple 506 * 250ms sleep here. 507 * 508 * In our ISR, we turn off the card changed interrupt. Turn 509 * them back on here before we wait for them to happen. We 510 * turn them on/off so that we can tolerate a large latency 511 * between the time we signal cbb_event_thread and it gets 512 * a chance to run. 513 */ 514 mtx_lock(&sc->mtx); 515 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD | CBB_SOCKET_MASK_CSTS); 516 msleep(&sc->intrhand, &sc->mtx, 0, "-", 0); 517 err = 0; 518 while (err != EWOULDBLOCK && 519 (sc->flags & CBB_KTHREAD_DONE) == 0) 520 err = msleep(&sc->intrhand, &sc->mtx, 0, "-", hz / 5); 521 } 522 DEVPRINTF((sc->dev, "Thread terminating\n")); 523 sc->flags &= ~CBB_KTHREAD_RUNNING; 524 mtx_unlock(&sc->mtx); 525 kproc_exit(0); 526 } 527 528 /************************************************************************/ 529 /* Insert/removal */ 530 /************************************************************************/ 531 532 static void 533 cbb_insert(struct cbb_softc *sc) 534 { 535 uint32_t sockevent, sockstate; 536 537 sockevent = cbb_get(sc, CBB_SOCKET_EVENT); 538 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 539 540 DEVPRINTF((sc->dev, "card inserted: event=0x%08x, state=%08x\n", 541 sockevent, sockstate)); 542 543 if (sockstate & CBB_STATE_R2_CARD) { 544 if (device_is_attached(sc->exca.pccarddev)) { 545 sc->flags |= CBB_16BIT_CARD; 546 exca_insert(&sc->exca); 547 } else { 548 device_printf(sc->dev, 549 "16-bit card inserted, but no pccard bus.\n"); 550 } 551 } else if (sockstate & CBB_STATE_CB_CARD) { 552 if (device_is_attached(sc->cbdev)) { 553 sc->flags &= ~CBB_16BIT_CARD; 554 CARD_ATTACH_CARD(sc->cbdev); 555 } else { 556 device_printf(sc->dev, 557 "CardBus card inserted, but no cardbus bus.\n"); 558 } 559 } else { 560 /* 561 * We should power the card down, and try again a couple of 562 * times if this happens. XXX 563 */ 564 device_printf(sc->dev, "Unsupported card type detected\n"); 565 } 566 } 567 568 static void 569 cbb_removal(struct cbb_softc *sc) 570 { 571 sc->cardok = 0; 572 if (sc->flags & CBB_16BIT_CARD) { 573 exca_removal(&sc->exca); 574 } else { 575 if (device_is_attached(sc->cbdev)) 576 CARD_DETACH_CARD(sc->cbdev); 577 } 578 cbb_destroy_res(sc); 579 } 580 581 /************************************************************************/ 582 /* Interrupt Handler */ 583 /************************************************************************/ 584 585 static int 586 cbb_func_filt(void *arg) 587 { 588 struct cbb_intrhand *ih = (struct cbb_intrhand *)arg; 589 struct cbb_softc *sc = ih->sc; 590 591 /* 592 * Make sure that the card is really there. 593 */ 594 if (!sc->cardok) 595 return (FILTER_STRAY); 596 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 597 sc->cardok = 0; 598 return (FILTER_HANDLED); 599 } 600 601 return ((*ih->filt)(ih->arg)); 602 } 603 604 static void 605 cbb_func_intr(void *arg) 606 { 607 struct cbb_intrhand *ih = (struct cbb_intrhand *)arg; 608 struct cbb_softc *sc = ih->sc; 609 610 /* 611 * While this check may seem redundant, it helps close a race 612 * condition. If the card is ejected after the filter runs, but 613 * before this ISR can be scheduled, then we need to do the same 614 * filtering to prevent the card's ISR from being called. One could 615 * argue that the card's ISR should be able to cope, but experience 616 * has shown they can't always. This mitigates the problem by making 617 * the race quite a bit smaller. Properly written client ISRs should 618 * cope with the card going away in the middle of the ISR. We assume 619 * that drivers that are sophisticated enough to use filters don't 620 * need our protection. This also allows us to ensure they *ARE* 621 * called if their filter said they needed to be called. 622 */ 623 if (ih->filt == NULL) { 624 if (!sc->cardok) 625 return; 626 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 627 sc->cardok = 0; 628 return; 629 } 630 } 631 632 ih->intr(ih->arg); 633 } 634 635 /************************************************************************/ 636 /* Generic Power functions */ 637 /************************************************************************/ 638 639 static uint32_t 640 cbb_detect_voltage(device_t brdev) 641 { 642 struct cbb_softc *sc = device_get_softc(brdev); 643 uint32_t psr; 644 uint32_t vol = CARD_UKN_CARD; 645 646 psr = cbb_get(sc, CBB_SOCKET_STATE); 647 648 if (psr & CBB_STATE_5VCARD && psr & CBB_STATE_5VSOCK) 649 vol |= CARD_5V_CARD; 650 if (psr & CBB_STATE_3VCARD && psr & CBB_STATE_3VSOCK) 651 vol |= CARD_3V_CARD; 652 if (psr & CBB_STATE_XVCARD && psr & CBB_STATE_XVSOCK) 653 vol |= CARD_XV_CARD; 654 if (psr & CBB_STATE_YVCARD && psr & CBB_STATE_YVSOCK) 655 vol |= CARD_YV_CARD; 656 657 return (vol); 658 } 659 660 static uint8_t 661 cbb_o2micro_power_hack(struct cbb_softc *sc) 662 { 663 uint8_t reg; 664 665 /* 666 * Issue #2: INT# not qualified with IRQ Routing Bit. An 667 * unexpected PCI INT# may be generated during PC Card 668 * initialization even with the IRQ Routing Bit Set with some 669 * PC Cards. 670 * 671 * This is a two part issue. The first part is that some of 672 * our older controllers have an issue in which the slot's PCI 673 * INT# is NOT qualified by the IRQ routing bit (PCI reg. 3Eh 674 * bit 7). Regardless of the IRQ routing bit, if NO ISA IRQ 675 * is selected (ExCA register 03h bits 3:0, of the slot, are 676 * cleared) we will generate INT# if IREQ# is asserted. The 677 * second part is because some PC Cards prematurally assert 678 * IREQ# before the ExCA registers are fully programmed. This 679 * in turn asserts INT# because ExCA register 03h bits 3:0 680 * (ISA IRQ Select) are not yet programmed. 681 * 682 * The fix for this issue, which will work for any controller 683 * (old or new), is to set ExCA register 03h bits 3:0 = 0001b 684 * (select IRQ1), of the slot, before turning on slot power. 685 * Selecting IRQ1 will result in INT# NOT being asserted 686 * (because IRQ1 is selected), and IRQ1 won't be asserted 687 * because our controllers don't generate IRQ1. 688 * 689 * Other, non O2Micro controllers will generate irq 1 in some 690 * situations, so we can't do this hack for everybody. Reports of 691 * keyboard controller's interrupts being suppressed occurred when 692 * we did this. 693 */ 694 reg = exca_getb(&sc->exca, EXCA_INTR); 695 exca_putb(&sc->exca, EXCA_INTR, (reg & 0xf0) | 1); 696 return (reg); 697 } 698 699 /* 700 * Restore the damage that cbb_o2micro_power_hack does to EXCA_INTR so 701 * we don't have an interrupt storm on power on. This has the effect of 702 * disabling card status change interrupts for the duration of poweron. 703 */ 704 static void 705 cbb_o2micro_power_hack2(struct cbb_softc *sc, uint8_t reg) 706 { 707 exca_putb(&sc->exca, EXCA_INTR, reg); 708 } 709 710 int 711 cbb_power(device_t brdev, int volts) 712 { 713 uint32_t status, sock_ctrl, reg_ctrl, mask; 714 struct cbb_softc *sc = device_get_softc(brdev); 715 int cnt, sane; 716 int retval = 0; 717 int on = 0; 718 uint8_t reg = 0; 719 720 sock_ctrl = cbb_get(sc, CBB_SOCKET_CONTROL); 721 722 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK; 723 switch (volts & CARD_VCCMASK) { 724 case 5: 725 sock_ctrl |= CBB_SOCKET_CTRL_VCC_5V; 726 on++; 727 break; 728 case 3: 729 sock_ctrl |= CBB_SOCKET_CTRL_VCC_3V; 730 on++; 731 break; 732 case XV: 733 sock_ctrl |= CBB_SOCKET_CTRL_VCC_XV; 734 on++; 735 break; 736 case YV: 737 sock_ctrl |= CBB_SOCKET_CTRL_VCC_YV; 738 on++; 739 break; 740 case 0: 741 break; 742 default: 743 return (0); /* power NEVER changed */ 744 } 745 746 /* VPP == VCC */ 747 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK; 748 sock_ctrl |= ((sock_ctrl >> 4) & 0x07); 749 750 if (cbb_get(sc, CBB_SOCKET_CONTROL) == sock_ctrl) 751 return (1); /* no change necessary */ 752 DEVPRINTF((sc->dev, "cbb_power: %dV\n", volts)); 753 if (volts != 0 && sc->chipset == CB_O2MICRO) 754 reg = cbb_o2micro_power_hack(sc); 755 756 /* 757 * We have to mask the card change detect interrupt while we're 758 * messing with the power. It is allowed to bounce while we're 759 * messing with power as things settle down. In addition, we mask off 760 * the card's function interrupt by routing it via the ISA bus. This 761 * bit generally only affects 16-bit cards. Some bridges allow one to 762 * set another bit to have it also affect 32-bit cards. Since 32-bit 763 * cards are required to be better behaved, we don't bother to get 764 * into those bridge specific features. 765 * 766 * XXX I wonder if we need to enable the READY bit interrupt in the 767 * EXCA CSC register for 16-bit cards, and disable the CD bit? 768 */ 769 mask = cbb_get(sc, CBB_SOCKET_MASK); 770 mask |= CBB_SOCKET_MASK_POWER; 771 mask &= ~CBB_SOCKET_MASK_CD; 772 cbb_set(sc, CBB_SOCKET_MASK, mask); 773 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 774 |CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN, 2); 775 cbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl); 776 if (on) { 777 mtx_lock(&sc->mtx); 778 cnt = sc->powerintr; 779 /* 780 * We have a shortish timeout of 500ms here. Some bridges do 781 * not generate a POWER_CYCLE event for 16-bit cards. In 782 * those cases, we have to cope the best we can, and having 783 * only a short delay is better than the alternatives. Others 784 * raise the power cycle a smidge before it is really ready. 785 * We deal with those below. 786 */ 787 sane = 10; 788 while (!(cbb_get(sc, CBB_SOCKET_STATE) & CBB_STATE_POWER_CYCLE) && 789 cnt == sc->powerintr && sane-- > 0) 790 msleep(&sc->powerintr, &sc->mtx, 0, "-", hz / 20); 791 mtx_unlock(&sc->mtx); 792 793 /* 794 * Relax for 100ms. Some bridges appear to assert this signal 795 * right away, but before the card has stabilized. Other 796 * cards need need more time to cope up reliabily. 797 * Experiments with troublesome setups show this to be a 798 * "cheap" way to enhance reliabilty. We need not do this for 799 * "off" since we don't touch the card after we turn it off. 800 */ 801 pause("cbbPwr", min(hz / 10, 1)); 802 803 /* 804 * The TOPIC95B requires a little bit extra time to get its 805 * act together, so delay for an additional 100ms. Also as 806 * documented below, it doesn't seem to set the POWER_CYCLE 807 * bit, so don't whine if it never came on. 808 */ 809 if (sc->chipset == CB_TOPIC95) 810 pause("cbb95B", hz / 10); 811 else if (sane <= 0) 812 device_printf(sc->dev, "power timeout, doom?\n"); 813 } 814 815 /* 816 * After the power is good, we can turn off the power interrupt. 817 * However, the PC Card standard says that we must delay turning the 818 * CD bit back on for a bit to allow for bouncyness on power down 819 * (recall that we don't wait above for a power down, since we don't 820 * get an interrupt for that). We're called either from the suspend 821 * code in which case we don't want to turn card change on again, or 822 * we're called from the card insertion code, in which case the cbb 823 * thread will turn it on for us before it waits to be woken by a 824 * change event. 825 * 826 * NB: Topic95B doesn't set the power cycle bit. we assume that 827 * both it and the TOPIC95 behave the same. 828 */ 829 cbb_clrb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_POWER); 830 status = cbb_get(sc, CBB_SOCKET_STATE); 831 if (on && sc->chipset != CB_TOPIC95) { 832 if ((status & CBB_STATE_POWER_CYCLE) == 0) 833 device_printf(sc->dev, "Power not on?\n"); 834 } 835 if (status & CBB_STATE_BAD_VCC_REQ) { 836 device_printf(sc->dev, "Bad Vcc requested\n"); 837 /* 838 * Turn off the power, and try again. Retrigger other 839 * active interrupts via force register. From NetBSD 840 * PR 36652, coded by me to description there. 841 */ 842 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK; 843 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK; 844 cbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl); 845 status &= ~CBB_STATE_BAD_VCC_REQ; 846 status &= ~CBB_STATE_DATA_LOST; 847 status |= CBB_FORCE_CV_TEST; 848 cbb_set(sc, CBB_SOCKET_FORCE, status); 849 goto done; 850 } 851 if (sc->chipset == CB_TOPIC97) { 852 reg_ctrl = pci_read_config(sc->dev, TOPIC_REG_CTRL, 4); 853 reg_ctrl &= ~TOPIC97_REG_CTRL_TESTMODE; 854 if (on) 855 reg_ctrl |= TOPIC97_REG_CTRL_CLKRUN_ENA; 856 else 857 reg_ctrl &= ~TOPIC97_REG_CTRL_CLKRUN_ENA; 858 pci_write_config(sc->dev, TOPIC_REG_CTRL, reg_ctrl, 4); 859 } 860 retval = 1; 861 done:; 862 if (volts != 0 && sc->chipset == CB_O2MICRO) 863 cbb_o2micro_power_hack2(sc, reg); 864 return (retval); 865 } 866 867 static int 868 cbb_current_voltage(device_t brdev) 869 { 870 struct cbb_softc *sc = device_get_softc(brdev); 871 uint32_t ctrl; 872 873 ctrl = cbb_get(sc, CBB_SOCKET_CONTROL); 874 switch (ctrl & CBB_SOCKET_CTRL_VCCMASK) { 875 case CBB_SOCKET_CTRL_VCC_5V: 876 return CARD_5V_CARD; 877 case CBB_SOCKET_CTRL_VCC_3V: 878 return CARD_3V_CARD; 879 case CBB_SOCKET_CTRL_VCC_XV: 880 return CARD_XV_CARD; 881 case CBB_SOCKET_CTRL_VCC_YV: 882 return CARD_YV_CARD; 883 } 884 return 0; 885 } 886 887 /* 888 * detect the voltage for the card, and set it. Since the power 889 * used is the square of the voltage, lower voltages is a big win 890 * and what Windows does (and what Microsoft prefers). The MS paper 891 * also talks about preferring the CIS entry as well, but that has 892 * to be done elsewhere. We also optimize power sequencing here 893 * and don't change things if we're already powered up at a supported 894 * voltage. 895 * 896 * In addition, we power up with OE disabled. We'll set it later 897 * in the power up sequence. 898 */ 899 static int 900 cbb_do_power(device_t brdev) 901 { 902 struct cbb_softc *sc = device_get_softc(brdev); 903 uint32_t voltage, curpwr; 904 uint32_t status; 905 906 /* Don't enable OE (output enable) until power stable */ 907 exca_clrb(&sc->exca, EXCA_PWRCTL, EXCA_PWRCTL_OE); 908 909 voltage = cbb_detect_voltage(brdev); 910 curpwr = cbb_current_voltage(brdev); 911 status = cbb_get(sc, CBB_SOCKET_STATE); 912 if ((status & CBB_STATE_POWER_CYCLE) && (voltage & curpwr)) 913 return 0; 914 /* Prefer lowest voltage supported */ 915 cbb_power(brdev, CARD_OFF); 916 if (voltage & CARD_YV_CARD) 917 cbb_power(brdev, CARD_VCC(YV)); 918 else if (voltage & CARD_XV_CARD) 919 cbb_power(brdev, CARD_VCC(XV)); 920 else if (voltage & CARD_3V_CARD) 921 cbb_power(brdev, CARD_VCC(3)); 922 else if (voltage & CARD_5V_CARD) 923 cbb_power(brdev, CARD_VCC(5)); 924 else { 925 device_printf(brdev, "Unknown card voltage\n"); 926 return (ENXIO); 927 } 928 return (0); 929 } 930 931 /************************************************************************/ 932 /* CardBus power functions */ 933 /************************************************************************/ 934 935 static int 936 cbb_cardbus_reset_power(device_t brdev, device_t child, int on) 937 { 938 struct cbb_softc *sc = device_get_softc(brdev); 939 uint32_t b, h; 940 int delay, count, zero_seen, func; 941 942 /* 943 * Asserting reset for 20ms is necessary for most bridges. For some 944 * reason, the Ricoh RF5C47x bridges need it asserted for 400ms. The 945 * root cause of this is unknown, and NetBSD does the same thing. 946 */ 947 delay = sc->chipset == CB_RF5C47X ? 400 : 20; 948 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2); 949 pause("cbbP3", hz * delay / 1000); 950 951 /* 952 * If a card exists and we're turning it on, take it out of reset. 953 * After clearing reset, wait up to 1.1s for the first configuration 954 * register (vendor/product) configuration register of device 0.0 to 955 * become != 0xffffffff. The PCMCIA PC Card Host System Specification 956 * says that when powering up the card, the PCI Spec v2.1 must be 957 * followed. In PCI spec v2.2 Table 4-6, Trhfa (Reset High to first 958 * Config Access) is at most 2^25 clocks, or just over 1s. Section 959 * 2.2.1 states any card not ready to participate in bus transactions 960 * must tristate its outputs. Therefore, any access to its 961 * configuration registers must be ignored. In that state, the config 962 * reg will read 0xffffffff. Section 6.2.1 states a vendor id of 963 * 0xffff is invalid, so this can never match a real card. Print a 964 * warning if it never returns a real id. The PCMCIA PC Card 965 * Electrical Spec Section 5.2.7.1 implies only device 0 is present on 966 * a cardbus bus, so that's the only register we check here. 967 */ 968 if (on && CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 969 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 970 &~CBBM_BRIDGECTRL_RESET, 2); 971 b = pcib_get_bus(child); 972 count = 1100 / 20; 973 do { 974 pause("cbbP4", hz * 2 / 100); 975 } while (PCIB_READ_CONFIG(brdev, b, 0, 0, PCIR_DEVVENDOR, 4) == 976 0xfffffffful && --count >= 0); 977 if (count < 0) 978 device_printf(brdev, "Warning: Bus reset timeout\n"); 979 980 /* 981 * Some cards (so far just an atheros card I have) seem to 982 * come out of reset in a funky state. They report they are 983 * multi-function cards, but have nonsense for some of the 984 * higher functions. So if the card claims to be MFDEV, and 985 * any of the higher functions' ID is 0, then we've hit the 986 * bug and we'll try again. 987 */ 988 h = PCIB_READ_CONFIG(brdev, b, 0, 0, PCIR_HDRTYPE, 1); 989 if ((h & PCIM_MFDEV) == 0) 990 return 0; 991 zero_seen = 0; 992 for (func = 1; func < 8; func++) { 993 h = PCIB_READ_CONFIG(brdev, b, 0, func, 994 PCIR_DEVVENDOR, 4); 995 if (h == 0) 996 zero_seen++; 997 } 998 if (!zero_seen) 999 return 0; 1000 return (EINVAL); 1001 } 1002 return 0; 1003 } 1004 1005 static int 1006 cbb_cardbus_power_disable_socket(device_t brdev, device_t child) 1007 { 1008 cbb_power(brdev, CARD_OFF); 1009 cbb_cardbus_reset_power(brdev, child, 0); 1010 return (0); 1011 } 1012 1013 static int 1014 cbb_cardbus_power_enable_socket(device_t brdev, device_t child) 1015 { 1016 struct cbb_softc *sc = device_get_softc(brdev); 1017 int err, count; 1018 1019 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) 1020 return (ENODEV); 1021 1022 count = 10; 1023 do { 1024 err = cbb_do_power(brdev); 1025 if (err) 1026 return (err); 1027 err = cbb_cardbus_reset_power(brdev, child, 1); 1028 if (err) { 1029 device_printf(brdev, "Reset failed, trying again.\n"); 1030 cbb_cardbus_power_disable_socket(brdev, child); 1031 pause("cbbErr1", hz / 10); /* wait 100ms */ 1032 } 1033 } while (err != 0 && count-- > 0); 1034 return (0); 1035 } 1036 1037 /************************************************************************/ 1038 /* CardBus Resource */ 1039 /************************************************************************/ 1040 1041 static void 1042 cbb_activate_window(device_t brdev, int type) 1043 { 1044 1045 PCI_ENABLE_IO(device_get_parent(brdev), brdev, type); 1046 } 1047 1048 static int 1049 cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, uint32_t end) 1050 { 1051 int basereg; 1052 int limitreg; 1053 1054 if ((win < 0) || (win > 1)) { 1055 DEVPRINTF((brdev, 1056 "cbb_cardbus_io_open: window out of range %d\n", win)); 1057 return (EINVAL); 1058 } 1059 1060 basereg = win * 8 + CBBR_IOBASE0; 1061 limitreg = win * 8 + CBBR_IOLIMIT0; 1062 1063 pci_write_config(brdev, basereg, start, 4); 1064 pci_write_config(brdev, limitreg, end, 4); 1065 cbb_activate_window(brdev, SYS_RES_IOPORT); 1066 return (0); 1067 } 1068 1069 static int 1070 cbb_cardbus_mem_open(device_t brdev, int win, uint32_t start, uint32_t end) 1071 { 1072 int basereg; 1073 int limitreg; 1074 1075 if ((win < 0) || (win > 1)) { 1076 DEVPRINTF((brdev, 1077 "cbb_cardbus_mem_open: window out of range %d\n", win)); 1078 return (EINVAL); 1079 } 1080 1081 basereg = win * 8 + CBBR_MEMBASE0; 1082 limitreg = win * 8 + CBBR_MEMLIMIT0; 1083 1084 pci_write_config(brdev, basereg, start, 4); 1085 pci_write_config(brdev, limitreg, end, 4); 1086 cbb_activate_window(brdev, SYS_RES_MEMORY); 1087 return (0); 1088 } 1089 1090 #define START_NONE 0xffffffff 1091 #define END_NONE 0 1092 1093 static void 1094 cbb_cardbus_auto_open(struct cbb_softc *sc, int type) 1095 { 1096 uint32_t starts[2]; 1097 uint32_t ends[2]; 1098 struct cbb_reslist *rle; 1099 int align, i; 1100 uint32_t reg; 1101 1102 starts[0] = starts[1] = START_NONE; 1103 ends[0] = ends[1] = END_NONE; 1104 1105 if (type == SYS_RES_MEMORY) 1106 align = CBB_MEMALIGN; 1107 else if (type == SYS_RES_IOPORT) 1108 align = CBB_IOALIGN; 1109 else 1110 align = 1; 1111 1112 SLIST_FOREACH(rle, &sc->rl, link) { 1113 if (rle->type != type) 1114 continue; 1115 if (rle->res == NULL) 1116 continue; 1117 if (!(rman_get_flags(rle->res) & RF_ACTIVE)) 1118 continue; 1119 if (rman_get_flags(rle->res) & RF_PREFETCHABLE) 1120 i = 1; 1121 else 1122 i = 0; 1123 if (rman_get_start(rle->res) < starts[i]) 1124 starts[i] = rman_get_start(rle->res); 1125 if (rman_get_end(rle->res) > ends[i]) 1126 ends[i] = rman_get_end(rle->res); 1127 } 1128 for (i = 0; i < 2; i++) { 1129 if (starts[i] == START_NONE) 1130 continue; 1131 starts[i] &= ~(align - 1); 1132 ends[i] = roundup2(ends[i], align) - 1; 1133 } 1134 if (starts[0] != START_NONE && starts[1] != START_NONE) { 1135 if (starts[0] < starts[1]) { 1136 if (ends[0] > starts[1]) { 1137 device_printf(sc->dev, "Overlapping ranges" 1138 " for prefetch and non-prefetch memory\n"); 1139 return; 1140 } 1141 } else { 1142 if (ends[1] > starts[0]) { 1143 device_printf(sc->dev, "Overlapping ranges" 1144 " for prefetch and non-prefetch memory\n"); 1145 return; 1146 } 1147 } 1148 } 1149 1150 if (type == SYS_RES_MEMORY) { 1151 cbb_cardbus_mem_open(sc->dev, 0, starts[0], ends[0]); 1152 cbb_cardbus_mem_open(sc->dev, 1, starts[1], ends[1]); 1153 reg = pci_read_config(sc->dev, CBBR_BRIDGECTRL, 2); 1154 reg &= ~(CBBM_BRIDGECTRL_PREFETCH_0 | 1155 CBBM_BRIDGECTRL_PREFETCH_1); 1156 if (starts[1] != START_NONE) 1157 reg |= CBBM_BRIDGECTRL_PREFETCH_1; 1158 pci_write_config(sc->dev, CBBR_BRIDGECTRL, reg, 2); 1159 if (bootverbose) { 1160 device_printf(sc->dev, "Opening memory:\n"); 1161 if (starts[0] != START_NONE) 1162 device_printf(sc->dev, "Normal: %#x-%#x\n", 1163 starts[0], ends[0]); 1164 if (starts[1] != START_NONE) 1165 device_printf(sc->dev, "Prefetch: %#x-%#x\n", 1166 starts[1], ends[1]); 1167 } 1168 } else if (type == SYS_RES_IOPORT) { 1169 cbb_cardbus_io_open(sc->dev, 0, starts[0], ends[0]); 1170 cbb_cardbus_io_open(sc->dev, 1, starts[1], ends[1]); 1171 if (bootverbose && starts[0] != START_NONE) 1172 device_printf(sc->dev, "Opening I/O: %#x-%#x\n", 1173 starts[0], ends[0]); 1174 } 1175 } 1176 1177 static int 1178 cbb_cardbus_activate_resource(device_t brdev, device_t child, int type, 1179 int rid, struct resource *res) 1180 { 1181 int ret; 1182 1183 ret = BUS_ACTIVATE_RESOURCE(device_get_parent(brdev), child, 1184 type, rid, res); 1185 if (ret != 0) 1186 return (ret); 1187 cbb_cardbus_auto_open(device_get_softc(brdev), type); 1188 return (0); 1189 } 1190 1191 static int 1192 cbb_cardbus_deactivate_resource(device_t brdev, device_t child, int type, 1193 int rid, struct resource *res) 1194 { 1195 int ret; 1196 1197 ret = BUS_DEACTIVATE_RESOURCE(device_get_parent(brdev), child, 1198 type, rid, res); 1199 if (ret != 0) 1200 return (ret); 1201 cbb_cardbus_auto_open(device_get_softc(brdev), type); 1202 return (0); 1203 } 1204 1205 static struct resource * 1206 cbb_cardbus_alloc_resource(device_t brdev, device_t child, int type, 1207 int *rid, rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) 1208 { 1209 struct cbb_softc *sc = device_get_softc(brdev); 1210 int tmp; 1211 struct resource *res; 1212 rman_res_t align; 1213 1214 switch (type) { 1215 case SYS_RES_IRQ: 1216 tmp = rman_get_start(sc->irq_res); 1217 if (start > tmp || end < tmp || count != 1) { 1218 device_printf(child, "requested interrupt %jd-%jd," 1219 "count = %jd not supported by cbb\n", 1220 start, end, count); 1221 return (NULL); 1222 } 1223 start = end = tmp; 1224 flags |= RF_SHAREABLE; 1225 break; 1226 case SYS_RES_IOPORT: 1227 if (start <= cbb_start_32_io) 1228 start = cbb_start_32_io; 1229 if (end < start) 1230 end = start; 1231 if (count > (1 << RF_ALIGNMENT(flags))) 1232 flags = (flags & ~RF_ALIGNMENT_MASK) | 1233 rman_make_alignment_flags(count); 1234 break; 1235 case SYS_RES_MEMORY: 1236 if (start <= cbb_start_mem) 1237 start = cbb_start_mem; 1238 if (end < start) 1239 end = start; 1240 if (count < CBB_MEMALIGN) 1241 align = CBB_MEMALIGN; 1242 else 1243 align = count; 1244 if (align > (1 << RF_ALIGNMENT(flags))) 1245 flags = (flags & ~RF_ALIGNMENT_MASK) | 1246 rman_make_alignment_flags(align); 1247 break; 1248 } 1249 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid, 1250 start, end, count, flags & ~RF_ACTIVE); 1251 if (res == NULL) { 1252 printf("cbb alloc res fail type %d rid %x\n", type, *rid); 1253 return (NULL); 1254 } 1255 cbb_insert_res(sc, res, type, *rid); 1256 if (flags & RF_ACTIVE) 1257 if (bus_activate_resource(child, type, *rid, res) != 0) { 1258 bus_release_resource(child, type, *rid, res); 1259 return (NULL); 1260 } 1261 1262 return (res); 1263 } 1264 1265 static int 1266 cbb_cardbus_release_resource(device_t brdev, device_t child, int type, 1267 int rid, struct resource *res) 1268 { 1269 struct cbb_softc *sc = device_get_softc(brdev); 1270 int error; 1271 1272 if (rman_get_flags(res) & RF_ACTIVE) { 1273 error = bus_deactivate_resource(child, type, rid, res); 1274 if (error != 0) 1275 return (error); 1276 } 1277 cbb_remove_res(sc, res); 1278 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, 1279 type, rid, res)); 1280 } 1281 1282 /************************************************************************/ 1283 /* PC Card Power Functions */ 1284 /************************************************************************/ 1285 1286 static int 1287 cbb_pcic_power_enable_socket(device_t brdev, device_t child) 1288 { 1289 struct cbb_softc *sc = device_get_softc(brdev); 1290 int err; 1291 1292 DPRINTF(("cbb_pcic_socket_enable:\n")); 1293 1294 /* power down/up the socket to reset */ 1295 err = cbb_do_power(brdev); 1296 if (err) 1297 return (err); 1298 exca_reset(&sc->exca, child); 1299 1300 return (0); 1301 } 1302 1303 static int 1304 cbb_pcic_power_disable_socket(device_t brdev, device_t child) 1305 { 1306 struct cbb_softc *sc = device_get_softc(brdev); 1307 1308 DPRINTF(("cbb_pcic_socket_disable\n")); 1309 1310 /* Turn off the card's interrupt and leave it in reset, wait 10ms */ 1311 exca_putb(&sc->exca, EXCA_INTR, 0); 1312 pause("cbbP1", hz / 100); 1313 1314 /* power down the socket */ 1315 cbb_power(brdev, CARD_OFF); 1316 exca_putb(&sc->exca, EXCA_PWRCTL, 0); 1317 1318 /* wait 300ms until power fails (Tpf). */ 1319 pause("cbbP2", hz * 300 / 1000); 1320 1321 /* enable CSC interrupts */ 1322 exca_putb(&sc->exca, EXCA_INTR, EXCA_INTR_ENABLE); 1323 return (0); 1324 } 1325 1326 /************************************************************************/ 1327 /* POWER methods */ 1328 /************************************************************************/ 1329 1330 int 1331 cbb_power_enable_socket(device_t brdev, device_t child) 1332 { 1333 struct cbb_softc *sc = device_get_softc(brdev); 1334 1335 if (sc->flags & CBB_16BIT_CARD) 1336 return (cbb_pcic_power_enable_socket(brdev, child)); 1337 return (cbb_cardbus_power_enable_socket(brdev, child)); 1338 } 1339 1340 int 1341 cbb_power_disable_socket(device_t brdev, device_t child) 1342 { 1343 struct cbb_softc *sc = device_get_softc(brdev); 1344 if (sc->flags & CBB_16BIT_CARD) 1345 return (cbb_pcic_power_disable_socket(brdev, child)); 1346 return (cbb_cardbus_power_disable_socket(brdev, child)); 1347 } 1348 1349 static int 1350 cbb_pcic_activate_resource(device_t brdev, device_t child, int type, int rid, 1351 struct resource *res) 1352 { 1353 struct cbb_softc *sc = device_get_softc(brdev); 1354 int error; 1355 1356 error = exca_activate_resource(&sc->exca, child, type, rid, res); 1357 if (error == 0) 1358 cbb_activate_window(brdev, type); 1359 return (error); 1360 } 1361 1362 static int 1363 cbb_pcic_deactivate_resource(device_t brdev, device_t child, int type, 1364 int rid, struct resource *res) 1365 { 1366 struct cbb_softc *sc = device_get_softc(brdev); 1367 return (exca_deactivate_resource(&sc->exca, child, type, rid, res)); 1368 } 1369 1370 static struct resource * 1371 cbb_pcic_alloc_resource(device_t brdev, device_t child, int type, int *rid, 1372 rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) 1373 { 1374 struct resource *res = NULL; 1375 struct cbb_softc *sc = device_get_softc(brdev); 1376 int align; 1377 int tmp; 1378 1379 switch (type) { 1380 case SYS_RES_MEMORY: 1381 if (start < cbb_start_mem) 1382 start = cbb_start_mem; 1383 if (end < start) 1384 end = start; 1385 if (count < CBB_MEMALIGN) 1386 align = CBB_MEMALIGN; 1387 else 1388 align = count; 1389 if (align > (1 << RF_ALIGNMENT(flags))) 1390 flags = (flags & ~RF_ALIGNMENT_MASK) | 1391 rman_make_alignment_flags(align); 1392 break; 1393 case SYS_RES_IOPORT: 1394 if (start < cbb_start_16_io) 1395 start = cbb_start_16_io; 1396 if (end < start) 1397 end = start; 1398 break; 1399 case SYS_RES_IRQ: 1400 tmp = rman_get_start(sc->irq_res); 1401 if (start > tmp || end < tmp || count != 1) { 1402 device_printf(child, "requested interrupt %jd-%jd," 1403 "count = %jd not supported by cbb\n", 1404 start, end, count); 1405 return (NULL); 1406 } 1407 flags |= RF_SHAREABLE; 1408 start = end = rman_get_start(sc->irq_res); 1409 break; 1410 } 1411 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid, 1412 start, end, count, flags & ~RF_ACTIVE); 1413 if (res == NULL) 1414 return (NULL); 1415 cbb_insert_res(sc, res, type, *rid); 1416 if (flags & RF_ACTIVE) { 1417 if (bus_activate_resource(child, type, *rid, res) != 0) { 1418 bus_release_resource(child, type, *rid, res); 1419 return (NULL); 1420 } 1421 } 1422 1423 return (res); 1424 } 1425 1426 static int 1427 cbb_pcic_release_resource(device_t brdev, device_t child, int type, 1428 int rid, struct resource *res) 1429 { 1430 struct cbb_softc *sc = device_get_softc(brdev); 1431 int error; 1432 1433 if (rman_get_flags(res) & RF_ACTIVE) { 1434 error = bus_deactivate_resource(child, type, rid, res); 1435 if (error != 0) 1436 return (error); 1437 } 1438 cbb_remove_res(sc, res); 1439 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, 1440 type, rid, res)); 1441 } 1442 1443 /************************************************************************/ 1444 /* PC Card methods */ 1445 /************************************************************************/ 1446 1447 int 1448 cbb_pcic_set_res_flags(device_t brdev, device_t child, int type, int rid, 1449 u_long flags) 1450 { 1451 struct cbb_softc *sc = device_get_softc(brdev); 1452 struct resource *res; 1453 1454 if (type != SYS_RES_MEMORY) 1455 return (EINVAL); 1456 res = cbb_find_res(sc, type, rid); 1457 if (res == NULL) { 1458 device_printf(brdev, 1459 "set_res_flags: specified rid not found\n"); 1460 return (ENOENT); 1461 } 1462 return (exca_mem_set_flags(&sc->exca, res, flags)); 1463 } 1464 1465 int 1466 cbb_pcic_set_memory_offset(device_t brdev, device_t child, int rid, 1467 uint32_t cardaddr, uint32_t *deltap) 1468 { 1469 struct cbb_softc *sc = device_get_softc(brdev); 1470 struct resource *res; 1471 1472 res = cbb_find_res(sc, SYS_RES_MEMORY, rid); 1473 if (res == NULL) { 1474 device_printf(brdev, 1475 "set_memory_offset: specified rid not found\n"); 1476 return (ENOENT); 1477 } 1478 return (exca_mem_set_offset(&sc->exca, res, cardaddr, deltap)); 1479 } 1480 1481 /************************************************************************/ 1482 /* BUS Methods */ 1483 /************************************************************************/ 1484 1485 int 1486 cbb_activate_resource(device_t brdev, device_t child, int type, int rid, 1487 struct resource *r) 1488 { 1489 struct cbb_softc *sc = device_get_softc(brdev); 1490 1491 if (sc->flags & CBB_16BIT_CARD) 1492 return (cbb_pcic_activate_resource(brdev, child, type, rid, r)); 1493 else 1494 return (cbb_cardbus_activate_resource(brdev, child, type, rid, 1495 r)); 1496 } 1497 1498 int 1499 cbb_deactivate_resource(device_t brdev, device_t child, int type, 1500 int rid, struct resource *r) 1501 { 1502 struct cbb_softc *sc = device_get_softc(brdev); 1503 1504 if (sc->flags & CBB_16BIT_CARD) 1505 return (cbb_pcic_deactivate_resource(brdev, child, type, 1506 rid, r)); 1507 else 1508 return (cbb_cardbus_deactivate_resource(brdev, child, type, 1509 rid, r)); 1510 } 1511 1512 struct resource * 1513 cbb_alloc_resource(device_t brdev, device_t child, int type, int *rid, 1514 rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) 1515 { 1516 struct cbb_softc *sc = device_get_softc(brdev); 1517 1518 if (sc->flags & CBB_16BIT_CARD) 1519 return (cbb_pcic_alloc_resource(brdev, child, type, rid, 1520 start, end, count, flags)); 1521 else 1522 return (cbb_cardbus_alloc_resource(brdev, child, type, rid, 1523 start, end, count, flags)); 1524 } 1525 1526 int 1527 cbb_release_resource(device_t brdev, device_t child, int type, int rid, 1528 struct resource *r) 1529 { 1530 struct cbb_softc *sc = device_get_softc(brdev); 1531 1532 if (sc->flags & CBB_16BIT_CARD) 1533 return (cbb_pcic_release_resource(brdev, child, type, 1534 rid, r)); 1535 else 1536 return (cbb_cardbus_release_resource(brdev, child, type, 1537 rid, r)); 1538 } 1539 1540 int 1541 cbb_read_ivar(device_t brdev, device_t child, int which, uintptr_t *result) 1542 { 1543 struct cbb_softc *sc = device_get_softc(brdev); 1544 1545 switch (which) { 1546 case PCIB_IVAR_DOMAIN: 1547 *result = sc->domain; 1548 return (0); 1549 case PCIB_IVAR_BUS: 1550 *result = sc->bus.sec; 1551 return (0); 1552 case EXCA_IVAR_SLOT: 1553 *result = 0; 1554 return (0); 1555 } 1556 return (ENOENT); 1557 } 1558 1559 int 1560 cbb_write_ivar(device_t brdev, device_t child, int which, uintptr_t value) 1561 { 1562 1563 switch (which) { 1564 case PCIB_IVAR_DOMAIN: 1565 return (EINVAL); 1566 case PCIB_IVAR_BUS: 1567 return (EINVAL); 1568 case EXCA_IVAR_SLOT: 1569 return (EINVAL); 1570 } 1571 return (ENOENT); 1572 } 1573 1574 int 1575 cbb_child_present(device_t parent, device_t child) 1576 { 1577 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(parent); 1578 uint32_t sockstate; 1579 1580 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 1581 return (CBB_CARD_PRESENT(sockstate) && sc->cardok); 1582 } 1583