1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright(c) 2007-2022 Intel Corporation */
3 /* $FreeBSD$ */
4 #ifndef ADF_DRV_H
5 #define ADF_DRV_H
6 
7 #include <dev/pci/pcivar.h>
8 #include "adf_accel_devices.h"
9 #include "icp_qat_fw_loader_handle.h"
10 #include "icp_qat_hal.h"
11 #include "adf_cfg_user.h"
12 
13 #define ADF_MAJOR_VERSION 0
14 #define ADF_MINOR_VERSION 6
15 #define ADF_BUILD_VERSION 0
16 #define ADF_DRV_VERSION                                                        \
17 	__stringify(ADF_MAJOR_VERSION) "." __stringify(                        \
18 	    ADF_MINOR_VERSION) "." __stringify(ADF_BUILD_VERSION)
19 
20 #define ADF_STATUS_RESTARTING 0
21 #define ADF_STATUS_STARTING 1
22 #define ADF_STATUS_CONFIGURED 2
23 #define ADF_STATUS_STARTED 3
24 #define ADF_STATUS_AE_INITIALISED 4
25 #define ADF_STATUS_AE_UCODE_LOADED 5
26 #define ADF_STATUS_AE_STARTED 6
27 #define ADF_STATUS_PF_RUNNING 7
28 #define ADF_STATUS_IRQ_ALLOCATED 8
29 #define ADF_PCIE_FLR_ATTEMPT 10
30 #define ADF_STATUS_SYSCTL_CTX_INITIALISED 9
31 
32 #define PCI_EXP_AERUCS 0x104
33 
34 /* PMISC BAR upper and lower offsets in PCIe config space */
35 #define ADF_PMISC_L_OFFSET 0x18
36 #define ADF_PMISC_U_OFFSET 0x1c
37 
38 enum adf_dev_reset_mode { ADF_DEV_RESET_ASYNC = 0, ADF_DEV_RESET_SYNC };
39 
40 enum adf_event {
41 	ADF_EVENT_INIT = 0,
42 	ADF_EVENT_START,
43 	ADF_EVENT_STOP,
44 	ADF_EVENT_SHUTDOWN,
45 	ADF_EVENT_RESTARTING,
46 	ADF_EVENT_RESTARTED,
47 	ADF_EVENT_ERROR,
48 };
49 
50 struct adf_state {
51 	enum adf_event dev_state;
52 	int dev_id;
53 };
54 
55 struct service_hndl {
56 	int (*event_hld)(struct adf_accel_dev *accel_dev, enum adf_event event);
57 	unsigned long init_status[ADF_DEVS_ARRAY_SIZE];
58 	unsigned long start_status[ADF_DEVS_ARRAY_SIZE];
59 	char *name;
60 	struct list_head list;
61 };
62 
63 static inline int
64 get_current_node(void)
65 {
66 	return PCPU_GET(domain);
67 }
68 
69 int adf_service_register(struct service_hndl *service);
70 int adf_service_unregister(struct service_hndl *service);
71 
72 int adf_dev_init(struct adf_accel_dev *accel_dev);
73 int adf_dev_start(struct adf_accel_dev *accel_dev);
74 int adf_dev_stop(struct adf_accel_dev *accel_dev);
75 void adf_dev_shutdown(struct adf_accel_dev *accel_dev);
76 int adf_dev_autoreset(struct adf_accel_dev *accel_dev);
77 int adf_dev_reset(struct adf_accel_dev *accel_dev,
78 		  enum adf_dev_reset_mode mode);
79 int adf_dev_aer_schedule_reset(struct adf_accel_dev *accel_dev,
80 			       enum adf_dev_reset_mode mode);
81 void adf_error_notifier(uintptr_t arg);
82 int adf_init_fatal_error_wq(void);
83 void adf_exit_fatal_error_wq(void);
84 int adf_iov_putmsg(struct adf_accel_dev *accel_dev, u32 msg, u8 vf_nr);
85 int adf_iov_notify(struct adf_accel_dev *accel_dev, u32 msg, u8 vf_nr);
86 void adf_pf2vf_notify_restarting(struct adf_accel_dev *accel_dev);
87 int adf_notify_fatal_error(struct adf_accel_dev *accel_dev);
88 void adf_pf2vf_notify_fatal_error(struct adf_accel_dev *accel_dev);
89 void adf_pf2vf_notify_uncorrectable_error(struct adf_accel_dev *accel_dev);
90 void adf_pf2vf_notify_heartbeat_error(struct adf_accel_dev *accel_dev);
91 typedef int (*adf_iov_block_provider)(struct adf_accel_dev *accel_dev,
92 				      u8 **buffer,
93 				      u8 *length,
94 				      u8 *block_version,
95 				      u8 compatibility,
96 				      u8 byte_num);
97 int adf_iov_block_provider_register(u8 block_type,
98 				    const adf_iov_block_provider provider);
99 u8 adf_iov_is_block_provider_registered(u8 block_type);
100 int adf_iov_block_provider_unregister(u8 block_type,
101 				      const adf_iov_block_provider provider);
102 int adf_iov_block_get(struct adf_accel_dev *accel_dev,
103 		      u8 block_type,
104 		      u8 *block_version,
105 		      u8 *buffer,
106 		      u8 *length);
107 u8 adf_pfvf_crc(u8 start_crc, u8 *buf, u8 len);
108 int adf_iov_init_compat_manager(struct adf_accel_dev *accel_dev,
109 				struct adf_accel_compat_manager **cm);
110 int adf_iov_shutdown_compat_manager(struct adf_accel_dev *accel_dev,
111 				    struct adf_accel_compat_manager **cm);
112 int adf_iov_register_compat_checker(struct adf_accel_dev *accel_dev,
113 				    const adf_iov_compat_checker_t cc);
114 int adf_iov_unregister_compat_checker(struct adf_accel_dev *accel_dev,
115 				      const adf_iov_compat_checker_t cc);
116 int adf_pf_enable_vf2pf_comms(struct adf_accel_dev *accel_dev);
117 int adf_pf_disable_vf2pf_comms(struct adf_accel_dev *accel_dev);
118 int adf_enable_vf2pf_comms(struct adf_accel_dev *accel_dev);
119 int adf_disable_vf2pf_comms(struct adf_accel_dev *accel_dev);
120 void adf_vf2pf_req_hndl(struct adf_accel_vf_info *vf_info);
121 void adf_devmgr_update_class_index(struct adf_hw_device_data *hw_data);
122 void adf_clean_vf_map(bool);
123 int adf_sysctl_add_fw_versions(struct adf_accel_dev *accel_dev);
124 int adf_sysctl_remove_fw_versions(struct adf_accel_dev *accel_dev);
125 
126 int adf_ctl_dev_register(void);
127 void adf_ctl_dev_unregister(void);
128 int adf_pf_vf_capabilities_init(struct adf_accel_dev *accel_dev);
129 int adf_pf_ext_dc_cap_msg_provider(struct adf_accel_dev *accel_dev,
130 				   u8 **buffer,
131 				   u8 *length,
132 				   u8 *block_version,
133 				   u8 compatibility);
134 int adf_pf_vf_ring_to_svc_init(struct adf_accel_dev *accel_dev);
135 int adf_pf_ring_to_svc_msg_provider(struct adf_accel_dev *accel_dev,
136 				    u8 **buffer,
137 				    u8 *length,
138 				    u8 *block_version,
139 				    u8 compatibility,
140 				    u8 byte_num);
141 int adf_devmgr_add_dev(struct adf_accel_dev *accel_dev,
142 		       struct adf_accel_dev *pf);
143 void adf_devmgr_rm_dev(struct adf_accel_dev *accel_dev,
144 		       struct adf_accel_dev *pf);
145 struct list_head *adf_devmgr_get_head(void);
146 struct adf_accel_dev *adf_devmgr_get_dev_by_id(uint32_t id);
147 struct adf_accel_dev *adf_devmgr_get_first(void);
148 struct adf_accel_dev *adf_devmgr_pci_to_accel_dev(device_t pci_dev);
149 int adf_devmgr_verify_id(uint32_t *id);
150 void adf_devmgr_get_num_dev(uint32_t *num);
151 int adf_devmgr_in_reset(struct adf_accel_dev *accel_dev);
152 int adf_dev_started(struct adf_accel_dev *accel_dev);
153 int adf_dev_restarting_notify(struct adf_accel_dev *accel_dev);
154 int adf_dev_restarting_notify_sync(struct adf_accel_dev *accel_dev);
155 int adf_dev_restarted_notify(struct adf_accel_dev *accel_dev);
156 int adf_dev_stop_notify_sync(struct adf_accel_dev *accel_dev);
157 int adf_ae_init(struct adf_accel_dev *accel_dev);
158 int adf_ae_shutdown(struct adf_accel_dev *accel_dev);
159 int adf_ae_fw_load(struct adf_accel_dev *accel_dev);
160 void adf_ae_fw_release(struct adf_accel_dev *accel_dev);
161 int adf_ae_start(struct adf_accel_dev *accel_dev);
162 int adf_ae_stop(struct adf_accel_dev *accel_dev);
163 
164 int adf_aer_store_ppaerucm_reg(device_t pdev,
165 			       struct adf_hw_device_data *hw_data);
166 
167 int adf_enable_aer(struct adf_accel_dev *accel_dev, device_t *adf);
168 void adf_disable_aer(struct adf_accel_dev *accel_dev);
169 void adf_reset_sbr(struct adf_accel_dev *accel_dev);
170 void adf_reset_flr(struct adf_accel_dev *accel_dev);
171 void adf_dev_pre_reset(struct adf_accel_dev *accel_dev);
172 void adf_dev_post_reset(struct adf_accel_dev *accel_dev);
173 void adf_dev_restore(struct adf_accel_dev *accel_dev);
174 int adf_init_aer(void);
175 void adf_exit_aer(void);
176 int adf_put_admin_msg_sync(struct adf_accel_dev *accel_dev,
177 			   u32 ae,
178 			   void *in,
179 			   void *out);
180 struct icp_qat_fw_init_admin_req;
181 struct icp_qat_fw_init_admin_resp;
182 int adf_send_admin(struct adf_accel_dev *accel_dev,
183 		   struct icp_qat_fw_init_admin_req *req,
184 		   struct icp_qat_fw_init_admin_resp *resp,
185 		   u32 ae_mask);
186 int adf_config_device(struct adf_accel_dev *accel_dev);
187 
188 int adf_init_admin_comms(struct adf_accel_dev *accel_dev);
189 void adf_exit_admin_comms(struct adf_accel_dev *accel_dev);
190 int adf_send_admin_init(struct adf_accel_dev *accel_dev);
191 int adf_get_fw_timestamp(struct adf_accel_dev *accel_dev, u64 *timestamp);
192 int adf_get_fw_pke_stats(struct adf_accel_dev *accel_dev,
193 			 u64 *suc_count,
194 			 u64 *unsuc_count);
195 int adf_dev_measure_clock(struct adf_accel_dev *accel_dev,
196 			  u32 *frequency,
197 			  u32 min,
198 			  u32 max);
199 int adf_clock_debugfs_add(struct adf_accel_dev *accel_dev);
200 u64 adf_clock_get_current_time(void);
201 int adf_init_arb(struct adf_accel_dev *accel_dev);
202 int adf_init_gen2_arb(struct adf_accel_dev *accel_dev);
203 void adf_exit_arb(struct adf_accel_dev *accel_dev);
204 void adf_disable_arb(struct adf_accel_dev *accel_dev);
205 void adf_update_ring_arb(struct adf_etr_ring_data *ring);
206 void adf_enable_ring_arb(struct adf_accel_dev *accel_dev,
207 			 void *csr_addr,
208 			 unsigned int bank_nr,
209 			 unsigned int mask);
210 void adf_disable_ring_arb(struct adf_accel_dev *accel_dev,
211 			  void *csr_addr,
212 			  unsigned int bank_nr,
213 			  unsigned int mask);
214 int adf_set_ssm_wdtimer(struct adf_accel_dev *accel_dev);
215 struct adf_accel_dev *adf_devmgr_get_dev_by_bdf(struct adf_pci_address *addr);
216 struct adf_accel_dev *adf_devmgr_get_dev_by_pci_bus(u8 bus);
217 int adf_get_vf_nr(struct adf_pci_address *vf_pci_addr, int *vf_nr);
218 u32 adf_get_slices_for_svc(struct adf_accel_dev *accel_dev,
219 			   enum adf_svc_type svc);
220 bool adf_is_bdf_equal(struct adf_pci_address *bdf1,
221 		      struct adf_pci_address *bdf2);
222 int adf_is_vf_nr_valid(struct adf_accel_dev *accel_dev, int vf_nr);
223 void adf_dev_get(struct adf_accel_dev *accel_dev);
224 void adf_dev_put(struct adf_accel_dev *accel_dev);
225 int adf_dev_in_use(struct adf_accel_dev *accel_dev);
226 int adf_init_etr_data(struct adf_accel_dev *accel_dev);
227 void adf_cleanup_etr_data(struct adf_accel_dev *accel_dev);
228 
229 struct qat_crypto_instance *qat_crypto_get_instance_node(int node);
230 void qat_crypto_put_instance(struct qat_crypto_instance *inst);
231 void qat_alg_callback(void *resp);
232 void qat_alg_asym_callback(void *resp);
233 int qat_algs_register(void);
234 void qat_algs_unregister(void);
235 int qat_asym_algs_register(void);
236 void qat_asym_algs_unregister(void);
237 
238 int adf_isr_resource_alloc(struct adf_accel_dev *accel_dev);
239 void adf_isr_resource_free(struct adf_accel_dev *accel_dev);
240 int adf_vf_isr_resource_alloc(struct adf_accel_dev *accel_dev);
241 void adf_vf_isr_resource_free(struct adf_accel_dev *accel_dev);
242 
243 int qat_hal_init(struct adf_accel_dev *accel_dev);
244 void qat_hal_deinit(struct icp_qat_fw_loader_handle *handle);
245 int qat_hal_start(struct icp_qat_fw_loader_handle *handle);
246 void qat_hal_stop(struct icp_qat_fw_loader_handle *handle,
247 		  unsigned char ae,
248 		  unsigned int ctx_mask);
249 void qat_hal_reset(struct icp_qat_fw_loader_handle *handle);
250 int qat_hal_clr_reset(struct icp_qat_fw_loader_handle *handle);
251 void qat_hal_set_live_ctx(struct icp_qat_fw_loader_handle *handle,
252 			  unsigned char ae,
253 			  unsigned int ctx_mask);
254 int qat_hal_check_ae_active(struct icp_qat_fw_loader_handle *handle,
255 			    unsigned int ae);
256 int qat_hal_set_ae_lm_mode(struct icp_qat_fw_loader_handle *handle,
257 			   unsigned char ae,
258 			   enum icp_qat_uof_regtype lm_type,
259 			   unsigned char mode);
260 void qat_hal_set_ae_tindex_mode(struct icp_qat_fw_loader_handle *handle,
261 				unsigned char ae,
262 				unsigned char mode);
263 void qat_hal_set_ae_scs_mode(struct icp_qat_fw_loader_handle *handle,
264 			     unsigned char ae,
265 			     unsigned char mode);
266 int qat_hal_set_ae_ctx_mode(struct icp_qat_fw_loader_handle *handle,
267 			    unsigned char ae,
268 			    unsigned char mode);
269 int qat_hal_set_ae_nn_mode(struct icp_qat_fw_loader_handle *handle,
270 			   unsigned char ae,
271 			   unsigned char mode);
272 void qat_hal_set_pc(struct icp_qat_fw_loader_handle *handle,
273 		    unsigned char ae,
274 		    unsigned int ctx_mask,
275 		    unsigned int upc);
276 void qat_hal_wr_uwords(struct icp_qat_fw_loader_handle *handle,
277 		       unsigned char ae,
278 		       unsigned int uaddr,
279 		       unsigned int words_num,
280 		       const uint64_t *uword);
281 void qat_hal_wr_coalesce_uwords(struct icp_qat_fw_loader_handle *handle,
282 				unsigned char ae,
283 				unsigned int uaddr,
284 				unsigned int words_num,
285 				uint64_t *uword);
286 
287 void qat_hal_wr_umem(struct icp_qat_fw_loader_handle *handle,
288 		     unsigned char ae,
289 		     unsigned int uword_addr,
290 		     unsigned int words_num,
291 		     unsigned int *data);
292 int qat_hal_get_ins_num(void);
293 int qat_hal_batch_wr_lm(struct icp_qat_fw_loader_handle *handle,
294 			unsigned char ae,
295 			struct icp_qat_uof_batch_init *lm_init_header);
296 int qat_hal_init_gpr(struct icp_qat_fw_loader_handle *handle,
297 		     unsigned char ae,
298 		     unsigned long ctx_mask,
299 		     enum icp_qat_uof_regtype reg_type,
300 		     unsigned short reg_num,
301 		     unsigned int regdata);
302 int qat_hal_init_wr_xfer(struct icp_qat_fw_loader_handle *handle,
303 			 unsigned char ae,
304 			 unsigned long ctx_mask,
305 			 enum icp_qat_uof_regtype reg_type,
306 			 unsigned short reg_num,
307 			 unsigned int regdata);
308 int qat_hal_init_rd_xfer(struct icp_qat_fw_loader_handle *handle,
309 			 unsigned char ae,
310 			 unsigned long ctx_mask,
311 			 enum icp_qat_uof_regtype reg_type,
312 			 unsigned short reg_num,
313 			 unsigned int regdata);
314 int qat_hal_init_nn(struct icp_qat_fw_loader_handle *handle,
315 		    unsigned char ae,
316 		    unsigned long ctx_mask,
317 		    unsigned short reg_num,
318 		    unsigned int regdata);
319 int qat_hal_wr_lm(struct icp_qat_fw_loader_handle *handle,
320 		  unsigned char ae,
321 		  unsigned short lm_addr,
322 		  unsigned int value);
323 int qat_uclo_wr_all_uimage(struct icp_qat_fw_loader_handle *handle);
324 void qat_uclo_del_obj(struct icp_qat_fw_loader_handle *handle);
325 void qat_uclo_del_mof(struct icp_qat_fw_loader_handle *handle);
326 int qat_uclo_wr_mimage(struct icp_qat_fw_loader_handle *handle,
327 		       const void *addr_ptr,
328 		       int mem_size);
329 int qat_uclo_map_obj(struct icp_qat_fw_loader_handle *handle,
330 		     const void *addr_ptr,
331 		     u32 mem_size,
332 		     const char *obj_name);
333 
334 void qat_hal_get_scs_neigh_ae(unsigned char ae, unsigned char *ae_neigh);
335 int qat_uclo_set_cfg_ae_mask(struct icp_qat_fw_loader_handle *handle,
336 			     unsigned int cfg_ae_mask);
337 void adf_enable_pf2vf_interrupts(struct adf_accel_dev *accel_dev);
338 void adf_disable_pf2vf_interrupts(struct adf_accel_dev *accel_dev);
339 int adf_init_vf_wq(void);
340 void adf_exit_vf_wq(void);
341 void adf_flush_vf_wq(void);
342 int adf_vf2pf_init(struct adf_accel_dev *accel_dev);
343 void adf_vf2pf_shutdown(struct adf_accel_dev *accel_dev);
344 static inline int
345 adf_sriov_configure(device_t *pdev, int numvfs)
346 {
347 	return 0;
348 }
349 
350 static inline void
351 adf_disable_sriov(struct adf_accel_dev *accel_dev)
352 {
353 }
354 
355 static inline void
356 adf_vf2pf_handler(struct adf_accel_vf_info *vf_info)
357 {
358 }
359 
360 static inline int
361 adf_init_pf_wq(void)
362 {
363 	return 0;
364 }
365 
366 static inline void
367 adf_exit_pf_wq(void)
368 {
369 }
370 #endif
371