1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2013-2014 Qlogic Corporation 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 18 * and ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 21 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 /* 31 * File: qls_os.c 32 * Author : David C Somayajulu, Qlogic Corporation, Aliso Viejo, CA 92656. 33 */ 34 35 #include <sys/cdefs.h> 36 __FBSDID("$FreeBSD$"); 37 38 #include "qls_os.h" 39 #include "qls_hw.h" 40 #include "qls_def.h" 41 #include "qls_inline.h" 42 #include "qls_ver.h" 43 #include "qls_glbl.h" 44 #include "qls_dbg.h" 45 #include <sys/smp.h> 46 47 /* 48 * Some PCI Configuration Space Related Defines 49 */ 50 51 #ifndef PCI_VENDOR_QLOGIC 52 #define PCI_VENDOR_QLOGIC 0x1077 53 #endif 54 55 #ifndef PCI_DEVICE_QLOGIC_8000 56 #define PCI_DEVICE_QLOGIC_8000 0x8000 57 #endif 58 59 #define PCI_QLOGIC_DEV8000 \ 60 ((PCI_DEVICE_QLOGIC_8000 << 16) | PCI_VENDOR_QLOGIC) 61 62 /* 63 * static functions 64 */ 65 static int qls_alloc_parent_dma_tag(qla_host_t *ha); 66 static void qls_free_parent_dma_tag(qla_host_t *ha); 67 68 static void qls_flush_xmt_bufs(qla_host_t *ha); 69 70 static int qls_alloc_rcv_bufs(qla_host_t *ha); 71 static void qls_free_rcv_bufs(qla_host_t *ha); 72 73 static void qls_init_ifnet(device_t dev, qla_host_t *ha); 74 static void qls_release(qla_host_t *ha); 75 static void qls_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs, 76 int error); 77 static void qls_stop(qla_host_t *ha); 78 static int qls_send(qla_host_t *ha, struct mbuf **m_headp); 79 static void qls_tx_done(void *context, int pending); 80 81 static int qls_config_lro(qla_host_t *ha); 82 static void qls_free_lro(qla_host_t *ha); 83 84 static void qls_error_recovery(void *context, int pending); 85 86 /* 87 * Hooks to the Operating Systems 88 */ 89 static int qls_pci_probe (device_t); 90 static int qls_pci_attach (device_t); 91 static int qls_pci_detach (device_t); 92 93 static void qls_start(struct ifnet *ifp); 94 static void qls_init(void *arg); 95 static int qls_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data); 96 static int qls_media_change(struct ifnet *ifp); 97 static void qls_media_status(struct ifnet *ifp, struct ifmediareq *ifmr); 98 99 static device_method_t qla_pci_methods[] = { 100 /* Device interface */ 101 DEVMETHOD(device_probe, qls_pci_probe), 102 DEVMETHOD(device_attach, qls_pci_attach), 103 DEVMETHOD(device_detach, qls_pci_detach), 104 { 0, 0 } 105 }; 106 107 static driver_t qla_pci_driver = { 108 "ql", qla_pci_methods, sizeof (qla_host_t), 109 }; 110 111 static devclass_t qla8000_devclass; 112 113 DRIVER_MODULE(qla8000, pci, qla_pci_driver, qla8000_devclass, 0, 0); 114 115 MODULE_DEPEND(qla8000, pci, 1, 1, 1); 116 MODULE_DEPEND(qla8000, ether, 1, 1, 1); 117 118 MALLOC_DEFINE(M_QLA8000BUF, "qla8000buf", "Buffers for qla8000 driver"); 119 120 static char dev_str[64]; 121 static char ver_str[64]; 122 123 /* 124 * Name: qls_pci_probe 125 * Function: Validate the PCI device to be a QLA80XX device 126 */ 127 static int 128 qls_pci_probe(device_t dev) 129 { 130 switch ((pci_get_device(dev) << 16) | (pci_get_vendor(dev))) { 131 case PCI_QLOGIC_DEV8000: 132 snprintf(dev_str, sizeof(dev_str), "%s v%d.%d.%d", 133 "Qlogic ISP 8000 PCI CNA Adapter-Ethernet Function", 134 QLA_VERSION_MAJOR, QLA_VERSION_MINOR, 135 QLA_VERSION_BUILD); 136 snprintf(ver_str, sizeof(ver_str), "v%d.%d.%d", 137 QLA_VERSION_MAJOR, QLA_VERSION_MINOR, 138 QLA_VERSION_BUILD); 139 device_set_desc(dev, dev_str); 140 break; 141 default: 142 return (ENXIO); 143 } 144 145 if (bootverbose) 146 printf("%s: %s\n ", __func__, dev_str); 147 148 return (BUS_PROBE_DEFAULT); 149 } 150 151 static int 152 qls_sysctl_get_drvr_stats(SYSCTL_HANDLER_ARGS) 153 { 154 int err = 0, ret; 155 qla_host_t *ha; 156 uint32_t i; 157 158 err = sysctl_handle_int(oidp, &ret, 0, req); 159 160 if (err || !req->newptr) 161 return (err); 162 163 if (ret == 1) { 164 ha = (qla_host_t *)arg1; 165 166 for (i = 0; i < ha->num_tx_rings; i++) { 167 device_printf(ha->pci_dev, 168 "%s: tx_ring[%d].tx_frames= %p\n", 169 __func__, i, 170 (void *)ha->tx_ring[i].tx_frames); 171 172 device_printf(ha->pci_dev, 173 "%s: tx_ring[%d].tx_tso_frames= %p\n", 174 __func__, i, 175 (void *)ha->tx_ring[i].tx_tso_frames); 176 177 device_printf(ha->pci_dev, 178 "%s: tx_ring[%d].tx_vlan_frames= %p\n", 179 __func__, i, 180 (void *)ha->tx_ring[i].tx_vlan_frames); 181 182 device_printf(ha->pci_dev, 183 "%s: tx_ring[%d].txr_free= 0x%08x\n", 184 __func__, i, 185 ha->tx_ring[i].txr_free); 186 187 device_printf(ha->pci_dev, 188 "%s: tx_ring[%d].txr_next= 0x%08x\n", 189 __func__, i, 190 ha->tx_ring[i].txr_next); 191 192 device_printf(ha->pci_dev, 193 "%s: tx_ring[%d].txr_done= 0x%08x\n", 194 __func__, i, 195 ha->tx_ring[i].txr_done); 196 197 device_printf(ha->pci_dev, 198 "%s: tx_ring[%d].txr_cons_idx= 0x%08x\n", 199 __func__, i, 200 *(ha->tx_ring[i].txr_cons_vaddr)); 201 } 202 203 for (i = 0; i < ha->num_rx_rings; i++) { 204 device_printf(ha->pci_dev, 205 "%s: rx_ring[%d].rx_int= %p\n", 206 __func__, i, 207 (void *)ha->rx_ring[i].rx_int); 208 209 device_printf(ha->pci_dev, 210 "%s: rx_ring[%d].rss_int= %p\n", 211 __func__, i, 212 (void *)ha->rx_ring[i].rss_int); 213 214 device_printf(ha->pci_dev, 215 "%s: rx_ring[%d].lbq_next= 0x%08x\n", 216 __func__, i, 217 ha->rx_ring[i].lbq_next); 218 219 device_printf(ha->pci_dev, 220 "%s: rx_ring[%d].lbq_free= 0x%08x\n", 221 __func__, i, 222 ha->rx_ring[i].lbq_free); 223 224 device_printf(ha->pci_dev, 225 "%s: rx_ring[%d].lbq_in= 0x%08x\n", 226 __func__, i, 227 ha->rx_ring[i].lbq_in); 228 229 device_printf(ha->pci_dev, 230 "%s: rx_ring[%d].sbq_next= 0x%08x\n", 231 __func__, i, 232 ha->rx_ring[i].sbq_next); 233 234 device_printf(ha->pci_dev, 235 "%s: rx_ring[%d].sbq_free= 0x%08x\n", 236 __func__, i, 237 ha->rx_ring[i].sbq_free); 238 239 device_printf(ha->pci_dev, 240 "%s: rx_ring[%d].sbq_in= 0x%08x\n", 241 __func__, i, 242 ha->rx_ring[i].sbq_in); 243 } 244 245 device_printf(ha->pci_dev, "%s: err_m_getcl = 0x%08x\n", 246 __func__, ha->err_m_getcl); 247 device_printf(ha->pci_dev, "%s: err_m_getjcl = 0x%08x\n", 248 __func__, ha->err_m_getjcl); 249 device_printf(ha->pci_dev, 250 "%s: err_tx_dmamap_create = 0x%08x\n", 251 __func__, ha->err_tx_dmamap_create); 252 device_printf(ha->pci_dev, 253 "%s: err_tx_dmamap_load = 0x%08x\n", 254 __func__, ha->err_tx_dmamap_load); 255 device_printf(ha->pci_dev, 256 "%s: err_tx_defrag = 0x%08x\n", 257 __func__, ha->err_tx_defrag); 258 } 259 return (err); 260 } 261 262 static void 263 qls_add_sysctls(qla_host_t *ha) 264 { 265 device_t dev = ha->pci_dev; 266 267 SYSCTL_ADD_STRING(device_get_sysctl_ctx(dev), 268 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 269 OID_AUTO, "version", CTLFLAG_RD, 270 ver_str, 0, "Driver Version"); 271 272 qls_dbg_level = 0; 273 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 274 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 275 OID_AUTO, "debug", CTLFLAG_RW, 276 &qls_dbg_level, qls_dbg_level, "Debug Level"); 277 278 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 279 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 280 OID_AUTO, "drvr_stats", 281 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, (void *)ha, 0, 282 qls_sysctl_get_drvr_stats, "I", "Driver Maintained Statistics"); 283 284 return; 285 } 286 287 static void 288 qls_watchdog(void *arg) 289 { 290 qla_host_t *ha = arg; 291 struct ifnet *ifp; 292 293 ifp = ha->ifp; 294 295 if (ha->flags.qla_watchdog_exit) { 296 ha->qla_watchdog_exited = 1; 297 return; 298 } 299 ha->qla_watchdog_exited = 0; 300 301 if (!ha->flags.qla_watchdog_pause) { 302 if (ha->qla_initiate_recovery) { 303 ha->qla_watchdog_paused = 1; 304 ha->qla_initiate_recovery = 0; 305 ha->err_inject = 0; 306 taskqueue_enqueue(ha->err_tq, &ha->err_task); 307 308 } else if ((ifp->if_snd.ifq_head != NULL) && QL_RUNNING(ifp)) { 309 taskqueue_enqueue(ha->tx_tq, &ha->tx_task); 310 } 311 312 ha->qla_watchdog_paused = 0; 313 } else { 314 ha->qla_watchdog_paused = 1; 315 } 316 317 ha->watchdog_ticks = (ha->watchdog_ticks + 1) % 1000; 318 callout_reset(&ha->tx_callout, QLA_WATCHDOG_CALLOUT_TICKS, 319 qls_watchdog, ha); 320 321 return; 322 } 323 324 /* 325 * Name: qls_pci_attach 326 * Function: attaches the device to the operating system 327 */ 328 static int 329 qls_pci_attach(device_t dev) 330 { 331 qla_host_t *ha = NULL; 332 int i; 333 334 QL_DPRINT2((dev, "%s: enter\n", __func__)); 335 336 if ((ha = device_get_softc(dev)) == NULL) { 337 device_printf(dev, "cannot get softc\n"); 338 return (ENOMEM); 339 } 340 341 memset(ha, 0, sizeof (qla_host_t)); 342 343 if (pci_get_device(dev) != PCI_DEVICE_QLOGIC_8000) { 344 device_printf(dev, "device is not QLE8000\n"); 345 return (ENXIO); 346 } 347 348 ha->pci_func = pci_get_function(dev); 349 350 ha->pci_dev = dev; 351 352 pci_enable_busmaster(dev); 353 354 ha->reg_rid = PCIR_BAR(1); 355 ha->pci_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &ha->reg_rid, 356 RF_ACTIVE); 357 358 if (ha->pci_reg == NULL) { 359 device_printf(dev, "unable to map any ports\n"); 360 goto qls_pci_attach_err; 361 } 362 363 ha->reg_rid1 = PCIR_BAR(3); 364 ha->pci_reg1 = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 365 &ha->reg_rid1, RF_ACTIVE); 366 367 if (ha->pci_reg1 == NULL) { 368 device_printf(dev, "unable to map any ports\n"); 369 goto qls_pci_attach_err; 370 } 371 372 mtx_init(&ha->hw_lock, "qla80xx_hw_lock", MTX_NETWORK_LOCK, MTX_DEF); 373 mtx_init(&ha->tx_lock, "qla80xx_tx_lock", MTX_NETWORK_LOCK, MTX_DEF); 374 375 qls_add_sysctls(ha); 376 qls_hw_add_sysctls(ha); 377 378 ha->flags.lock_init = 1; 379 380 ha->msix_count = pci_msix_count(dev); 381 382 if (ha->msix_count < qls_get_msix_count(ha)) { 383 device_printf(dev, "%s: msix_count[%d] not enough\n", __func__, 384 ha->msix_count); 385 goto qls_pci_attach_err; 386 } 387 388 ha->msix_count = qls_get_msix_count(ha); 389 390 device_printf(dev, "\n%s: ha %p pci_func 0x%x msix_count 0x%x" 391 " pci_reg %p pci_reg1 %p\n", __func__, ha, 392 ha->pci_func, ha->msix_count, ha->pci_reg, ha->pci_reg1); 393 394 if (pci_alloc_msix(dev, &ha->msix_count)) { 395 device_printf(dev, "%s: pci_alloc_msi[%d] failed\n", __func__, 396 ha->msix_count); 397 ha->msix_count = 0; 398 goto qls_pci_attach_err; 399 } 400 401 for (i = 0; i < ha->num_rx_rings; i++) { 402 ha->irq_vec[i].cq_idx = i; 403 ha->irq_vec[i].ha = ha; 404 ha->irq_vec[i].irq_rid = 1 + i; 405 406 ha->irq_vec[i].irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 407 &ha->irq_vec[i].irq_rid, 408 (RF_ACTIVE | RF_SHAREABLE)); 409 410 if (ha->irq_vec[i].irq == NULL) { 411 device_printf(dev, "could not allocate interrupt\n"); 412 goto qls_pci_attach_err; 413 } 414 415 if (bus_setup_intr(dev, ha->irq_vec[i].irq, 416 (INTR_TYPE_NET | INTR_MPSAFE), NULL, qls_isr, 417 &ha->irq_vec[i], &ha->irq_vec[i].handle)) { 418 device_printf(dev, 419 "could not setup interrupt\n"); 420 goto qls_pci_attach_err; 421 } 422 } 423 424 qls_rd_nic_params(ha); 425 426 /* allocate parent dma tag */ 427 if (qls_alloc_parent_dma_tag(ha)) { 428 device_printf(dev, "%s: qls_alloc_parent_dma_tag failed\n", 429 __func__); 430 goto qls_pci_attach_err; 431 } 432 433 /* alloc all dma buffers */ 434 if (qls_alloc_dma(ha)) { 435 device_printf(dev, "%s: qls_alloc_dma failed\n", __func__); 436 goto qls_pci_attach_err; 437 } 438 439 /* create the o.s ethernet interface */ 440 qls_init_ifnet(dev, ha); 441 442 ha->flags.qla_watchdog_active = 1; 443 ha->flags.qla_watchdog_pause = 1; 444 445 TASK_INIT(&ha->tx_task, 0, qls_tx_done, ha); 446 ha->tx_tq = taskqueue_create_fast("qla_txq", M_NOWAIT, 447 taskqueue_thread_enqueue, &ha->tx_tq); 448 taskqueue_start_threads(&ha->tx_tq, 1, PI_NET, "%s txq", 449 device_get_nameunit(ha->pci_dev)); 450 451 callout_init(&ha->tx_callout, 1); 452 ha->flags.qla_callout_init = 1; 453 454 /* create ioctl device interface */ 455 if (qls_make_cdev(ha)) { 456 device_printf(dev, "%s: qls_make_cdev failed\n", __func__); 457 goto qls_pci_attach_err; 458 } 459 460 callout_reset(&ha->tx_callout, QLA_WATCHDOG_CALLOUT_TICKS, 461 qls_watchdog, ha); 462 463 TASK_INIT(&ha->err_task, 0, qls_error_recovery, ha); 464 ha->err_tq = taskqueue_create_fast("qla_errq", M_NOWAIT, 465 taskqueue_thread_enqueue, &ha->err_tq); 466 taskqueue_start_threads(&ha->err_tq, 1, PI_NET, "%s errq", 467 device_get_nameunit(ha->pci_dev)); 468 469 QL_DPRINT2((dev, "%s: exit 0\n", __func__)); 470 return (0); 471 472 qls_pci_attach_err: 473 474 qls_release(ha); 475 476 QL_DPRINT2((dev, "%s: exit ENXIO\n", __func__)); 477 return (ENXIO); 478 } 479 480 /* 481 * Name: qls_pci_detach 482 * Function: Unhooks the device from the operating system 483 */ 484 static int 485 qls_pci_detach(device_t dev) 486 { 487 qla_host_t *ha = NULL; 488 489 QL_DPRINT2((dev, "%s: enter\n", __func__)); 490 491 if ((ha = device_get_softc(dev)) == NULL) { 492 device_printf(dev, "cannot get softc\n"); 493 return (ENOMEM); 494 } 495 496 (void)QLA_LOCK(ha, __func__, 0); 497 qls_stop(ha); 498 QLA_UNLOCK(ha, __func__); 499 500 qls_release(ha); 501 502 QL_DPRINT2((dev, "%s: exit\n", __func__)); 503 504 return (0); 505 } 506 507 /* 508 * Name: qls_release 509 * Function: Releases the resources allocated for the device 510 */ 511 static void 512 qls_release(qla_host_t *ha) 513 { 514 device_t dev; 515 int i; 516 517 dev = ha->pci_dev; 518 519 if (ha->err_tq) { 520 taskqueue_drain(ha->err_tq, &ha->err_task); 521 taskqueue_free(ha->err_tq); 522 } 523 524 if (ha->tx_tq) { 525 taskqueue_drain(ha->tx_tq, &ha->tx_task); 526 taskqueue_free(ha->tx_tq); 527 } 528 529 qls_del_cdev(ha); 530 531 if (ha->flags.qla_watchdog_active) { 532 ha->flags.qla_watchdog_exit = 1; 533 534 while (ha->qla_watchdog_exited == 0) 535 qls_mdelay(__func__, 1); 536 } 537 538 if (ha->flags.qla_callout_init) 539 callout_stop(&ha->tx_callout); 540 541 if (ha->ifp != NULL) 542 ether_ifdetach(ha->ifp); 543 544 qls_free_dma(ha); 545 qls_free_parent_dma_tag(ha); 546 547 for (i = 0; i < ha->num_rx_rings; i++) { 548 if (ha->irq_vec[i].handle) { 549 (void)bus_teardown_intr(dev, ha->irq_vec[i].irq, 550 ha->irq_vec[i].handle); 551 } 552 553 if (ha->irq_vec[i].irq) { 554 (void)bus_release_resource(dev, SYS_RES_IRQ, 555 ha->irq_vec[i].irq_rid, 556 ha->irq_vec[i].irq); 557 } 558 } 559 560 if (ha->msix_count) 561 pci_release_msi(dev); 562 563 if (ha->flags.lock_init) { 564 mtx_destroy(&ha->tx_lock); 565 mtx_destroy(&ha->hw_lock); 566 } 567 568 if (ha->pci_reg) 569 (void) bus_release_resource(dev, SYS_RES_MEMORY, ha->reg_rid, 570 ha->pci_reg); 571 572 if (ha->pci_reg1) 573 (void) bus_release_resource(dev, SYS_RES_MEMORY, ha->reg_rid1, 574 ha->pci_reg1); 575 } 576 577 /* 578 * DMA Related Functions 579 */ 580 581 static void 582 qls_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 583 { 584 *((bus_addr_t *)arg) = 0; 585 586 if (error) { 587 printf("%s: bus_dmamap_load failed (%d)\n", __func__, error); 588 return; 589 } 590 591 *((bus_addr_t *)arg) = segs[0].ds_addr; 592 593 return; 594 } 595 596 int 597 qls_alloc_dmabuf(qla_host_t *ha, qla_dma_t *dma_buf) 598 { 599 int ret = 0; 600 device_t dev; 601 bus_addr_t b_addr; 602 603 dev = ha->pci_dev; 604 605 QL_DPRINT2((dev, "%s: enter\n", __func__)); 606 607 ret = bus_dma_tag_create( 608 ha->parent_tag,/* parent */ 609 dma_buf->alignment, 610 ((bus_size_t)(1ULL << 32)),/* boundary */ 611 BUS_SPACE_MAXADDR, /* lowaddr */ 612 BUS_SPACE_MAXADDR, /* highaddr */ 613 NULL, NULL, /* filter, filterarg */ 614 dma_buf->size, /* maxsize */ 615 1, /* nsegments */ 616 dma_buf->size, /* maxsegsize */ 617 0, /* flags */ 618 NULL, NULL, /* lockfunc, lockarg */ 619 &dma_buf->dma_tag); 620 621 if (ret) { 622 device_printf(dev, "%s: could not create dma tag\n", __func__); 623 goto qls_alloc_dmabuf_exit; 624 } 625 ret = bus_dmamem_alloc(dma_buf->dma_tag, 626 (void **)&dma_buf->dma_b, 627 (BUS_DMA_ZERO | BUS_DMA_COHERENT | BUS_DMA_NOWAIT), 628 &dma_buf->dma_map); 629 if (ret) { 630 bus_dma_tag_destroy(dma_buf->dma_tag); 631 device_printf(dev, "%s: bus_dmamem_alloc failed\n", __func__); 632 goto qls_alloc_dmabuf_exit; 633 } 634 635 ret = bus_dmamap_load(dma_buf->dma_tag, 636 dma_buf->dma_map, 637 dma_buf->dma_b, 638 dma_buf->size, 639 qls_dmamap_callback, 640 &b_addr, BUS_DMA_NOWAIT); 641 642 if (ret || !b_addr) { 643 bus_dma_tag_destroy(dma_buf->dma_tag); 644 bus_dmamem_free(dma_buf->dma_tag, dma_buf->dma_b, 645 dma_buf->dma_map); 646 ret = -1; 647 goto qls_alloc_dmabuf_exit; 648 } 649 650 dma_buf->dma_addr = b_addr; 651 652 qls_alloc_dmabuf_exit: 653 QL_DPRINT2((dev, "%s: exit ret 0x%08x tag %p map %p b %p sz 0x%x\n", 654 __func__, ret, (void *)dma_buf->dma_tag, 655 (void *)dma_buf->dma_map, (void *)dma_buf->dma_b, 656 dma_buf->size)); 657 658 return ret; 659 } 660 661 void 662 qls_free_dmabuf(qla_host_t *ha, qla_dma_t *dma_buf) 663 { 664 bus_dmamap_unload(dma_buf->dma_tag, dma_buf->dma_map); 665 bus_dmamem_free(dma_buf->dma_tag, dma_buf->dma_b, dma_buf->dma_map); 666 bus_dma_tag_destroy(dma_buf->dma_tag); 667 } 668 669 static int 670 qls_alloc_parent_dma_tag(qla_host_t *ha) 671 { 672 int ret; 673 device_t dev; 674 675 dev = ha->pci_dev; 676 677 /* 678 * Allocate parent DMA Tag 679 */ 680 ret = bus_dma_tag_create( 681 bus_get_dma_tag(dev), /* parent */ 682 1,((bus_size_t)(1ULL << 32)),/* alignment, boundary */ 683 BUS_SPACE_MAXADDR, /* lowaddr */ 684 BUS_SPACE_MAXADDR, /* highaddr */ 685 NULL, NULL, /* filter, filterarg */ 686 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 687 0, /* nsegments */ 688 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */ 689 0, /* flags */ 690 NULL, NULL, /* lockfunc, lockarg */ 691 &ha->parent_tag); 692 693 if (ret) { 694 device_printf(dev, "%s: could not create parent dma tag\n", 695 __func__); 696 return (-1); 697 } 698 699 ha->flags.parent_tag = 1; 700 701 return (0); 702 } 703 704 static void 705 qls_free_parent_dma_tag(qla_host_t *ha) 706 { 707 if (ha->flags.parent_tag) { 708 bus_dma_tag_destroy(ha->parent_tag); 709 ha->flags.parent_tag = 0; 710 } 711 } 712 713 /* 714 * Name: qls_init_ifnet 715 * Function: Creates the Network Device Interface and Registers it with the O.S 716 */ 717 718 static void 719 qls_init_ifnet(device_t dev, qla_host_t *ha) 720 { 721 struct ifnet *ifp; 722 723 QL_DPRINT2((dev, "%s: enter\n", __func__)); 724 725 ifp = ha->ifp = if_alloc(IFT_ETHER); 726 727 if (ifp == NULL) 728 panic("%s: cannot if_alloc()\n", device_get_nameunit(dev)); 729 730 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 731 ifp->if_baudrate = IF_Gbps(10); 732 ifp->if_init = qls_init; 733 ifp->if_softc = ha; 734 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 735 ifp->if_ioctl = qls_ioctl; 736 ifp->if_start = qls_start; 737 738 IFQ_SET_MAXLEN(&ifp->if_snd, qls_get_ifq_snd_maxlen(ha)); 739 ifp->if_snd.ifq_drv_maxlen = qls_get_ifq_snd_maxlen(ha); 740 IFQ_SET_READY(&ifp->if_snd); 741 742 ha->max_frame_size = ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 743 if (ha->max_frame_size <= MCLBYTES) { 744 ha->msize = MCLBYTES; 745 } else if (ha->max_frame_size <= MJUMPAGESIZE) { 746 ha->msize = MJUMPAGESIZE; 747 } else 748 ha->msize = MJUM9BYTES; 749 750 ether_ifattach(ifp, qls_get_mac_addr(ha)); 751 752 ifp->if_capabilities = IFCAP_JUMBO_MTU; 753 754 ifp->if_capabilities |= IFCAP_HWCSUM; 755 ifp->if_capabilities |= IFCAP_VLAN_MTU; 756 757 ifp->if_capabilities |= IFCAP_TSO4; 758 ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING; 759 ifp->if_capabilities |= IFCAP_VLAN_HWTSO; 760 ifp->if_capabilities |= IFCAP_LINKSTATE; 761 762 ifp->if_capenable = ifp->if_capabilities; 763 764 ifp->if_hdrlen = sizeof(struct ether_vlan_header); 765 766 ifmedia_init(&ha->media, IFM_IMASK, qls_media_change, qls_media_status); 767 768 ifmedia_add(&ha->media, (IFM_ETHER | qls_get_optics(ha) | IFM_FDX), 0, 769 NULL); 770 ifmedia_add(&ha->media, (IFM_ETHER | IFM_AUTO), 0, NULL); 771 772 ifmedia_set(&ha->media, (IFM_ETHER | IFM_AUTO)); 773 774 QL_DPRINT2((dev, "%s: exit\n", __func__)); 775 776 return; 777 } 778 779 static void 780 qls_init_locked(qla_host_t *ha) 781 { 782 struct ifnet *ifp = ha->ifp; 783 784 qls_stop(ha); 785 786 qls_flush_xmt_bufs(ha); 787 788 if (qls_alloc_rcv_bufs(ha) != 0) 789 return; 790 791 if (qls_config_lro(ha)) 792 return; 793 794 bcopy(IF_LLADDR(ha->ifp), ha->mac_addr, ETHER_ADDR_LEN); 795 796 ifp->if_hwassist = CSUM_IP; 797 ifp->if_hwassist |= CSUM_TCP; 798 ifp->if_hwassist |= CSUM_UDP; 799 ifp->if_hwassist |= CSUM_TSO; 800 801 if (qls_init_hw_if(ha) == 0) { 802 ifp = ha->ifp; 803 ifp->if_drv_flags |= IFF_DRV_RUNNING; 804 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 805 ha->flags.qla_watchdog_pause = 0; 806 } 807 808 return; 809 } 810 811 static void 812 qls_init(void *arg) 813 { 814 qla_host_t *ha; 815 816 ha = (qla_host_t *)arg; 817 818 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 819 820 (void)QLA_LOCK(ha, __func__, 0); 821 qls_init_locked(ha); 822 QLA_UNLOCK(ha, __func__); 823 824 QL_DPRINT2((ha->pci_dev, "%s: exit\n", __func__)); 825 } 826 827 static u_int 828 qls_copy_maddr(void *arg, struct sockaddr_dl *sdl, u_int mcnt) 829 { 830 uint8_t *mta = arg; 831 832 if (mcnt == Q8_MAX_NUM_MULTICAST_ADDRS) 833 return (0); 834 835 bcopy(LLADDR(sdl), &mta[mcnt * Q8_MAC_ADDR_LEN], Q8_MAC_ADDR_LEN); 836 837 return (1); 838 } 839 840 static void 841 qls_set_multi(qla_host_t *ha, uint32_t add_multi) 842 { 843 uint8_t mta[Q8_MAX_NUM_MULTICAST_ADDRS * Q8_MAC_ADDR_LEN]; 844 struct ifnet *ifp = ha->ifp; 845 int mcnt; 846 847 mcnt = if_foreach_llmaddr(ifp, qls_copy_maddr, mta); 848 849 if (QLA_LOCK(ha, __func__, 1) == 0) { 850 qls_hw_set_multi(ha, mta, mcnt, add_multi); 851 QLA_UNLOCK(ha, __func__); 852 } 853 854 return; 855 } 856 857 static int 858 qls_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 859 { 860 int ret = 0; 861 struct ifreq *ifr = (struct ifreq *)data; 862 struct ifaddr *ifa = (struct ifaddr *)data; 863 qla_host_t *ha; 864 865 ha = (qla_host_t *)ifp->if_softc; 866 867 switch (cmd) { 868 case SIOCSIFADDR: 869 QL_DPRINT4((ha->pci_dev, "%s: SIOCSIFADDR (0x%lx)\n", 870 __func__, cmd)); 871 872 if (ifa->ifa_addr->sa_family == AF_INET) { 873 ifp->if_flags |= IFF_UP; 874 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 875 (void)QLA_LOCK(ha, __func__, 0); 876 qls_init_locked(ha); 877 QLA_UNLOCK(ha, __func__); 878 } 879 QL_DPRINT4((ha->pci_dev, 880 "%s: SIOCSIFADDR (0x%lx) ipv4 [0x%08x]\n", 881 __func__, cmd, 882 ntohl(IA_SIN(ifa)->sin_addr.s_addr))); 883 884 arp_ifinit(ifp, ifa); 885 } else { 886 ether_ioctl(ifp, cmd, data); 887 } 888 break; 889 890 case SIOCSIFMTU: 891 QL_DPRINT4((ha->pci_dev, "%s: SIOCSIFMTU (0x%lx)\n", 892 __func__, cmd)); 893 894 if (ifr->ifr_mtu > QLA_MAX_MTU) { 895 ret = EINVAL; 896 } else { 897 (void) QLA_LOCK(ha, __func__, 0); 898 899 ifp->if_mtu = ifr->ifr_mtu; 900 ha->max_frame_size = 901 ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 902 903 QLA_UNLOCK(ha, __func__); 904 905 if (ret) 906 ret = EINVAL; 907 } 908 909 break; 910 911 case SIOCSIFFLAGS: 912 QL_DPRINT4((ha->pci_dev, "%s: SIOCSIFFLAGS (0x%lx)\n", 913 __func__, cmd)); 914 915 (void)QLA_LOCK(ha, __func__, 0); 916 917 if (ifp->if_flags & IFF_UP) { 918 if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) { 919 if ((ifp->if_flags ^ ha->if_flags) & 920 IFF_PROMISC) { 921 ret = qls_set_promisc(ha); 922 } else if ((ifp->if_flags ^ ha->if_flags) & 923 IFF_ALLMULTI) { 924 ret = qls_set_allmulti(ha); 925 } 926 } else { 927 ha->max_frame_size = ifp->if_mtu + 928 ETHER_HDR_LEN + ETHER_CRC_LEN; 929 qls_init_locked(ha); 930 } 931 } else { 932 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 933 qls_stop(ha); 934 ha->if_flags = ifp->if_flags; 935 } 936 937 QLA_UNLOCK(ha, __func__); 938 break; 939 940 case SIOCADDMULTI: 941 QL_DPRINT4((ha->pci_dev, 942 "%s: %s (0x%lx)\n", __func__, "SIOCADDMULTI", cmd)); 943 944 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 945 qls_set_multi(ha, 1); 946 } 947 break; 948 949 case SIOCDELMULTI: 950 QL_DPRINT4((ha->pci_dev, 951 "%s: %s (0x%lx)\n", __func__, "SIOCDELMULTI", cmd)); 952 953 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 954 qls_set_multi(ha, 0); 955 } 956 break; 957 958 case SIOCSIFMEDIA: 959 case SIOCGIFMEDIA: 960 QL_DPRINT4((ha->pci_dev, 961 "%s: SIOCSIFMEDIA/SIOCGIFMEDIA (0x%lx)\n", 962 __func__, cmd)); 963 ret = ifmedia_ioctl(ifp, ifr, &ha->media, cmd); 964 break; 965 966 case SIOCSIFCAP: 967 { 968 int mask = ifr->ifr_reqcap ^ ifp->if_capenable; 969 970 QL_DPRINT4((ha->pci_dev, "%s: SIOCSIFCAP (0x%lx)\n", 971 __func__, cmd)); 972 973 if (mask & IFCAP_HWCSUM) 974 ifp->if_capenable ^= IFCAP_HWCSUM; 975 if (mask & IFCAP_TSO4) 976 ifp->if_capenable ^= IFCAP_TSO4; 977 if (mask & IFCAP_VLAN_HWTAGGING) 978 ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING; 979 if (mask & IFCAP_VLAN_HWTSO) 980 ifp->if_capenable ^= IFCAP_VLAN_HWTSO; 981 982 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 983 qls_init(ha); 984 985 VLAN_CAPABILITIES(ifp); 986 break; 987 } 988 989 default: 990 QL_DPRINT4((ha->pci_dev, "%s: default (0x%lx)\n", 991 __func__, cmd)); 992 ret = ether_ioctl(ifp, cmd, data); 993 break; 994 } 995 996 return (ret); 997 } 998 999 static int 1000 qls_media_change(struct ifnet *ifp) 1001 { 1002 qla_host_t *ha; 1003 struct ifmedia *ifm; 1004 int ret = 0; 1005 1006 ha = (qla_host_t *)ifp->if_softc; 1007 1008 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 1009 1010 ifm = &ha->media; 1011 1012 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 1013 ret = EINVAL; 1014 1015 QL_DPRINT2((ha->pci_dev, "%s: exit\n", __func__)); 1016 1017 return (ret); 1018 } 1019 1020 static void 1021 qls_media_status(struct ifnet *ifp, struct ifmediareq *ifmr) 1022 { 1023 qla_host_t *ha; 1024 1025 ha = (qla_host_t *)ifp->if_softc; 1026 1027 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 1028 1029 ifmr->ifm_status = IFM_AVALID; 1030 ifmr->ifm_active = IFM_ETHER; 1031 1032 qls_update_link_state(ha); 1033 if (ha->link_up) { 1034 ifmr->ifm_status |= IFM_ACTIVE; 1035 ifmr->ifm_active |= (IFM_FDX | qls_get_optics(ha)); 1036 } 1037 1038 QL_DPRINT2((ha->pci_dev, "%s: exit (%s)\n", __func__,\ 1039 (ha->link_up ? "link_up" : "link_down"))); 1040 1041 return; 1042 } 1043 1044 static void 1045 qls_start(struct ifnet *ifp) 1046 { 1047 int i, ret = 0; 1048 struct mbuf *m_head; 1049 qla_host_t *ha = (qla_host_t *)ifp->if_softc; 1050 1051 QL_DPRINT8((ha->pci_dev, "%s: enter\n", __func__)); 1052 1053 if (!mtx_trylock(&ha->tx_lock)) { 1054 QL_DPRINT8((ha->pci_dev, 1055 "%s: mtx_trylock(&ha->tx_lock) failed\n", __func__)); 1056 return; 1057 } 1058 1059 if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) == 1060 IFF_DRV_RUNNING) { 1061 for (i = 0; i < ha->num_tx_rings; i++) { 1062 ret |= qls_hw_tx_done(ha, i); 1063 } 1064 1065 if (ret == 0) 1066 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1067 } 1068 1069 if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) != 1070 IFF_DRV_RUNNING) { 1071 QL_DPRINT8((ha->pci_dev, "%s: !IFF_DRV_RUNNING\n", __func__)); 1072 QLA_TX_UNLOCK(ha); 1073 return; 1074 } 1075 1076 if (!ha->link_up) { 1077 qls_update_link_state(ha); 1078 if (!ha->link_up) { 1079 QL_DPRINT8((ha->pci_dev, "%s: link down\n", __func__)); 1080 QLA_TX_UNLOCK(ha); 1081 return; 1082 } 1083 } 1084 1085 while (ifp->if_snd.ifq_head != NULL) { 1086 IF_DEQUEUE(&ifp->if_snd, m_head); 1087 1088 if (m_head == NULL) { 1089 QL_DPRINT8((ha->pci_dev, "%s: m_head == NULL\n", 1090 __func__)); 1091 break; 1092 } 1093 1094 if (qls_send(ha, &m_head)) { 1095 if (m_head == NULL) 1096 break; 1097 QL_DPRINT8((ha->pci_dev, "%s: PREPEND\n", __func__)); 1098 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1099 IF_PREPEND(&ifp->if_snd, m_head); 1100 break; 1101 } 1102 /* Send a copy of the frame to the BPF listener */ 1103 ETHER_BPF_MTAP(ifp, m_head); 1104 } 1105 1106 QLA_TX_UNLOCK(ha); 1107 QL_DPRINT8((ha->pci_dev, "%s: exit\n", __func__)); 1108 return; 1109 } 1110 1111 static int 1112 qls_send(qla_host_t *ha, struct mbuf **m_headp) 1113 { 1114 bus_dma_segment_t segs[QLA_MAX_SEGMENTS]; 1115 bus_dmamap_t map; 1116 int nsegs; 1117 int ret = -1; 1118 uint32_t tx_idx; 1119 struct mbuf *m_head = *m_headp; 1120 uint32_t txr_idx = 0; 1121 1122 QL_DPRINT8((ha->pci_dev, "%s: enter\n", __func__)); 1123 1124 /* check if flowid is set */ 1125 if (M_HASHTYPE_GET(m_head) != M_HASHTYPE_NONE) 1126 txr_idx = m_head->m_pkthdr.flowid & (ha->num_tx_rings - 1); 1127 1128 tx_idx = ha->tx_ring[txr_idx].txr_next; 1129 1130 map = ha->tx_ring[txr_idx].tx_buf[tx_idx].map; 1131 1132 ret = bus_dmamap_load_mbuf_sg(ha->tx_tag, map, m_head, segs, &nsegs, 1133 BUS_DMA_NOWAIT); 1134 1135 if (ret == EFBIG) { 1136 struct mbuf *m; 1137 1138 QL_DPRINT8((ha->pci_dev, "%s: EFBIG [%d]\n", __func__, 1139 m_head->m_pkthdr.len)); 1140 1141 m = m_defrag(m_head, M_NOWAIT); 1142 if (m == NULL) { 1143 ha->err_tx_defrag++; 1144 m_freem(m_head); 1145 *m_headp = NULL; 1146 device_printf(ha->pci_dev, 1147 "%s: m_defrag() = NULL [%d]\n", 1148 __func__, ret); 1149 return (ENOBUFS); 1150 } 1151 m_head = m; 1152 *m_headp = m_head; 1153 1154 if ((ret = bus_dmamap_load_mbuf_sg(ha->tx_tag, map, m_head, 1155 segs, &nsegs, BUS_DMA_NOWAIT))) { 1156 ha->err_tx_dmamap_load++; 1157 1158 device_printf(ha->pci_dev, 1159 "%s: bus_dmamap_load_mbuf_sg failed0[%d, %d]\n", 1160 __func__, ret, m_head->m_pkthdr.len); 1161 1162 if (ret != ENOMEM) { 1163 m_freem(m_head); 1164 *m_headp = NULL; 1165 } 1166 return (ret); 1167 } 1168 1169 } else if (ret) { 1170 ha->err_tx_dmamap_load++; 1171 1172 device_printf(ha->pci_dev, 1173 "%s: bus_dmamap_load_mbuf_sg failed1[%d, %d]\n", 1174 __func__, ret, m_head->m_pkthdr.len); 1175 1176 if (ret != ENOMEM) { 1177 m_freem(m_head); 1178 *m_headp = NULL; 1179 } 1180 return (ret); 1181 } 1182 1183 QL_ASSERT(ha, (nsegs != 0), ("qls_send: empty packet")); 1184 1185 bus_dmamap_sync(ha->tx_tag, map, BUS_DMASYNC_PREWRITE); 1186 1187 if (!(ret = qls_hw_send(ha, segs, nsegs, tx_idx, m_head, txr_idx))) { 1188 ha->tx_ring[txr_idx].count++; 1189 ha->tx_ring[txr_idx].tx_buf[tx_idx].m_head = m_head; 1190 ha->tx_ring[txr_idx].tx_buf[tx_idx].map = map; 1191 } else { 1192 if (ret == EINVAL) { 1193 if (m_head) 1194 m_freem(m_head); 1195 *m_headp = NULL; 1196 } 1197 } 1198 1199 QL_DPRINT8((ha->pci_dev, "%s: exit\n", __func__)); 1200 return (ret); 1201 } 1202 1203 static void 1204 qls_stop(qla_host_t *ha) 1205 { 1206 struct ifnet *ifp = ha->ifp; 1207 1208 ifp->if_drv_flags &= ~(IFF_DRV_OACTIVE | IFF_DRV_RUNNING); 1209 1210 ha->flags.qla_watchdog_pause = 1; 1211 1212 while (!ha->qla_watchdog_paused) 1213 qls_mdelay(__func__, 1); 1214 1215 qls_del_hw_if(ha); 1216 1217 qls_free_lro(ha); 1218 1219 qls_flush_xmt_bufs(ha); 1220 qls_free_rcv_bufs(ha); 1221 1222 return; 1223 } 1224 1225 /* 1226 * Buffer Management Functions for Transmit and Receive Rings 1227 */ 1228 /* 1229 * Release mbuf after it sent on the wire 1230 */ 1231 static void 1232 qls_flush_tx_buf(qla_host_t *ha, qla_tx_buf_t *txb) 1233 { 1234 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 1235 1236 if (txb->m_head) { 1237 bus_dmamap_unload(ha->tx_tag, txb->map); 1238 1239 m_freem(txb->m_head); 1240 txb->m_head = NULL; 1241 } 1242 1243 QL_DPRINT2((ha->pci_dev, "%s: exit\n", __func__)); 1244 } 1245 1246 static void 1247 qls_flush_xmt_bufs(qla_host_t *ha) 1248 { 1249 int i, j; 1250 1251 for (j = 0; j < ha->num_tx_rings; j++) { 1252 for (i = 0; i < NUM_TX_DESCRIPTORS; i++) 1253 qls_flush_tx_buf(ha, &ha->tx_ring[j].tx_buf[i]); 1254 } 1255 1256 return; 1257 } 1258 1259 static int 1260 qls_alloc_rcv_mbufs(qla_host_t *ha, int r) 1261 { 1262 int i, j, ret = 0; 1263 qla_rx_buf_t *rxb; 1264 qla_rx_ring_t *rx_ring; 1265 volatile q81_bq_addr_e_t *sbq_e; 1266 1267 rx_ring = &ha->rx_ring[r]; 1268 1269 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1270 rxb = &rx_ring->rx_buf[i]; 1271 1272 ret = bus_dmamap_create(ha->rx_tag, BUS_DMA_NOWAIT, &rxb->map); 1273 1274 if (ret) { 1275 device_printf(ha->pci_dev, 1276 "%s: dmamap[%d, %d] failed\n", __func__, r, i); 1277 1278 for (j = 0; j < i; j++) { 1279 rxb = &rx_ring->rx_buf[j]; 1280 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1281 } 1282 goto qls_alloc_rcv_mbufs_err; 1283 } 1284 } 1285 1286 rx_ring = &ha->rx_ring[r]; 1287 1288 sbq_e = rx_ring->sbq_vaddr; 1289 1290 rxb = &rx_ring->rx_buf[0]; 1291 1292 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1293 if (!(ret = qls_get_mbuf(ha, rxb, NULL))) { 1294 /* 1295 * set the physical address in the 1296 * corresponding descriptor entry in the 1297 * receive ring/queue for the hba 1298 */ 1299 1300 sbq_e->addr_lo = rxb->paddr & 0xFFFFFFFF; 1301 sbq_e->addr_hi = (rxb->paddr >> 32) & 0xFFFFFFFF; 1302 1303 } else { 1304 device_printf(ha->pci_dev, 1305 "%s: qls_get_mbuf [%d, %d] failed\n", 1306 __func__, r, i); 1307 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1308 goto qls_alloc_rcv_mbufs_err; 1309 } 1310 1311 rxb++; 1312 sbq_e++; 1313 } 1314 return 0; 1315 1316 qls_alloc_rcv_mbufs_err: 1317 return (-1); 1318 } 1319 1320 static void 1321 qls_free_rcv_bufs(qla_host_t *ha) 1322 { 1323 int i, r; 1324 qla_rx_buf_t *rxb; 1325 qla_rx_ring_t *rxr; 1326 1327 for (r = 0; r < ha->num_rx_rings; r++) { 1328 rxr = &ha->rx_ring[r]; 1329 1330 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1331 rxb = &rxr->rx_buf[i]; 1332 1333 if (rxb->m_head != NULL) { 1334 bus_dmamap_unload(ha->rx_tag, rxb->map); 1335 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1336 m_freem(rxb->m_head); 1337 } 1338 } 1339 bzero(rxr->rx_buf, (sizeof(qla_rx_buf_t) * NUM_RX_DESCRIPTORS)); 1340 } 1341 return; 1342 } 1343 1344 static int 1345 qls_alloc_rcv_bufs(qla_host_t *ha) 1346 { 1347 int r, ret = 0; 1348 qla_rx_ring_t *rxr; 1349 1350 for (r = 0; r < ha->num_rx_rings; r++) { 1351 rxr = &ha->rx_ring[r]; 1352 bzero(rxr->rx_buf, (sizeof(qla_rx_buf_t) * NUM_RX_DESCRIPTORS)); 1353 } 1354 1355 for (r = 0; r < ha->num_rx_rings; r++) { 1356 ret = qls_alloc_rcv_mbufs(ha, r); 1357 1358 if (ret) 1359 qls_free_rcv_bufs(ha); 1360 } 1361 1362 return (ret); 1363 } 1364 1365 int 1366 qls_get_mbuf(qla_host_t *ha, qla_rx_buf_t *rxb, struct mbuf *nmp) 1367 { 1368 struct mbuf *mp = nmp; 1369 int ret = 0; 1370 uint32_t offset; 1371 bus_dma_segment_t segs[1]; 1372 int nsegs; 1373 1374 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 1375 1376 if (mp == NULL) { 1377 mp = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, ha->msize); 1378 1379 if (mp == NULL) { 1380 if (ha->msize == MCLBYTES) 1381 ha->err_m_getcl++; 1382 else 1383 ha->err_m_getjcl++; 1384 1385 ret = ENOBUFS; 1386 device_printf(ha->pci_dev, 1387 "%s: m_getcl failed\n", __func__); 1388 goto exit_qls_get_mbuf; 1389 } 1390 mp->m_len = mp->m_pkthdr.len = ha->msize; 1391 } else { 1392 mp->m_len = mp->m_pkthdr.len = ha->msize; 1393 mp->m_data = mp->m_ext.ext_buf; 1394 mp->m_next = NULL; 1395 } 1396 1397 /* align the receive buffers to 8 byte boundary */ 1398 offset = (uint32_t)((unsigned long long)mp->m_data & 0x7ULL); 1399 if (offset) { 1400 offset = 8 - offset; 1401 m_adj(mp, offset); 1402 } 1403 1404 /* 1405 * Using memory from the mbuf cluster pool, invoke the bus_dma 1406 * machinery to arrange the memory mapping. 1407 */ 1408 ret = bus_dmamap_load_mbuf_sg(ha->rx_tag, rxb->map, 1409 mp, segs, &nsegs, BUS_DMA_NOWAIT); 1410 rxb->paddr = segs[0].ds_addr; 1411 1412 if (ret || !rxb->paddr || (nsegs != 1)) { 1413 m_freem(mp); 1414 rxb->m_head = NULL; 1415 device_printf(ha->pci_dev, 1416 "%s: bus_dmamap_load failed[%d, 0x%016llx, %d]\n", 1417 __func__, ret, (long long unsigned int)rxb->paddr, 1418 nsegs); 1419 ret = -1; 1420 goto exit_qls_get_mbuf; 1421 } 1422 rxb->m_head = mp; 1423 bus_dmamap_sync(ha->rx_tag, rxb->map, BUS_DMASYNC_PREREAD); 1424 1425 exit_qls_get_mbuf: 1426 QL_DPRINT2((ha->pci_dev, "%s: exit ret = 0x%08x\n", __func__, ret)); 1427 return (ret); 1428 } 1429 1430 static void 1431 qls_tx_done(void *context, int pending) 1432 { 1433 qla_host_t *ha = context; 1434 struct ifnet *ifp; 1435 1436 ifp = ha->ifp; 1437 1438 if (!ifp) 1439 return; 1440 1441 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 1442 QL_DPRINT8((ha->pci_dev, "%s: !IFF_DRV_RUNNING\n", __func__)); 1443 return; 1444 } 1445 1446 qls_start(ha->ifp); 1447 return; 1448 } 1449 1450 static int 1451 qls_config_lro(qla_host_t *ha) 1452 { 1453 int i; 1454 struct lro_ctrl *lro; 1455 1456 for (i = 0; i < ha->num_rx_rings; i++) { 1457 lro = &ha->rx_ring[i].lro; 1458 if (tcp_lro_init(lro)) { 1459 device_printf(ha->pci_dev, "%s: tcp_lro_init failed\n", 1460 __func__); 1461 return (-1); 1462 } 1463 lro->ifp = ha->ifp; 1464 } 1465 ha->flags.lro_init = 1; 1466 1467 QL_DPRINT2((ha->pci_dev, "%s: LRO initialized\n", __func__)); 1468 return (0); 1469 } 1470 1471 static void 1472 qls_free_lro(qla_host_t *ha) 1473 { 1474 int i; 1475 struct lro_ctrl *lro; 1476 1477 if (!ha->flags.lro_init) 1478 return; 1479 1480 for (i = 0; i < ha->num_rx_rings; i++) { 1481 lro = &ha->rx_ring[i].lro; 1482 tcp_lro_free(lro); 1483 } 1484 ha->flags.lro_init = 0; 1485 } 1486 1487 static void 1488 qls_error_recovery(void *context, int pending) 1489 { 1490 qla_host_t *ha = context; 1491 1492 qls_init(ha); 1493 1494 return; 1495 } 1496