xref: /freebsd/sys/dev/rtwn/rtl8192c/r92c_priv.h (revision 1f474190)
1 /*-
2  * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr>
3  * Copyright (c) 2016 Andriy Voskoboinyk <avos@FreeBSD.org>
4  *
5  * Permission to use, copy, modify, and distribute this software for any
6  * purpose with or without fee is hereby granted, provided that the above
7  * copyright notice and this permission notice appear in all copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16  *
17  * $OpenBSD: if_urtwnreg.h,v 1.3 2010/11/16 18:02:59 damien Exp $
18  * $FreeBSD$
19  */
20 
21 #ifndef R92C_PRIV_H
22 #define R92C_PRIV_H
23 
24 #include <dev/rtwn/rtl8192c/r92c_rom_defs.h>
25 
26 /*
27  * Parsed Tx power (diff) values.
28  */
29 struct rtwn_r92c_txpwr {
30 	uint8_t		cck_tx_pwr[R92C_MAX_CHAINS][R92C_GROUP_2G];
31 	uint8_t		ht40_1s_tx_pwr[R92C_MAX_CHAINS][R92C_GROUP_2G];
32 	int8_t		ht40_2s_tx_pwr_diff[R92C_MAX_CHAINS][R92C_GROUP_2G];
33 	int8_t		ht20_tx_pwr_diff[R92C_MAX_CHAINS][R92C_GROUP_2G];
34 	int8_t		ofdm_tx_pwr_diff[R92C_MAX_CHAINS][R92C_GROUP_2G];
35 	int8_t		ht40_max_pwr[R92C_MAX_CHAINS][R92C_GROUP_2G];
36 	int8_t		ht20_max_pwr[R92C_MAX_CHAINS][R92C_GROUP_2G];
37 };
38 
39 /*
40  * Baseband initialization values (shared parts).
41  */
42 #define R92C_COND_RTL8188CE	0x01
43 #define R92C_COND_RTL8188CU	0x02
44 #define R92C_COND_RTL8188RU	0x04
45 #define R92C_COND_RTL8192CE	0x08
46 #define R92C_COND_RTL8192CU	0x10
47 
48 /* Shortcut. */
49 #define R92C_COND_RTL8192C	(R92C_COND_RTL8192CE | R92C_COND_RTL8192CU)
50 
51 static const uint16_t rtl8192c_bb_regs3[] = {
52 	0xd04
53 }, rtl8192c_bb_regs4[] = {
54 	0xd08, 0xd0c, 0xd10, 0xd14, 0xd18, 0xd2c, 0xd30, 0xd34, 0xd38,
55 	0xd3c, 0xd40, 0xd44, 0xd48, 0xd4c, 0xd50, 0xd54, 0xd58, 0xd5c,
56 	0xd60, 0xd64, 0xd68, 0xd6c, 0xd70, 0xd74, 0xd78, 0xe00, 0xe04,
57 	0xe08, 0xe10, 0xe14, 0xe18, 0xe1c, 0xe28, 0xe30, 0xe34, 0xe38,
58 	0xe3c, 0xe40, 0xe44, 0xe48, 0xe4c, 0xe50, 0xe54, 0xe58, 0xe5c
59 }, rtl8192c_bb_regs5[] = {
60 	0xe60, 0xe68, 0xe6c, 0xe70, 0xe74, 0xe78, 0xe7c, 0xe80, 0xe84,
61 	0xe88, 0xe8c, 0xed0, 0xed4, 0xed8, 0xedc, 0xee0, 0xeec, 0xf14,
62 	0xf4c, 0xf00
63 };
64 
65 static const uint32_t rtl8192c_bb_vals3_88cu_88ru[] = {
66 	0x00020401
67 }, rtl8192c_bb_vals3_92ce_92cu[] = {
68 	0x00020403
69 }, rtl8192c_bb_vals4[] = {
70 	0x0000907f, 0x20010201, 0xa0633333, 0x3333bc43, 0x7a8f5b6b,
71 	0xcc979975, 0x00000000, 0x80608000, 0x00000000, 0x00027293,
72 	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x6437140a,
73 	0x00000000, 0x00000000, 0x30032064, 0x4653de68, 0x04518a3c,
74 	0x00002101, 0x2a201c16, 0x1812362e, 0x322c2220, 0x000e3c24,
75 	0x2a2a2a2a, 0x2a2a2a2a, 0x03902a2a, 0x2a2a2a2a, 0x2a2a2a2a,
76 	0x2a2a2a2a, 0x2a2a2a2a, 0x00000000, 0x1000dc1f, 0x10008c1f,
77 	0x02140102, 0x681604c2, 0x01007c00, 0x01004800, 0xfb000000,
78 	0x000028d1, 0x1000dc1f, 0x10008c1f, 0x02140102, 0x28160d05
79 },rtl8192c_bb_vals5_92ce_92cu[] = {
80 	0x00000010, 0x001b25a4, 0x63db25a4, 0x63db25a4, 0x0c1b25a4,
81 	0x0c1b25a4, 0x0c1b25a4, 0x0c1b25a4, 0x63db25a4, 0x0c1b25a4,
82 	0x63db25a4, 0x63db25a4, 0x63db25a4, 0x63db25a4, 0x001b25a4,
83 	0x001b25a4, 0x6fdb25a4, 0x00000003, 0x00000000, 0x00000300
84 };
85 
86 /*
87  * RTL8192CU and RTL8192CE-VAU.
88  */
89 
90 static const uint32_t rtl8192ce_agc_vals[] = {
91 	0x7b000001, 0x7b010001, 0x7b020001, 0x7b030001, 0x7b040001,
92 	0x7b050001, 0x7a060001, 0x79070001, 0x78080001, 0x77090001,
93 	0x760a0001, 0x750b0001, 0x740c0001, 0x730d0001, 0x720e0001,
94 	0x710f0001, 0x70100001, 0x6f110001, 0x6e120001, 0x6d130001,
95 	0x6c140001, 0x6b150001, 0x6a160001, 0x69170001, 0x68180001,
96 	0x67190001, 0x661a0001, 0x651b0001, 0x641c0001, 0x631d0001,
97 	0x621e0001, 0x611f0001, 0x60200001, 0x49210001, 0x48220001,
98 	0x47230001, 0x46240001, 0x45250001, 0x44260001, 0x43270001,
99 	0x42280001, 0x41290001, 0x402a0001, 0x262b0001, 0x252c0001,
100 	0x242d0001, 0x232e0001, 0x222f0001, 0x21300001, 0x20310001,
101 	0x06320001, 0x05330001, 0x04340001, 0x03350001, 0x02360001,
102 	0x01370001, 0x00380001, 0x00390001, 0x003a0001, 0x003b0001,
103 	0x003c0001, 0x003d0001, 0x003e0001, 0x003f0001, 0x7b400001,
104 	0x7b410001, 0x7b420001, 0x7b430001, 0x7b440001, 0x7b450001,
105 	0x7a460001, 0x79470001, 0x78480001, 0x77490001, 0x764a0001,
106 	0x754b0001, 0x744c0001, 0x734d0001, 0x724e0001, 0x714f0001,
107 	0x70500001, 0x6f510001, 0x6e520001, 0x6d530001, 0x6c540001,
108 	0x6b550001, 0x6a560001, 0x69570001, 0x68580001, 0x67590001,
109 	0x665a0001, 0x655b0001, 0x645c0001, 0x635d0001, 0x625e0001,
110 	0x615f0001, 0x60600001, 0x49610001, 0x48620001, 0x47630001,
111 	0x46640001, 0x45650001, 0x44660001, 0x43670001, 0x42680001,
112 	0x41690001, 0x406a0001, 0x266b0001, 0x256c0001, 0x246d0001,
113 	0x236e0001, 0x226f0001, 0x21700001, 0x20710001, 0x06720001,
114 	0x05730001, 0x04740001, 0x03750001, 0x02760001, 0x01770001,
115 	0x00780001, 0x00790001, 0x007a0001, 0x007b0001, 0x007c0001,
116 	0x007d0001, 0x007e0001, 0x007f0001, 0x3800001e, 0x3801001e,
117 	0x3802001e, 0x3803001e, 0x3804001e, 0x3805001e, 0x3806001e,
118 	0x3807001e, 0x3808001e, 0x3c09001e, 0x3e0a001e, 0x400b001e,
119 	0x440c001e, 0x480d001e, 0x4c0e001e, 0x500f001e, 0x5210001e,
120 	0x5611001e, 0x5a12001e, 0x5e13001e, 0x6014001e, 0x6015001e,
121 	0x6016001e, 0x6217001e, 0x6218001e, 0x6219001e, 0x621a001e,
122 	0x621b001e, 0x621c001e, 0x621d001e, 0x621e001e, 0x621f001e
123 };
124 
125 static const struct rtwn_agc_prog rtl8192ce_agc[] = {
126 	{
127 		nitems(rtl8192ce_agc_vals),
128 		rtl8192ce_agc_vals,
129 		{ 0 },
130 		NULL
131 	}
132 };
133 
134 /*
135  * RF initialization values.
136  */
137 static const uint8_t rtl8192c_rf0_regs0[] = {
138 	0x00, 0x01, 0x02, 0x03, 0x04, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
139 	0x0f, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, 0x20, 0x21
140 }, rtl8192c_rf0_regs1[] = {
141 	0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28
142 }, rtl8192c_rf0_regs2[] = {
143 	0x29, 0x2a, 0x2b, 0x2a, 0x2b, 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 0x2b,
144 	0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 0x2c, 0x2a,
145 	0x2b, 0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 0x2c,
146 	0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 0x2b, 0x2b,
147 	0x2c, 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 0x2b,
148 	0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 0x10, 0x11, 0x10, 0x11,
149 	0x10, 0x11, 0x10, 0x11, 0x10, 0x11, 0x10, 0x11, 0x10, 0x11
150 }, rtl8192c_rf0_regs3[] = {
151 	0x12, 0x12, 0x12, 0x12, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13,
152 	0x13, 0x13, 0x13, 0x13
153 }, rtl8192c_rf0_regs4[] = {
154 	0x14, 0x14, 0x14, 0x14, 0x15, 0x15, 0x15, 0x15
155 }, rtl8192c_rf0_regs5[] = {
156 	0x16, 0x16, 0x16, 0x16, 0x00, 0x18, 0xfe, 0xfe, 0x1f, 0xfe, 0xfe,
157 	0x1e, 0x1f, 0x00
158 };
159 
160 static const uint32_t rtl8192c_rf0_vals0_88ce_88cu_92ce[] = {
161 	0x30159, 0x31284, 0x98000, 0x18c63, 0x210e7, 0x2044f, 0x1adb1,
162 	0x54867, 0x8992e, 0x0e52c, 0x39ce7, 0x00451, 0x00000, 0x10255,
163 	0x60a00, 0xfc378, 0xa1250, 0x4445f, 0x80001, 0x0b614, 0x6c000
164 }, rtl8192c_rf0_vals0_88ru[] = {
165 	0x30159, 0x31284, 0x98000, 0x18c63, 0x210e7, 0x2044f, 0x1adb0,
166 	0x54867, 0x8992e, 0x0e529, 0x39ce7, 0x00451, 0x00000, 0x00255,
167 	0x60a00, 0xfc378, 0xa1250, 0x4445f, 0x80001, 0x0b614, 0x6c000
168 }, rtl8192c_rf0_vals1_88ru[] = {
169 	0x0083c, 0x01558, 0x00060, 0x00483, 0x4f000, 0xec7d9, 0x977c0
170 }, rtl8192c_rf0_vals1_88ce[] = {
171 	0x00000, 0x01558, 0x00060, 0x00483, 0x4f200, 0xec7d9, 0x577c0
172 }, rtl8192c_rf0_vals1_88cu_92ce[] = {
173 	0x00000, 0x01558, 0x00060, 0x00483, 0x4f000, 0xec7d9, 0x577c0
174 }, rtl8192c_rf0_vals2[] = {
175 	0x04783, 0x00001, 0x21334, 0x00000, 0x00054, 0x00001, 0x00808,
176 	0x53333, 0x0000c, 0x00002, 0x00808, 0x5b333, 0x0000d, 0x00003,
177 	0x00808, 0x63333, 0x0000d, 0x00004, 0x00808, 0x6b333, 0x0000d,
178 	0x00005, 0x00808, 0x73333, 0x0000d, 0x00006, 0x00709, 0x5b333,
179 	0x0000d, 0x00007, 0x00709, 0x63333, 0x0000d, 0x00008, 0x0060a,
180 	0x4b333, 0x0000d, 0x00009, 0x0060a, 0x53333, 0x0000d, 0x0000a,
181 	0x0060a, 0x5b333, 0x0000d, 0x0000b, 0x0060a, 0x63333, 0x0000d,
182 	0x0000c, 0x0060a, 0x6b333, 0x0000d, 0x0000d, 0x0060a, 0x73333,
183 	0x0000d, 0x0000e, 0x0050b, 0x66666, 0x0001a, 0xe0000, 0x4000f,
184 	0xe31fc, 0x6000f, 0xff9f8, 0x2000f, 0x203f9, 0x3000f, 0xff500,
185 	0x00000, 0x00000, 0x8000f, 0x3f100, 0x9000f, 0x23100
186 }, rtl8192c_rf0_vals3_88ru[] = {
187 	0xd8000, 0x90000, 0x51000, 0x12000, 0x28fb4, 0x24fa8, 0x207a4,
188 	0x1c798, 0x183a4, 0x14398, 0x101a4, 0x0c198, 0x080a4, 0x04098,
189 	0x00014
190 }, rtl8192c_rf0_vals3_92ce[] = {
191 	0x32000, 0x71000, 0xb0000, 0xfc000, 0x287af, 0x244b7, 0x204ab,
192 	0x1c49f, 0x18493, 0x14297, 0x10295, 0x0c298, 0x0819c, 0x040a8,
193 	0x0001c
194 }, rtl8192c_rf0_vals3_88cu_88ce[] = {
195 	0x32000, 0x71000, 0xb0000, 0xfc000, 0x287b3, 0x244b7, 0x204ab,
196 	0x1c49f, 0x18493, 0x1429b, 0x10299, 0x0c29c, 0x081a0, 0x040ac,
197 	0x00020
198 }, rtl8192c_rf0_vals4_92ce_88ce[] = {
199 	0x1944c, 0x59444, 0x9944c, 0xd9444, 0x0f424, 0x4f424, 0x8f424,
200 	0xcf424
201 }, rtl8192c_rf0_vals4_88cu_88ru[] = {
202 	0x1944c, 0x59444, 0x9944c, 0xd9444, 0x0f405, 0x4f405, 0x8f405,
203 	0xcf405
204 }, rtl8192c_rf0_vals5[] = {
205 	0xe0330, 0xa0330, 0x60330, 0x20330, 0x10159, 0x0f401, 0x0c350,
206 	0x0c350, 0x80003, 0x0c350, 0x0c350, 0x44457, 0x80000, 0x30159
207 };
208 
209 static const struct rtwn_rf_prog rtl8192c_rf[] = {
210 	/* RF chain 0 */
211 	/* RTL8188RU. */
212 	{
213 		nitems(rtl8192c_rf0_regs0),
214 		rtl8192c_rf0_regs0,
215 		rtl8192c_rf0_vals0_88ru,
216 		{ R92C_COND_RTL8188RU },
217 		/* Others. */
218 		&(const struct rtwn_rf_prog){
219 			nitems(rtl8192c_rf0_regs0),
220 			rtl8192c_rf0_regs0,
221 			rtl8192c_rf0_vals0_88ce_88cu_92ce,
222 			{ 0 },
223 			NULL
224 		}
225 	},
226 	/* RTL8188RU. */
227 	{
228 		nitems(rtl8192c_rf0_regs1),
229 		rtl8192c_rf0_regs1,
230 		rtl8192c_rf0_vals1_88ru,
231 		{ R92C_COND_RTL8188RU },
232 		/* RTL8188CE. */
233 		&(const struct rtwn_rf_prog){
234 			nitems(rtl8192c_rf0_regs1),
235 			rtl8192c_rf0_regs1,
236 			rtl8192c_rf0_vals1_88ce,
237 			{ R92C_COND_RTL8188CE },
238 			/* Others. */
239 			&(const struct rtwn_rf_prog){
240 				nitems(rtl8192c_rf0_regs1),
241 				rtl8192c_rf0_regs1,
242 				rtl8192c_rf0_vals1_88cu_92ce,
243 				{ 0 },
244 				NULL
245 			}
246 		}
247 	},
248 	{
249 		nitems(rtl8192c_rf0_regs2),
250 		rtl8192c_rf0_regs2,
251 		rtl8192c_rf0_vals2,
252 		{ 0 },
253 		NULL
254 	},
255 	/* RTL8188RU. */
256 	{
257 		nitems(rtl8192c_rf0_regs3),
258 		rtl8192c_rf0_regs3,
259 		rtl8192c_rf0_vals3_88ru,
260 		{ R92C_COND_RTL8188RU },
261 		/* RTL8192C. */
262 		&(const struct rtwn_rf_prog){
263 			nitems(rtl8192c_rf0_regs3),
264 			rtl8192c_rf0_regs3,
265 			rtl8192c_rf0_vals3_92ce,
266 			{ R92C_COND_RTL8192C },
267 			/* Others. */
268 			&(struct rtwn_rf_prog){
269 				nitems(rtl8192c_rf0_regs3),
270 				rtl8192c_rf0_regs3,
271 				rtl8192c_rf0_vals3_88cu_88ce,
272 				{ 0 },
273 				NULL
274 			}
275 		}
276 	},
277 	/* RTL8188CE / RTL8192C. */
278 	{
279 		nitems(rtl8192c_rf0_regs4),
280 		rtl8192c_rf0_regs4,
281 		rtl8192c_rf0_vals4_92ce_88ce,
282 		{ R92C_COND_RTL8188CE | R92C_COND_RTL8192C },
283 		/* Others. */
284 		&(const struct rtwn_rf_prog){
285 			nitems(rtl8192c_rf0_regs4),
286 			rtl8192c_rf0_regs4,
287 			rtl8192c_rf0_vals4_88cu_88ru,
288 			{ 0 },
289 			NULL
290 		}
291 	},
292 	{
293 		nitems(rtl8192c_rf0_regs5),
294 		rtl8192c_rf0_regs5,
295 		rtl8192c_rf0_vals5,
296 		{ 0 },
297 		NULL
298 	},
299 	{ 0, NULL, NULL, { 0 }, NULL },
300 	/* RF chain 1 (RTL8192C). */
301 	{
302 		12,				/* 0x00 - 0x0f */
303 		rtl8192c_rf0_regs0,
304 		rtl8192c_rf0_vals0_88ce_88cu_92ce,
305 		{ 0 },
306 		NULL
307 	},
308 	{
309 		nitems(rtl8192c_rf0_regs3),	/* 0x12 - 0x13 */
310 		rtl8192c_rf0_regs3,
311 		rtl8192c_rf0_vals3_92ce,
312 		{ 0 },
313 		NULL
314 	},
315 	{
316 		nitems(rtl8192c_rf0_regs4),	/* 0x14 - 0x15 */
317 		rtl8192c_rf0_regs4,
318 		rtl8192c_rf0_vals4_92ce_88ce,
319 		{ 0 },
320 		NULL
321 	},
322 	{
323 		4,				/* 0x16 */
324 		rtl8192c_rf0_regs5,
325 		rtl8192c_rf0_vals5,
326 		{ 0 },
327 		NULL
328 	},
329 	{ 0, NULL, NULL, { 0 }, NULL }
330 };
331 
332 struct rtwn_r92c_txagc {
333 	uint8_t	pwr[R92C_GROUP_2G][28];	/* RTWN_RIDX_HT_MCS(15) + 1 */
334 };
335 
336 /*
337  * Per RF chain/group/rate Tx gain values.
338  */
339 static const struct rtwn_r92c_txagc rtl8192cu_txagc[] = {
340 	{ {	/* Chain 0. */
341 	{	/* Group 0. */
342 	0x00, 0x00, 0x00, 0x00,				/* CCK1~11. */
343 	0x0c, 0x0c, 0x0c, 0x0a, 0x08, 0x06, 0x04, 0x02,	/* OFDM6~54. */
344 	0x0e, 0x0d, 0x0c, 0x0a, 0x08, 0x06, 0x04, 0x02,	/* MCS0~7. */
345 	0x0e, 0x0d, 0x0c, 0x0a, 0x08, 0x06, 0x04, 0x02	/* MCS8~15. */
346 	},
347 	{	/* Group 1. */
348 	0x00, 0x00, 0x00, 0x00,				/* CCK1~11. */
349 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,	/* OFDM6~54. */
350 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,	/* MCS0~7. */
351 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00	/* MCS8~15. */
352 	},
353 	{	/* Group 2. */
354 	0x00, 0x00, 0x00, 0x00,				/* CCK1~11. */
355 	0x04, 0x04, 0x04, 0x04, 0x04, 0x02, 0x02, 0x00,	/* OFDM6~54. */
356 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,	/* MCS0~7. */
357 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00	/* MCS8~15. */
358 	}
359 	} },
360 	{ {	/* Chain 1. */
361 	{	/* Group 0. */
362 	0x00, 0x00, 0x00, 0x00,				/* CCK1~11. */
363 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,	/* OFDM6~54. */
364 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,	/* MCS0~7. */
365 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00	/* MCS8~15. */
366 	},
367 	{	/* Group 1. */
368 	0x00, 0x00, 0x00, 0x00,				/* CCK1~11. */
369 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,	/* OFDM6~54. */
370 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,	/* MCS0~7. */
371 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00	/* MCS8~15. */
372 	},
373 	{	/* Group 2. */
374 	0x00, 0x00, 0x00, 0x00,				/* CCK1~11. */
375 	0x04, 0x04, 0x04, 0x04, 0x04, 0x02, 0x02, 0x00,	/* OFDM6~54. */
376 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,	/* MCS0~7. */
377 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00	/* MCS8~15. */
378 	}
379 	} }
380 };
381 
382 static const struct rtwn_r92c_txagc rtl8188ru_txagc[] = {
383 	{ {	/* Chain 0. */
384 	{	/* Group 0. */
385 	0x00, 0x00, 0x00, 0x00,				/* CCK1~11. */
386 	0x08, 0x08, 0x08, 0x06, 0x06, 0x04, 0x04, 0x00,	/* OFDM6~54. */
387 	0x08, 0x06, 0x06, 0x04, 0x04, 0x02, 0x02, 0x00,	/* MCS0~7. */
388 	0x08, 0x06, 0x06, 0x04, 0x04, 0x02, 0x02, 0x00	/* MCS8~15. */
389 	},
390 	{	/* Group 1. */
391 	0x00, 0x00, 0x00, 0x00,				/* CCK1~11. */
392 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,	/* OFDM6~54. */
393 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,	/* MCS0~7. */
394 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00	/* MCS8~15. */
395 	},
396 	{	/* Group 2. */
397 	0x00, 0x00, 0x00, 0x00,				/* CCK1~11. */
398 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,	/* OFDM6~54. */
399 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,	/* MCS0~7. */
400 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00	/* MCS8~15. */
401 	}
402 	} }
403 };
404 
405 #endif	/* R92C_PRIV_H */
406